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1a94ca49 | 1 | /* Definitions of target machine for GNU compiler, for DEC Alpha. |
34fa88ab | 2 | Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. |
1e6c6f11 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
1a94ca49 RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
20 | ||
21 | ||
22 | /* Names to predefine in the preprocessor for this target machine. */ | |
23 | ||
24 | #define CPP_PREDEFINES "\ | |
25 | -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \ | |
65c42379 | 26 | -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)" |
1a94ca49 | 27 | |
21798cd8 RK |
28 | /* Write out the correct language type definition for the header files. |
29 | Unless we have assembler language, write out the symbols for C. */ | |
1a94ca49 | 30 | #define CPP_SPEC "\ |
21798cd8 | 31 | %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \ |
1a94ca49 | 32 | %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ |
21798cd8 RK |
33 | %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ |
34 | %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ | |
35 | %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ | |
1a94ca49 RK |
36 | %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C}" |
37 | ||
38 | /* Set the spec to use for signed char. The default tests the above macro | |
39 | but DEC's compiler can't handle the conditional in a "constant" | |
40 | operand. */ | |
41 | ||
42 | #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}" | |
43 | ||
7981384f RK |
44 | /* No point in running CPP on our assembler output. */ |
45 | #define ASM_SPEC "-nocpp" | |
46 | ||
d621c38b | 47 | /* Right now Alpha OSF/1 doesn't seem to have debugging libraries. */ |
1a94ca49 | 48 | |
85d159a3 | 49 | #define LIB_SPEC "%{p:-lprof1} %{pg:-lprof2} -lc" |
1a94ca49 | 50 | |
65823178 | 51 | /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are optimizing, |
8877eb00 RK |
52 | -O1 if we are not. Pass -non_shared or -call_shared as appropriate. */ |
53 | #define LINK_SPEC \ | |
54190234 JM |
54 | "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} %{!static:-call_shared} \ |
55 | -init __main" | |
8877eb00 | 56 | |
85d159a3 RK |
57 | #define STARTFILE_SPEC \ |
58 | "%{pg:mcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}" | |
59 | ||
1a94ca49 RK |
60 | /* Print subsidiary information on the compiler version in use. */ |
61 | #define TARGET_VERSION | |
62 | ||
63 | /* Define the location for the startup file on OSF/1 for Alpha. */ | |
64 | ||
65 | #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" | |
66 | ||
67 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
68 | ||
69 | extern int target_flags; | |
70 | ||
71 | /* This means that floating-point support exists in the target implementation | |
72 | of the Alpha architecture. This is usually the default. */ | |
73 | ||
74 | #define TARGET_FP (target_flags & 1) | |
75 | ||
76 | /* This means that floating-point registers are allowed to be used. Note | |
77 | that Alpha implementations without FP operations are required to | |
78 | provide the FP registers. */ | |
79 | ||
03f8c4cc RK |
80 | #define TARGET_FPREGS (target_flags & 2) |
81 | ||
82 | /* This means that gas is used to process the assembler file. */ | |
83 | ||
84 | #define MASK_GAS 4 | |
85 | #define TARGET_GAS (target_flags & MASK_GAS) | |
1a94ca49 RK |
86 | |
87 | /* Macro to define tables used to set the flags. | |
88 | This is a list in braces of pairs in braces, | |
89 | each pair being { "NAME", VALUE } | |
90 | where VALUE is the bits to set or minus the bits to clear. | |
91 | An empty string NAME is used to identify the default VALUE. */ | |
92 | ||
93 | #define TARGET_SWITCHES \ | |
94 | { {"no-soft-float", 1}, \ | |
95 | {"soft-float", -1}, \ | |
96 | {"fp-regs", 2}, \ | |
97 | {"no-fp-regs", -3}, \ | |
03f8c4cc RK |
98 | {"alpha-as", -MASK_GAS}, \ |
99 | {"gas", MASK_GAS}, \ | |
88681624 | 100 | {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} } |
1a94ca49 RK |
101 | |
102 | #define TARGET_DEFAULT 3 | |
103 | ||
88681624 ILT |
104 | #ifndef TARGET_CPU_DEFAULT |
105 | #define TARGET_CPU_DEFAULT 0 | |
106 | #endif | |
107 | ||
1a94ca49 RK |
108 | /* Define this macro to change register usage conditional on target flags. |
109 | ||
110 | On the Alpha, we use this to disable the floating-point registers when | |
111 | they don't exist. */ | |
112 | ||
113 | #define CONDITIONAL_REGISTER_USAGE \ | |
114 | if (! TARGET_FPREGS) \ | |
52a69200 | 115 | for (i = 32; i < 63; i++) \ |
1a94ca49 RK |
116 | fixed_regs[i] = call_used_regs[i] = 1; |
117 | ||
4f074454 RK |
118 | /* Show we can debug even without a frame pointer. */ |
119 | #define CAN_DEBUG_WITHOUT_FP | |
1a94ca49 RK |
120 | \f |
121 | /* target machine storage layout */ | |
122 | ||
2700ac93 RS |
123 | /* Define to enable software floating point emulation. */ |
124 | #define REAL_ARITHMETIC | |
125 | ||
1a94ca49 RK |
126 | /* Define the size of `int'. The default is the same as the word size. */ |
127 | #define INT_TYPE_SIZE 32 | |
128 | ||
129 | /* Define the size of `long long'. The default is the twice the word size. */ | |
130 | #define LONG_LONG_TYPE_SIZE 64 | |
131 | ||
132 | /* The two floating-point formats we support are S-floating, which is | |
133 | 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' | |
134 | and `long double' are T. */ | |
135 | ||
136 | #define FLOAT_TYPE_SIZE 32 | |
137 | #define DOUBLE_TYPE_SIZE 64 | |
138 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
139 | ||
140 | #define WCHAR_TYPE "short unsigned int" | |
141 | #define WCHAR_TYPE_SIZE 16 | |
142 | ||
13d39dbc | 143 | /* Define this macro if it is advisable to hold scalars in registers |
1a94ca49 RK |
144 | in a wider mode than that declared by the program. In such cases, |
145 | the value is constrained to be within the bounds of the declared | |
146 | type, but kept valid in the wider mode. The signedness of the | |
147 | extension may differ from that of the type. | |
148 | ||
149 | For Alpha, we always store objects in a full register. 32-bit objects | |
150 | are always sign-extended, but smaller objects retain their signedness. */ | |
151 | ||
152 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
153 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
154 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
155 | { \ | |
156 | if ((MODE) == SImode) \ | |
157 | (UNSIGNEDP) = 0; \ | |
158 | (MODE) = DImode; \ | |
159 | } | |
160 | ||
161 | /* Define this if function arguments should also be promoted using the above | |
162 | procedure. */ | |
163 | ||
164 | #define PROMOTE_FUNCTION_ARGS | |
165 | ||
166 | /* Likewise, if the function return value is promoted. */ | |
167 | ||
168 | #define PROMOTE_FUNCTION_RETURN | |
169 | ||
170 | /* Define this if most significant bit is lowest numbered | |
171 | in instructions that operate on numbered bit-fields. | |
172 | ||
173 | There are no such instructions on the Alpha, but the documentation | |
174 | is little endian. */ | |
175 | #define BITS_BIG_ENDIAN 0 | |
176 | ||
177 | /* Define this if most significant byte of a word is the lowest numbered. | |
178 | This is false on the Alpha. */ | |
179 | #define BYTES_BIG_ENDIAN 0 | |
180 | ||
181 | /* Define this if most significant word of a multiword number is lowest | |
182 | numbered. | |
183 | ||
184 | For Alpha we can decide arbitrarily since there are no machine instructions | |
185 | for them. Might as well be consistent with bytes. */ | |
186 | #define WORDS_BIG_ENDIAN 0 | |
187 | ||
188 | /* number of bits in an addressable storage unit */ | |
189 | #define BITS_PER_UNIT 8 | |
190 | ||
191 | /* Width in bits of a "word", which is the contents of a machine register. | |
192 | Note that this is not necessarily the width of data type `int'; | |
193 | if using 16-bit ints on a 68000, this would still be 32. | |
194 | But on a machine with 16-bit registers, this would be 16. */ | |
195 | #define BITS_PER_WORD 64 | |
196 | ||
197 | /* Width of a word, in units (bytes). */ | |
198 | #define UNITS_PER_WORD 8 | |
199 | ||
200 | /* Width in bits of a pointer. | |
201 | See also the macro `Pmode' defined below. */ | |
202 | #define POINTER_SIZE 64 | |
203 | ||
204 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
205 | #define PARM_BOUNDARY 64 | |
206 | ||
207 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
208 | #define STACK_BOUNDARY 64 | |
209 | ||
210 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
211 | #define FUNCTION_BOUNDARY 64 | |
212 | ||
213 | /* Alignment of field after `int : 0' in a structure. */ | |
214 | #define EMPTY_FIELD_BOUNDARY 64 | |
215 | ||
216 | /* Every structure's size must be a multiple of this. */ | |
217 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
218 | ||
219 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
220 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
221 | ||
65823178 RK |
222 | /* Align loop starts for optimal branching. |
223 | ||
224 | ??? Kludge this and the next macro for the moment by not doing anything if | |
225 | we don't optimize and also if we are writing ECOFF symbols to work around | |
226 | a bug in DEC's assembler. */ | |
1a94ca49 | 227 | |
130d2d72 | 228 | #define ASM_OUTPUT_LOOP_ALIGN(FILE) \ |
65823178 RK |
229 | if (optimize > 0 && write_symbols != SDB_DEBUG) \ |
230 | ASM_OUTPUT_ALIGN (FILE, 5) | |
1a94ca49 RK |
231 | |
232 | /* This is how to align an instruction for optimal branching. | |
233 | On Alpha we'll get better performance by aligning on a quadword | |
234 | boundary. */ | |
130d2d72 | 235 | |
1a94ca49 | 236 | #define ASM_OUTPUT_ALIGN_CODE(FILE) \ |
65823178 RK |
237 | if (optimize > 0 && write_symbols != SDB_DEBUG) \ |
238 | ASM_OUTPUT_ALIGN ((FILE), 4) | |
1a94ca49 RK |
239 | |
240 | /* No data type wants to be aligned rounder than this. */ | |
241 | #define BIGGEST_ALIGNMENT 64 | |
242 | ||
243 | /* Make strings word-aligned so strcpy from constants will be faster. */ | |
244 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ | |
245 | (TREE_CODE (EXP) == STRING_CST \ | |
246 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
247 | ||
248 | /* Make arrays of chars word-aligned for the same reasons. */ | |
249 | #define DATA_ALIGNMENT(TYPE, ALIGN) \ | |
250 | (TREE_CODE (TYPE) == ARRAY_TYPE \ | |
251 | && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ | |
252 | && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) | |
253 | ||
254 | /* Set this non-zero if move instructions will actually fail to work | |
255 | when given unaligned data. | |
256 | ||
257 | Since we get an error message when we do one, call them invalid. */ | |
258 | ||
259 | #define STRICT_ALIGNMENT 1 | |
260 | ||
261 | /* Set this non-zero if unaligned move instructions are extremely slow. | |
262 | ||
263 | On the Alpha, they trap. */ | |
130d2d72 RK |
264 | |
265 | #define SLOW_UNALIGNED_ACCESS 1 | |
1a94ca49 RK |
266 | \f |
267 | /* Standard register usage. */ | |
268 | ||
269 | /* Number of actual hardware registers. | |
270 | The hardware registers are assigned numbers for the compiler | |
271 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
272 | All registers that the compiler knows about must be given numbers, | |
273 | even those that are not normally considered general registers. | |
274 | ||
275 | We define all 32 integer registers, even though $31 is always zero, | |
276 | and all 32 floating-point registers, even though $f31 is also | |
277 | always zero. We do not bother defining the FP status register and | |
130d2d72 RK |
278 | there are no other registers. |
279 | ||
280 | Since $31 is always zero, we will use register number 31 as the | |
281 | argument pointer. It will never appear in the generated code | |
282 | because we will always be eliminating it in favor of the stack | |
52a69200 RK |
283 | pointer or hardware frame pointer. |
284 | ||
285 | Likewise, we use $f31 for the frame pointer, which will always | |
286 | be eliminated in favor of the hardware frame pointer or the | |
287 | stack pointer. */ | |
1a94ca49 RK |
288 | |
289 | #define FIRST_PSEUDO_REGISTER 64 | |
290 | ||
291 | /* 1 for registers that have pervasive standard uses | |
292 | and are not available for the register allocator. */ | |
293 | ||
294 | #define FIXED_REGISTERS \ | |
295 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
296 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ | |
297 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
298 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
299 | ||
300 | /* 1 for registers not available across function calls. | |
301 | These must include the FIXED_REGISTERS and also any | |
302 | registers that can be used without being saved. | |
303 | The latter must include the registers where values are returned | |
304 | and the register where structure-value addresses are passed. | |
305 | Aside from that, you can include as many other registers as you like. */ | |
306 | #define CALL_USED_REGISTERS \ | |
307 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ | |
308 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ | |
309 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ | |
310 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
311 | ||
312 | /* List the order in which to allocate registers. Each register must be | |
313 | listed once, even those in FIXED_REGISTERS. | |
314 | ||
315 | We allocate in the following order: | |
316 | $f1 (nonsaved floating-point register) | |
317 | $f10-$f15 (likewise) | |
318 | $f22-$f30 (likewise) | |
319 | $f21-$f16 (likewise, but input args) | |
320 | $f0 (nonsaved, but return value) | |
321 | $f2-$f9 (saved floating-point registers) | |
322 | $1-$8 (nonsaved integer registers) | |
323 | $22-$25 (likewise) | |
324 | $28 (likewise) | |
325 | $0 (likewise, but return value) | |
326 | $21-$16 (likewise, but input args) | |
327 | $27 (procedure value) | |
328 | $9-$14 (saved integer registers) | |
329 | $26 (return PC) | |
330 | $15 (frame pointer) | |
331 | $29 (global pointer) | |
52a69200 | 332 | $30, $31, $f31 (stack pointer and always zero/ap & fp) */ |
1a94ca49 RK |
333 | |
334 | #define REG_ALLOC_ORDER \ | |
335 | {33, \ | |
da01bc2c | 336 | 42, 43, 44, 45, 46, 47, \ |
1a94ca49 RK |
337 | 54, 55, 56, 57, 58, 59, 60, 61, 62, \ |
338 | 53, 52, 51, 50, 49, 48, \ | |
339 | 32, \ | |
340 | 34, 35, 36, 37, 38, 39, 40, 41, \ | |
341 | 1, 2, 3, 4, 5, 6, 7, 8, \ | |
342 | 22, 23, 24, 25, \ | |
343 | 28, \ | |
344 | 0, \ | |
345 | 21, 20, 19, 18, 17, 16, \ | |
346 | 27, \ | |
347 | 9, 10, 11, 12, 13, 14, \ | |
348 | 26, \ | |
349 | 15, \ | |
350 | 29, \ | |
351 | 30, 31, 63 } | |
352 | ||
353 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
354 | to hold something of mode MODE. | |
355 | This is ordinarily the length in words of a value of mode MODE | |
356 | but can be less for certain modes in special long registers. */ | |
357 | ||
358 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
359 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
360 | ||
361 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
362 | On Alpha, the integer registers can hold any mode. The floating-point | |
363 | registers can hold 32-bit and 64-bit integers as well, but not 16-bit | |
364 | or 8-bit values. If we only allowed the larger integers into FP registers, | |
365 | we'd have to say that QImode and SImode aren't tiable, which is a | |
366 | pain. So say all registers can hold everything and see how that works. */ | |
367 | ||
368 | #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 | |
369 | ||
370 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
371 | when one has mode MODE1 and one has mode MODE2. | |
372 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
373 | for any hard reg, then this must be 0 for correct output. */ | |
374 | ||
375 | #define MODES_TIEABLE_P(MODE1, MODE2) 1 | |
376 | ||
377 | /* Specify the registers used for certain standard purposes. | |
378 | The values of these macros are register numbers. */ | |
379 | ||
380 | /* Alpha pc isn't overloaded on a register that the compiler knows about. */ | |
381 | /* #define PC_REGNUM */ | |
382 | ||
383 | /* Register to use for pushing function arguments. */ | |
384 | #define STACK_POINTER_REGNUM 30 | |
385 | ||
386 | /* Base register for access to local variables of the function. */ | |
52a69200 | 387 | #define HARD_FRAME_POINTER_REGNUM 15 |
1a94ca49 RK |
388 | |
389 | /* Value should be nonzero if functions must have frame pointers. | |
390 | Zero means the frame pointer need not be set up (and parms | |
391 | may be accessed via the stack pointer) in functions that seem suitable. | |
392 | This is computed in `reload', in reload1.c. */ | |
393 | #define FRAME_POINTER_REQUIRED 0 | |
394 | ||
395 | /* Base register for access to arguments of the function. */ | |
130d2d72 | 396 | #define ARG_POINTER_REGNUM 31 |
1a94ca49 | 397 | |
52a69200 RK |
398 | /* Base register for access to local variables of function. */ |
399 | #define FRAME_POINTER_REGNUM 63 | |
400 | ||
1a94ca49 RK |
401 | /* Register in which static-chain is passed to a function. |
402 | ||
403 | For the Alpha, this is based on an example; the calling sequence | |
404 | doesn't seem to specify this. */ | |
405 | #define STATIC_CHAIN_REGNUM 1 | |
406 | ||
407 | /* Register in which address to store a structure value | |
408 | arrives in the function. On the Alpha, the address is passed | |
409 | as a hidden argument. */ | |
410 | #define STRUCT_VALUE 0 | |
411 | \f | |
412 | /* Define the classes of registers for register constraints in the | |
413 | machine description. Also define ranges of constants. | |
414 | ||
415 | One of the classes must always be named ALL_REGS and include all hard regs. | |
416 | If there is more than one class, another class must be named NO_REGS | |
417 | and contain no registers. | |
418 | ||
419 | The name GENERAL_REGS must be the name of a class (or an alias for | |
420 | another name such as ALL_REGS). This is the class of registers | |
421 | that is allowed by "g" or "r" in a register constraint. | |
422 | Also, registers outside this class are allocated only when | |
423 | instructions express preferences for them. | |
424 | ||
425 | The classes must be numbered in nondecreasing order; that is, | |
426 | a larger-numbered class must never be contained completely | |
427 | in a smaller-numbered class. | |
428 | ||
429 | For any two classes, it is very desirable that there be another | |
430 | class that represents their union. */ | |
431 | ||
432 | enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, | |
433 | LIM_REG_CLASSES }; | |
434 | ||
435 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
436 | ||
437 | /* Give names of register classes as strings for dump file. */ | |
438 | ||
439 | #define REG_CLASS_NAMES \ | |
440 | {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } | |
441 | ||
442 | /* Define which registers fit in which classes. | |
443 | This is an initializer for a vector of HARD_REG_SET | |
444 | of length N_REG_CLASSES. */ | |
445 | ||
446 | #define REG_CLASS_CONTENTS \ | |
52a69200 | 447 | { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} } |
1a94ca49 RK |
448 | |
449 | /* The same information, inverted: | |
450 | Return the class number of the smallest class containing | |
451 | reg number REGNO. This could be a conditional expression | |
452 | or could index an array. */ | |
453 | ||
52a69200 RK |
454 | #define REGNO_REG_CLASS(REGNO) \ |
455 | ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS) | |
1a94ca49 RK |
456 | |
457 | /* The class value for index registers, and the one for base regs. */ | |
458 | #define INDEX_REG_CLASS NO_REGS | |
459 | #define BASE_REG_CLASS GENERAL_REGS | |
460 | ||
461 | /* Get reg_class from a letter such as appears in the machine description. */ | |
462 | ||
463 | #define REG_CLASS_FROM_LETTER(C) \ | |
464 | ((C) == 'f' ? FLOAT_REGS : NO_REGS) | |
465 | ||
466 | /* Define this macro to change register usage conditional on target flags. */ | |
467 | /* #define CONDITIONAL_REGISTER_USAGE */ | |
468 | ||
469 | /* The letters I, J, K, L, M, N, O, and P in a register constraint string | |
470 | can be used to stand for particular ranges of immediate operands. | |
471 | This macro defines what the ranges are. | |
472 | C is the letter, and VALUE is a constant value. | |
473 | Return 1 if VALUE is in the range specified by C. | |
474 | ||
475 | For Alpha: | |
476 | `I' is used for the range of constants most insns can contain. | |
477 | `J' is the constant zero. | |
478 | `K' is used for the constant in an LDA insn. | |
479 | `L' is used for the constant in a LDAH insn. | |
480 | `M' is used for the constants that can be AND'ed with using a ZAP insn. | |
481 | `N' is used for complemented 8-bit constants. | |
482 | `O' is used for negated 8-bit constants. | |
483 | `P' is used for the constants 1, 2 and 3. */ | |
484 | ||
485 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
486 | ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \ | |
487 | : (C) == 'J' ? (VALUE) == 0 \ | |
488 | : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ | |
489 | : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \ | |
490 | && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0)) \ | |
491 | : (C) == 'M' ? zap_mask (VALUE) \ | |
492 | : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \ | |
493 | : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \ | |
494 | : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \ | |
495 | : 0) | |
496 | ||
497 | /* Similar, but for floating or large integer constants, and defining letters | |
498 | G and H. Here VALUE is the CONST_DOUBLE rtx itself. | |
499 | ||
500 | For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE | |
501 | that is the operand of a ZAP insn. */ | |
502 | ||
503 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
504 | ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ | |
505 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ | |
506 | : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \ | |
507 | && zap_mask (CONST_DOUBLE_LOW (VALUE)) \ | |
508 | && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \ | |
509 | : 0) | |
510 | ||
e560f226 RK |
511 | /* Optional extra constraints for this machine. |
512 | ||
513 | For the Alpha, `Q' means that this is a memory operand but not a | |
ac030a7b RK |
514 | reference to an unaligned location. |
515 | `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current | |
516 | function. */ | |
e560f226 RK |
517 | |
518 | #define EXTRA_CONSTRAINT(OP, C) \ | |
519 | ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \ | |
ac030a7b | 520 | : (C) == 'R' ? current_file_function_operand (OP, Pmode) \ |
e560f226 RK |
521 | : 0) |
522 | ||
1a94ca49 RK |
523 | /* Given an rtx X being reloaded into a reg required to be |
524 | in class CLASS, return the class of reg to actually use. | |
525 | In general this is just CLASS; but on some machines | |
526 | in some cases it is preferable to use a more restrictive class. | |
527 | ||
528 | On the Alpha, all constants except zero go into a floating-point | |
529 | register via memory. */ | |
530 | ||
531 | #define PREFERRED_RELOAD_CLASS(X, CLASS) \ | |
532 | (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \ | |
533 | ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \ | |
534 | : (CLASS)) | |
535 | ||
536 | /* Loading and storing HImode or QImode values to and from memory | |
537 | usually requires a scratch register. The exceptions are loading | |
e560f226 RK |
538 | QImode and HImode from an aligned address to a general register. |
539 | We also cannot load an unaligned address into an FP register. */ | |
1a94ca49 RK |
540 | |
541 | #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \ | |
542 | (((GET_CODE (IN) == MEM \ | |
543 | || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \ | |
544 | || (GET_CODE (IN) == SUBREG \ | |
545 | && (GET_CODE (SUBREG_REG (IN)) == MEM \ | |
546 | || (GET_CODE (SUBREG_REG (IN)) == REG \ | |
547 | && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \ | |
548 | && (((CLASS) == FLOAT_REGS \ | |
549 | && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \ | |
550 | || (((MODE) == QImode || (MODE) == HImode) \ | |
551 | && unaligned_memory_operand (IN, MODE)))) \ | |
e560f226 RK |
552 | ? GENERAL_REGS \ |
553 | : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \ | |
554 | && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \ | |
555 | : NO_REGS) | |
1a94ca49 RK |
556 | |
557 | #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \ | |
558 | (((GET_CODE (OUT) == MEM \ | |
559 | || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \ | |
560 | || (GET_CODE (OUT) == SUBREG \ | |
561 | && (GET_CODE (SUBREG_REG (OUT)) == MEM \ | |
562 | || (GET_CODE (SUBREG_REG (OUT)) == REG \ | |
563 | && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \ | |
564 | && (((MODE) == HImode || (MODE) == QImode \ | |
565 | || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \ | |
e560f226 RK |
566 | ? GENERAL_REGS \ |
567 | : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \ | |
568 | && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \ | |
569 | : NO_REGS) | |
1a94ca49 RK |
570 | |
571 | /* If we are copying between general and FP registers, we need a memory | |
572 | location. */ | |
573 | ||
574 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2)) | |
575 | ||
acd94aaf RK |
576 | /* Specify the mode to be used for memory when a secondary memory |
577 | location is needed. If MODE is floating-point, use it. Otherwise, | |
578 | widen to a word like the default. This is needed because we always | |
579 | store integers in FP registers in quadword format. This whole | |
580 | area is very tricky! */ | |
581 | #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ | |
582 | (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \ | |
583 | : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0)) | |
584 | ||
1a94ca49 RK |
585 | /* Return the maximum number of consecutive registers |
586 | needed to represent mode MODE in a register of class CLASS. */ | |
587 | ||
588 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
589 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
590 | ||
c31dfe4d RK |
591 | /* If defined, gives a class of registers that cannot be used as the |
592 | operand of a SUBREG that changes the size of the object. */ | |
593 | ||
594 | #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS | |
595 | ||
1a94ca49 RK |
596 | /* Define the cost of moving between registers of various classes. Moving |
597 | between FLOAT_REGS and anything else except float regs is expensive. | |
598 | In fact, we make it quite expensive because we really don't want to | |
599 | do these moves unless it is clearly worth it. Optimizations may | |
600 | reduce the impact of not being able to allocate a pseudo to a | |
601 | hard register. */ | |
602 | ||
603 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
604 | (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20) | |
605 | ||
606 | /* A C expressions returning the cost of moving data of MODE from a register to | |
607 | or from memory. | |
608 | ||
609 | On the Alpha, bump this up a bit. */ | |
610 | ||
611 | #define MEMORY_MOVE_COST(MODE) 6 | |
612 | ||
613 | /* Provide the cost of a branch. Exact meaning under development. */ | |
614 | #define BRANCH_COST 5 | |
615 | ||
616 | /* Adjust the cost of dependencies. */ | |
617 | ||
618 | #define ADJUST_COST(INSN,LINK,DEP,COST) \ | |
619 | (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST) | |
620 | \f | |
621 | /* Stack layout; function entry, exit and calling. */ | |
622 | ||
623 | /* Define this if pushing a word on the stack | |
624 | makes the stack pointer a smaller address. */ | |
625 | #define STACK_GROWS_DOWNWARD | |
626 | ||
627 | /* Define this if the nominal address of the stack frame | |
628 | is at the high-address end of the local variables; | |
629 | that is, each additional local variable allocated | |
630 | goes at a more negative offset in the frame. */ | |
130d2d72 | 631 | /* #define FRAME_GROWS_DOWNWARD */ |
1a94ca49 RK |
632 | |
633 | /* Offset within stack frame to start allocating local variables at. | |
634 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
635 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
636 | of the first local allocated. */ | |
637 | ||
52a69200 | 638 | #define STARTING_FRAME_OFFSET 0 |
1a94ca49 RK |
639 | |
640 | /* If we generate an insn to push BYTES bytes, | |
641 | this says how many the stack pointer really advances by. | |
642 | On Alpha, don't define this because there are no push insns. */ | |
643 | /* #define PUSH_ROUNDING(BYTES) */ | |
644 | ||
645 | /* Define this if the maximum size of all the outgoing args is to be | |
646 | accumulated and pushed during the prologue. The amount can be | |
647 | found in the variable current_function_outgoing_args_size. */ | |
648 | #define ACCUMULATE_OUTGOING_ARGS | |
649 | ||
650 | /* Offset of first parameter from the argument pointer register value. */ | |
651 | ||
130d2d72 | 652 | #define FIRST_PARM_OFFSET(FNDECL) 0 |
1a94ca49 RK |
653 | |
654 | /* Definitions for register eliminations. | |
655 | ||
978e8952 | 656 | We have two registers that can be eliminated on the Alpha. First, the |
1a94ca49 | 657 | frame pointer register can often be eliminated in favor of the stack |
130d2d72 RK |
658 | pointer register. Secondly, the argument pointer register can always be |
659 | eliminated; it is replaced with either the stack or frame pointer. */ | |
1a94ca49 RK |
660 | |
661 | /* This is an array of structures. Each structure initializes one pair | |
662 | of eliminable registers. The "from" register number is given first, | |
663 | followed by "to". Eliminations of the same "from" register are listed | |
664 | in order of preference. */ | |
665 | ||
52a69200 RK |
666 | #define ELIMINABLE_REGS \ |
667 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
668 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
669 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
670 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
1a94ca49 RK |
671 | |
672 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
673 | Frame pointer elimination is automatically handled. | |
674 | ||
130d2d72 | 675 | All eliminations are valid since the cases where FP can't be |
1a94ca49 RK |
676 | eliminated are already handled. */ |
677 | ||
130d2d72 | 678 | #define CAN_ELIMINATE(FROM, TO) 1 |
1a94ca49 | 679 | |
52a69200 RK |
680 | /* Round up to a multiple of 16 bytes. */ |
681 | #define ALPHA_ROUND(X) (((X) + 15) & ~ 15) | |
682 | ||
1a94ca49 RK |
683 | /* Define the offset between two registers, one to be eliminated, and the other |
684 | its replacement, at the start of a routine. */ | |
685 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
52a69200 RK |
686 | { if ((FROM) == FRAME_POINTER_REGNUM) \ |
687 | (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ | |
688 | + alpha_sa_size ()); \ | |
689 | else if ((FROM) == ARG_POINTER_REGNUM) \ | |
690 | (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ | |
691 | + alpha_sa_size () \ | |
d772039b RK |
692 | + (ALPHA_ROUND (get_frame_size () \ |
693 | + current_function_pretend_args_size) \ | |
694 | - current_function_pretend_args_size)); \ | |
1a94ca49 RK |
695 | } |
696 | ||
697 | /* Define this if stack space is still allocated for a parameter passed | |
698 | in a register. */ | |
699 | /* #define REG_PARM_STACK_SPACE */ | |
700 | ||
701 | /* Value is the number of bytes of arguments automatically | |
702 | popped when returning from a subroutine call. | |
703 | FUNTYPE is the data type of the function (as a tree), | |
704 | or for a library call it is an identifier node for the subroutine name. | |
705 | SIZE is the number of bytes of arguments passed on the stack. */ | |
706 | ||
707 | #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0 | |
708 | ||
709 | /* Define how to find the value returned by a function. | |
710 | VALTYPE is the data type of the value (as a tree). | |
711 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
712 | otherwise, FUNC is 0. | |
713 | ||
714 | On Alpha the value is found in $0 for integer functions and | |
715 | $f0 for floating-point functions. */ | |
716 | ||
717 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
718 | gen_rtx (REG, \ | |
719 | ((TREE_CODE (VALTYPE) == INTEGER_TYPE \ | |
720 | || TREE_CODE (VALTYPE) == ENUMERAL_TYPE \ | |
721 | || TREE_CODE (VALTYPE) == BOOLEAN_TYPE \ | |
722 | || TREE_CODE (VALTYPE) == CHAR_TYPE \ | |
723 | || TREE_CODE (VALTYPE) == POINTER_TYPE \ | |
724 | || TREE_CODE (VALTYPE) == OFFSET_TYPE) \ | |
725 | && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ | |
726 | ? word_mode : TYPE_MODE (VALTYPE), \ | |
727 | TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0) | |
728 | ||
729 | /* Define how to find the value returned by a library function | |
730 | assuming the value has mode MODE. */ | |
731 | ||
732 | #define LIBCALL_VALUE(MODE) \ | |
733 | gen_rtx (REG, MODE, \ | |
734 | TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0) | |
735 | ||
130d2d72 RK |
736 | /* The definition of this macro implies that there are cases where |
737 | a scalar value cannot be returned in registers. | |
738 | ||
739 | For the Alpha, any structure or union type is returned in memory, as | |
740 | are integers whose size is larger than 64 bits. */ | |
741 | ||
742 | #define RETURN_IN_MEMORY(TYPE) \ | |
e14fa9c4 | 743 | (TYPE_MODE (TYPE) == BLKmode \ |
130d2d72 RK |
744 | || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64)) |
745 | ||
1a94ca49 RK |
746 | /* 1 if N is a possible register number for a function value |
747 | as seen by the caller. */ | |
748 | ||
749 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32) | |
750 | ||
751 | /* 1 if N is a possible register number for function argument passing. | |
752 | On Alpha, these are $16-$21 and $f16-$f21. */ | |
753 | ||
754 | #define FUNCTION_ARG_REGNO_P(N) \ | |
755 | (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) | |
756 | \f | |
757 | /* Define a data type for recording info about an argument list | |
758 | during the scan of that argument list. This data type should | |
759 | hold all necessary information about the function itself | |
760 | and about the args processed so far, enough to enable macros | |
761 | such as FUNCTION_ARG to determine where the next arg should go. | |
762 | ||
763 | On Alpha, this is a single integer, which is a number of words | |
764 | of arguments scanned so far. | |
765 | Thus 6 or more means all following args should go on the stack. */ | |
766 | ||
767 | #define CUMULATIVE_ARGS int | |
768 | ||
769 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
770 | for a call to a function whose data type is FNTYPE. | |
771 | For a library call, FNTYPE is 0. */ | |
772 | ||
773 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) (CUM) = 0 | |
774 | ||
775 | /* Define intermediate macro to compute the size (in registers) of an argument | |
776 | for the Alpha. */ | |
777 | ||
778 | #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \ | |
779 | ((MODE) != BLKmode \ | |
780 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
781 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
782 | ||
783 | /* Update the data in CUM to advance over an argument | |
784 | of mode MODE and data type TYPE. | |
785 | (TYPE is null for libcalls where that information may not be available.) */ | |
786 | ||
787 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
788 | if (MUST_PASS_IN_STACK (MODE, TYPE)) \ | |
789 | (CUM) = 6; \ | |
790 | else \ | |
791 | (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED) | |
792 | ||
793 | /* Determine where to put an argument to a function. | |
794 | Value is zero to push the argument on the stack, | |
795 | or a hard register in which to store the argument. | |
796 | ||
797 | MODE is the argument's machine mode. | |
798 | TYPE is the data type of the argument (as a tree). | |
799 | This is null for libcalls where that information may | |
800 | not be available. | |
801 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
802 | the preceding args and about the function being called. | |
803 | NAMED is nonzero if this argument is a named parameter | |
804 | (otherwise it is an extra parameter matching an ellipsis). | |
805 | ||
806 | On Alpha the first 6 words of args are normally in registers | |
807 | and the rest are pushed. */ | |
808 | ||
809 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
810 | ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ | |
811 | ? gen_rtx(REG, (MODE), \ | |
14d4a67a RK |
812 | (CUM) + 16 + ((TARGET_FPREGS \ |
813 | && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ | |
814 | || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ | |
815 | * 32)) \ | |
816 | : 0) | |
1a94ca49 | 817 | |
1a94ca49 RK |
818 | /* Specify the padding direction of arguments. |
819 | ||
820 | On the Alpha, we must pad upwards in order to be able to pass args in | |
821 | registers. */ | |
822 | ||
823 | #define FUNCTION_ARG_PADDING(MODE, TYPE) upward | |
824 | ||
825 | /* For an arg passed partly in registers and partly in memory, | |
826 | this is the number of registers used. | |
827 | For args passed entirely in registers or entirely in memory, zero. */ | |
828 | ||
829 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
830 | ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ | |
831 | ? 6 - (CUM) : 0) | |
832 | ||
130d2d72 RK |
833 | /* Perform any needed actions needed for a function that is receiving a |
834 | variable number of arguments. | |
835 | ||
836 | CUM is as above. | |
837 | ||
838 | MODE and TYPE are the mode and type of the current parameter. | |
839 | ||
840 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
841 | that must be pushed by the prolog to pretend that our caller pushed | |
842 | it. | |
843 | ||
844 | Normally, this macro will push all remaining incoming registers on the | |
845 | stack and set PRETEND_SIZE to the length of the registers pushed. | |
846 | ||
847 | On the Alpha, we allocate space for all 12 arg registers, but only | |
848 | push those that are remaining. | |
849 | ||
850 | However, if NO registers need to be saved, don't allocate any space. | |
851 | This is not only because we won't need the space, but because AP includes | |
852 | the current_pretend_args_size and we don't want to mess up any | |
7a92339b RK |
853 | ap-relative addresses already made. |
854 | ||
855 | If we are not to use the floating-point registers, save the integer | |
856 | registers where we would put the floating-point registers. This is | |
857 | not the most efficient way to implement varargs with just one register | |
858 | class, but it isn't worth doing anything more efficient in this rare | |
859 | case. */ | |
860 | ||
130d2d72 RK |
861 | |
862 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ | |
863 | { if ((CUM) < 6) \ | |
864 | { \ | |
865 | if (! (NO_RTL)) \ | |
866 | { \ | |
867 | move_block_from_reg \ | |
868 | (16 + CUM, \ | |
869 | gen_rtx (MEM, BLKmode, \ | |
870 | plus_constant (virtual_incoming_args_rtx, \ | |
7f5bd4ff | 871 | ((CUM) + 6)* UNITS_PER_WORD)), \ |
02892e06 | 872 | 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ |
130d2d72 | 873 | move_block_from_reg \ |
7a92339b | 874 | (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \ |
130d2d72 RK |
875 | gen_rtx (MEM, BLKmode, \ |
876 | plus_constant (virtual_incoming_args_rtx, \ | |
7f5bd4ff | 877 | (CUM) * UNITS_PER_WORD)), \ |
02892e06 | 878 | 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ |
130d2d72 RK |
879 | } \ |
880 | PRETEND_SIZE = 12 * UNITS_PER_WORD; \ | |
881 | } \ | |
882 | } | |
883 | ||
1a94ca49 RK |
884 | /* Generate necessary RTL for __builtin_saveregs(). |
885 | ARGLIST is the argument list; see expr.c. */ | |
886 | extern struct rtx_def *alpha_builtin_saveregs (); | |
887 | #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST) | |
888 | ||
889 | /* Define the information needed to generate branch and scc insns. This is | |
890 | stored from the compare operation. Note that we can't use "rtx" here | |
891 | since it hasn't been defined! */ | |
892 | ||
893 | extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1; | |
894 | extern int alpha_compare_fp_p; | |
895 | ||
896 | /* This macro produces the initial definition of a function name. On the | |
03f8c4cc | 897 | Alpha, we need to save the function name for the prologue and epilogue. */ |
1a94ca49 RK |
898 | |
899 | extern char *alpha_function_name; | |
900 | ||
901 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ | |
03f8c4cc | 902 | { \ |
1a94ca49 RK |
903 | alpha_function_name = NAME; \ |
904 | } | |
905 | ||
906 | /* This macro generates the assembly code for function entry. | |
907 | FILE is a stdio stream to output the code to. | |
908 | SIZE is an int: how many units of temporary storage to allocate. | |
909 | Refer to the array `regs_ever_live' to determine which registers | |
910 | to save; `regs_ever_live[I]' is nonzero if register number I | |
911 | is ever used in the function. This macro is responsible for | |
912 | knowing which registers should not be saved even if used. */ | |
913 | ||
914 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
915 | ||
916 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
85d159a3 RK |
917 | for profiling a function entry. Profiling for gprof does not |
918 | require LABELNO so we don't reference it at all. This does, | |
919 | however, mean that -p won't work. But OSF/1 doesn't support the | |
920 | traditional prof anyways, so there is no good reason to be | |
921 | backwards compatible. */ | |
922 | ||
923 | #define FUNCTION_PROFILER(FILE, LABELNO) \ | |
924 | do { \ | |
a62eb16f JW |
925 | fputs ("\tlda $27,_mcount\n", (FILE)); \ |
926 | fputs ("\tjsr $27,($27),_mcount\n", (FILE)); \ | |
08b2cb48 | 927 | fputs ("\tldgp $29,0($27)\n", (FILE)); \ |
85d159a3 RK |
928 | } while (0); |
929 | ||
930 | ||
931 | /* Output assembler code to FILE to initialize this source file's | |
932 | basic block profiling info, if that has not already been done. | |
933 | This assumes that __bb_init_func doesn't garble a1-a5. */ | |
934 | ||
935 | #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ | |
936 | do { \ | |
937 | ASM_OUTPUT_REG_PUSH (FILE, 16); \ | |
a62eb16f JW |
938 | fputs ("\tlda $16,$PBX32\n", (FILE)); \ |
939 | fputs ("\tldq $26,0($16)\n", (FILE)); \ | |
940 | fputs ("\tbne $26,1f\n", (FILE)); \ | |
941 | fputs ("\tlda $27,__bb_init_func\n", (FILE)); \ | |
942 | fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \ | |
943 | fputs ("\tldgp $29,0($26)\n", (FILE)); \ | |
944 | fputs ("1:\n", (FILE)); \ | |
85d159a3 RK |
945 | ASM_OUTPUT_REG_POP (FILE, 16); \ |
946 | } while (0); | |
947 | ||
948 | /* Output assembler code to FILE to increment the entry-count for | |
949 | the BLOCKNO'th basic block in this source file. */ | |
950 | ||
951 | #define BLOCK_PROFILER(FILE, BLOCKNO) \ | |
952 | do { \ | |
953 | int blockn = (BLOCKNO); \ | |
a62eb16f | 954 | fputs ("\tsubq $30,16,$30\n", (FILE)); \ |
70a76f06 RK |
955 | fputs ("\tstq $26,0($30)\n", (FILE)); \ |
956 | fputs ("\tstq $27,8($30)\n", (FILE)); \ | |
957 | fputs ("\tlda $26,$PBX34\n", (FILE)); \ | |
958 | fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \ | |
959 | fputs ("\taddq $27,1,$27\n", (FILE)); \ | |
960 | fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \ | |
961 | fputs ("\tldq $26,0($30)\n", (FILE)); \ | |
962 | fputs ("\tldq $27,8($30)\n", (FILE)); \ | |
a62eb16f | 963 | fputs ("\taddq $30,16,$30\n", (FILE)); \ |
85d159a3 | 964 | } while (0) |
1a94ca49 | 965 | |
1a94ca49 RK |
966 | |
967 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
968 | the stack pointer does not matter. The value is tested only in | |
969 | functions that have frame pointers. | |
970 | No definition is equivalent to always zero. */ | |
971 | ||
972 | #define EXIT_IGNORE_STACK 1 | |
973 | ||
974 | /* This macro generates the assembly code for function exit, | |
975 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
976 | then individual return instructions are generated for each | |
977 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
978 | ||
979 | The function epilogue should not depend on the current stack pointer! | |
980 | It should use the frame pointer only. This is mandatory because | |
981 | of alloca; we also take advantage of it to omit stack adjustments | |
982 | before returning. */ | |
983 | ||
984 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
985 | ||
986 | \f | |
987 | /* Output assembler code for a block containing the constant parts | |
988 | of a trampoline, leaving space for the variable parts. | |
989 | ||
990 | The trampoline should set the static chain pointer to value placed | |
7981384f RK |
991 | into the trampoline and should branch to the specified routine. |
992 | Note that $27 has been set to the address of the trampoline, so we can | |
993 | use it for addressability of the two data items. Trampolines are always | |
994 | aligned to FUNCTION_BOUNDARY, which is 64 bits. */ | |
1a94ca49 RK |
995 | |
996 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
997 | { \ | |
7981384f | 998 | fprintf (FILE, "\tldq $1,24($27)\n"); \ |
1a94ca49 | 999 | fprintf (FILE, "\tldq $27,16($27)\n"); \ |
7981384f RK |
1000 | fprintf (FILE, "\tjmp $31,($27),0\n"); \ |
1001 | fprintf (FILE, "\tnop\n"); \ | |
1a94ca49 RK |
1002 | fprintf (FILE, "\t.quad 0,0\n"); \ |
1003 | } | |
1004 | ||
3a523eeb RS |
1005 | /* Section in which to place the trampoline. On Alpha, instructions |
1006 | may only be placed in a text segment. */ | |
1007 | ||
1008 | #define TRAMPOLINE_SECTION text_section | |
1009 | ||
1a94ca49 RK |
1010 | /* Length in units of the trampoline for entering a nested function. */ |
1011 | ||
7981384f | 1012 | #define TRAMPOLINE_SIZE 32 |
1a94ca49 RK |
1013 | |
1014 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1015 | FNADDR is an RTX for the address of the function's pure code. | |
1016 | CXT is an RTX for the static chain value for the function. We assume | |
1017 | here that a function will be called many more times than its address | |
1018 | is taken (e.g., it might be passed to qsort), so we take the trouble | |
7981384f RK |
1019 | to initialize the "hint" field in the JMP insn. Note that the hint |
1020 | field is PC (new) + 4 * bits 13:0. */ | |
1a94ca49 RK |
1021 | |
1022 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
1023 | { \ | |
1024 | rtx _temp, _temp1, _addr; \ | |
1025 | \ | |
1026 | _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \ | |
1027 | emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \ | |
7981384f | 1028 | _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \ |
1a94ca49 RK |
1029 | emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \ |
1030 | \ | |
7981384f RK |
1031 | _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \ |
1032 | _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \ | |
1033 | OPTAB_WIDEN); \ | |
1034 | _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \ | |
1a94ca49 | 1035 | build_int_2 (2, 0), NULL_RTX, 1); \ |
7981384f RK |
1036 | _temp = expand_and (gen_lowpart (SImode, _temp), \ |
1037 | GEN_INT (0x3fff), 0); \ | |
1a94ca49 | 1038 | \ |
7981384f | 1039 | _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \ |
1a94ca49 | 1040 | _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \ |
7981384f | 1041 | _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \ |
1a94ca49 RK |
1042 | _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \ |
1043 | OPTAB_WIDEN); \ | |
1044 | \ | |
1045 | emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \ | |
7981384f RK |
1046 | \ |
1047 | emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \ | |
1048 | "__enable_execute_stack"), \ | |
1049 | 0, VOIDmode, 1,_addr, Pmode); \ | |
1050 | \ | |
1051 | emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \ | |
1052 | gen_rtvec (1, const0_rtx), 0)); \ | |
1053 | } | |
1054 | ||
1055 | /* Attempt to turn on access permissions for the stack. */ | |
1056 | ||
1057 | #define TRANSFER_FROM_TRAMPOLINE \ | |
1058 | \ | |
1059 | void \ | |
1060 | __enable_execute_stack (addr) \ | |
1061 | void *addr; \ | |
1062 | { \ | |
1063 | long size = getpagesize (); \ | |
1064 | long mask = ~(size-1); \ | |
1065 | char *page = (char *) (((long) addr) & mask); \ | |
1066 | char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \ | |
1067 | \ | |
1068 | /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \ | |
1069 | if (mprotect (page, end - page, 7) < 0) \ | |
1070 | perror ("mprotect of trampoline code"); \ | |
1a94ca49 RK |
1071 | } |
1072 | \f | |
1073 | /* Addressing modes, and classification of registers for them. */ | |
1074 | ||
1075 | /* #define HAVE_POST_INCREMENT */ | |
1076 | /* #define HAVE_POST_DECREMENT */ | |
1077 | ||
1078 | /* #define HAVE_PRE_DECREMENT */ | |
1079 | /* #define HAVE_PRE_INCREMENT */ | |
1080 | ||
1081 | /* Macros to check register numbers against specific register classes. */ | |
1082 | ||
1083 | /* These assume that REGNO is a hard or pseudo reg number. | |
1084 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1085 | or a pseudo reg currently allocated to a suitable hard reg. | |
1086 | Since they use reg_renumber, they are safe only once reg_renumber | |
1087 | has been allocated, which happens in local-alloc.c. */ | |
1088 | ||
1089 | #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
1090 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
52a69200 RK |
1091 | ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ |
1092 | || (REGNO) == 63 || reg_renumber[REGNO] == 63) | |
1a94ca49 RK |
1093 | \f |
1094 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1095 | #define MAX_REGS_PER_ADDRESS 1 | |
1096 | ||
1097 | /* Recognize any constant value that is a valid address. For the Alpha, | |
1098 | there are only constants none since we want to use LDA to load any | |
1099 | symbolic addresses into registers. */ | |
1100 | ||
1101 | #define CONSTANT_ADDRESS_P(X) \ | |
1102 | (GET_CODE (X) == CONST_INT \ | |
1103 | && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) | |
1104 | ||
1105 | /* Include all constant integers and constant doubles, but not | |
1106 | floating-point, except for floating-point zero. */ | |
1107 | ||
1108 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1109 | (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ | |
1110 | || (X) == CONST0_RTX (GET_MODE (X))) | |
1111 | ||
1112 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1113 | and check its validity for a certain class. | |
1114 | We have two alternate definitions for each of them. | |
1115 | The usual definition accepts all pseudo regs; the other rejects | |
1116 | them unless they have been allocated suitable hard regs. | |
1117 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1118 | ||
1119 | Most source files want to accept pseudo regs in the hope that | |
1120 | they will get allocated to the class that the insn wants them to be in. | |
1121 | Source files for reload pass need to be strict. | |
1122 | After reload, it makes no difference, since pseudo regs have | |
1123 | been eliminated by then. */ | |
1124 | ||
1125 | #ifndef REG_OK_STRICT | |
1126 | ||
1127 | /* Nonzero if X is a hard reg that can be used as an index | |
1128 | or if it is a pseudo reg. */ | |
1129 | #define REG_OK_FOR_INDEX_P(X) 0 | |
1130 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1131 | or if it is a pseudo reg. */ | |
1132 | #define REG_OK_FOR_BASE_P(X) \ | |
52a69200 | 1133 | (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
1a94ca49 RK |
1134 | |
1135 | #else | |
1136 | ||
1137 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1138 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1139 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1140 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1141 | ||
1142 | #endif | |
1143 | \f | |
1144 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1145 | that is a valid memory address for an instruction. | |
1146 | The MODE argument is the machine mode for the MEM expression | |
1147 | that wants to use this address. | |
1148 | ||
1149 | For Alpha, we have either a constant address or the sum of a register | |
1150 | and a constant address, or just a register. For DImode, any of those | |
1151 | forms can be surrounded with an AND that clear the low-order three bits; | |
1152 | this is an "unaligned" access. | |
1153 | ||
1154 | We also allow a SYMBOL_REF that is the name of the current function as | |
1155 | valid address. This is for CALL_INSNs. It cannot be used in any other | |
1156 | context. | |
1157 | ||
1158 | First define the basic valid address. */ | |
1159 | ||
1160 | #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \ | |
1161 | { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
1162 | goto ADDR; \ | |
1163 | if (CONSTANT_ADDRESS_P (X)) \ | |
1164 | goto ADDR; \ | |
1165 | if (GET_CODE (X) == PLUS \ | |
1166 | && REG_P (XEXP (X, 0)) \ | |
1167 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1168 | && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
1169 | goto ADDR; \ | |
1170 | } | |
1171 | ||
1172 | /* Now accept the simple address, or, for DImode only, an AND of a simple | |
1173 | address that turns off the low three bits. */ | |
1174 | ||
1175 | extern char *current_function_name; | |
1176 | ||
1177 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ | |
1178 | { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \ | |
1179 | if ((MODE) == DImode \ | |
1180 | && GET_CODE (X) == AND \ | |
1181 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1182 | && INTVAL (XEXP (X, 1)) == -8) \ | |
1183 | GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \ | |
1184 | if ((MODE) == Pmode && GET_CODE (X) == SYMBOL_REF \ | |
1185 | && ! strcmp (XSTR (X, 0), current_function_name)) \ | |
1186 | goto ADDR; \ | |
1187 | } | |
1188 | ||
1189 | /* Try machine-dependent ways of modifying an illegitimate address | |
1190 | to be legitimate. If we find one, return the new, valid address. | |
1191 | This macro is used in only one place: `memory_address' in explow.c. | |
1192 | ||
1193 | OLDX is the address as it was before break_out_memory_refs was called. | |
1194 | In some cases it is useful to look at this to decide what needs to be done. | |
1195 | ||
1196 | MODE and WIN are passed so that this macro can use | |
1197 | GO_IF_LEGITIMATE_ADDRESS. | |
1198 | ||
1199 | It is always safe for this macro to do nothing. It exists to recognize | |
1200 | opportunities to optimize the output. | |
1201 | ||
1202 | For the Alpha, there are three cases we handle: | |
1203 | ||
1204 | (1) If the address is (plus reg const_int) and the CONST_INT is not a | |
1205 | valid offset, compute the high part of the constant and add it to the | |
1206 | register. Then our address is (plus temp low-part-const). | |
1207 | (2) If the address is (const (plus FOO const_int)), find the low-order | |
1208 | part of the CONST_INT. Then load FOO plus any high-order part of the | |
1209 | CONST_INT into a register. Our address is (plus reg low-part-const). | |
1210 | This is done to reduce the number of GOT entries. | |
1211 | (3) If we have a (plus reg const), emit the load as in (2), then add | |
1212 | the two registers, and finally generate (plus reg low-part-const) as | |
1213 | our address. */ | |
1214 | ||
1215 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
1216 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1217 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1218 | && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
1219 | { \ | |
1220 | HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \ | |
1221 | HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ | |
1222 | HOST_WIDE_INT highpart = val - lowpart; \ | |
1223 | rtx high = GEN_INT (highpart); \ | |
1224 | rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \ | |
80f251fe | 1225 | high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \ |
1a94ca49 RK |
1226 | \ |
1227 | (X) = plus_constant (temp, lowpart); \ | |
1228 | goto WIN; \ | |
1229 | } \ | |
1230 | else if (GET_CODE (X) == CONST \ | |
1231 | && GET_CODE (XEXP (X, 0)) == PLUS \ | |
1232 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \ | |
1233 | { \ | |
1234 | HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \ | |
1235 | HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ | |
1236 | HOST_WIDE_INT highpart = val - lowpart; \ | |
1237 | rtx high = XEXP (XEXP (X, 0), 0); \ | |
1238 | \ | |
1239 | if (highpart) \ | |
1240 | high = plus_constant (high, highpart); \ | |
1241 | \ | |
1242 | (X) = plus_constant (force_reg (Pmode, high), lowpart); \ | |
1243 | goto WIN; \ | |
1244 | } \ | |
1245 | else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1246 | && GET_CODE (XEXP (X, 1)) == CONST \ | |
1247 | && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \ | |
1248 | && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \ | |
1249 | { \ | |
1250 | HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \ | |
1251 | HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ | |
1252 | HOST_WIDE_INT highpart = val - lowpart; \ | |
1253 | rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \ | |
1254 | \ | |
1255 | if (highpart) \ | |
1256 | high = plus_constant (high, highpart); \ | |
1257 | \ | |
1258 | high = expand_binop (Pmode, add_optab, XEXP (X, 0), \ | |
1259 | force_reg (Pmode, high), \ | |
80f251fe | 1260 | high, 1, OPTAB_LIB_WIDEN); \ |
1a94ca49 RK |
1261 | (X) = plus_constant (high, lowpart); \ |
1262 | goto WIN; \ | |
1263 | } \ | |
1264 | } | |
1265 | ||
1266 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1267 | has an effect that depends on the machine mode it is used for. | |
1268 | On the Alpha this is true only for the unaligned modes. We can | |
1269 | simplify this test since we know that the address must be valid. */ | |
1270 | ||
1271 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1272 | { if (GET_CODE (ADDR) == AND) goto LABEL; } | |
1273 | ||
1274 | /* Compute the cost of an address. For the Alpha, all valid addresses are | |
1275 | the same cost. */ | |
1276 | ||
1277 | #define ADDRESS_COST(X) 0 | |
1278 | ||
1279 | /* Define this if some processing needs to be done immediately before | |
1280 | emitting code for an insn. */ | |
1281 | ||
1282 | /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */ | |
1283 | \f | |
1284 | /* Specify the machine mode that this machine uses | |
1285 | for the index in the tablejump instruction. */ | |
1286 | #define CASE_VECTOR_MODE SImode | |
1287 | ||
1288 | /* Define this if the tablejump instruction expects the table | |
1289 | to contain offsets from the address of the table. | |
260ced47 RK |
1290 | Do not define this if the table should contain absolute addresses. |
1291 | On the Alpha, the table is really GP-relative, not relative to the PC | |
1292 | of the table, but we pretend that it is PC-relative; this should be OK, | |
1293 | but we hsould try to find some better way sometime. */ | |
1294 | #define CASE_VECTOR_PC_RELATIVE | |
1a94ca49 RK |
1295 | |
1296 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1297 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1298 | ||
1299 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1300 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1301 | ||
1302 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1303 | #define DEFAULT_SIGNED_CHAR 1 | |
1304 | ||
1305 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1306 | also convert validly to an unsigned one. | |
1307 | ||
1308 | We actually lie a bit here as overflow conditions are different. But | |
1309 | they aren't being checked anyway. */ | |
1310 | ||
1311 | #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
1312 | ||
1313 | /* Max number of bytes we can move to or from memory | |
1314 | in one reasonably fast instruction. */ | |
1315 | ||
1316 | #define MOVE_MAX 8 | |
1317 | ||
1318 | /* Largest number of bytes of an object that can be placed in a register. | |
1319 | On the Alpha we have plenty of registers, so use TImode. */ | |
1320 | #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) | |
1321 | ||
1322 | /* Nonzero if access to memory by bytes is no faster than for words. | |
1323 | Also non-zero if doing byte operations (specifically shifts) in registers | |
1324 | is undesirable. | |
1325 | ||
1326 | On the Alpha, we want to not use the byte operation and instead use | |
1327 | masking operations to access fields; these will save instructions. */ | |
1328 | ||
1329 | #define SLOW_BYTE_ACCESS 1 | |
1330 | ||
9a63901f RK |
1331 | /* Define if operations between registers always perform the operation |
1332 | on the full register even if a narrower mode is specified. */ | |
1333 | #define WORD_REGISTER_OPERATIONS | |
1334 | ||
1335 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1336 | will either zero-extend or sign-extend. The value of this macro should | |
1337 | be the code that says which one of the two operations is implicitly | |
1338 | done, NIL if none. */ | |
1339 | #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND | |
1a94ca49 | 1340 | |
225211e2 RK |
1341 | /* Define if loading short immediate values into registers sign extends. */ |
1342 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
1343 | ||
1a94ca49 RK |
1344 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1345 | is done just by pretending it is already truncated. */ | |
1346 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1347 | ||
1348 | /* We assume that the store-condition-codes instructions store 0 for false | |
1349 | and some other value for true. This is the value stored for true. */ | |
1350 | ||
1351 | #define STORE_FLAG_VALUE 1 | |
1352 | ||
1353 | /* Define the value returned by a floating-point comparison instruction. */ | |
1354 | ||
1355 | #define FLOAT_STORE_FLAG_VALUE 0.5 | |
1356 | ||
35bb77fd RK |
1357 | /* Canonicalize a comparison from one we don't have to one we do have. */ |
1358 | ||
1359 | #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ | |
1360 | do { \ | |
1361 | if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \ | |
1362 | && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \ | |
1363 | { \ | |
1364 | rtx tem = (OP0); \ | |
1365 | (OP0) = (OP1); \ | |
1366 | (OP1) = tem; \ | |
1367 | (CODE) = swap_condition (CODE); \ | |
1368 | } \ | |
1369 | if (((CODE) == LT || (CODE) == LTU) \ | |
1370 | && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \ | |
1371 | { \ | |
1372 | (CODE) = (CODE) == LT ? LE : LEU; \ | |
1373 | (OP1) = GEN_INT (255); \ | |
1374 | } \ | |
1375 | } while (0) | |
1376 | ||
1a94ca49 RK |
1377 | /* Specify the machine mode that pointers have. |
1378 | After generation of rtl, the compiler makes no further distinction | |
1379 | between pointers and any other objects of this machine mode. */ | |
1380 | #define Pmode DImode | |
1381 | ||
1382 | /* Mode of a function address in a call instruction (for indexing purposes). */ | |
1383 | ||
1384 | #define FUNCTION_MODE Pmode | |
1385 | ||
1386 | /* Define this if addresses of constant functions | |
1387 | shouldn't be put through pseudo regs where they can be cse'd. | |
1388 | Desirable on machines where ordinary constants are expensive | |
1389 | but a CALL with constant address is cheap. | |
1390 | ||
1391 | We define this on the Alpha so that gen_call and gen_call_value | |
1392 | get to see the SYMBOL_REF (for the hint field of the jsr). It will | |
1393 | then copy it into a register, thus actually letting the address be | |
1394 | cse'ed. */ | |
1395 | ||
1396 | #define NO_FUNCTION_CSE | |
1397 | ||
d969caf8 | 1398 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
1a94ca49 | 1399 | few bits. */ |
d969caf8 | 1400 | #define SHIFT_COUNT_TRUNCATED 1 |
1a94ca49 | 1401 | |
d721b776 RK |
1402 | /* Use atexit for static constructors/destructors, instead of defining |
1403 | our own exit function. */ | |
1404 | #define HAVE_ATEXIT | |
1405 | ||
1a94ca49 RK |
1406 | /* Compute the cost of computing a constant rtl expression RTX |
1407 | whose rtx-code is CODE. The body of this macro is a portion | |
1408 | of a switch statement. If the code is computed here, | |
1409 | return it with a return statement. Otherwise, break from the switch. | |
1410 | ||
8b7b2e36 RK |
1411 | If this is an 8-bit constant, return zero since it can be used |
1412 | nearly anywhere with no cost. If it is a valid operand for an | |
1413 | ADD or AND, likewise return 0 if we know it will be used in that | |
1414 | context. Otherwise, return 2 since it might be used there later. | |
1415 | All other constants take at least two insns. */ | |
1a94ca49 RK |
1416 | |
1417 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ | |
1418 | case CONST_INT: \ | |
06eb8e92 | 1419 | if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \ |
8b7b2e36 | 1420 | return 0; \ |
1a94ca49 | 1421 | case CONST_DOUBLE: \ |
8b7b2e36 RK |
1422 | if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \ |
1423 | || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \ | |
1424 | return 0; \ | |
1425 | else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \ | |
1426 | return 2; \ | |
1427 | else \ | |
1428 | return COSTS_N_INSNS (2); \ | |
1a94ca49 RK |
1429 | case CONST: \ |
1430 | case SYMBOL_REF: \ | |
1431 | case LABEL_REF: \ | |
8b7b2e36 | 1432 | return COSTS_N_INSNS (3); |
1a94ca49 RK |
1433 | |
1434 | /* Provide the costs of a rtl expression. This is in the body of a | |
1435 | switch on CODE. */ | |
1436 | ||
1437 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ | |
1438 | case PLUS: \ | |
1439 | case MINUS: \ | |
1440 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1441 | return COSTS_N_INSNS (6); \ | |
b49e978e RK |
1442 | else if (GET_CODE (XEXP (X, 0)) == MULT \ |
1443 | && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \ | |
a5da0afe RK |
1444 | return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \ |
1445 | + rtx_cost (XEXP (X, 1), OUTER_CODE)); \ | |
1a94ca49 RK |
1446 | break; \ |
1447 | case MULT: \ | |
1448 | if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \ | |
1449 | return COSTS_N_INSNS (6); \ | |
919ea6a5 | 1450 | return COSTS_N_INSNS (23); \ |
b49e978e RK |
1451 | case ASHIFT: \ |
1452 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1453 | && INTVAL (XEXP (X, 1)) <= 3) \ | |
1454 | break; \ | |
1455 | /* ... fall through ... */ \ | |
1456 | case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \ | |
1457 | return COSTS_N_INSNS (2); \ | |
1a94ca49 RK |
1458 | case DIV: \ |
1459 | case UDIV: \ | |
1460 | case MOD: \ | |
1461 | case UMOD: \ | |
1462 | if (GET_MODE (X) == SFmode) \ | |
1463 | return COSTS_N_INSNS (34); \ | |
1464 | else if (GET_MODE (X) == DFmode) \ | |
1465 | return COSTS_N_INSNS (63); \ | |
1466 | else \ | |
1467 | return COSTS_N_INSNS (70); \ | |
1468 | case MEM: \ | |
1469 | return COSTS_N_INSNS (3); | |
1470 | \f | |
1471 | /* Control the assembler format that we output. */ | |
1472 | ||
1473 | /* Output at beginning of assembler file. */ | |
1474 | ||
1475 | #define ASM_FILE_START(FILE) \ | |
03f8c4cc | 1476 | { \ |
130d2d72 RK |
1477 | alpha_write_verstamp (FILE); \ |
1478 | fprintf (FILE, "\t.set noreorder\n"); \ | |
fee3a4a8 | 1479 | fprintf (FILE, "\t.set volatile\n"); \ |
1a94ca49 | 1480 | fprintf (FILE, "\t.set noat\n"); \ |
03f8c4cc | 1481 | ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ |
1a94ca49 RK |
1482 | } |
1483 | ||
1484 | /* Output to assembler file text saying following lines | |
1485 | may contain character constants, extra white space, comments, etc. */ | |
1486 | ||
1487 | #define ASM_APP_ON "" | |
1488 | ||
1489 | /* Output to assembler file text saying following lines | |
1490 | no longer contain unusual constructs. */ | |
1491 | ||
1492 | #define ASM_APP_OFF "" | |
1493 | ||
1494 | #define TEXT_SECTION_ASM_OP ".text" | |
1495 | ||
1496 | /* Output before read-only data. */ | |
1497 | ||
1498 | #define READONLY_DATA_SECTION_ASM_OP ".rdata" | |
1499 | ||
1500 | /* Output before writable data. */ | |
1501 | ||
1502 | #define DATA_SECTION_ASM_OP ".data" | |
1503 | ||
1504 | /* Define an extra section for read-only data, a routine to enter it, and | |
1505 | indicate that it is for read-only data. */ | |
1506 | ||
1507 | #define EXTRA_SECTIONS readonly_data | |
1508 | ||
1509 | #define EXTRA_SECTION_FUNCTIONS \ | |
1510 | void \ | |
1511 | literal_section () \ | |
1512 | { \ | |
1513 | if (in_section != readonly_data) \ | |
1514 | { \ | |
1515 | fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ | |
1516 | in_section = readonly_data; \ | |
1517 | } \ | |
1518 | } \ | |
1519 | ||
1520 | #define READONLY_DATA_SECTION literal_section | |
1521 | ||
ac030a7b RK |
1522 | /* If we are referencing a function that is static, make the SYMBOL_REF |
1523 | special. We use this to see indicate we can branch to this function | |
1524 | without setting PV or restoring GP. */ | |
130d2d72 RK |
1525 | |
1526 | #define ENCODE_SECTION_INFO(DECL) \ | |
ac030a7b | 1527 | if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL)) \ |
130d2d72 RK |
1528 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; |
1529 | ||
1a94ca49 RK |
1530 | /* How to refer to registers in assembler output. |
1531 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1532 | ||
1533 | #define REGISTER_NAMES \ | |
1534 | {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ | |
1535 | "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
1536 | "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ | |
130d2d72 | 1537 | "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ |
1a94ca49 RK |
1538 | "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ |
1539 | "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ | |
1540 | "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ | |
52a69200 | 1541 | "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} |
1a94ca49 RK |
1542 | |
1543 | /* How to renumber registers for dbx and gdb. */ | |
1544 | ||
1545 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
1546 | ||
1547 | /* This is how to output the definition of a user-level label named NAME, | |
1548 | such as the label on a static function or variable NAME. */ | |
1549 | ||
1550 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1551 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1552 | ||
1553 | /* This is how to output a command to make the user-level label named NAME | |
1554 | defined for reference from other files. */ | |
1555 | ||
1556 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
1557 | do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
1558 | ||
1559 | /* This is how to output a reference to a user-level label named NAME. | |
1560 | `assemble_name' uses this. */ | |
1561 | ||
1562 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
1563 | fprintf (FILE, "%s", NAME) | |
1564 | ||
1565 | /* This is how to output an internal numbered label where | |
1566 | PREFIX is the class of label and NUM is the number within the class. */ | |
1567 | ||
1568 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
1569 | if ((PREFIX)[0] == 'L') \ | |
1570 | fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \ | |
1571 | else \ | |
1572 | fprintf (FILE, "%s%d:\n", PREFIX, NUM); | |
1573 | ||
1574 | /* This is how to output a label for a jump table. Arguments are the same as | |
1575 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
1576 | passed. */ | |
1577 | ||
1578 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
1579 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
1580 | ||
1581 | /* This is how to store into the string LABEL | |
1582 | the symbol_ref name of an internal numbered label where | |
1583 | PREFIX is the class of label and NUM is the number within the class. | |
1584 | This is suitable for output with `assemble_name'. */ | |
1585 | ||
1586 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1587 | if ((PREFIX)[0] == 'L') \ | |
1588 | sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \ | |
1589 | else \ | |
1590 | sprintf (LABEL, "*%s%d", PREFIX, NUM) | |
1591 | ||
1592 | /* This is how to output an assembler line defining a `double' constant. */ | |
1593 | ||
e99300f1 RS |
1594 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ |
1595 | { \ | |
1596 | if (REAL_VALUE_ISINF (VALUE) \ | |
1597 | || REAL_VALUE_ISNAN (VALUE) \ | |
1598 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
1599 | { \ | |
1600 | long t[2]; \ | |
1601 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
1602 | fprintf (FILE, "\t.quad 0x%lx%08lx\n", \ | |
1603 | t[1] & 0xffffffff, t[0] & 0xffffffff); \ | |
1604 | } \ | |
1605 | else \ | |
1606 | { \ | |
1607 | char str[30]; \ | |
1608 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ | |
1609 | fprintf (FILE, "\t.t_floating %s\n", str); \ | |
1610 | } \ | |
1611 | } | |
1a94ca49 RK |
1612 | |
1613 | /* This is how to output an assembler line defining a `float' constant. */ | |
1614 | ||
e99300f1 RS |
1615 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ |
1616 | { \ | |
1617 | if (REAL_VALUE_ISINF (VALUE) \ | |
1618 | || REAL_VALUE_ISNAN (VALUE) \ | |
1619 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
1620 | { \ | |
1621 | long t; \ | |
1622 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
1623 | fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ | |
1624 | } \ | |
1625 | else \ | |
1626 | { \ | |
1627 | char str[30]; \ | |
1628 | REAL_VALUE_TO_DECIMAL ((VALUE), "%.20e", str); \ | |
1629 | fprintf (FILE, "\t.s_floating %s\n", str); \ | |
1630 | } \ | |
1631 | } | |
2700ac93 | 1632 | |
1a94ca49 RK |
1633 | /* This is how to output an assembler line defining an `int' constant. */ |
1634 | ||
1635 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
45c45e79 RK |
1636 | fprintf (FILE, "\t.long %d\n", \ |
1637 | (GET_CODE (VALUE) == CONST_INT \ | |
1638 | ? INTVAL (VALUE) & 0xffffffff : (abort (), 0))) | |
1a94ca49 RK |
1639 | |
1640 | /* This is how to output an assembler line defining a `long' constant. */ | |
1641 | ||
1642 | #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ | |
1643 | ( fprintf (FILE, "\t.quad "), \ | |
1644 | output_addr_const (FILE, (VALUE)), \ | |
1645 | fprintf (FILE, "\n")) | |
1646 | ||
1647 | /* Likewise for `char' and `short' constants. */ | |
1648 | ||
1649 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
690ef02f | 1650 | fprintf (FILE, "\t.word %d\n", \ |
45c45e79 RK |
1651 | (GET_CODE (VALUE) == CONST_INT \ |
1652 | ? INTVAL (VALUE) & 0xffff : (abort (), 0))) | |
1a94ca49 RK |
1653 | |
1654 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
45c45e79 RK |
1655 | fprintf (FILE, "\t.byte %d\n", \ |
1656 | (GET_CODE (VALUE) == CONST_INT \ | |
1657 | ? INTVAL (VALUE) & 0xff : (abort (), 0))) | |
1a94ca49 RK |
1658 | |
1659 | /* We use the default ASCII-output routine, except that we don't write more | |
1660 | than 50 characters since the assembler doesn't support very long lines. */ | |
1661 | ||
1662 | #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ | |
1663 | do { \ | |
1664 | FILE *_hide_asm_out_file = (MYFILE); \ | |
1665 | unsigned char *_hide_p = (unsigned char *) (MYSTRING); \ | |
1666 | int _hide_thissize = (MYLENGTH); \ | |
1667 | int _size_so_far = 0; \ | |
1668 | { \ | |
1669 | FILE *asm_out_file = _hide_asm_out_file; \ | |
1670 | unsigned char *p = _hide_p; \ | |
1671 | int thissize = _hide_thissize; \ | |
1672 | int i; \ | |
1673 | fprintf (asm_out_file, "\t.ascii \""); \ | |
1674 | \ | |
1675 | for (i = 0; i < thissize; i++) \ | |
1676 | { \ | |
1677 | register int c = p[i]; \ | |
1678 | \ | |
1679 | if (_size_so_far ++ > 50 && i < thissize - 4) \ | |
1680 | _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ | |
1681 | \ | |
1682 | if (c == '\"' || c == '\\') \ | |
1683 | putc ('\\', asm_out_file); \ | |
1684 | if (c >= ' ' && c < 0177) \ | |
1685 | putc (c, asm_out_file); \ | |
1686 | else \ | |
1687 | { \ | |
1688 | fprintf (asm_out_file, "\\%o", c); \ | |
1689 | /* After an octal-escape, if a digit follows, \ | |
1690 | terminate one string constant and start another. \ | |
1691 | The Vax assembler fails to stop reading the escape \ | |
1692 | after three digits, so this is the only way we \ | |
1693 | can get it to parse the data properly. */ \ | |
1694 | if (i < thissize - 1 \ | |
1695 | && p[i + 1] >= '0' && p[i + 1] <= '9') \ | |
1696 | fprintf (asm_out_file, "\"\n\t.ascii \""); \ | |
1697 | } \ | |
1698 | } \ | |
1699 | fprintf (asm_out_file, "\"\n"); \ | |
1700 | } \ | |
1701 | } \ | |
1702 | while (0) | |
52a69200 | 1703 | |
1a94ca49 RK |
1704 | /* This is how to output an insn to push a register on the stack. |
1705 | It need not be very fast code. */ | |
1706 | ||
1707 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1708 | fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \ | |
1709 | (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ | |
1710 | (REGNO) & 31); | |
1711 | ||
1712 | /* This is how to output an insn to pop a register from the stack. | |
1713 | It need not be very fast code. */ | |
1714 | ||
1715 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1716 | fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \ | |
1717 | (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ | |
1718 | (REGNO) & 31); | |
1719 | ||
1720 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1721 | ||
1722 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
45c45e79 | 1723 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff) |
1a94ca49 | 1724 | |
260ced47 RK |
1725 | /* This is how to output an element of a case-vector that is absolute. |
1726 | (Alpha does not use such vectors, but we must define this macro anyway.) */ | |
1a94ca49 | 1727 | |
260ced47 | 1728 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort () |
1a94ca49 | 1729 | |
260ced47 | 1730 | /* This is how to output an element of a case-vector that is relative. */ |
1a94ca49 | 1731 | |
260ced47 RK |
1732 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ |
1733 | fprintf (FILE, "\t.gprel32 $%d\n", (VALUE) + 32) | |
1a94ca49 RK |
1734 | |
1735 | /* This is how to output an assembler line | |
1736 | that says to advance the location counter | |
1737 | to a multiple of 2**LOG bytes. */ | |
1738 | ||
1739 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1740 | if ((LOG) != 0) \ | |
1741 | fprintf (FILE, "\t.align %d\n", LOG); | |
1742 | ||
1743 | /* This is how to advance the location counter by SIZE bytes. */ | |
1744 | ||
1745 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1746 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
1747 | ||
1748 | /* This says how to output an assembler line | |
1749 | to define a global common symbol. */ | |
1750 | ||
1751 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1752 | ( fputs ("\t.comm ", (FILE)), \ | |
1753 | assemble_name ((FILE), (NAME)), \ | |
1754 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1755 | ||
1756 | /* This says how to output an assembler line | |
1757 | to define a local common symbol. */ | |
1758 | ||
1759 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
1760 | ( fputs ("\t.lcomm ", (FILE)), \ | |
1761 | assemble_name ((FILE), (NAME)), \ | |
1762 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1763 | ||
1764 | /* Store in OUTPUT a string (made with alloca) containing | |
1765 | an assembler-name for a local static variable named NAME. | |
1766 | LABELNO is an integer which is different for each call. */ | |
1767 | ||
1768 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1769 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1770 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1771 | ||
1772 | /* Define the parentheses used to group arithmetic operations | |
1773 | in assembler code. */ | |
1774 | ||
1775 | #define ASM_OPEN_PAREN "(" | |
1776 | #define ASM_CLOSE_PAREN ")" | |
1777 | ||
1778 | /* Define results of standard character escape sequences. */ | |
1779 | #define TARGET_BELL 007 | |
1780 | #define TARGET_BS 010 | |
1781 | #define TARGET_TAB 011 | |
1782 | #define TARGET_NEWLINE 012 | |
1783 | #define TARGET_VT 013 | |
1784 | #define TARGET_FF 014 | |
1785 | #define TARGET_CR 015 | |
1786 | ||
1787 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1788 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1789 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1790 | ||
1791 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1792 | ||
1793 | /* Determine which codes are valid without a following integer. These must | |
1794 | not be alphabetic. */ | |
1795 | ||
1796 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0 | |
1797 | \f | |
1798 | /* Print a memory address as an operand to reference that memory location. */ | |
1799 | ||
1800 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
1801 | { rtx addr = (ADDR); \ | |
1802 | int basereg = 31; \ | |
1803 | HOST_WIDE_INT offset = 0; \ | |
1804 | \ | |
1805 | if (GET_CODE (addr) == AND) \ | |
1806 | addr = XEXP (addr, 0); \ | |
1807 | \ | |
1808 | if (GET_CODE (addr) == REG) \ | |
1809 | basereg = REGNO (addr); \ | |
1810 | else if (GET_CODE (addr) == CONST_INT) \ | |
1811 | offset = INTVAL (addr); \ | |
1812 | else if (GET_CODE (addr) == PLUS \ | |
1813 | && GET_CODE (XEXP (addr, 0)) == REG \ | |
1814 | && GET_CODE (XEXP (addr, 1)) == CONST_INT) \ | |
1815 | basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \ | |
1816 | else \ | |
1817 | abort (); \ | |
1818 | \ | |
1819 | fprintf (FILE, "%d($%d)", offset, basereg); \ | |
1820 | } | |
1821 | /* Define the codes that are matched by predicates in alpha.c. */ | |
1822 | ||
1823 | #define PREDICATE_CODES \ | |
1824 | {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ | |
4a1d2a46 | 1825 | {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \ |
1a94ca49 | 1826 | {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ |
9e2befc2 | 1827 | {"cint8_operand", {CONST_INT}}, \ |
1a94ca49 RK |
1828 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ |
1829 | {"add_operand", {SUBREG, REG, CONST_INT}}, \ | |
1830 | {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ | |
1831 | {"const48_operand", {CONST_INT}}, \ | |
1832 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ | |
8395de26 | 1833 | {"or_operand", {SUBREG, REG, CONST_INT}}, \ |
1a94ca49 RK |
1834 | {"mode_mask_operand", {CONST_INT}}, \ |
1835 | {"mul8_operand", {CONST_INT}}, \ | |
1836 | {"mode_width_operand", {CONST_INT}}, \ | |
1837 | {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ | |
1838 | {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ | |
1839 | {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ | |
f8634644 | 1840 | {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ |
1a94ca49 | 1841 | {"fp0_operand", {CONST_DOUBLE}}, \ |
f8634644 | 1842 | {"current_file_function_operand", {SYMBOL_REF}}, \ |
ac030a7b | 1843 | {"call_operand", {REG, SYMBOL_REF}}, \ |
1a94ca49 RK |
1844 | {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ |
1845 | SYMBOL_REF, CONST, LABEL_REF}}, \ | |
1846 | {"aligned_memory_operand", {MEM}}, \ | |
1847 | {"unaligned_memory_operand", {MEM}}, \ | |
1848 | {"any_memory_operand", {MEM}}, | |
03f8c4cc | 1849 | \f |
34fa88ab RK |
1850 | /* Tell collect that the object format is ECOFF. */ |
1851 | #define OBJECT_FORMAT_COFF | |
1852 | #define EXTENDED_COFF | |
1853 | ||
1854 | /* If we use NM, pass -g to it so it only lists globals. */ | |
1855 | #define NM_FLAGS "-pg" | |
1856 | ||
03f8c4cc RK |
1857 | /* Definitions for debugging. */ |
1858 | ||
1859 | #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */ | |
1860 | #define DBX_DEBUGGING_INFO /* generate embedded stabs */ | |
1861 | #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ | |
1862 | ||
1863 | #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ | |
52a69200 RK |
1864 | #define PREFERRED_DEBUGGING_TYPE \ |
1865 | ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG) | |
03f8c4cc RK |
1866 | #endif |
1867 | ||
1868 | ||
1869 | /* Correct the offset of automatic variables and arguments. Note that | |
1870 | the Alpha debug format wants all automatic variables and arguments | |
1871 | to be in terms of two different offsets from the virtual frame pointer, | |
1872 | which is the stack pointer before any adjustment in the function. | |
1873 | The offset for the argument pointer is fixed for the native compiler, | |
1874 | it is either zero (for the no arguments case) or large enough to hold | |
1875 | all argument registers. | |
1876 | The offset for the auto pointer is the fourth argument to the .frame | |
1877 | directive (local_offset). | |
1878 | To stay compatible with the native tools we use the same offsets | |
1879 | from the virtual frame pointer and adjust the debugger arg/auto offsets | |
1880 | accordingly. These debugger offsets are set up in output_prolog. */ | |
1881 | ||
1882 | long alpha_arg_offset; | |
1883 | long alpha_auto_offset; | |
1884 | #define DEBUGGER_AUTO_OFFSET(X) \ | |
1885 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) | |
1886 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) | |
1887 | ||
1888 | ||
1889 | #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ | |
1890 | alpha_output_lineno (STREAM, LINE) | |
1891 | extern void alpha_output_lineno (); | |
1892 | ||
1893 | #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
1894 | alpha_output_filename (STREAM, NAME) | |
1895 | extern void alpha_output_filename (); | |
1896 | ||
1897 | ||
ab8b8941 RK |
1898 | /* mips-tfile.c limits us to strings of one page. */ |
1899 | #define DBX_CONTIN_LENGTH 4000 | |
03f8c4cc RK |
1900 | |
1901 | /* By default, turn on GDB extensions. */ | |
1902 | #define DEFAULT_GDB_EXTENSIONS 1 | |
1903 | ||
1904 | /* If we are smuggling stabs through the ALPHA ECOFF object | |
1905 | format, put a comment in front of the .stab<x> operation so | |
1906 | that the ALPHA assembler does not choke. The mips-tfile program | |
1907 | will correctly put the stab into the object file. */ | |
1908 | ||
1909 | #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs") | |
1910 | #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn") | |
1911 | #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd") | |
1912 | ||
1913 | /* Forward references to tags are allowed. */ | |
1914 | #define SDB_ALLOW_FORWARD_REFERENCES | |
1915 | ||
1916 | /* Unknown tags are also allowed. */ | |
1917 | #define SDB_ALLOW_UNKNOWN_REFERENCES | |
1918 | ||
1919 | #define PUT_SDB_DEF(a) \ | |
1920 | do { \ | |
1921 | fprintf (asm_out_file, "\t%s.def\t", \ | |
1922 | (TARGET_GAS) ? "" : "#"); \ | |
1923 | ASM_OUTPUT_LABELREF (asm_out_file, a); \ | |
1924 | fputc (';', asm_out_file); \ | |
1925 | } while (0) | |
1926 | ||
1927 | #define PUT_SDB_PLAIN_DEF(a) \ | |
1928 | do { \ | |
1929 | fprintf (asm_out_file, "\t%s.def\t.%s;", \ | |
1930 | (TARGET_GAS) ? "" : "#", (a)); \ | |
1931 | } while (0) | |
1932 | ||
1933 | #define PUT_SDB_TYPE(a) \ | |
1934 | do { \ | |
1935 | fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \ | |
1936 | } while (0) | |
1937 | ||
1938 | /* For block start and end, we create labels, so that | |
1939 | later we can figure out where the correct offset is. | |
1940 | The normal .ent/.end serve well enough for functions, | |
1941 | so those are just commented out. */ | |
1942 | ||
1943 | extern int sdb_label_count; /* block start/end next label # */ | |
1944 | ||
1945 | #define PUT_SDB_BLOCK_START(LINE) \ | |
1946 | do { \ | |
1947 | fprintf (asm_out_file, \ | |
1948 | "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ | |
1949 | sdb_label_count, \ | |
1950 | (TARGET_GAS) ? "" : "#", \ | |
1951 | sdb_label_count, \ | |
1952 | (LINE)); \ | |
1953 | sdb_label_count++; \ | |
1954 | } while (0) | |
1955 | ||
1956 | #define PUT_SDB_BLOCK_END(LINE) \ | |
1957 | do { \ | |
1958 | fprintf (asm_out_file, \ | |
1959 | "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ | |
1960 | sdb_label_count, \ | |
1961 | (TARGET_GAS) ? "" : "#", \ | |
1962 | sdb_label_count, \ | |
1963 | (LINE)); \ | |
1964 | sdb_label_count++; \ | |
1965 | } while (0) | |
1966 | ||
1967 | #define PUT_SDB_FUNCTION_START(LINE) | |
1968 | ||
1969 | #define PUT_SDB_FUNCTION_END(LINE) | |
1970 | ||
1971 | #define PUT_SDB_EPILOGUE_END(NAME) | |
1972 | ||
1973 | /* Specify to run a post-processor, mips-tfile after the assembler | |
1974 | has run to stuff the ecoff debug information into the object file. | |
1975 | This is needed because the Alpha assembler provides no way | |
1976 | of specifying such information in the assembly file. */ | |
1977 | ||
88681624 | 1978 | #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0 |
03f8c4cc RK |
1979 | |
1980 | #define ASM_FINAL_SPEC "\ | |
1981 | %{malpha-as: %{!mno-mips-tfile: \ | |
1982 | \n mips-tfile %{v*: -v} \ | |
1983 | %{K: -I %b.o~} \ | |
1984 | %{!K: %{save-temps: -I %b.o~}} \ | |
1985 | %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ | |
1986 | %{.s:%i} %{!.s:%g.s}}}" | |
1987 | ||
1988 | #else | |
1989 | #define ASM_FINAL_SPEC "\ | |
1990 | %{!mgas: %{!mno-mips-tfile: \ | |
1991 | \n mips-tfile %{v*: -v} \ | |
1992 | %{K: -I %b.o~} \ | |
1993 | %{!K: %{save-temps: -I %b.o~}} \ | |
1994 | %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ | |
1995 | %{.s:%i} %{!.s:%g.s}}}" | |
1996 | ||
1997 | #endif | |
1998 | ||
1999 | /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for | |
2000 | mips-tdump.c to print them out. | |
2001 | ||
2002 | These must match the corresponding definitions in gdb/mipsread.c. | |
2003 | Unfortunately, gcc and gdb do not currently share any directories. */ | |
2004 | ||
2005 | #define CODE_MASK 0x8F300 | |
2006 | #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) | |
2007 | #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) | |
2008 | #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) | |
2009 | ||
2010 | /* Override some mips-tfile definitions. */ | |
2011 | ||
2012 | #define SHASH_SIZE 511 | |
2013 | #define THASH_SIZE 55 | |
1e6c6f11 RK |
2014 | |
2015 | /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */ | |
2016 | ||
2017 | #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7) | |
2f55b70b JM |
2018 | |
2019 | /* The system headers under OSF/1 are C++-aware. */ | |
2020 | #define NO_IMPLICIT_EXTERN_C | |
54190234 JM |
2021 | |
2022 | /* The linker will stick __main into the .init section. */ | |
2023 | #define HAS_INIT_SECTION |