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1a94ca49 | 1 | /* Definitions of target machine for GNU compiler, for DEC Alpha. |
9ddd9abd | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, |
16c484c7 | 3 | 2000, 2001, 2002 Free Software Foundation, Inc. |
1e6c6f11 | 4 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
1a94ca49 RK |
5 | |
6 | This file is part of GNU CC. | |
7 | ||
8 | GNU CC is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2, or (at your option) | |
11 | any later version. | |
12 | ||
13 | GNU CC is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with GNU CC; see the file COPYING. If not, write to | |
38ead7f3 RK |
20 | the Free Software Foundation, 59 Temple Place - Suite 330, |
21 | Boston, MA 02111-1307, USA. */ | |
1a94ca49 RK |
22 | |
23 | ||
887af1f2 RO |
24 | /* For C++ we need to ensure that __LANGUAGE_C_PLUS_PLUS is defined independent |
25 | of the source file extension. */ | |
26 | #define CPLUSPLUS_CPP_SPEC "\ | |
27 | -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus \ | |
28 | %(cpp) \ | |
29 | " | |
30 | ||
21798cd8 RK |
31 | /* Write out the correct language type definition for the header files. |
32 | Unless we have assembler language, write out the symbols for C. */ | |
1a94ca49 | 33 | #define CPP_SPEC "\ |
952fc2ed RH |
34 | %{!undef:\ |
35 | %{.S:-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY }}\ | |
952fc2ed | 36 | %{.m:-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C }\ |
887af1f2 | 37 | %{!.S:%{!.cc:%{!.cxx:%{!.cpp:%{!.cp:%{!.c++:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}}}}\ |
952fc2ed RH |
38 | %{mieee:-D_IEEE_FP }\ |
39 | %{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT }}\ | |
40 | %(cpp_cpu) %(cpp_subtarget)" | |
41 | ||
42 | #ifndef CPP_SUBTARGET_SPEC | |
43 | #define CPP_SUBTARGET_SPEC "" | |
44 | #endif | |
1a94ca49 RK |
45 | |
46 | /* Set the spec to use for signed char. The default tests the above macro | |
47 | but DEC's compiler can't handle the conditional in a "constant" | |
48 | operand. */ | |
49 | ||
50 | #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}" | |
51 | ||
b890f297 | 52 | #define WORD_SWITCH_TAKES_ARG(STR) \ |
2efe55c1 | 53 | (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR)) |
8877eb00 | 54 | |
1a94ca49 RK |
55 | /* Print subsidiary information on the compiler version in use. */ |
56 | #define TARGET_VERSION | |
57 | ||
1a94ca49 RK |
58 | /* Run-time compilation parameters selecting different hardware subsets. */ |
59 | ||
f6f6a13c RK |
60 | /* Which processor to schedule for. The cpu attribute defines a list that |
61 | mirrors this list, so changes to alpha.md must be made at the same time. */ | |
62 | ||
63 | enum processor_type | |
64 | {PROCESSOR_EV4, /* 2106[46]{a,} */ | |
e9a25f70 JL |
65 | PROCESSOR_EV5, /* 21164{a,pc,} */ |
66 | PROCESSOR_EV6}; /* 21264 */ | |
f6f6a13c RK |
67 | |
68 | extern enum processor_type alpha_cpu; | |
69 | ||
2bf6230d RK |
70 | enum alpha_trap_precision |
71 | { | |
72 | ALPHA_TP_PROG, /* No precision (default). */ | |
73 | ALPHA_TP_FUNC, /* Trap contained within originating function. */ | |
285a5742 | 74 | ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */ |
2bf6230d RK |
75 | }; |
76 | ||
77 | enum alpha_fp_rounding_mode | |
78 | { | |
79 | ALPHA_FPRM_NORM, /* Normal rounding mode. */ | |
80 | ALPHA_FPRM_MINF, /* Round towards minus-infinity. */ | |
285a5742 | 81 | ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */ |
2bf6230d RK |
82 | ALPHA_FPRM_DYN /* Dynamic rounding mode. */ |
83 | }; | |
84 | ||
85 | enum alpha_fp_trap_mode | |
86 | { | |
285a5742 | 87 | ALPHA_FPTM_N, /* Normal trap mode. */ |
2bf6230d RK |
88 | ALPHA_FPTM_U, /* Underflow traps enabled. */ |
89 | ALPHA_FPTM_SU, /* Software completion, w/underflow traps */ | |
90 | ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */ | |
91 | }; | |
92 | ||
1a94ca49 RK |
93 | extern int target_flags; |
94 | ||
2bf6230d RK |
95 | extern enum alpha_trap_precision alpha_tp; |
96 | extern enum alpha_fp_rounding_mode alpha_fprm; | |
97 | extern enum alpha_fp_trap_mode alpha_fptm; | |
98 | ||
1a94ca49 RK |
99 | /* This means that floating-point support exists in the target implementation |
100 | of the Alpha architecture. This is usually the default. */ | |
de4abb91 | 101 | #define MASK_FP (1 << 0) |
2bf6230d | 102 | #define TARGET_FP (target_flags & MASK_FP) |
1a94ca49 RK |
103 | |
104 | /* This means that floating-point registers are allowed to be used. Note | |
105 | that Alpha implementations without FP operations are required to | |
106 | provide the FP registers. */ | |
107 | ||
de4abb91 | 108 | #define MASK_FPREGS (1 << 1) |
2bf6230d | 109 | #define TARGET_FPREGS (target_flags & MASK_FPREGS) |
03f8c4cc RK |
110 | |
111 | /* This means that gas is used to process the assembler file. */ | |
112 | ||
de4abb91 | 113 | #define MASK_GAS (1 << 2) |
03f8c4cc | 114 | #define TARGET_GAS (target_flags & MASK_GAS) |
1a94ca49 | 115 | |
285a5742 | 116 | /* This means that we should mark procedures as IEEE conformant. */ |
2bf6230d | 117 | |
de4abb91 | 118 | #define MASK_IEEE_CONFORMANT (1 << 3) |
2bf6230d RK |
119 | #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT) |
120 | ||
121 | /* This means we should be IEEE-compliant except for inexact. */ | |
122 | ||
de4abb91 | 123 | #define MASK_IEEE (1 << 4) |
2bf6230d RK |
124 | #define TARGET_IEEE (target_flags & MASK_IEEE) |
125 | ||
126 | /* This means we should be fully IEEE-compliant. */ | |
127 | ||
de4abb91 | 128 | #define MASK_IEEE_WITH_INEXACT (1 << 5) |
2bf6230d RK |
129 | #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT) |
130 | ||
803fee69 RK |
131 | /* This means we must construct all constants rather than emitting |
132 | them as literal data. */ | |
133 | ||
de4abb91 | 134 | #define MASK_BUILD_CONSTANTS (1 << 6) |
803fee69 RK |
135 | #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS) |
136 | ||
e5958492 RK |
137 | /* This means we handle floating points in VAX F- (float) |
138 | or G- (double) Format. */ | |
139 | ||
de4abb91 | 140 | #define MASK_FLOAT_VAX (1 << 7) |
e5958492 RK |
141 | #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX) |
142 | ||
e9a25f70 JL |
143 | /* This means that the processor has byte and half word loads and stores |
144 | (the BWX extension). */ | |
025f3281 | 145 | |
de4abb91 | 146 | #define MASK_BWX (1 << 8) |
e9a25f70 | 147 | #define TARGET_BWX (target_flags & MASK_BWX) |
025f3281 | 148 | |
e9a25f70 | 149 | /* This means that the processor has the MAX extension. */ |
de4abb91 | 150 | #define MASK_MAX (1 << 9) |
e9a25f70 JL |
151 | #define TARGET_MAX (target_flags & MASK_MAX) |
152 | ||
de4abb91 RH |
153 | /* This means that the processor has the FIX extension. */ |
154 | #define MASK_FIX (1 << 10) | |
155 | #define TARGET_FIX (target_flags & MASK_FIX) | |
156 | ||
157 | /* This means that the processor has the CIX extension. */ | |
158 | #define MASK_CIX (1 << 11) | |
159 | #define TARGET_CIX (target_flags & MASK_CIX) | |
160 | ||
1eb356b9 RH |
161 | /* This means use !literal style explicit relocations. */ |
162 | #define MASK_EXPLICIT_RELOCS (1 << 12) | |
163 | #define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS) | |
164 | ||
133d3133 RH |
165 | /* This means use 16-bit relocations to .sdata/.sbss. */ |
166 | #define MASK_SMALL_DATA (1 << 13) | |
167 | #define TARGET_SMALL_DATA (target_flags & MASK_SMALL_DATA) | |
168 | ||
a3b815cb JJ |
169 | /* This means that the processor is an EV5, EV56, or PCA56. |
170 | Unlike alpha_cpu this is not affected by -mtune= setting. */ | |
a76c0119 | 171 | #define MASK_CPU_EV5 (1 << 28) |
a3b815cb | 172 | #define TARGET_CPU_EV5 (target_flags & MASK_CPU_EV5) |
e9a25f70 JL |
173 | |
174 | /* Likewise for EV6. */ | |
a76c0119 | 175 | #define MASK_CPU_EV6 (1 << 29) |
a3b815cb | 176 | #define TARGET_CPU_EV6 (target_flags & MASK_CPU_EV6) |
e9a25f70 JL |
177 | |
178 | /* This means we support the .arch directive in the assembler. Only | |
179 | defined in TARGET_CPU_DEFAULT. */ | |
a76c0119 | 180 | #define MASK_SUPPORT_ARCH (1 << 30) |
e9a25f70 | 181 | #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH) |
8f87939b | 182 | |
9ba3994a | 183 | /* These are for target os support and cannot be changed at runtime. */ |
be7b80f4 RH |
184 | #define TARGET_ABI_WINDOWS_NT 0 |
185 | #define TARGET_ABI_OPEN_VMS 0 | |
30102605 RH |
186 | #define TARGET_ABI_UNICOSMK 0 |
187 | #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \ | |
188 | && !TARGET_ABI_OPEN_VMS \ | |
189 | && !TARGET_ABI_UNICOSMK) | |
9ba3994a RH |
190 | |
191 | #ifndef TARGET_AS_CAN_SUBTRACT_LABELS | |
192 | #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS | |
193 | #endif | |
30102605 RH |
194 | #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX |
195 | #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS | |
196 | #endif | |
9c0e94a5 RH |
197 | #ifndef TARGET_CAN_FAULT_IN_PROLOGUE |
198 | #define TARGET_CAN_FAULT_IN_PROLOGUE 0 | |
199 | #endif | |
5495cc55 RH |
200 | #ifndef TARGET_HAS_XFLOATING_LIBS |
201 | #define TARGET_HAS_XFLOATING_LIBS 0 | |
202 | #endif | |
4f1c5cce RH |
203 | #ifndef TARGET_PROFILING_NEEDS_GP |
204 | #define TARGET_PROFILING_NEEDS_GP 0 | |
205 | #endif | |
ccb83cbc RH |
206 | #ifndef TARGET_LD_BUGGY_LDGP |
207 | #define TARGET_LD_BUGGY_LDGP 0 | |
208 | #endif | |
14291bc7 RH |
209 | #ifndef TARGET_FIXUP_EV5_PREFETCH |
210 | #define TARGET_FIXUP_EV5_PREFETCH 0 | |
211 | #endif | |
9ba3994a | 212 | |
1a94ca49 RK |
213 | /* Macro to define tables used to set the flags. |
214 | This is a list in braces of pairs in braces, | |
215 | each pair being { "NAME", VALUE } | |
216 | where VALUE is the bits to set or minus the bits to clear. | |
217 | An empty string NAME is used to identify the default VALUE. */ | |
218 | ||
f8e52397 | 219 | #define TARGET_SWITCHES \ |
047142d3 PT |
220 | { {"no-soft-float", MASK_FP, N_("Use hardware fp")}, \ |
221 | {"soft-float", - MASK_FP, N_("Do not use hardware fp")}, \ | |
222 | {"fp-regs", MASK_FPREGS, N_("Use fp registers")}, \ | |
223 | {"no-fp-regs", - (MASK_FP|MASK_FPREGS), \ | |
224 | N_("Do not use fp registers")}, \ | |
225 | {"alpha-as", -MASK_GAS, N_("Do not assume GAS")}, \ | |
226 | {"gas", MASK_GAS, N_("Assume GAS")}, \ | |
f8e52397 | 227 | {"ieee-conformant", MASK_IEEE_CONFORMANT, \ |
047142d3 | 228 | N_("Request IEEE-conformant math library routines (OSF/1)")}, \ |
f8e52397 | 229 | {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \ |
047142d3 | 230 | N_("Emit IEEE-conformant code, without inexact exceptions")}, \ |
f8e52397 | 231 | {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \ |
047142d3 | 232 | N_("Emit IEEE-conformant code, with inexact exceptions")}, \ |
f8e52397 | 233 | {"build-constants", MASK_BUILD_CONSTANTS, \ |
047142d3 PT |
234 | N_("Do not emit complex integer constants to read-only memory")}, \ |
235 | {"float-vax", MASK_FLOAT_VAX, N_("Use VAX fp")}, \ | |
236 | {"float-ieee", -MASK_FLOAT_VAX, N_("Do not use VAX fp")}, \ | |
237 | {"bwx", MASK_BWX, N_("Emit code for the byte/word ISA extension")}, \ | |
f8e52397 | 238 | {"no-bwx", -MASK_BWX, ""}, \ |
047142d3 PT |
239 | {"max", MASK_MAX, \ |
240 | N_("Emit code for the motion video ISA extension")}, \ | |
f8e52397 | 241 | {"no-max", -MASK_MAX, ""}, \ |
047142d3 PT |
242 | {"fix", MASK_FIX, \ |
243 | N_("Emit code for the fp move and sqrt ISA extension")}, \ | |
de4abb91 | 244 | {"no-fix", -MASK_FIX, ""}, \ |
047142d3 | 245 | {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \ |
de4abb91 | 246 | {"no-cix", -MASK_CIX, ""}, \ |
1eb356b9 RH |
247 | {"explicit-relocs", MASK_EXPLICIT_RELOCS, \ |
248 | N_("Emit code using explicit relocation directives")}, \ | |
249 | {"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \ | |
133d3133 RH |
250 | {"small-data", MASK_SMALL_DATA, \ |
251 | N_("Emit 16-bit relocations to the small data areas")}, \ | |
252 | {"large-data", -MASK_SMALL_DATA, \ | |
253 | N_("Emit 32-bit relocations to the small data areas")}, \ | |
3a37b08e RH |
254 | {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \ |
255 | | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} } | |
1a94ca49 | 256 | |
c01b5470 | 257 | #define TARGET_DEFAULT MASK_FP|MASK_FPREGS |
1a94ca49 | 258 | |
88681624 ILT |
259 | #ifndef TARGET_CPU_DEFAULT |
260 | #define TARGET_CPU_DEFAULT 0 | |
261 | #endif | |
262 | ||
3a37b08e RH |
263 | #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS |
264 | #ifdef HAVE_AS_EXPLICIT_RELOCS | |
265 | #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS | |
266 | #else | |
267 | #define TARGET_DEFAULT_EXPLICIT_RELOCS 0 | |
268 | #endif | |
269 | #endif | |
270 | ||
df45c7ea | 271 | extern const char *alpha_cpu_string; /* For -mcpu= */ |
a3b815cb | 272 | extern const char *alpha_tune_string; /* For -mtune= */ |
df45c7ea KG |
273 | extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */ |
274 | extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */ | |
275 | extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */ | |
276 | extern const char *alpha_mlat_string; /* For -mmemory-latency= */ | |
2bf6230d | 277 | |
f8e52397 RH |
278 | #define TARGET_OPTIONS \ |
279 | { \ | |
280 | {"cpu=", &alpha_cpu_string, \ | |
a3b815cb JJ |
281 | N_("Use features of and schedule given CPU")}, \ |
282 | {"tune=", &alpha_tune_string, \ | |
283 | N_("Schedule given CPU")}, \ | |
f8e52397 | 284 | {"fp-rounding-mode=", &alpha_fprm_string, \ |
047142d3 | 285 | N_("Control the generated fp rounding mode")}, \ |
f8e52397 | 286 | {"fp-trap-mode=", &alpha_fptm_string, \ |
047142d3 | 287 | N_("Control the IEEE trap mode")}, \ |
f8e52397 | 288 | {"trap-precision=", &alpha_tp_string, \ |
047142d3 | 289 | N_("Control the precision given to fp exceptions")}, \ |
f8e52397 | 290 | {"memory-latency=", &alpha_mlat_string, \ |
047142d3 | 291 | N_("Tune expected memory latency")}, \ |
2bf6230d RK |
292 | } |
293 | ||
952fc2ed RH |
294 | /* Attempt to describe CPU characteristics to the preprocessor. */ |
295 | ||
285a5742 | 296 | /* Corresponding to amask... */ |
2b57e919 NB |
297 | #define CPP_AM_BWX_SPEC "-D__alpha_bwx__ -Acpu=bwx" |
298 | #define CPP_AM_MAX_SPEC "-D__alpha_max__ -Acpu=max" | |
299 | #define CPP_AM_FIX_SPEC "-D__alpha_fix__ -Acpu=fix" | |
300 | #define CPP_AM_CIX_SPEC "-D__alpha_cix__ -Acpu=cix" | |
952fc2ed | 301 | |
285a5742 | 302 | /* Corresponding to implver... */ |
2b57e919 NB |
303 | #define CPP_IM_EV4_SPEC "-D__alpha_ev4__ -Acpu=ev4" |
304 | #define CPP_IM_EV5_SPEC "-D__alpha_ev5__ -Acpu=ev5" | |
305 | #define CPP_IM_EV6_SPEC "-D__alpha_ev6__ -Acpu=ev6" | |
952fc2ed RH |
306 | |
307 | /* Common combinations. */ | |
308 | #define CPP_CPU_EV4_SPEC "%(cpp_im_ev4)" | |
309 | #define CPP_CPU_EV5_SPEC "%(cpp_im_ev5)" | |
310 | #define CPP_CPU_EV56_SPEC "%(cpp_im_ev5) %(cpp_am_bwx)" | |
311 | #define CPP_CPU_PCA56_SPEC "%(cpp_im_ev5) %(cpp_am_bwx) %(cpp_am_max)" | |
d8ee3e20 RH |
312 | #define CPP_CPU_EV6_SPEC \ |
313 | "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix)" | |
314 | #define CPP_CPU_EV67_SPEC \ | |
315 | "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix) %(cpp_am_cix)" | |
952fc2ed RH |
316 | |
317 | #ifndef CPP_CPU_DEFAULT_SPEC | |
318 | # if TARGET_CPU_DEFAULT & MASK_CPU_EV6 | |
8f4773ea | 319 | # if TARGET_CPU_DEFAULT & MASK_CIX |
d8ee3e20 RH |
320 | # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV67_SPEC |
321 | # else | |
322 | # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV6_SPEC | |
323 | # endif | |
952fc2ed RH |
324 | # else |
325 | # if TARGET_CPU_DEFAULT & MASK_CPU_EV5 | |
326 | # if TARGET_CPU_DEFAULT & MASK_MAX | |
327 | # define CPP_CPU_DEFAULT_SPEC CPP_CPU_PCA56_SPEC | |
328 | # else | |
329 | # if TARGET_CPU_DEFAULT & MASK_BWX | |
330 | # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV56_SPEC | |
331 | # else | |
332 | # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV5_SPEC | |
333 | # endif | |
334 | # endif | |
335 | # else | |
336 | # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV4_SPEC | |
337 | # endif | |
338 | # endif | |
339 | #endif /* CPP_CPU_DEFAULT_SPEC */ | |
340 | ||
341 | #ifndef CPP_CPU_SPEC | |
342 | #define CPP_CPU_SPEC "\ | |
2b57e919 | 343 | %{!undef:-Acpu=alpha -Amachine=alpha -D__alpha -D__alpha__ \ |
952fc2ed RH |
344 | %{mcpu=ev4|mcpu=21064:%(cpp_cpu_ev4) }\ |
345 | %{mcpu=ev5|mcpu=21164:%(cpp_cpu_ev5) }\ | |
346 | %{mcpu=ev56|mcpu=21164a:%(cpp_cpu_ev56) }\ | |
347 | %{mcpu=pca56|mcpu=21164pc|mcpu=21164PC:%(cpp_cpu_pca56) }\ | |
348 | %{mcpu=ev6|mcpu=21264:%(cpp_cpu_ev6) }\ | |
d8ee3e20 | 349 | %{mcpu=ev67|mcpu=21264a:%(cpp_cpu_ev67) }\ |
952fc2ed RH |
350 | %{!mcpu*:%(cpp_cpu_default) }}" |
351 | #endif | |
352 | ||
353 | /* This macro defines names of additional specifications to put in the | |
354 | specs that can be used in various specifications like CC1_SPEC. Its | |
355 | definition is an initializer with a subgrouping for each command option. | |
356 | ||
357 | Each subgrouping contains a string constant, that defines the | |
358 | specification name, and a string constant that used by the GNU CC driver | |
359 | program. | |
360 | ||
361 | Do not define this macro if it does not need to do anything. */ | |
362 | ||
363 | #ifndef SUBTARGET_EXTRA_SPECS | |
364 | #define SUBTARGET_EXTRA_SPECS | |
365 | #endif | |
366 | ||
829245be KG |
367 | #define EXTRA_SPECS \ |
368 | { "cpp_am_bwx", CPP_AM_BWX_SPEC }, \ | |
369 | { "cpp_am_max", CPP_AM_MAX_SPEC }, \ | |
de4abb91 | 370 | { "cpp_am_fix", CPP_AM_FIX_SPEC }, \ |
829245be KG |
371 | { "cpp_am_cix", CPP_AM_CIX_SPEC }, \ |
372 | { "cpp_im_ev4", CPP_IM_EV4_SPEC }, \ | |
373 | { "cpp_im_ev5", CPP_IM_EV5_SPEC }, \ | |
374 | { "cpp_im_ev6", CPP_IM_EV6_SPEC }, \ | |
375 | { "cpp_cpu_ev4", CPP_CPU_EV4_SPEC }, \ | |
376 | { "cpp_cpu_ev5", CPP_CPU_EV5_SPEC }, \ | |
377 | { "cpp_cpu_ev56", CPP_CPU_EV56_SPEC }, \ | |
378 | { "cpp_cpu_pca56", CPP_CPU_PCA56_SPEC }, \ | |
379 | { "cpp_cpu_ev6", CPP_CPU_EV6_SPEC }, \ | |
d8ee3e20 | 380 | { "cpp_cpu_ev67", CPP_CPU_EV67_SPEC }, \ |
829245be KG |
381 | { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \ |
382 | { "cpp_cpu", CPP_CPU_SPEC }, \ | |
383 | { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \ | |
952fc2ed RH |
384 | SUBTARGET_EXTRA_SPECS |
385 | ||
386 | ||
2bf6230d RK |
387 | /* Sometimes certain combinations of command options do not make sense |
388 | on a particular target machine. You can define a macro | |
389 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
390 | defined, is executed once just after all the command options have | |
391 | been parsed. | |
392 | ||
393 | On the Alpha, it is used to translate target-option strings into | |
394 | numeric values. */ | |
395 | ||
2bf6230d RK |
396 | #define OVERRIDE_OPTIONS override_options () |
397 | ||
398 | ||
1a94ca49 RK |
399 | /* Define this macro to change register usage conditional on target flags. |
400 | ||
401 | On the Alpha, we use this to disable the floating-point registers when | |
402 | they don't exist. */ | |
403 | ||
e9e4208a WC |
404 | #define CONDITIONAL_REGISTER_USAGE \ |
405 | { \ | |
406 | int i; \ | |
407 | if (! TARGET_FPREGS) \ | |
408 | for (i = 32; i < 63; i++) \ | |
409 | fixed_regs[i] = call_used_regs[i] = 1; \ | |
410 | } | |
411 | ||
1a94ca49 | 412 | |
4f074454 RK |
413 | /* Show we can debug even without a frame pointer. */ |
414 | #define CAN_DEBUG_WITHOUT_FP | |
1a94ca49 RK |
415 | \f |
416 | /* target machine storage layout */ | |
417 | ||
285a5742 | 418 | /* Define to enable software floating point emulation. */ |
2700ac93 RS |
419 | #define REAL_ARITHMETIC |
420 | ||
1a94ca49 RK |
421 | /* Define the size of `int'. The default is the same as the word size. */ |
422 | #define INT_TYPE_SIZE 32 | |
423 | ||
424 | /* Define the size of `long long'. The default is the twice the word size. */ | |
425 | #define LONG_LONG_TYPE_SIZE 64 | |
426 | ||
427 | /* The two floating-point formats we support are S-floating, which is | |
428 | 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' | |
429 | and `long double' are T. */ | |
430 | ||
431 | #define FLOAT_TYPE_SIZE 32 | |
432 | #define DOUBLE_TYPE_SIZE 64 | |
433 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
434 | ||
5258d7ae RK |
435 | #define WCHAR_TYPE "unsigned int" |
436 | #define WCHAR_TYPE_SIZE 32 | |
1a94ca49 | 437 | |
13d39dbc | 438 | /* Define this macro if it is advisable to hold scalars in registers |
1a94ca49 RK |
439 | in a wider mode than that declared by the program. In such cases, |
440 | the value is constrained to be within the bounds of the declared | |
441 | type, but kept valid in the wider mode. The signedness of the | |
442 | extension may differ from that of the type. | |
443 | ||
444 | For Alpha, we always store objects in a full register. 32-bit objects | |
445 | are always sign-extended, but smaller objects retain their signedness. */ | |
446 | ||
447 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
448 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
449 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
450 | { \ | |
451 | if ((MODE) == SImode) \ | |
452 | (UNSIGNEDP) = 0; \ | |
453 | (MODE) = DImode; \ | |
454 | } | |
455 | ||
456 | /* Define this if function arguments should also be promoted using the above | |
457 | procedure. */ | |
458 | ||
459 | #define PROMOTE_FUNCTION_ARGS | |
460 | ||
461 | /* Likewise, if the function return value is promoted. */ | |
462 | ||
463 | #define PROMOTE_FUNCTION_RETURN | |
464 | ||
465 | /* Define this if most significant bit is lowest numbered | |
466 | in instructions that operate on numbered bit-fields. | |
467 | ||
468 | There are no such instructions on the Alpha, but the documentation | |
469 | is little endian. */ | |
470 | #define BITS_BIG_ENDIAN 0 | |
471 | ||
472 | /* Define this if most significant byte of a word is the lowest numbered. | |
473 | This is false on the Alpha. */ | |
474 | #define BYTES_BIG_ENDIAN 0 | |
475 | ||
476 | /* Define this if most significant word of a multiword number is lowest | |
477 | numbered. | |
478 | ||
479 | For Alpha we can decide arbitrarily since there are no machine instructions | |
285a5742 | 480 | for them. Might as well be consistent with bytes. */ |
1a94ca49 RK |
481 | #define WORDS_BIG_ENDIAN 0 |
482 | ||
483 | /* number of bits in an addressable storage unit */ | |
484 | #define BITS_PER_UNIT 8 | |
485 | ||
486 | /* Width in bits of a "word", which is the contents of a machine register. | |
487 | Note that this is not necessarily the width of data type `int'; | |
488 | if using 16-bit ints on a 68000, this would still be 32. | |
489 | But on a machine with 16-bit registers, this would be 16. */ | |
490 | #define BITS_PER_WORD 64 | |
491 | ||
492 | /* Width of a word, in units (bytes). */ | |
493 | #define UNITS_PER_WORD 8 | |
494 | ||
495 | /* Width in bits of a pointer. | |
496 | See also the macro `Pmode' defined below. */ | |
497 | #define POINTER_SIZE 64 | |
498 | ||
499 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
500 | #define PARM_BOUNDARY 64 | |
501 | ||
502 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
503 | #define STACK_BOUNDARY 64 | |
504 | ||
505 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
c176c051 | 506 | #define FUNCTION_BOUNDARY 32 |
1a94ca49 RK |
507 | |
508 | /* Alignment of field after `int : 0' in a structure. */ | |
509 | #define EMPTY_FIELD_BOUNDARY 64 | |
510 | ||
511 | /* Every structure's size must be a multiple of this. */ | |
512 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
513 | ||
514 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
515 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
516 | ||
1a94ca49 | 517 | /* No data type wants to be aligned rounder than this. */ |
5495cc55 | 518 | #define BIGGEST_ALIGNMENT 128 |
1a94ca49 | 519 | |
d16fe557 RK |
520 | /* For atomic access to objects, must have at least 32-bit alignment |
521 | unless the machine has byte operations. */ | |
13eb1f7f | 522 | #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32)) |
d16fe557 | 523 | |
442b1685 RK |
524 | /* Align all constants and variables to at least a word boundary so |
525 | we can pick up pieces of them faster. */ | |
6c174fc0 RH |
526 | /* ??? Only if block-move stuff knows about different source/destination |
527 | alignment. */ | |
528 | #if 0 | |
442b1685 RK |
529 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) |
530 | #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) | |
6c174fc0 | 531 | #endif |
1a94ca49 RK |
532 | |
533 | /* Set this non-zero if move instructions will actually fail to work | |
534 | when given unaligned data. | |
535 | ||
536 | Since we get an error message when we do one, call them invalid. */ | |
537 | ||
538 | #define STRICT_ALIGNMENT 1 | |
539 | ||
540 | /* Set this non-zero if unaligned move instructions are extremely slow. | |
541 | ||
542 | On the Alpha, they trap. */ | |
130d2d72 | 543 | |
e1565e65 | 544 | #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1 |
1a94ca49 RK |
545 | \f |
546 | /* Standard register usage. */ | |
547 | ||
548 | /* Number of actual hardware registers. | |
549 | The hardware registers are assigned numbers for the compiler | |
550 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
551 | All registers that the compiler knows about must be given numbers, | |
552 | even those that are not normally considered general registers. | |
553 | ||
554 | We define all 32 integer registers, even though $31 is always zero, | |
555 | and all 32 floating-point registers, even though $f31 is also | |
556 | always zero. We do not bother defining the FP status register and | |
130d2d72 RK |
557 | there are no other registers. |
558 | ||
559 | Since $31 is always zero, we will use register number 31 as the | |
560 | argument pointer. It will never appear in the generated code | |
561 | because we will always be eliminating it in favor of the stack | |
52a69200 RK |
562 | pointer or hardware frame pointer. |
563 | ||
564 | Likewise, we use $f31 for the frame pointer, which will always | |
565 | be eliminated in favor of the hardware frame pointer or the | |
566 | stack pointer. */ | |
1a94ca49 RK |
567 | |
568 | #define FIRST_PSEUDO_REGISTER 64 | |
569 | ||
570 | /* 1 for registers that have pervasive standard uses | |
571 | and are not available for the register allocator. */ | |
572 | ||
573 | #define FIXED_REGISTERS \ | |
574 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
575 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ | |
576 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
577 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
578 | ||
579 | /* 1 for registers not available across function calls. | |
580 | These must include the FIXED_REGISTERS and also any | |
581 | registers that can be used without being saved. | |
582 | The latter must include the registers where values are returned | |
583 | and the register where structure-value addresses are passed. | |
584 | Aside from that, you can include as many other registers as you like. */ | |
585 | #define CALL_USED_REGISTERS \ | |
586 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ | |
587 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ | |
588 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ | |
589 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
590 | ||
591 | /* List the order in which to allocate registers. Each register must be | |
592 | listed once, even those in FIXED_REGISTERS. | |
593 | ||
594 | We allocate in the following order: | |
2c4be73e | 595 | $f10-$f15 (nonsaved floating-point register) |
1a94ca49 RK |
596 | $f22-$f30 (likewise) |
597 | $f21-$f16 (likewise, but input args) | |
598 | $f0 (nonsaved, but return value) | |
2c4be73e | 599 | $f1 (nonsaved, but immediate before saved) |
1a94ca49 RK |
600 | $f2-$f9 (saved floating-point registers) |
601 | $1-$8 (nonsaved integer registers) | |
602 | $22-$25 (likewise) | |
603 | $28 (likewise) | |
604 | $0 (likewise, but return value) | |
605 | $21-$16 (likewise, but input args) | |
0076aa6b | 606 | $27 (procedure value in OSF, nonsaved in NT) |
1a94ca49 RK |
607 | $9-$14 (saved integer registers) |
608 | $26 (return PC) | |
609 | $15 (frame pointer) | |
610 | $29 (global pointer) | |
52a69200 | 611 | $30, $31, $f31 (stack pointer and always zero/ap & fp) */ |
1a94ca49 RK |
612 | |
613 | #define REG_ALLOC_ORDER \ | |
2c4be73e | 614 | {42, 43, 44, 45, 46, 47, \ |
1a94ca49 RK |
615 | 54, 55, 56, 57, 58, 59, 60, 61, 62, \ |
616 | 53, 52, 51, 50, 49, 48, \ | |
2c4be73e | 617 | 32, 33, \ |
1a94ca49 RK |
618 | 34, 35, 36, 37, 38, 39, 40, 41, \ |
619 | 1, 2, 3, 4, 5, 6, 7, 8, \ | |
620 | 22, 23, 24, 25, \ | |
621 | 28, \ | |
622 | 0, \ | |
623 | 21, 20, 19, 18, 17, 16, \ | |
624 | 27, \ | |
625 | 9, 10, 11, 12, 13, 14, \ | |
626 | 26, \ | |
627 | 15, \ | |
628 | 29, \ | |
629 | 30, 31, 63 } | |
630 | ||
631 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
632 | to hold something of mode MODE. | |
633 | This is ordinarily the length in words of a value of mode MODE | |
634 | but can be less for certain modes in special long registers. */ | |
635 | ||
636 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
637 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
638 | ||
639 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
640 | On Alpha, the integer registers can hold any mode. The floating-point | |
641 | registers can hold 32-bit and 64-bit integers as well, but not 16-bit | |
a7adf08e | 642 | or 8-bit values. */ |
1a94ca49 | 643 | |
e6a8ebb4 RH |
644 | #define HARD_REGNO_MODE_OK(REGNO, MODE) \ |
645 | ((REGNO) >= 32 && (REGNO) <= 62 \ | |
646 | ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \ | |
647 | : 1) | |
648 | ||
649 | /* A C expression that is nonzero if a value of mode | |
650 | MODE1 is accessible in mode MODE2 without copying. | |
1a94ca49 | 651 | |
e6a8ebb4 RH |
652 | This asymmetric test is true when MODE1 could be put |
653 | in an FP register but MODE2 could not. */ | |
1a94ca49 | 654 | |
a7adf08e | 655 | #define MODES_TIEABLE_P(MODE1, MODE2) \ |
e6a8ebb4 RH |
656 | (HARD_REGNO_MODE_OK (32, (MODE1)) \ |
657 | ? HARD_REGNO_MODE_OK (32, (MODE2)) \ | |
a7adf08e | 658 | : 1) |
1a94ca49 RK |
659 | |
660 | /* Specify the registers used for certain standard purposes. | |
661 | The values of these macros are register numbers. */ | |
662 | ||
663 | /* Alpha pc isn't overloaded on a register that the compiler knows about. */ | |
664 | /* #define PC_REGNUM */ | |
665 | ||
666 | /* Register to use for pushing function arguments. */ | |
667 | #define STACK_POINTER_REGNUM 30 | |
668 | ||
669 | /* Base register for access to local variables of the function. */ | |
52a69200 | 670 | #define HARD_FRAME_POINTER_REGNUM 15 |
1a94ca49 RK |
671 | |
672 | /* Value should be nonzero if functions must have frame pointers. | |
673 | Zero means the frame pointer need not be set up (and parms | |
674 | may be accessed via the stack pointer) in functions that seem suitable. | |
675 | This is computed in `reload', in reload1.c. */ | |
676 | #define FRAME_POINTER_REQUIRED 0 | |
677 | ||
678 | /* Base register for access to arguments of the function. */ | |
130d2d72 | 679 | #define ARG_POINTER_REGNUM 31 |
1a94ca49 | 680 | |
52a69200 RK |
681 | /* Base register for access to local variables of function. */ |
682 | #define FRAME_POINTER_REGNUM 63 | |
683 | ||
1a94ca49 RK |
684 | /* Register in which static-chain is passed to a function. |
685 | ||
686 | For the Alpha, this is based on an example; the calling sequence | |
687 | doesn't seem to specify this. */ | |
688 | #define STATIC_CHAIN_REGNUM 1 | |
689 | ||
133d3133 RH |
690 | /* The register number of the register used to address a table of |
691 | static data addresses in memory. */ | |
692 | #define PIC_OFFSET_TABLE_REGNUM 29 | |
693 | ||
694 | /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' | |
695 | is clobbered by calls. */ | |
696 | /* ??? It is and it isn't. It's required to be valid for a given | |
697 | function when the function returns. It isn't clobbered by | |
698 | current_file functions. Moreover, we do not expose the ldgp | |
699 | until after reload, so we're probably safe. */ | |
700 | /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */ | |
701 | ||
1a94ca49 RK |
702 | /* Register in which address to store a structure value |
703 | arrives in the function. On the Alpha, the address is passed | |
704 | as a hidden argument. */ | |
705 | #define STRUCT_VALUE 0 | |
706 | \f | |
707 | /* Define the classes of registers for register constraints in the | |
708 | machine description. Also define ranges of constants. | |
709 | ||
710 | One of the classes must always be named ALL_REGS and include all hard regs. | |
711 | If there is more than one class, another class must be named NO_REGS | |
712 | and contain no registers. | |
713 | ||
714 | The name GENERAL_REGS must be the name of a class (or an alias for | |
715 | another name such as ALL_REGS). This is the class of registers | |
716 | that is allowed by "g" or "r" in a register constraint. | |
717 | Also, registers outside this class are allocated only when | |
718 | instructions express preferences for them. | |
719 | ||
720 | The classes must be numbered in nondecreasing order; that is, | |
721 | a larger-numbered class must never be contained completely | |
722 | in a smaller-numbered class. | |
723 | ||
724 | For any two classes, it is very desirable that there be another | |
725 | class that represents their union. */ | |
726 | ||
b73c0bc8 RH |
727 | enum reg_class { |
728 | NO_REGS, R24_REG, R25_REG, R27_REG, | |
729 | GENERAL_REGS, FLOAT_REGS, ALL_REGS, | |
730 | LIM_REG_CLASSES | |
731 | }; | |
1a94ca49 RK |
732 | |
733 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
734 | ||
285a5742 | 735 | /* Give names of register classes as strings for dump file. */ |
1a94ca49 RK |
736 | |
737 | #define REG_CLASS_NAMES \ | |
b73c0bc8 RH |
738 | {"NO_REGS", "R24_REG", "R25_REG", "R27_REG", \ |
739 | "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } | |
1a94ca49 RK |
740 | |
741 | /* Define which registers fit in which classes. | |
742 | This is an initializer for a vector of HARD_REG_SET | |
743 | of length N_REG_CLASSES. */ | |
744 | ||
b73c0bc8 RH |
745 | #define REG_CLASS_CONTENTS \ |
746 | { {0x00000000, 0x00000000}, /* NO_REGS */ \ | |
747 | {0x01000000, 0x00000000}, /* R24_REG */ \ | |
748 | {0x02000000, 0x00000000}, /* R25_REG */ \ | |
749 | {0x08000000, 0x00000000}, /* R27_REG */ \ | |
750 | {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \ | |
751 | {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \ | |
752 | {0xffffffff, 0xffffffff} } | |
1a94ca49 RK |
753 | |
754 | /* The same information, inverted: | |
755 | Return the class number of the smallest class containing | |
756 | reg number REGNO. This could be a conditional expression | |
757 | or could index an array. */ | |
758 | ||
93c89ab3 | 759 | #define REGNO_REG_CLASS(REGNO) \ |
b73c0bc8 RH |
760 | ((REGNO) == 24 ? R24_REG \ |
761 | : (REGNO) == 25 ? R25_REG \ | |
762 | : (REGNO) == 27 ? R27_REG \ | |
93c89ab3 RH |
763 | : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \ |
764 | : GENERAL_REGS) | |
1a94ca49 RK |
765 | |
766 | /* The class value for index registers, and the one for base regs. */ | |
767 | #define INDEX_REG_CLASS NO_REGS | |
768 | #define BASE_REG_CLASS GENERAL_REGS | |
769 | ||
770 | /* Get reg_class from a letter such as appears in the machine description. */ | |
771 | ||
772 | #define REG_CLASS_FROM_LETTER(C) \ | |
b73c0bc8 RH |
773 | ((C) == 'a' ? R24_REG \ |
774 | : (C) == 'b' ? R25_REG \ | |
775 | : (C) == 'c' ? R27_REG \ | |
776 | : (C) == 'f' ? FLOAT_REGS \ | |
777 | : NO_REGS) | |
1a94ca49 RK |
778 | |
779 | /* Define this macro to change register usage conditional on target flags. */ | |
780 | /* #define CONDITIONAL_REGISTER_USAGE */ | |
781 | ||
782 | /* The letters I, J, K, L, M, N, O, and P in a register constraint string | |
783 | can be used to stand for particular ranges of immediate operands. | |
784 | This macro defines what the ranges are. | |
785 | C is the letter, and VALUE is a constant value. | |
786 | Return 1 if VALUE is in the range specified by C. | |
787 | ||
788 | For Alpha: | |
789 | `I' is used for the range of constants most insns can contain. | |
790 | `J' is the constant zero. | |
791 | `K' is used for the constant in an LDA insn. | |
792 | `L' is used for the constant in a LDAH insn. | |
793 | `M' is used for the constants that can be AND'ed with using a ZAP insn. | |
794 | `N' is used for complemented 8-bit constants. | |
795 | `O' is used for negated 8-bit constants. | |
796 | `P' is used for the constants 1, 2 and 3. */ | |
797 | ||
551cc6fd | 798 | #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p |
1a94ca49 RK |
799 | |
800 | /* Similar, but for floating or large integer constants, and defining letters | |
801 | G and H. Here VALUE is the CONST_DOUBLE rtx itself. | |
802 | ||
803 | For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE | |
804 | that is the operand of a ZAP insn. */ | |
805 | ||
551cc6fd | 806 | #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p |
1a94ca49 | 807 | |
e560f226 RK |
808 | /* Optional extra constraints for this machine. |
809 | ||
810 | For the Alpha, `Q' means that this is a memory operand but not a | |
ac030a7b | 811 | reference to an unaligned location. |
9ec36da5 | 812 | |
ac030a7b | 813 | `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current |
9ec36da5 JL |
814 | function. |
815 | ||
30102605 RH |
816 | 'S' is a 6-bit constant (valid for a shift insn). |
817 | ||
551cc6fd RH |
818 | 'T' is a HIGH. |
819 | ||
30102605 | 820 | 'U' is a symbolic operand. */ |
e560f226 | 821 | |
551cc6fd | 822 | #define EXTRA_CONSTRAINT alpha_extra_constraint |
e560f226 | 823 | |
1a94ca49 RK |
824 | /* Given an rtx X being reloaded into a reg required to be |
825 | in class CLASS, return the class of reg to actually use. | |
826 | In general this is just CLASS; but on some machines | |
551cc6fd | 827 | in some cases it is preferable to use a more restrictive class. */ |
1a94ca49 | 828 | |
551cc6fd | 829 | #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class |
1a94ca49 RK |
830 | |
831 | /* Loading and storing HImode or QImode values to and from memory | |
832 | usually requires a scratch register. The exceptions are loading | |
e008606e RK |
833 | QImode and HImode from an aligned address to a general register |
834 | unless byte instructions are permitted. | |
ddd5a7c1 | 835 | We also cannot load an unaligned address or a paradoxical SUBREG into an |
285a5742 | 836 | FP register. */ |
1a94ca49 | 837 | |
3611aef0 RH |
838 | #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \ |
839 | secondary_reload_class((CLASS), (MODE), (IN), 1) | |
840 | ||
841 | #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \ | |
842 | secondary_reload_class((CLASS), (MODE), (OUT), 0) | |
1a94ca49 RK |
843 | |
844 | /* If we are copying between general and FP registers, we need a memory | |
de4abb91 | 845 | location unless the FIX extension is available. */ |
1a94ca49 | 846 | |
e9a25f70 | 847 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \ |
bfd82dbf RK |
848 | (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \ |
849 | || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS))) | |
1a94ca49 | 850 | |
acd94aaf RK |
851 | /* Specify the mode to be used for memory when a secondary memory |
852 | location is needed. If MODE is floating-point, use it. Otherwise, | |
853 | widen to a word like the default. This is needed because we always | |
854 | store integers in FP registers in quadword format. This whole | |
855 | area is very tricky! */ | |
856 | #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ | |
857 | (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \ | |
e868b518 | 858 | : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \ |
acd94aaf RK |
859 | : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0)) |
860 | ||
1a94ca49 RK |
861 | /* Return the maximum number of consecutive registers |
862 | needed to represent mode MODE in a register of class CLASS. */ | |
863 | ||
864 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
865 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
866 | ||
c31dfe4d | 867 | /* If defined, gives a class of registers that cannot be used as the |
02188693 | 868 | operand of a SUBREG that changes the mode of the object illegally. */ |
c31dfe4d | 869 | |
02188693 RH |
870 | #define CLASS_CANNOT_CHANGE_MODE FLOAT_REGS |
871 | ||
872 | /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */ | |
873 | ||
874 | #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \ | |
875 | (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)) | |
c31dfe4d | 876 | |
1a94ca49 RK |
877 | /* Define the cost of moving between registers of various classes. Moving |
878 | between FLOAT_REGS and anything else except float regs is expensive. | |
879 | In fact, we make it quite expensive because we really don't want to | |
880 | do these moves unless it is clearly worth it. Optimizations may | |
881 | reduce the impact of not being able to allocate a pseudo to a | |
882 | hard register. */ | |
883 | ||
cf011243 | 884 | #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ |
71d9b493 RH |
885 | (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \ |
886 | ? 2 \ | |
de4abb91 | 887 | : TARGET_FIX ? 3 : 4+2*alpha_memory_latency) |
1a94ca49 RK |
888 | |
889 | /* A C expressions returning the cost of moving data of MODE from a register to | |
890 | or from memory. | |
891 | ||
892 | On the Alpha, bump this up a bit. */ | |
893 | ||
bcbbac26 | 894 | extern int alpha_memory_latency; |
cbd5b9a2 | 895 | #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency) |
1a94ca49 RK |
896 | |
897 | /* Provide the cost of a branch. Exact meaning under development. */ | |
898 | #define BRANCH_COST 5 | |
1a94ca49 RK |
899 | \f |
900 | /* Stack layout; function entry, exit and calling. */ | |
901 | ||
902 | /* Define this if pushing a word on the stack | |
903 | makes the stack pointer a smaller address. */ | |
904 | #define STACK_GROWS_DOWNWARD | |
905 | ||
906 | /* Define this if the nominal address of the stack frame | |
907 | is at the high-address end of the local variables; | |
908 | that is, each additional local variable allocated | |
909 | goes at a more negative offset in the frame. */ | |
130d2d72 | 910 | /* #define FRAME_GROWS_DOWNWARD */ |
1a94ca49 RK |
911 | |
912 | /* Offset within stack frame to start allocating local variables at. | |
913 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
914 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
915 | of the first local allocated. */ | |
916 | ||
52a69200 | 917 | #define STARTING_FRAME_OFFSET 0 |
1a94ca49 RK |
918 | |
919 | /* If we generate an insn to push BYTES bytes, | |
920 | this says how many the stack pointer really advances by. | |
921 | On Alpha, don't define this because there are no push insns. */ | |
922 | /* #define PUSH_ROUNDING(BYTES) */ | |
923 | ||
e008606e RK |
924 | /* Define this to be nonzero if stack checking is built into the ABI. */ |
925 | #define STACK_CHECK_BUILTIN 1 | |
926 | ||
1a94ca49 RK |
927 | /* Define this if the maximum size of all the outgoing args is to be |
928 | accumulated and pushed during the prologue. The amount can be | |
929 | found in the variable current_function_outgoing_args_size. */ | |
f73ad30e | 930 | #define ACCUMULATE_OUTGOING_ARGS 1 |
1a94ca49 RK |
931 | |
932 | /* Offset of first parameter from the argument pointer register value. */ | |
933 | ||
130d2d72 | 934 | #define FIRST_PARM_OFFSET(FNDECL) 0 |
1a94ca49 RK |
935 | |
936 | /* Definitions for register eliminations. | |
937 | ||
978e8952 | 938 | We have two registers that can be eliminated on the Alpha. First, the |
1a94ca49 | 939 | frame pointer register can often be eliminated in favor of the stack |
130d2d72 | 940 | pointer register. Secondly, the argument pointer register can always be |
285a5742 | 941 | eliminated; it is replaced with either the stack or frame pointer. */ |
1a94ca49 RK |
942 | |
943 | /* This is an array of structures. Each structure initializes one pair | |
944 | of eliminable registers. The "from" register number is given first, | |
945 | followed by "to". Eliminations of the same "from" register are listed | |
946 | in order of preference. */ | |
947 | ||
52a69200 RK |
948 | #define ELIMINABLE_REGS \ |
949 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
950 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
951 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
952 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
1a94ca49 RK |
953 | |
954 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
955 | Frame pointer elimination is automatically handled. | |
956 | ||
130d2d72 | 957 | All eliminations are valid since the cases where FP can't be |
1a94ca49 RK |
958 | eliminated are already handled. */ |
959 | ||
130d2d72 | 960 | #define CAN_ELIMINATE(FROM, TO) 1 |
1a94ca49 | 961 | |
52a69200 RK |
962 | /* Round up to a multiple of 16 bytes. */ |
963 | #define ALPHA_ROUND(X) (((X) + 15) & ~ 15) | |
964 | ||
1a94ca49 RK |
965 | /* Define the offset between two registers, one to be eliminated, and the other |
966 | its replacement, at the start of a routine. */ | |
967 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
52a69200 RK |
968 | { if ((FROM) == FRAME_POINTER_REGNUM) \ |
969 | (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ | |
970 | + alpha_sa_size ()); \ | |
971 | else if ((FROM) == ARG_POINTER_REGNUM) \ | |
972 | (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ | |
973 | + alpha_sa_size () \ | |
d772039b RK |
974 | + (ALPHA_ROUND (get_frame_size () \ |
975 | + current_function_pretend_args_size) \ | |
976 | - current_function_pretend_args_size)); \ | |
c8d8ed65 RK |
977 | else \ |
978 | abort (); \ | |
1a94ca49 RK |
979 | } |
980 | ||
981 | /* Define this if stack space is still allocated for a parameter passed | |
982 | in a register. */ | |
983 | /* #define REG_PARM_STACK_SPACE */ | |
984 | ||
985 | /* Value is the number of bytes of arguments automatically | |
986 | popped when returning from a subroutine call. | |
8b109b37 | 987 | FUNDECL is the declaration node of the function (as a tree), |
1a94ca49 RK |
988 | FUNTYPE is the data type of the function (as a tree), |
989 | or for a library call it is an identifier node for the subroutine name. | |
990 | SIZE is the number of bytes of arguments passed on the stack. */ | |
991 | ||
8b109b37 | 992 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
1a94ca49 RK |
993 | |
994 | /* Define how to find the value returned by a function. | |
995 | VALTYPE is the data type of the value (as a tree). | |
996 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
997 | otherwise, FUNC is 0. | |
998 | ||
999 | On Alpha the value is found in $0 for integer functions and | |
1000 | $f0 for floating-point functions. */ | |
1001 | ||
c5c76735 | 1002 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ |
4c020733 | 1003 | gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \ |
c5c76735 JL |
1004 | && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ |
1005 | || POINTER_TYPE_P (VALTYPE)) \ | |
4c020733 RH |
1006 | ? word_mode : TYPE_MODE (VALTYPE), \ |
1007 | ((TARGET_FPREGS \ | |
c5c76735 | 1008 | && (TREE_CODE (VALTYPE) == REAL_TYPE \ |
4c020733 | 1009 | || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \ |
c5c76735 | 1010 | ? 32 : 0)) |
1a94ca49 RK |
1011 | |
1012 | /* Define how to find the value returned by a library function | |
1013 | assuming the value has mode MODE. */ | |
1014 | ||
c5c76735 | 1015 | #define LIBCALL_VALUE(MODE) \ |
4c020733 | 1016 | gen_rtx_REG (MODE, \ |
c5c76735 JL |
1017 | (TARGET_FPREGS \ |
1018 | && (GET_MODE_CLASS (MODE) == MODE_FLOAT \ | |
4c020733 | 1019 | || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \ |
c5c76735 | 1020 | ? 32 : 0)) |
1a94ca49 | 1021 | |
130d2d72 RK |
1022 | /* The definition of this macro implies that there are cases where |
1023 | a scalar value cannot be returned in registers. | |
1024 | ||
1025 | For the Alpha, any structure or union type is returned in memory, as | |
1026 | are integers whose size is larger than 64 bits. */ | |
1027 | ||
1028 | #define RETURN_IN_MEMORY(TYPE) \ | |
e14fa9c4 | 1029 | (TYPE_MODE (TYPE) == BLKmode \ |
5495cc55 RH |
1030 | || TYPE_MODE (TYPE) == TFmode \ |
1031 | || TYPE_MODE (TYPE) == TCmode \ | |
130d2d72 RK |
1032 | || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64)) |
1033 | ||
1a94ca49 RK |
1034 | /* 1 if N is a possible register number for a function value |
1035 | as seen by the caller. */ | |
1036 | ||
e5958492 RK |
1037 | #define FUNCTION_VALUE_REGNO_P(N) \ |
1038 | ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33) | |
1a94ca49 RK |
1039 | |
1040 | /* 1 if N is a possible register number for function argument passing. | |
1041 | On Alpha, these are $16-$21 and $f16-$f21. */ | |
1042 | ||
1043 | #define FUNCTION_ARG_REGNO_P(N) \ | |
1044 | (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) | |
1045 | \f | |
1046 | /* Define a data type for recording info about an argument list | |
1047 | during the scan of that argument list. This data type should | |
1048 | hold all necessary information about the function itself | |
1049 | and about the args processed so far, enough to enable macros | |
1050 | such as FUNCTION_ARG to determine where the next arg should go. | |
1051 | ||
1052 | On Alpha, this is a single integer, which is a number of words | |
1053 | of arguments scanned so far. | |
1054 | Thus 6 or more means all following args should go on the stack. */ | |
1055 | ||
1056 | #define CUMULATIVE_ARGS int | |
1057 | ||
1058 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
1059 | for a call to a function whose data type is FNTYPE. | |
1060 | For a library call, FNTYPE is 0. */ | |
1061 | ||
2c7ee1a6 | 1062 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0 |
1a94ca49 RK |
1063 | |
1064 | /* Define intermediate macro to compute the size (in registers) of an argument | |
1065 | for the Alpha. */ | |
1066 | ||
1067 | #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \ | |
5495cc55 RH |
1068 | ((MODE) == TFmode || (MODE) == TCmode ? 1 \ |
1069 | : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \ | |
1070 | + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
1a94ca49 RK |
1071 | |
1072 | /* Update the data in CUM to advance over an argument | |
1073 | of mode MODE and data type TYPE. | |
1074 | (TYPE is null for libcalls where that information may not be available.) */ | |
1075 | ||
1076 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
1077 | if (MUST_PASS_IN_STACK (MODE, TYPE)) \ | |
1078 | (CUM) = 6; \ | |
1079 | else \ | |
1080 | (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED) | |
1081 | ||
1082 | /* Determine where to put an argument to a function. | |
1083 | Value is zero to push the argument on the stack, | |
1084 | or a hard register in which to store the argument. | |
1085 | ||
1086 | MODE is the argument's machine mode. | |
1087 | TYPE is the data type of the argument (as a tree). | |
1088 | This is null for libcalls where that information may | |
1089 | not be available. | |
1090 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
1091 | the preceding args and about the function being called. | |
1092 | NAMED is nonzero if this argument is a named parameter | |
1093 | (otherwise it is an extra parameter matching an ellipsis). | |
1094 | ||
1095 | On Alpha the first 6 words of args are normally in registers | |
1096 | and the rest are pushed. */ | |
1097 | ||
1098 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
5495cc55 RH |
1099 | function_arg((CUM), (MODE), (TYPE), (NAMED)) |
1100 | ||
1101 | /* A C expression that indicates when an argument must be passed by | |
1102 | reference. If nonzero for an argument, a copy of that argument is | |
1103 | made in memory and a pointer to the argument is passed instead of | |
1104 | the argument itself. The pointer is passed in whatever way is | |
285a5742 | 1105 | appropriate for passing a pointer to that type. */ |
5495cc55 RH |
1106 | |
1107 | #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \ | |
1108 | ((MODE) == TFmode || (MODE) == TCmode) | |
1a94ca49 | 1109 | |
1a94ca49 RK |
1110 | /* Specify the padding direction of arguments. |
1111 | ||
1112 | On the Alpha, we must pad upwards in order to be able to pass args in | |
1113 | registers. */ | |
1114 | ||
1115 | #define FUNCTION_ARG_PADDING(MODE, TYPE) upward | |
1116 | ||
1117 | /* For an arg passed partly in registers and partly in memory, | |
1118 | this is the number of registers used. | |
1119 | For args passed entirely in registers or entirely in memory, zero. */ | |
1120 | ||
1121 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
1122 | ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ | |
1123 | ? 6 - (CUM) : 0) | |
1124 | ||
130d2d72 RK |
1125 | /* Perform any needed actions needed for a function that is receiving a |
1126 | variable number of arguments. | |
1127 | ||
1128 | CUM is as above. | |
1129 | ||
1130 | MODE and TYPE are the mode and type of the current parameter. | |
1131 | ||
1132 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
1133 | that must be pushed by the prolog to pretend that our caller pushed | |
1134 | it. | |
1135 | ||
1136 | Normally, this macro will push all remaining incoming registers on the | |
1137 | stack and set PRETEND_SIZE to the length of the registers pushed. | |
1138 | ||
1139 | On the Alpha, we allocate space for all 12 arg registers, but only | |
1140 | push those that are remaining. | |
1141 | ||
1142 | However, if NO registers need to be saved, don't allocate any space. | |
1143 | This is not only because we won't need the space, but because AP includes | |
1144 | the current_pretend_args_size and we don't want to mess up any | |
7a92339b RK |
1145 | ap-relative addresses already made. |
1146 | ||
1147 | If we are not to use the floating-point registers, save the integer | |
1148 | registers where we would put the floating-point registers. This is | |
1149 | not the most efficient way to implement varargs with just one register | |
1150 | class, but it isn't worth doing anything more efficient in this rare | |
1151 | case. */ | |
1152 | ||
130d2d72 RK |
1153 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ |
1154 | { if ((CUM) < 6) \ | |
1155 | { \ | |
1156 | if (! (NO_RTL)) \ | |
1157 | { \ | |
63966b3b RH |
1158 | rtx tmp; int set = get_varargs_alias_set (); \ |
1159 | tmp = gen_rtx_MEM (BLKmode, \ | |
1160 | plus_constant (virtual_incoming_args_rtx, \ | |
1161 | ((CUM) + 6)* UNITS_PER_WORD)); \ | |
6a1d250e | 1162 | set_mem_alias_set (tmp, set); \ |
130d2d72 | 1163 | move_block_from_reg \ |
63966b3b | 1164 | (16 + CUM, tmp, \ |
02892e06 | 1165 | 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ |
63966b3b RH |
1166 | \ |
1167 | tmp = gen_rtx_MEM (BLKmode, \ | |
1168 | plus_constant (virtual_incoming_args_rtx, \ | |
1169 | (CUM) * UNITS_PER_WORD)); \ | |
6a1d250e | 1170 | set_mem_alias_set (tmp, set); \ |
130d2d72 | 1171 | move_block_from_reg \ |
63966b3b | 1172 | (16 + (TARGET_FPREGS ? 32 : 0) + CUM, tmp, \ |
02892e06 | 1173 | 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ |
130d2d72 RK |
1174 | } \ |
1175 | PRETEND_SIZE = 12 * UNITS_PER_WORD; \ | |
1176 | } \ | |
1177 | } | |
1178 | ||
7d89dda5 RH |
1179 | /* We do not allow indirect calls to be optimized into sibling calls, nor |
1180 | can we allow a call to a function in a different compilation unit to | |
1181 | be optimized into a sibcall. Except if the function is known not to | |
1182 | return, in which case our caller doesn't care what the gp is. */ | |
1183 | #define FUNCTION_OK_FOR_SIBCALL(DECL) \ | |
1184 | (DECL \ | |
1185 | && ((TREE_ASM_WRITTEN (DECL) && !flag_pic) \ | |
9a1ba437 | 1186 | || ! TREE_PUBLIC (DECL))) |
7d89dda5 | 1187 | |
c8e9adec RK |
1188 | /* Try to output insns to set TARGET equal to the constant C if it can be |
1189 | done in less than N insns. Do all computations in MODE. Returns the place | |
1190 | where the output has been placed if it can be done and the insns have been | |
1191 | emitted. If it would take more than N insns, zero is returned and no | |
1192 | insns and emitted. */ | |
92e40a7a | 1193 | |
1a94ca49 RK |
1194 | /* Define the information needed to generate branch and scc insns. This is |
1195 | stored from the compare operation. Note that we can't use "rtx" here | |
1196 | since it hasn't been defined! */ | |
1197 | ||
6db21c7f RH |
1198 | struct alpha_compare |
1199 | { | |
1200 | struct rtx_def *op0, *op1; | |
1201 | int fp_p; | |
1202 | }; | |
1203 | ||
1204 | extern struct alpha_compare alpha_compare; | |
1a94ca49 | 1205 | |
e5958492 | 1206 | /* Make (or fake) .linkage entry for function call. |
e5958492 | 1207 | IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */ |
e5958492 | 1208 | |
bcbbac26 RH |
1209 | /* This macro defines the start of an assembly comment. */ |
1210 | ||
1211 | #define ASM_COMMENT_START " #" | |
1212 | ||
acd92049 | 1213 | /* This macro produces the initial definition of a function. */ |
1a94ca49 | 1214 | |
acd92049 RH |
1215 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ |
1216 | alpha_start_function(FILE,NAME,DECL); | |
1a94ca49 | 1217 | |
acd92049 | 1218 | /* This macro closes up a function definition for the assembler. */ |
9c0e94a5 | 1219 | |
acd92049 RH |
1220 | #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \ |
1221 | alpha_end_function(FILE,NAME,DECL) | |
acd92049 | 1222 | |
acd92049 RH |
1223 | /* Output any profiling code before the prologue. */ |
1224 | ||
1225 | #define PROFILE_BEFORE_PROLOGUE 1 | |
1226 | ||
1a94ca49 | 1227 | /* Output assembler code to FILE to increment profiler label # LABELNO |
e0fb9029 | 1228 | for profiling a function entry. Under OSF/1, profiling is enabled |
ddd5a7c1 | 1229 | by simply passing -pg to the assembler and linker. */ |
85d159a3 | 1230 | |
e0fb9029 | 1231 | #define FUNCTION_PROFILER(FILE, LABELNO) |
85d159a3 RK |
1232 | |
1233 | /* Output assembler code to FILE to initialize this source file's | |
1234 | basic block profiling info, if that has not already been done. | |
285a5742 | 1235 | This assumes that __bb_init_func doesn't garble a1-a5. */ |
85d159a3 RK |
1236 | |
1237 | #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ | |
1238 | do { \ | |
1239 | ASM_OUTPUT_REG_PUSH (FILE, 16); \ | |
a62eb16f JW |
1240 | fputs ("\tlda $16,$PBX32\n", (FILE)); \ |
1241 | fputs ("\tldq $26,0($16)\n", (FILE)); \ | |
1242 | fputs ("\tbne $26,1f\n", (FILE)); \ | |
1243 | fputs ("\tlda $27,__bb_init_func\n", (FILE)); \ | |
1244 | fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \ | |
1245 | fputs ("\tldgp $29,0($26)\n", (FILE)); \ | |
1246 | fputs ("1:\n", (FILE)); \ | |
85d159a3 RK |
1247 | ASM_OUTPUT_REG_POP (FILE, 16); \ |
1248 | } while (0); | |
1249 | ||
1250 | /* Output assembler code to FILE to increment the entry-count for | |
1251 | the BLOCKNO'th basic block in this source file. */ | |
1252 | ||
1253 | #define BLOCK_PROFILER(FILE, BLOCKNO) \ | |
1254 | do { \ | |
1255 | int blockn = (BLOCKNO); \ | |
a62eb16f | 1256 | fputs ("\tsubq $30,16,$30\n", (FILE)); \ |
70a76f06 RK |
1257 | fputs ("\tstq $26,0($30)\n", (FILE)); \ |
1258 | fputs ("\tstq $27,8($30)\n", (FILE)); \ | |
1259 | fputs ("\tlda $26,$PBX34\n", (FILE)); \ | |
1260 | fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \ | |
1261 | fputs ("\taddq $27,1,$27\n", (FILE)); \ | |
1262 | fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \ | |
1263 | fputs ("\tldq $26,0($30)\n", (FILE)); \ | |
1264 | fputs ("\tldq $27,8($30)\n", (FILE)); \ | |
a62eb16f | 1265 | fputs ("\taddq $30,16,$30\n", (FILE)); \ |
85d159a3 | 1266 | } while (0) |
1a94ca49 | 1267 | |
1a94ca49 RK |
1268 | |
1269 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1270 | the stack pointer does not matter. The value is tested only in | |
1271 | functions that have frame pointers. | |
1272 | No definition is equivalent to always zero. */ | |
1273 | ||
1274 | #define EXIT_IGNORE_STACK 1 | |
c112e233 RH |
1275 | |
1276 | /* Define registers used by the epilogue and return instruction. */ | |
1277 | ||
1278 | #define EPILOGUE_USES(REGNO) ((REGNO) == 26) | |
1a94ca49 RK |
1279 | \f |
1280 | /* Output assembler code for a block containing the constant parts | |
1281 | of a trampoline, leaving space for the variable parts. | |
1282 | ||
1283 | The trampoline should set the static chain pointer to value placed | |
7981384f RK |
1284 | into the trampoline and should branch to the specified routine. |
1285 | Note that $27 has been set to the address of the trampoline, so we can | |
30864e14 | 1286 | use it for addressability of the two data items. */ |
1a94ca49 RK |
1287 | |
1288 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
c714f03d | 1289 | do { \ |
7981384f | 1290 | fprintf (FILE, "\tldq $1,24($27)\n"); \ |
1a94ca49 | 1291 | fprintf (FILE, "\tldq $27,16($27)\n"); \ |
7981384f RK |
1292 | fprintf (FILE, "\tjmp $31,($27),0\n"); \ |
1293 | fprintf (FILE, "\tnop\n"); \ | |
1a94ca49 | 1294 | fprintf (FILE, "\t.quad 0,0\n"); \ |
c714f03d | 1295 | } while (0) |
1a94ca49 | 1296 | |
3a523eeb RS |
1297 | /* Section in which to place the trampoline. On Alpha, instructions |
1298 | may only be placed in a text segment. */ | |
1299 | ||
1300 | #define TRAMPOLINE_SECTION text_section | |
1301 | ||
1a94ca49 RK |
1302 | /* Length in units of the trampoline for entering a nested function. */ |
1303 | ||
7981384f | 1304 | #define TRAMPOLINE_SIZE 32 |
1a94ca49 | 1305 | |
30864e14 RH |
1306 | /* The alignment of a trampoline, in bits. */ |
1307 | ||
1308 | #define TRAMPOLINE_ALIGNMENT 64 | |
1309 | ||
1a94ca49 RK |
1310 | /* Emit RTL insns to initialize the variable parts of a trampoline. |
1311 | FNADDR is an RTX for the address of the function's pure code. | |
c714f03d | 1312 | CXT is an RTX for the static chain value for the function. */ |
1a94ca49 | 1313 | |
9ec36da5 | 1314 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ |
c714f03d | 1315 | alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8) |
675f0e7c RK |
1316 | |
1317 | /* A C expression whose value is RTL representing the value of the return | |
1318 | address for the frame COUNT steps up from the current frame. | |
1319 | FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of | |
952fc2ed | 1320 | the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */ |
675f0e7c | 1321 | |
9ecc37f0 | 1322 | #define RETURN_ADDR_RTX alpha_return_addr |
9ecc37f0 | 1323 | |
285a5742 | 1324 | /* Before the prologue, RA lives in $26. */ |
6abc6f40 | 1325 | #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26) |
8034da37 | 1326 | #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26) |
4573b4de RH |
1327 | |
1328 | /* Describe how we implement __builtin_eh_return. */ | |
1329 | #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM) | |
1330 | #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28) | |
1331 | #define EH_RETURN_HANDLER_RTX \ | |
1332 | gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \ | |
1333 | current_function_outgoing_args_size)) | |
675f0e7c | 1334 | \f |
1a94ca49 RK |
1335 | /* Addressing modes, and classification of registers for them. */ |
1336 | ||
940da324 JL |
1337 | /* #define HAVE_POST_INCREMENT 0 */ |
1338 | /* #define HAVE_POST_DECREMENT 0 */ | |
1a94ca49 | 1339 | |
940da324 JL |
1340 | /* #define HAVE_PRE_DECREMENT 0 */ |
1341 | /* #define HAVE_PRE_INCREMENT 0 */ | |
1a94ca49 RK |
1342 | |
1343 | /* Macros to check register numbers against specific register classes. */ | |
1344 | ||
1345 | /* These assume that REGNO is a hard or pseudo reg number. | |
1346 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1347 | or a pseudo reg currently allocated to a suitable hard reg. | |
1348 | Since they use reg_renumber, they are safe only once reg_renumber | |
1349 | has been allocated, which happens in local-alloc.c. */ | |
1350 | ||
1351 | #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
1352 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
52a69200 RK |
1353 | ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ |
1354 | || (REGNO) == 63 || reg_renumber[REGNO] == 63) | |
1a94ca49 RK |
1355 | \f |
1356 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1357 | #define MAX_REGS_PER_ADDRESS 1 | |
1358 | ||
1359 | /* Recognize any constant value that is a valid address. For the Alpha, | |
1360 | there are only constants none since we want to use LDA to load any | |
1361 | symbolic addresses into registers. */ | |
1362 | ||
1363 | #define CONSTANT_ADDRESS_P(X) \ | |
1364 | (GET_CODE (X) == CONST_INT \ | |
1365 | && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) | |
1366 | ||
1367 | /* Include all constant integers and constant doubles, but not | |
1368 | floating-point, except for floating-point zero. */ | |
1369 | ||
1370 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1371 | (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ | |
1372 | || (X) == CONST0_RTX (GET_MODE (X))) | |
1373 | ||
1374 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1375 | and check its validity for a certain class. | |
1376 | We have two alternate definitions for each of them. | |
1377 | The usual definition accepts all pseudo regs; the other rejects | |
1378 | them unless they have been allocated suitable hard regs. | |
1379 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1380 | ||
1381 | Most source files want to accept pseudo regs in the hope that | |
1382 | they will get allocated to the class that the insn wants them to be in. | |
1383 | Source files for reload pass need to be strict. | |
1384 | After reload, it makes no difference, since pseudo regs have | |
1385 | been eliminated by then. */ | |
1386 | ||
1a94ca49 RK |
1387 | /* Nonzero if X is a hard reg that can be used as an index |
1388 | or if it is a pseudo reg. */ | |
1389 | #define REG_OK_FOR_INDEX_P(X) 0 | |
5d02b6c2 | 1390 | |
1a94ca49 RK |
1391 | /* Nonzero if X is a hard reg that can be used as a base reg |
1392 | or if it is a pseudo reg. */ | |
a39bdefc | 1393 | #define NONSTRICT_REG_OK_FOR_BASE_P(X) \ |
52a69200 | 1394 | (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
1a94ca49 | 1395 | |
5d02b6c2 RH |
1396 | /* ??? Nonzero if X is the frame pointer, or some virtual register |
1397 | that may eliminate to the frame pointer. These will be allowed to | |
1398 | have offsets greater than 32K. This is done because register | |
1399 | elimination offsets will change the hi/lo split, and if we split | |
285a5742 | 1400 | before reload, we will require additional instructions. */ |
a39bdefc | 1401 | #define NONSTRICT_REG_OK_FP_BASE_P(X) \ |
5d02b6c2 RH |
1402 | (REGNO (X) == 31 || REGNO (X) == 63 \ |
1403 | || (REGNO (X) >= FIRST_PSEUDO_REGISTER \ | |
1404 | && REGNO (X) < LAST_VIRTUAL_REGISTER)) | |
1405 | ||
1a94ca49 | 1406 | /* Nonzero if X is a hard reg that can be used as a base reg. */ |
a39bdefc | 1407 | #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) |
5d02b6c2 | 1408 | |
a39bdefc RH |
1409 | #ifdef REG_OK_STRICT |
1410 | #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X) | |
1411 | #else | |
1412 | #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X) | |
1a94ca49 RK |
1413 | #endif |
1414 | \f | |
a39bdefc RH |
1415 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a |
1416 | valid memory address for an instruction. */ | |
1a94ca49 | 1417 | |
a39bdefc RH |
1418 | #ifdef REG_OK_STRICT |
1419 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ | |
1420 | do { \ | |
1421 | if (alpha_legitimate_address_p (MODE, X, 1)) \ | |
1422 | goto WIN; \ | |
1423 | } while (0) | |
1424 | #else | |
1425 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \ | |
1426 | do { \ | |
1427 | if (alpha_legitimate_address_p (MODE, X, 0)) \ | |
1428 | goto WIN; \ | |
1429 | } while (0) | |
1430 | #endif | |
1a94ca49 RK |
1431 | |
1432 | /* Try machine-dependent ways of modifying an illegitimate address | |
1433 | to be legitimate. If we find one, return the new, valid address. | |
a39bdefc | 1434 | This macro is used in only one place: `memory_address' in explow.c. */ |
aead1ca3 | 1435 | |
551cc6fd RH |
1436 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ |
1437 | do { \ | |
1438 | rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \ | |
1439 | if (new_x) \ | |
1440 | { \ | |
1441 | X = new_x; \ | |
1442 | goto WIN; \ | |
1443 | } \ | |
aead1ca3 | 1444 | } while (0) |
1a94ca49 | 1445 | |
a9a2595b JR |
1446 | /* Try a machine-dependent way of reloading an illegitimate address |
1447 | operand. If we find one, push the reload and jump to WIN. This | |
aead1ca3 | 1448 | macro is used in only one place: `find_reloads_address' in reload.c. */ |
a9a2595b | 1449 | |
aead1ca3 RH |
1450 | #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ |
1451 | do { \ | |
1452 | rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \ | |
1453 | if (new_x) \ | |
1454 | { \ | |
1455 | X = new_x; \ | |
1456 | goto WIN; \ | |
1457 | } \ | |
a9a2595b JR |
1458 | } while (0) |
1459 | ||
1a94ca49 RK |
1460 | /* Go to LABEL if ADDR (a legitimate address expression) |
1461 | has an effect that depends on the machine mode it is used for. | |
1462 | On the Alpha this is true only for the unaligned modes. We can | |
1463 | simplify this test since we know that the address must be valid. */ | |
1464 | ||
1465 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1466 | { if (GET_CODE (ADDR) == AND) goto LABEL; } | |
1467 | ||
1468 | /* Compute the cost of an address. For the Alpha, all valid addresses are | |
1469 | the same cost. */ | |
1470 | ||
1471 | #define ADDRESS_COST(X) 0 | |
1472 | ||
285a5742 | 1473 | /* Machine-dependent reorg pass. */ |
2ea844d3 | 1474 | #define MACHINE_DEPENDENT_REORG(X) alpha_reorg(X) |
1a94ca49 RK |
1475 | \f |
1476 | /* Specify the machine mode that this machine uses | |
1477 | for the index in the tablejump instruction. */ | |
1478 | #define CASE_VECTOR_MODE SImode | |
1479 | ||
18543a22 ILT |
1480 | /* Define as C expression which evaluates to nonzero if the tablejump |
1481 | instruction expects the table to contain offsets from the address of the | |
3aa9d5b6 | 1482 | table. |
b0435cf4 | 1483 | |
3aa9d5b6 | 1484 | Do not define this if the table should contain absolute addresses. |
260ced47 RK |
1485 | On the Alpha, the table is really GP-relative, not relative to the PC |
1486 | of the table, but we pretend that it is PC-relative; this should be OK, | |
0076aa6b | 1487 | but we should try to find some better way sometime. */ |
18543a22 | 1488 | #define CASE_VECTOR_PC_RELATIVE 1 |
1a94ca49 | 1489 | |
1a94ca49 RK |
1490 | /* Define this as 1 if `char' should by default be signed; else as 0. */ |
1491 | #define DEFAULT_SIGNED_CHAR 1 | |
1492 | ||
1493 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1494 | also convert validly to an unsigned one. | |
1495 | ||
1496 | We actually lie a bit here as overflow conditions are different. But | |
1497 | they aren't being checked anyway. */ | |
1498 | ||
1499 | #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
1500 | ||
1501 | /* Max number of bytes we can move to or from memory | |
1502 | in one reasonably fast instruction. */ | |
1503 | ||
1504 | #define MOVE_MAX 8 | |
1505 | ||
7e24ffc9 HPN |
1506 | /* If a memory-to-memory move would take MOVE_RATIO or more simple |
1507 | move-instruction pairs, we will do a movstr or libcall instead. | |
1508 | ||
1509 | Without byte/word accesses, we want no more than four instructions; | |
285a5742 | 1510 | with, several single byte accesses are better. */ |
6c174fc0 RH |
1511 | |
1512 | #define MOVE_RATIO (TARGET_BWX ? 7 : 2) | |
1513 | ||
1a94ca49 RK |
1514 | /* Largest number of bytes of an object that can be placed in a register. |
1515 | On the Alpha we have plenty of registers, so use TImode. */ | |
1516 | #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) | |
1517 | ||
1518 | /* Nonzero if access to memory by bytes is no faster than for words. | |
1519 | Also non-zero if doing byte operations (specifically shifts) in registers | |
1520 | is undesirable. | |
1521 | ||
1522 | On the Alpha, we want to not use the byte operation and instead use | |
1523 | masking operations to access fields; these will save instructions. */ | |
1524 | ||
1525 | #define SLOW_BYTE_ACCESS 1 | |
1526 | ||
9a63901f RK |
1527 | /* Define if operations between registers always perform the operation |
1528 | on the full register even if a narrower mode is specified. */ | |
1529 | #define WORD_REGISTER_OPERATIONS | |
1530 | ||
1531 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1532 | will either zero-extend or sign-extend. The value of this macro should | |
1533 | be the code that says which one of the two operations is implicitly | |
1534 | done, NIL if none. */ | |
b7747781 | 1535 | #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND) |
1a94ca49 | 1536 | |
225211e2 RK |
1537 | /* Define if loading short immediate values into registers sign extends. */ |
1538 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
1539 | ||
1a94ca49 RK |
1540 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1541 | is done just by pretending it is already truncated. */ | |
1542 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1543 | ||
1544 | /* We assume that the store-condition-codes instructions store 0 for false | |
1545 | and some other value for true. This is the value stored for true. */ | |
1546 | ||
1547 | #define STORE_FLAG_VALUE 1 | |
1548 | ||
1549 | /* Define the value returned by a floating-point comparison instruction. */ | |
1550 | ||
12530dbe RH |
1551 | #define FLOAT_STORE_FLAG_VALUE(MODE) \ |
1552 | REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE)) | |
1a94ca49 | 1553 | |
35bb77fd RK |
1554 | /* Canonicalize a comparison from one we don't have to one we do have. */ |
1555 | ||
1556 | #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ | |
1557 | do { \ | |
1558 | if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \ | |
1559 | && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \ | |
1560 | { \ | |
1561 | rtx tem = (OP0); \ | |
1562 | (OP0) = (OP1); \ | |
1563 | (OP1) = tem; \ | |
1564 | (CODE) = swap_condition (CODE); \ | |
1565 | } \ | |
1566 | if (((CODE) == LT || (CODE) == LTU) \ | |
1567 | && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \ | |
1568 | { \ | |
1569 | (CODE) = (CODE) == LT ? LE : LEU; \ | |
1570 | (OP1) = GEN_INT (255); \ | |
1571 | } \ | |
1572 | } while (0) | |
1573 | ||
1a94ca49 RK |
1574 | /* Specify the machine mode that pointers have. |
1575 | After generation of rtl, the compiler makes no further distinction | |
1576 | between pointers and any other objects of this machine mode. */ | |
1577 | #define Pmode DImode | |
1578 | ||
285a5742 | 1579 | /* Mode of a function address in a call instruction (for indexing purposes). */ |
1a94ca49 RK |
1580 | |
1581 | #define FUNCTION_MODE Pmode | |
1582 | ||
1583 | /* Define this if addresses of constant functions | |
1584 | shouldn't be put through pseudo regs where they can be cse'd. | |
1585 | Desirable on machines where ordinary constants are expensive | |
1586 | but a CALL with constant address is cheap. | |
1587 | ||
1588 | We define this on the Alpha so that gen_call and gen_call_value | |
1589 | get to see the SYMBOL_REF (for the hint field of the jsr). It will | |
1590 | then copy it into a register, thus actually letting the address be | |
1591 | cse'ed. */ | |
1592 | ||
1593 | #define NO_FUNCTION_CSE | |
1594 | ||
d969caf8 | 1595 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
285a5742 | 1596 | few bits. */ |
d969caf8 | 1597 | #define SHIFT_COUNT_TRUNCATED 1 |
1a94ca49 RK |
1598 | |
1599 | /* Compute the cost of computing a constant rtl expression RTX | |
1600 | whose rtx-code is CODE. The body of this macro is a portion | |
1601 | of a switch statement. If the code is computed here, | |
1602 | return it with a return statement. Otherwise, break from the switch. | |
1603 | ||
8b7b2e36 RK |
1604 | If this is an 8-bit constant, return zero since it can be used |
1605 | nearly anywhere with no cost. If it is a valid operand for an | |
1606 | ADD or AND, likewise return 0 if we know it will be used in that | |
1607 | context. Otherwise, return 2 since it might be used there later. | |
1608 | All other constants take at least two insns. */ | |
1a94ca49 RK |
1609 | |
1610 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ | |
1611 | case CONST_INT: \ | |
06eb8e92 | 1612 | if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \ |
8b7b2e36 | 1613 | return 0; \ |
1a94ca49 | 1614 | case CONST_DOUBLE: \ |
5d02ee66 RH |
1615 | if ((RTX) == CONST0_RTX (GET_MODE (RTX))) \ |
1616 | return 0; \ | |
1617 | else if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \ | |
8b7b2e36 RK |
1618 | || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \ |
1619 | return 0; \ | |
1620 | else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \ | |
1621 | return 2; \ | |
1622 | else \ | |
1623 | return COSTS_N_INSNS (2); \ | |
1a94ca49 RK |
1624 | case CONST: \ |
1625 | case SYMBOL_REF: \ | |
1626 | case LABEL_REF: \ | |
f6f6a13c RK |
1627 | switch (alpha_cpu) \ |
1628 | { \ | |
1629 | case PROCESSOR_EV4: \ | |
1630 | return COSTS_N_INSNS (3); \ | |
1631 | case PROCESSOR_EV5: \ | |
5d02ee66 | 1632 | case PROCESSOR_EV6: \ |
f6f6a13c | 1633 | return COSTS_N_INSNS (2); \ |
5d02ee66 | 1634 | default: abort(); \ |
f6f6a13c | 1635 | } |
1a94ca49 RK |
1636 | |
1637 | /* Provide the costs of a rtl expression. This is in the body of a | |
1638 | switch on CODE. */ | |
1639 | ||
1640 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ | |
3bda6d11 RK |
1641 | case PLUS: case MINUS: \ |
1642 | if (FLOAT_MODE_P (GET_MODE (X))) \ | |
f6f6a13c RK |
1643 | switch (alpha_cpu) \ |
1644 | { \ | |
1645 | case PROCESSOR_EV4: \ | |
1646 | return COSTS_N_INSNS (6); \ | |
1647 | case PROCESSOR_EV5: \ | |
5d02ee66 | 1648 | case PROCESSOR_EV6: \ |
f6f6a13c | 1649 | return COSTS_N_INSNS (4); \ |
5d02ee66 | 1650 | default: abort(); \ |
f6f6a13c | 1651 | } \ |
b49e978e RK |
1652 | else if (GET_CODE (XEXP (X, 0)) == MULT \ |
1653 | && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \ | |
a5da0afe RK |
1654 | return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \ |
1655 | + rtx_cost (XEXP (X, 1), OUTER_CODE)); \ | |
1a94ca49 RK |
1656 | break; \ |
1657 | case MULT: \ | |
f6f6a13c RK |
1658 | switch (alpha_cpu) \ |
1659 | { \ | |
1660 | case PROCESSOR_EV4: \ | |
1661 | if (FLOAT_MODE_P (GET_MODE (X))) \ | |
1662 | return COSTS_N_INSNS (6); \ | |
1663 | return COSTS_N_INSNS (23); \ | |
1664 | case PROCESSOR_EV5: \ | |
1665 | if (FLOAT_MODE_P (GET_MODE (X))) \ | |
1666 | return COSTS_N_INSNS (4); \ | |
1667 | else if (GET_MODE (X) == DImode) \ | |
1668 | return COSTS_N_INSNS (12); \ | |
1669 | else \ | |
1670 | return COSTS_N_INSNS (8); \ | |
5d02ee66 RH |
1671 | case PROCESSOR_EV6: \ |
1672 | if (FLOAT_MODE_P (GET_MODE (X))) \ | |
1673 | return COSTS_N_INSNS (4); \ | |
1674 | else \ | |
1675 | return COSTS_N_INSNS (7); \ | |
1676 | default: abort(); \ | |
f6f6a13c | 1677 | } \ |
b49e978e RK |
1678 | case ASHIFT: \ |
1679 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1680 | && INTVAL (XEXP (X, 1)) <= 3) \ | |
1681 | break; \ | |
285a5742 | 1682 | /* ... fall through ... */ \ |
5d02ee66 | 1683 | case ASHIFTRT: case LSHIFTRT: \ |
f6f6a13c RK |
1684 | switch (alpha_cpu) \ |
1685 | { \ | |
1686 | case PROCESSOR_EV4: \ | |
1687 | return COSTS_N_INSNS (2); \ | |
1688 | case PROCESSOR_EV5: \ | |
5d02ee66 | 1689 | case PROCESSOR_EV6: \ |
f6f6a13c | 1690 | return COSTS_N_INSNS (1); \ |
5d02ee66 RH |
1691 | default: abort(); \ |
1692 | } \ | |
1693 | case IF_THEN_ELSE: \ | |
1694 | switch (alpha_cpu) \ | |
1695 | { \ | |
1696 | case PROCESSOR_EV4: \ | |
1697 | case PROCESSOR_EV6: \ | |
1698 | return COSTS_N_INSNS (2); \ | |
1699 | case PROCESSOR_EV5: \ | |
1700 | return COSTS_N_INSNS (1); \ | |
1701 | default: abort(); \ | |
f6f6a13c | 1702 | } \ |
3bda6d11 | 1703 | case DIV: case UDIV: case MOD: case UMOD: \ |
f6f6a13c RK |
1704 | switch (alpha_cpu) \ |
1705 | { \ | |
1706 | case PROCESSOR_EV4: \ | |
1707 | if (GET_MODE (X) == SFmode) \ | |
1708 | return COSTS_N_INSNS (34); \ | |
1709 | else if (GET_MODE (X) == DFmode) \ | |
1710 | return COSTS_N_INSNS (63); \ | |
1711 | else \ | |
1712 | return COSTS_N_INSNS (70); \ | |
1713 | case PROCESSOR_EV5: \ | |
1714 | if (GET_MODE (X) == SFmode) \ | |
1715 | return COSTS_N_INSNS (15); \ | |
1716 | else if (GET_MODE (X) == DFmode) \ | |
1717 | return COSTS_N_INSNS (22); \ | |
1718 | else \ | |
5d02ee66 RH |
1719 | return COSTS_N_INSNS (70); /* ??? */ \ |
1720 | case PROCESSOR_EV6: \ | |
1721 | if (GET_MODE (X) == SFmode) \ | |
1722 | return COSTS_N_INSNS (12); \ | |
1723 | else if (GET_MODE (X) == DFmode) \ | |
1724 | return COSTS_N_INSNS (15); \ | |
1725 | else \ | |
1726 | return COSTS_N_INSNS (70); /* ??? */ \ | |
1727 | default: abort(); \ | |
f6f6a13c | 1728 | } \ |
1a94ca49 | 1729 | case MEM: \ |
f6f6a13c RK |
1730 | switch (alpha_cpu) \ |
1731 | { \ | |
1732 | case PROCESSOR_EV4: \ | |
5d02ee66 | 1733 | case PROCESSOR_EV6: \ |
f6f6a13c RK |
1734 | return COSTS_N_INSNS (3); \ |
1735 | case PROCESSOR_EV5: \ | |
1736 | return COSTS_N_INSNS (2); \ | |
5d02ee66 | 1737 | default: abort(); \ |
f6f6a13c RK |
1738 | } \ |
1739 | case NEG: case ABS: \ | |
1740 | if (! FLOAT_MODE_P (GET_MODE (X))) \ | |
1741 | break; \ | |
285a5742 | 1742 | /* ... fall through ... */ \ |
3bda6d11 RK |
1743 | case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \ |
1744 | case FLOAT_EXTEND: case FLOAT_TRUNCATE: \ | |
f6f6a13c RK |
1745 | switch (alpha_cpu) \ |
1746 | { \ | |
1747 | case PROCESSOR_EV4: \ | |
1748 | return COSTS_N_INSNS (6); \ | |
1749 | case PROCESSOR_EV5: \ | |
5d02ee66 | 1750 | case PROCESSOR_EV6: \ |
f6f6a13c | 1751 | return COSTS_N_INSNS (4); \ |
5d02ee66 | 1752 | default: abort(); \ |
f6f6a13c | 1753 | } |
1a94ca49 RK |
1754 | \f |
1755 | /* Control the assembler format that we output. */ | |
1756 | ||
1a94ca49 RK |
1757 | /* Output to assembler file text saying following lines |
1758 | may contain character constants, extra white space, comments, etc. */ | |
1eb356b9 | 1759 | #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "") |
1a94ca49 RK |
1760 | |
1761 | /* Output to assembler file text saying following lines | |
1762 | no longer contain unusual constructs. */ | |
1eb356b9 | 1763 | #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "") |
1a94ca49 | 1764 | |
93de6f51 | 1765 | #define TEXT_SECTION_ASM_OP "\t.text" |
1a94ca49 RK |
1766 | |
1767 | /* Output before read-only data. */ | |
1768 | ||
93de6f51 | 1769 | #define READONLY_DATA_SECTION_ASM_OP "\t.rdata" |
1a94ca49 RK |
1770 | |
1771 | /* Output before writable data. */ | |
1772 | ||
93de6f51 | 1773 | #define DATA_SECTION_ASM_OP "\t.data" |
1a94ca49 RK |
1774 | |
1775 | /* Define an extra section for read-only data, a routine to enter it, and | |
c0388f29 RK |
1776 | indicate that it is for read-only data. |
1777 | ||
abc95ed3 | 1778 | The first time we enter the readonly data section for a file, we write |
c0388f29 RK |
1779 | eight bytes of zero. This works around a bug in DEC's assembler in |
1780 | some versions of OSF/1 V3.x. */ | |
1a94ca49 RK |
1781 | |
1782 | #define EXTRA_SECTIONS readonly_data | |
1783 | ||
1784 | #define EXTRA_SECTION_FUNCTIONS \ | |
1785 | void \ | |
1786 | literal_section () \ | |
1787 | { \ | |
1788 | if (in_section != readonly_data) \ | |
1789 | { \ | |
c0388f29 RK |
1790 | static int firsttime = 1; \ |
1791 | \ | |
1a94ca49 | 1792 | fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ |
c0388f29 RK |
1793 | if (firsttime) \ |
1794 | { \ | |
1795 | firsttime = 0; \ | |
301d03af | 1796 | assemble_aligned_integer (8, const0_rtx); \ |
c0388f29 RK |
1797 | } \ |
1798 | \ | |
1a94ca49 RK |
1799 | in_section = readonly_data; \ |
1800 | } \ | |
1801 | } \ | |
1802 | ||
1803 | #define READONLY_DATA_SECTION literal_section | |
1804 | ||
1eb356b9 RH |
1805 | /* Define this macro if references to a symbol must be treated differently |
1806 | depending on something about the variable or function named by the symbol | |
1807 | (such as what section it is in). */ | |
1808 | ||
1809 | #define ENCODE_SECTION_INFO(DECL) alpha_encode_section_info (DECL) | |
1810 | ||
1811 | /* If a variable is weakened, made one only or moved into a different | |
1812 | section, it may be necessary to redo the section info to move the | |
285a5742 | 1813 | variable out of sdata. */ |
1eb356b9 RH |
1814 | |
1815 | #define REDO_SECTION_INFO_P(DECL) \ | |
1816 | ((TREE_CODE (DECL) == VAR_DECL) \ | |
1817 | && (DECL_ONE_ONLY (DECL) || DECL_WEAK (DECL) || DECL_COMMON (DECL) \ | |
1818 | || DECL_SECTION_NAME (DECL) != 0)) | |
130d2d72 | 1819 | |
1eb356b9 RH |
1820 | #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \ |
1821 | do { \ | |
1822 | (VAR) = (SYMBOL_NAME); \ | |
1823 | if ((VAR)[0] == '@') \ | |
1824 | (VAR) += 2; \ | |
1825 | if ((VAR)[0] == '*') \ | |
1826 | (VAR)++; \ | |
1827 | } while (0) | |
130d2d72 | 1828 | |
1a94ca49 RK |
1829 | /* How to refer to registers in assembler output. |
1830 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1831 | ||
1832 | #define REGISTER_NAMES \ | |
1833 | {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ | |
1834 | "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
1835 | "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ | |
130d2d72 | 1836 | "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ |
1a94ca49 RK |
1837 | "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ |
1838 | "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ | |
1839 | "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ | |
52a69200 | 1840 | "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} |
1a94ca49 | 1841 | |
1eb356b9 RH |
1842 | /* Strip name encoding when emitting labels. */ |
1843 | ||
1844 | #define ASM_OUTPUT_LABELREF(STREAM, NAME) \ | |
1845 | do { \ | |
1846 | const char *name_ = NAME; \ | |
1847 | if (*name_ == '@') \ | |
1848 | name_ += 2; \ | |
1849 | if (*name_ == '*') \ | |
1850 | name_++; \ | |
1851 | else \ | |
1852 | fputs (user_label_prefix, STREAM); \ | |
1853 | fputs (name_, STREAM); \ | |
1854 | } while (0) | |
1855 | ||
1a94ca49 RK |
1856 | /* This is how to output the definition of a user-level label named NAME, |
1857 | such as the label on a static function or variable NAME. */ | |
1858 | ||
1859 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1860 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1861 | ||
1862 | /* This is how to output a command to make the user-level label named NAME | |
1863 | defined for reference from other files. */ | |
1864 | ||
1865 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
1866 | do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
1867 | ||
285a5742 | 1868 | /* The prefix to add to user-visible assembler symbols. */ |
1a94ca49 | 1869 | |
4e0c8ad2 | 1870 | #define USER_LABEL_PREFIX "" |
1a94ca49 RK |
1871 | |
1872 | /* This is how to output an internal numbered label where | |
1873 | PREFIX is the class of label and NUM is the number within the class. */ | |
1874 | ||
1875 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
531ea24e | 1876 | fprintf (FILE, "$%s%d:\n", PREFIX, NUM) |
1a94ca49 RK |
1877 | |
1878 | /* This is how to output a label for a jump table. Arguments are the same as | |
1879 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
285a5742 | 1880 | passed. */ |
1a94ca49 RK |
1881 | |
1882 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
1883 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
1884 | ||
1885 | /* This is how to store into the string LABEL | |
1886 | the symbol_ref name of an internal numbered label where | |
1887 | PREFIX is the class of label and NUM is the number within the class. | |
1888 | This is suitable for output with `assemble_name'. */ | |
1889 | ||
1890 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
d1e6b55b | 1891 | sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM)) |
1a94ca49 | 1892 | |
e247ca2a RK |
1893 | /* Check a floating-point value for validity for a particular machine mode. */ |
1894 | ||
1895 | #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \ | |
1896 | ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW)) | |
1897 | ||
1a94ca49 RK |
1898 | /* We use the default ASCII-output routine, except that we don't write more |
1899 | than 50 characters since the assembler doesn't support very long lines. */ | |
1900 | ||
1901 | #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ | |
1902 | do { \ | |
1903 | FILE *_hide_asm_out_file = (MYFILE); \ | |
e03c5670 | 1904 | const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \ |
1a94ca49 RK |
1905 | int _hide_thissize = (MYLENGTH); \ |
1906 | int _size_so_far = 0; \ | |
1907 | { \ | |
1908 | FILE *asm_out_file = _hide_asm_out_file; \ | |
e03c5670 | 1909 | const unsigned char *p = _hide_p; \ |
1a94ca49 RK |
1910 | int thissize = _hide_thissize; \ |
1911 | int i; \ | |
1912 | fprintf (asm_out_file, "\t.ascii \""); \ | |
1913 | \ | |
1914 | for (i = 0; i < thissize; i++) \ | |
1915 | { \ | |
1916 | register int c = p[i]; \ | |
1917 | \ | |
1918 | if (_size_so_far ++ > 50 && i < thissize - 4) \ | |
1919 | _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ | |
1920 | \ | |
1921 | if (c == '\"' || c == '\\') \ | |
1922 | putc ('\\', asm_out_file); \ | |
1923 | if (c >= ' ' && c < 0177) \ | |
1924 | putc (c, asm_out_file); \ | |
1925 | else \ | |
1926 | { \ | |
1927 | fprintf (asm_out_file, "\\%o", c); \ | |
1928 | /* After an octal-escape, if a digit follows, \ | |
1929 | terminate one string constant and start another. \ | |
8aeea6e6 | 1930 | The VAX assembler fails to stop reading the escape \ |
1a94ca49 RK |
1931 | after three digits, so this is the only way we \ |
1932 | can get it to parse the data properly. */ \ | |
0df6c2c7 | 1933 | if (i < thissize - 1 && ISDIGIT (p[i + 1])) \ |
b2d5e311 | 1934 | _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ |
1a94ca49 RK |
1935 | } \ |
1936 | } \ | |
1937 | fprintf (asm_out_file, "\"\n"); \ | |
1938 | } \ | |
1939 | } \ | |
1940 | while (0) | |
52a69200 | 1941 | |
1a94ca49 RK |
1942 | /* This is how to output an insn to push a register on the stack. |
1943 | It need not be very fast code. */ | |
1944 | ||
1945 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1946 | fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \ | |
1947 | (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ | |
1948 | (REGNO) & 31); | |
1949 | ||
1950 | /* This is how to output an insn to pop a register from the stack. | |
1951 | It need not be very fast code. */ | |
1952 | ||
1953 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1954 | fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \ | |
1955 | (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ | |
1956 | (REGNO) & 31); | |
1957 | ||
260ced47 RK |
1958 | /* This is how to output an element of a case-vector that is absolute. |
1959 | (Alpha does not use such vectors, but we must define this macro anyway.) */ | |
1a94ca49 | 1960 | |
260ced47 | 1961 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort () |
1a94ca49 | 1962 | |
260ced47 | 1963 | /* This is how to output an element of a case-vector that is relative. */ |
1a94ca49 | 1964 | |
33f7f353 | 1965 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ |
be7b80f4 | 1966 | fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \ |
8dfe3c62 | 1967 | (VALUE)) |
1a94ca49 RK |
1968 | |
1969 | /* This is how to output an assembler line | |
1970 | that says to advance the location counter | |
1971 | to a multiple of 2**LOG bytes. */ | |
1972 | ||
1973 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1974 | if ((LOG) != 0) \ | |
1975 | fprintf (FILE, "\t.align %d\n", LOG); | |
1976 | ||
1977 | /* This is how to advance the location counter by SIZE bytes. */ | |
1978 | ||
1979 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1980 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
1981 | ||
1982 | /* This says how to output an assembler line | |
1983 | to define a global common symbol. */ | |
1984 | ||
1985 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1986 | ( fputs ("\t.comm ", (FILE)), \ | |
1987 | assemble_name ((FILE), (NAME)), \ | |
1988 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1989 | ||
1990 | /* This says how to output an assembler line | |
1991 | to define a local common symbol. */ | |
1992 | ||
1993 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
1994 | ( fputs ("\t.lcomm ", (FILE)), \ | |
1995 | assemble_name ((FILE), (NAME)), \ | |
1996 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1997 | ||
1998 | /* Store in OUTPUT a string (made with alloca) containing | |
1999 | an assembler-name for a local static variable named NAME. | |
2000 | LABELNO is an integer which is different for each call. */ | |
2001 | ||
2002 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
2003 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
2004 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
60593797 | 2005 | \f |
9ec36da5 | 2006 | |
1a94ca49 RK |
2007 | /* Print operand X (an rtx) in assembler syntax to file FILE. |
2008 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
2009 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
2010 | ||
2011 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
2012 | ||
2013 | /* Determine which codes are valid without a following integer. These must | |
941cc05a RK |
2014 | not be alphabetic. |
2015 | ||
2016 | ~ Generates the name of the current function. | |
2bf6230d | 2017 | |
be7560ea RH |
2018 | / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX |
2019 | attributes are examined to determine what is appropriate. | |
e5958492 RK |
2020 | |
2021 | , Generates single precision suffix for floating point | |
2022 | instructions (s for IEEE, f for VAX) | |
2023 | ||
2024 | - Generates double precision suffix for floating point | |
2025 | instructions (t for IEEE, g for VAX) | |
2bf6230d | 2026 | */ |
1a94ca49 | 2027 | |
be7560ea | 2028 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ |
1eb356b9 RH |
2029 | ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \ |
2030 | || (CODE) == '#' || (CODE) == '*') | |
1a94ca49 RK |
2031 | \f |
2032 | /* Print a memory address as an operand to reference that memory location. */ | |
2033 | ||
714b019c RH |
2034 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ |
2035 | print_operand_address((FILE), (ADDR)) | |
2036 | ||
1a94ca49 RK |
2037 | /* Define the codes that are matched by predicates in alpha.c. */ |
2038 | ||
e3208d53 RH |
2039 | #define PREDICATE_CODES \ |
2040 | {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ | |
eb8da868 RH |
2041 | {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \ |
2042 | {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ | |
2043 | {"cint8_operand", {CONST_INT}}, \ | |
2044 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ | |
2045 | {"add_operand", {SUBREG, REG, CONST_INT}}, \ | |
2046 | {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ | |
e3208d53 | 2047 | {"const48_operand", {CONST_INT}}, \ |
eb8da868 RH |
2048 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ |
2049 | {"or_operand", {SUBREG, REG, CONST_INT}}, \ | |
e3208d53 RH |
2050 | {"mode_mask_operand", {CONST_INT}}, \ |
2051 | {"mul8_operand", {CONST_INT}}, \ | |
2052 | {"mode_width_operand", {CONST_INT}}, \ | |
2053 | {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ | |
2054 | {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ | |
8f4773ea | 2055 | {"alpha_zero_comparison_operator", {EQ, NE, LE, LT, LEU, LTU}}, \ |
e3208d53 RH |
2056 | {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \ |
2057 | {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ | |
1eb8759b | 2058 | {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \ |
e3208d53 RH |
2059 | {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ |
2060 | {"fp0_operand", {CONST_DOUBLE}}, \ | |
2061 | {"current_file_function_operand", {SYMBOL_REF}}, \ | |
1afec8ad | 2062 | {"direct_call_operand", {SYMBOL_REF}}, \ |
1eb356b9 | 2063 | {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \ |
e2c9fb9b RH |
2064 | {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \ |
2065 | {"global_symbolic_operand", {SYMBOL_REF, CONST}}, \ | |
e3208d53 RH |
2066 | {"call_operand", {REG, SYMBOL_REF}}, \ |
2067 | {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ | |
551cc6fd | 2068 | SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \ |
e3208d53 | 2069 | {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ |
551cc6fd | 2070 | SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \ |
f711a22b | 2071 | {"some_ni_operand", {SUBREG, REG, MEM}}, \ |
e3208d53 RH |
2072 | {"aligned_memory_operand", {MEM}}, \ |
2073 | {"unaligned_memory_operand", {MEM}}, \ | |
2074 | {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ | |
2075 | {"any_memory_operand", {MEM}}, \ | |
40b80dad | 2076 | {"hard_fp_register_operand", {SUBREG, REG}}, \ |
d2c6a1b6 | 2077 | {"hard_int_register_operand", {SUBREG, REG}}, \ |
67070f5c | 2078 | {"reg_not_elim_operand", {SUBREG, REG}}, \ |
3611aef0 | 2079 | {"reg_no_subreg_operand", {REG}}, \ |
30102605 | 2080 | {"addition_operation", {PLUS}}, \ |
551cc6fd RH |
2081 | {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \ |
2082 | {"some_small_symbolic_mem_operand", {MEM, SIGN_EXTEND, ZERO_EXTEND, \ | |
6a0b0c1b | 2083 | FLOAT_EXTEND}}, |
03f8c4cc | 2084 | \f |
63966b3b RH |
2085 | /* Define the `__builtin_va_list' type for the ABI. */ |
2086 | #define BUILD_VA_LIST_TYPE(VALIST) \ | |
2087 | (VALIST) = alpha_build_va_list () | |
2088 | ||
2089 | /* Implement `va_start' for varargs and stdarg. */ | |
2090 | #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \ | |
2091 | alpha_va_start (stdarg, valist, nextarg) | |
2092 | ||
2093 | /* Implement `va_arg'. */ | |
2094 | #define EXPAND_BUILTIN_VA_ARG(valist, type) \ | |
2095 | alpha_va_arg (valist, type) | |
2096 | \f | |
34fa88ab RK |
2097 | /* Tell collect that the object format is ECOFF. */ |
2098 | #define OBJECT_FORMAT_COFF | |
2099 | #define EXTENDED_COFF | |
2100 | ||
2101 | /* If we use NM, pass -g to it so it only lists globals. */ | |
2102 | #define NM_FLAGS "-pg" | |
2103 | ||
03f8c4cc RK |
2104 | /* Definitions for debugging. */ |
2105 | ||
2106 | #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */ | |
2107 | #define DBX_DEBUGGING_INFO /* generate embedded stabs */ | |
2108 | #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ | |
2109 | ||
2110 | #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ | |
fe0986b4 | 2111 | #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG |
03f8c4cc RK |
2112 | #endif |
2113 | ||
2114 | ||
2115 | /* Correct the offset of automatic variables and arguments. Note that | |
2116 | the Alpha debug format wants all automatic variables and arguments | |
2117 | to be in terms of two different offsets from the virtual frame pointer, | |
2118 | which is the stack pointer before any adjustment in the function. | |
2119 | The offset for the argument pointer is fixed for the native compiler, | |
2120 | it is either zero (for the no arguments case) or large enough to hold | |
2121 | all argument registers. | |
2122 | The offset for the auto pointer is the fourth argument to the .frame | |
2123 | directive (local_offset). | |
2124 | To stay compatible with the native tools we use the same offsets | |
2125 | from the virtual frame pointer and adjust the debugger arg/auto offsets | |
2126 | accordingly. These debugger offsets are set up in output_prolog. */ | |
2127 | ||
9a0b18f2 RK |
2128 | extern long alpha_arg_offset; |
2129 | extern long alpha_auto_offset; | |
03f8c4cc RK |
2130 | #define DEBUGGER_AUTO_OFFSET(X) \ |
2131 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) | |
2132 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) | |
2133 | ||
2134 | ||
2135 | #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ | |
2136 | alpha_output_lineno (STREAM, LINE) | |
03f8c4cc RK |
2137 | |
2138 | #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
2139 | alpha_output_filename (STREAM, NAME) | |
03f8c4cc | 2140 | |
4330b0e7 JW |
2141 | /* mips-tfile.c limits us to strings of one page. We must underestimate this |
2142 | number, because the real length runs past this up to the next | |
2143 | continuation point. This is really a dbxout.c bug. */ | |
2144 | #define DBX_CONTIN_LENGTH 3000 | |
03f8c4cc RK |
2145 | |
2146 | /* By default, turn on GDB extensions. */ | |
2147 | #define DEFAULT_GDB_EXTENSIONS 1 | |
2148 | ||
7aadc7c2 RK |
2149 | /* Stabs-in-ECOFF can't handle dbxout_function_end(). */ |
2150 | #define NO_DBX_FUNCTION_END 1 | |
2151 | ||
03f8c4cc RK |
2152 | /* If we are smuggling stabs through the ALPHA ECOFF object |
2153 | format, put a comment in front of the .stab<x> operation so | |
2154 | that the ALPHA assembler does not choke. The mips-tfile program | |
2155 | will correctly put the stab into the object file. */ | |
2156 | ||
93de6f51 HPN |
2157 | #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t") |
2158 | #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t") | |
2159 | #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t") | |
03f8c4cc RK |
2160 | |
2161 | /* Forward references to tags are allowed. */ | |
2162 | #define SDB_ALLOW_FORWARD_REFERENCES | |
2163 | ||
2164 | /* Unknown tags are also allowed. */ | |
2165 | #define SDB_ALLOW_UNKNOWN_REFERENCES | |
2166 | ||
2167 | #define PUT_SDB_DEF(a) \ | |
2168 | do { \ | |
2169 | fprintf (asm_out_file, "\t%s.def\t", \ | |
2170 | (TARGET_GAS) ? "" : "#"); \ | |
2171 | ASM_OUTPUT_LABELREF (asm_out_file, a); \ | |
2172 | fputc (';', asm_out_file); \ | |
2173 | } while (0) | |
2174 | ||
2175 | #define PUT_SDB_PLAIN_DEF(a) \ | |
2176 | do { \ | |
2177 | fprintf (asm_out_file, "\t%s.def\t.%s;", \ | |
2178 | (TARGET_GAS) ? "" : "#", (a)); \ | |
2179 | } while (0) | |
2180 | ||
2181 | #define PUT_SDB_TYPE(a) \ | |
2182 | do { \ | |
2183 | fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \ | |
2184 | } while (0) | |
2185 | ||
2186 | /* For block start and end, we create labels, so that | |
2187 | later we can figure out where the correct offset is. | |
2188 | The normal .ent/.end serve well enough for functions, | |
2189 | so those are just commented out. */ | |
2190 | ||
2191 | extern int sdb_label_count; /* block start/end next label # */ | |
2192 | ||
2193 | #define PUT_SDB_BLOCK_START(LINE) \ | |
2194 | do { \ | |
2195 | fprintf (asm_out_file, \ | |
2196 | "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ | |
2197 | sdb_label_count, \ | |
2198 | (TARGET_GAS) ? "" : "#", \ | |
2199 | sdb_label_count, \ | |
2200 | (LINE)); \ | |
2201 | sdb_label_count++; \ | |
2202 | } while (0) | |
2203 | ||
2204 | #define PUT_SDB_BLOCK_END(LINE) \ | |
2205 | do { \ | |
2206 | fprintf (asm_out_file, \ | |
2207 | "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ | |
2208 | sdb_label_count, \ | |
2209 | (TARGET_GAS) ? "" : "#", \ | |
2210 | sdb_label_count, \ | |
2211 | (LINE)); \ | |
2212 | sdb_label_count++; \ | |
2213 | } while (0) | |
2214 | ||
2215 | #define PUT_SDB_FUNCTION_START(LINE) | |
2216 | ||
2217 | #define PUT_SDB_FUNCTION_END(LINE) | |
2218 | ||
3c303f52 | 2219 | #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME)) |
03f8c4cc | 2220 | |
03f8c4cc RK |
2221 | /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for |
2222 | mips-tdump.c to print them out. | |
2223 | ||
2224 | These must match the corresponding definitions in gdb/mipsread.c. | |
285a5742 | 2225 | Unfortunately, gcc and gdb do not currently share any directories. */ |
03f8c4cc RK |
2226 | |
2227 | #define CODE_MASK 0x8F300 | |
2228 | #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) | |
2229 | #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) | |
2230 | #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) | |
2231 | ||
2232 | /* Override some mips-tfile definitions. */ | |
2233 | ||
2234 | #define SHASH_SIZE 511 | |
2235 | #define THASH_SIZE 55 | |
1e6c6f11 RK |
2236 | |
2237 | /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */ | |
2238 | ||
2239 | #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7) | |
2f55b70b | 2240 | |
b0435cf4 RH |
2241 | /* The system headers under Alpha systems are generally C++-aware. */ |
2242 | #define NO_IMPLICIT_EXTERN_C | |
b517dcd2 | 2243 | |
285a5742 | 2244 | /* Generate calls to memcpy, etc., not bcopy, etc. */ |
b517dcd2 | 2245 | #define TARGET_MEM_FUNCTIONS 1 |