]>
Commit | Line | Data |
---|---|---|
1a94ca49 | 1 | /* Definitions of target machine for GNU compiler, for DEC Alpha. |
5258d7ae | 2 | Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc. |
1e6c6f11 | 3 | Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) |
1a94ca49 RK |
4 | |
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
38ead7f3 RK |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, |
20 | Boston, MA 02111-1307, USA. */ | |
1a94ca49 RK |
21 | |
22 | ||
23 | /* Names to predefine in the preprocessor for this target machine. */ | |
24 | ||
25 | #define CPP_PREDEFINES "\ | |
26 | -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \ | |
65c42379 | 27 | -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)" |
1a94ca49 | 28 | |
21798cd8 RK |
29 | /* Write out the correct language type definition for the header files. |
30 | Unless we have assembler language, write out the symbols for C. */ | |
1a94ca49 | 31 | #define CPP_SPEC "\ |
21798cd8 | 32 | %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \ |
1a94ca49 | 33 | %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \ |
21798cd8 RK |
34 | %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ |
35 | %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ | |
36 | %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \ | |
2bf6230d RK |
37 | %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C} \ |
38 | %{mieee:-D_IEEE_FP} \ | |
39 | %{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT}" | |
1a94ca49 RK |
40 | |
41 | /* Set the spec to use for signed char. The default tests the above macro | |
42 | but DEC's compiler can't handle the conditional in a "constant" | |
43 | operand. */ | |
44 | ||
45 | #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}" | |
46 | ||
1c6c2b05 | 47 | /* Under OSF/1, -p and -pg require -lprof1. */ |
1a94ca49 | 48 | |
1c6c2b05 | 49 | #define LIB_SPEC "%{p:-lprof1} %{pg:-lprof1} %{a:-lprof2} -lc" |
1a94ca49 | 50 | |
f987462f JM |
51 | /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are |
52 | optimizing, -O1 if we are not. Pass -shared, -non_shared or | |
1c6c2b05 | 53 | -call_shared as appropriate. Also pass -pg. */ |
8877eb00 | 54 | #define LINK_SPEC \ |
d37df6cc | 55 | "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} \ |
b890f297 JM |
56 | %{!static:%{shared:-shared} %{!shared:-call_shared}} %{pg} %{taso} \ |
57 | %{rpath*}" | |
58 | ||
59 | #define WORD_SWITCH_TAKES_ARG(STR) \ | |
60 | (!strcmp (STR, "rpath") || !strcmp (STR, "include") \ | |
61 | || !strcmp (STR, "imacros") || !strcmp (STR, "aux-info") \ | |
62 | || !strcmp (STR, "idirafter") || !strcmp (STR, "iprefix") \ | |
63 | || !strcmp (STR, "iwithprefix") || !strcmp (STR, "iwithprefixbefore") \ | |
64 | || !strcmp (STR, "isystem")) | |
8877eb00 | 65 | |
85d159a3 | 66 | #define STARTFILE_SPEC \ |
1c6c2b05 | 67 | "%{!shared:%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}" |
85d159a3 | 68 | |
1a94ca49 RK |
69 | /* Print subsidiary information on the compiler version in use. */ |
70 | #define TARGET_VERSION | |
71 | ||
72 | /* Define the location for the startup file on OSF/1 for Alpha. */ | |
73 | ||
74 | #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/" | |
75 | ||
76 | /* Run-time compilation parameters selecting different hardware subsets. */ | |
77 | ||
f6f6a13c RK |
78 | /* Which processor to schedule for. The cpu attribute defines a list that |
79 | mirrors this list, so changes to alpha.md must be made at the same time. */ | |
80 | ||
81 | enum processor_type | |
82 | {PROCESSOR_EV4, /* 2106[46]{a,} */ | |
83 | PROCESSOR_EV5}; /* 21164{a,} */ | |
84 | ||
85 | extern enum processor_type alpha_cpu; | |
86 | ||
2bf6230d RK |
87 | enum alpha_trap_precision |
88 | { | |
89 | ALPHA_TP_PROG, /* No precision (default). */ | |
90 | ALPHA_TP_FUNC, /* Trap contained within originating function. */ | |
91 | ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */ | |
92 | }; | |
93 | ||
94 | enum alpha_fp_rounding_mode | |
95 | { | |
96 | ALPHA_FPRM_NORM, /* Normal rounding mode. */ | |
97 | ALPHA_FPRM_MINF, /* Round towards minus-infinity. */ | |
98 | ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */ | |
99 | ALPHA_FPRM_DYN /* Dynamic rounding mode. */ | |
100 | }; | |
101 | ||
102 | enum alpha_fp_trap_mode | |
103 | { | |
104 | ALPHA_FPTM_N, /* Normal trap mode. */ | |
105 | ALPHA_FPTM_U, /* Underflow traps enabled. */ | |
106 | ALPHA_FPTM_SU, /* Software completion, w/underflow traps */ | |
107 | ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */ | |
108 | }; | |
109 | ||
1a94ca49 RK |
110 | extern int target_flags; |
111 | ||
2bf6230d RK |
112 | extern enum alpha_trap_precision alpha_tp; |
113 | extern enum alpha_fp_rounding_mode alpha_fprm; | |
114 | extern enum alpha_fp_trap_mode alpha_fptm; | |
115 | ||
1a94ca49 RK |
116 | /* This means that floating-point support exists in the target implementation |
117 | of the Alpha architecture. This is usually the default. */ | |
118 | ||
2bf6230d RK |
119 | #define MASK_FP 1 |
120 | #define TARGET_FP (target_flags & MASK_FP) | |
1a94ca49 RK |
121 | |
122 | /* This means that floating-point registers are allowed to be used. Note | |
123 | that Alpha implementations without FP operations are required to | |
124 | provide the FP registers. */ | |
125 | ||
2bf6230d RK |
126 | #define MASK_FPREGS 2 |
127 | #define TARGET_FPREGS (target_flags & MASK_FPREGS) | |
03f8c4cc RK |
128 | |
129 | /* This means that gas is used to process the assembler file. */ | |
130 | ||
131 | #define MASK_GAS 4 | |
132 | #define TARGET_GAS (target_flags & MASK_GAS) | |
1a94ca49 | 133 | |
2bf6230d RK |
134 | /* This means that we should mark procedures as IEEE conformant. */ |
135 | ||
136 | #define MASK_IEEE_CONFORMANT 8 | |
137 | #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT) | |
138 | ||
139 | /* This means we should be IEEE-compliant except for inexact. */ | |
140 | ||
141 | #define MASK_IEEE 16 | |
142 | #define TARGET_IEEE (target_flags & MASK_IEEE) | |
143 | ||
144 | /* This means we should be fully IEEE-compliant. */ | |
145 | ||
146 | #define MASK_IEEE_WITH_INEXACT 32 | |
147 | #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT) | |
148 | ||
e7a2eff8 | 149 | /* This means we are compiling for Windows NT. */ |
803fee69 | 150 | |
e7a2eff8 RK |
151 | #define MASK_WINDOWS_NT 64 |
152 | #define TARGET_WINDOWS_NT (target_flags & MASK_WINDOWS_NT) | |
153 | ||
803fee69 RK |
154 | /* This means we must construct all constants rather than emitting |
155 | them as literal data. */ | |
156 | ||
157 | #define MASK_BUILD_CONSTANTS 128 | |
158 | #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS) | |
159 | ||
1a94ca49 RK |
160 | /* Macro to define tables used to set the flags. |
161 | This is a list in braces of pairs in braces, | |
162 | each pair being { "NAME", VALUE } | |
163 | where VALUE is the bits to set or minus the bits to clear. | |
164 | An empty string NAME is used to identify the default VALUE. */ | |
165 | ||
2bf6230d RK |
166 | #define TARGET_SWITCHES \ |
167 | { {"no-soft-float", MASK_FP}, \ | |
168 | {"soft-float", - MASK_FP}, \ | |
169 | {"fp-regs", MASK_FPREGS}, \ | |
170 | {"no-fp-regs", - (MASK_FP|MASK_FPREGS)}, \ | |
171 | {"alpha-as", -MASK_GAS}, \ | |
172 | {"gas", MASK_GAS}, \ | |
173 | {"ieee-conformant", MASK_IEEE_CONFORMANT}, \ | |
c01b5470 RK |
174 | {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT}, \ |
175 | {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT}, \ | |
803fee69 | 176 | {"build-constants", MASK_BUILD_CONSTANTS}, \ |
88681624 | 177 | {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} } |
1a94ca49 | 178 | |
c01b5470 | 179 | #define TARGET_DEFAULT MASK_FP|MASK_FPREGS |
1a94ca49 | 180 | |
88681624 ILT |
181 | #ifndef TARGET_CPU_DEFAULT |
182 | #define TARGET_CPU_DEFAULT 0 | |
183 | #endif | |
184 | ||
2bf6230d RK |
185 | /* This macro is similar to `TARGET_SWITCHES' but defines names of |
186 | command options that have values. Its definition is an initializer | |
187 | with a subgrouping for each command option. | |
188 | ||
189 | Each subgrouping contains a string constant, that defines the fixed | |
190 | part of the option name, and the address of a variable. The | |
191 | variable, type `char *', is set to the variable part of the given | |
192 | option if the fixed part matches. The actual option name is made | |
193 | by appending `-m' to the specified name. | |
194 | ||
195 | Here is an example which defines `-mshort-data-NUMBER'. If the | |
196 | given option is `-mshort-data-512', the variable `m88k_short_data' | |
197 | will be set to the string `"512"'. | |
198 | ||
199 | extern char *m88k_short_data; | |
200 | #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */ | |
201 | ||
f6f6a13c | 202 | extern char *alpha_cpu_string; /* For -mcpu=ev[4|5] */ |
2bf6230d RK |
203 | extern char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */ |
204 | extern char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */ | |
205 | extern char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */ | |
206 | ||
207 | #define TARGET_OPTIONS \ | |
208 | { \ | |
f6f6a13c | 209 | {"cpu=", &alpha_cpu_string}, \ |
2bf6230d RK |
210 | {"fp-rounding-mode=", &alpha_fprm_string}, \ |
211 | {"fp-trap-mode=", &alpha_fptm_string}, \ | |
212 | {"trap-precision=", &alpha_tp_string}, \ | |
213 | } | |
214 | ||
215 | /* Sometimes certain combinations of command options do not make sense | |
216 | on a particular target machine. You can define a macro | |
217 | `OVERRIDE_OPTIONS' to take account of this. This macro, if | |
218 | defined, is executed once just after all the command options have | |
219 | been parsed. | |
220 | ||
221 | On the Alpha, it is used to translate target-option strings into | |
222 | numeric values. */ | |
223 | ||
224 | extern void override_options (); | |
225 | #define OVERRIDE_OPTIONS override_options () | |
226 | ||
227 | ||
1a94ca49 RK |
228 | /* Define this macro to change register usage conditional on target flags. |
229 | ||
230 | On the Alpha, we use this to disable the floating-point registers when | |
231 | they don't exist. */ | |
232 | ||
233 | #define CONDITIONAL_REGISTER_USAGE \ | |
234 | if (! TARGET_FPREGS) \ | |
52a69200 | 235 | for (i = 32; i < 63; i++) \ |
1a94ca49 RK |
236 | fixed_regs[i] = call_used_regs[i] = 1; |
237 | ||
4f074454 RK |
238 | /* Show we can debug even without a frame pointer. */ |
239 | #define CAN_DEBUG_WITHOUT_FP | |
1a94ca49 RK |
240 | \f |
241 | /* target machine storage layout */ | |
242 | ||
2700ac93 RS |
243 | /* Define to enable software floating point emulation. */ |
244 | #define REAL_ARITHMETIC | |
245 | ||
1a94ca49 RK |
246 | /* Define the size of `int'. The default is the same as the word size. */ |
247 | #define INT_TYPE_SIZE 32 | |
248 | ||
249 | /* Define the size of `long long'. The default is the twice the word size. */ | |
250 | #define LONG_LONG_TYPE_SIZE 64 | |
251 | ||
252 | /* The two floating-point formats we support are S-floating, which is | |
253 | 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double' | |
254 | and `long double' are T. */ | |
255 | ||
256 | #define FLOAT_TYPE_SIZE 32 | |
257 | #define DOUBLE_TYPE_SIZE 64 | |
258 | #define LONG_DOUBLE_TYPE_SIZE 64 | |
259 | ||
5258d7ae RK |
260 | #define WCHAR_TYPE "unsigned int" |
261 | #define WCHAR_TYPE_SIZE 32 | |
1a94ca49 | 262 | |
13d39dbc | 263 | /* Define this macro if it is advisable to hold scalars in registers |
1a94ca49 RK |
264 | in a wider mode than that declared by the program. In such cases, |
265 | the value is constrained to be within the bounds of the declared | |
266 | type, but kept valid in the wider mode. The signedness of the | |
267 | extension may differ from that of the type. | |
268 | ||
269 | For Alpha, we always store objects in a full register. 32-bit objects | |
270 | are always sign-extended, but smaller objects retain their signedness. */ | |
271 | ||
272 | #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ | |
273 | if (GET_MODE_CLASS (MODE) == MODE_INT \ | |
274 | && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ | |
275 | { \ | |
276 | if ((MODE) == SImode) \ | |
277 | (UNSIGNEDP) = 0; \ | |
278 | (MODE) = DImode; \ | |
279 | } | |
280 | ||
281 | /* Define this if function arguments should also be promoted using the above | |
282 | procedure. */ | |
283 | ||
284 | #define PROMOTE_FUNCTION_ARGS | |
285 | ||
286 | /* Likewise, if the function return value is promoted. */ | |
287 | ||
288 | #define PROMOTE_FUNCTION_RETURN | |
289 | ||
290 | /* Define this if most significant bit is lowest numbered | |
291 | in instructions that operate on numbered bit-fields. | |
292 | ||
293 | There are no such instructions on the Alpha, but the documentation | |
294 | is little endian. */ | |
295 | #define BITS_BIG_ENDIAN 0 | |
296 | ||
297 | /* Define this if most significant byte of a word is the lowest numbered. | |
298 | This is false on the Alpha. */ | |
299 | #define BYTES_BIG_ENDIAN 0 | |
300 | ||
301 | /* Define this if most significant word of a multiword number is lowest | |
302 | numbered. | |
303 | ||
304 | For Alpha we can decide arbitrarily since there are no machine instructions | |
305 | for them. Might as well be consistent with bytes. */ | |
306 | #define WORDS_BIG_ENDIAN 0 | |
307 | ||
308 | /* number of bits in an addressable storage unit */ | |
309 | #define BITS_PER_UNIT 8 | |
310 | ||
311 | /* Width in bits of a "word", which is the contents of a machine register. | |
312 | Note that this is not necessarily the width of data type `int'; | |
313 | if using 16-bit ints on a 68000, this would still be 32. | |
314 | But on a machine with 16-bit registers, this would be 16. */ | |
315 | #define BITS_PER_WORD 64 | |
316 | ||
317 | /* Width of a word, in units (bytes). */ | |
318 | #define UNITS_PER_WORD 8 | |
319 | ||
320 | /* Width in bits of a pointer. | |
321 | See also the macro `Pmode' defined below. */ | |
322 | #define POINTER_SIZE 64 | |
323 | ||
324 | /* Allocation boundary (in *bits*) for storing arguments in argument list. */ | |
325 | #define PARM_BOUNDARY 64 | |
326 | ||
327 | /* Boundary (in *bits*) on which stack pointer should be aligned. */ | |
328 | #define STACK_BOUNDARY 64 | |
329 | ||
330 | /* Allocation boundary (in *bits*) for the code of a function. */ | |
331 | #define FUNCTION_BOUNDARY 64 | |
332 | ||
333 | /* Alignment of field after `int : 0' in a structure. */ | |
334 | #define EMPTY_FIELD_BOUNDARY 64 | |
335 | ||
336 | /* Every structure's size must be a multiple of this. */ | |
337 | #define STRUCTURE_SIZE_BOUNDARY 8 | |
338 | ||
339 | /* A bitfield declared as `int' forces `int' alignment for the struct. */ | |
340 | #define PCC_BITFIELD_TYPE_MATTERS 1 | |
341 | ||
65823178 RK |
342 | /* Align loop starts for optimal branching. |
343 | ||
344 | ??? Kludge this and the next macro for the moment by not doing anything if | |
345 | we don't optimize and also if we are writing ECOFF symbols to work around | |
346 | a bug in DEC's assembler. */ | |
1a94ca49 | 347 | |
130d2d72 | 348 | #define ASM_OUTPUT_LOOP_ALIGN(FILE) \ |
65823178 RK |
349 | if (optimize > 0 && write_symbols != SDB_DEBUG) \ |
350 | ASM_OUTPUT_ALIGN (FILE, 5) | |
1a94ca49 RK |
351 | |
352 | /* This is how to align an instruction for optimal branching. | |
353 | On Alpha we'll get better performance by aligning on a quadword | |
354 | boundary. */ | |
130d2d72 | 355 | |
1a94ca49 | 356 | #define ASM_OUTPUT_ALIGN_CODE(FILE) \ |
65823178 RK |
357 | if (optimize > 0 && write_symbols != SDB_DEBUG) \ |
358 | ASM_OUTPUT_ALIGN ((FILE), 4) | |
1a94ca49 RK |
359 | |
360 | /* No data type wants to be aligned rounder than this. */ | |
361 | #define BIGGEST_ALIGNMENT 64 | |
362 | ||
442b1685 RK |
363 | /* Align all constants and variables to at least a word boundary so |
364 | we can pick up pieces of them faster. */ | |
365 | #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) | |
366 | #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD) | |
1a94ca49 RK |
367 | |
368 | /* Set this non-zero if move instructions will actually fail to work | |
369 | when given unaligned data. | |
370 | ||
371 | Since we get an error message when we do one, call them invalid. */ | |
372 | ||
373 | #define STRICT_ALIGNMENT 1 | |
374 | ||
375 | /* Set this non-zero if unaligned move instructions are extremely slow. | |
376 | ||
377 | On the Alpha, they trap. */ | |
130d2d72 RK |
378 | |
379 | #define SLOW_UNALIGNED_ACCESS 1 | |
1a94ca49 RK |
380 | \f |
381 | /* Standard register usage. */ | |
382 | ||
383 | /* Number of actual hardware registers. | |
384 | The hardware registers are assigned numbers for the compiler | |
385 | from 0 to just below FIRST_PSEUDO_REGISTER. | |
386 | All registers that the compiler knows about must be given numbers, | |
387 | even those that are not normally considered general registers. | |
388 | ||
389 | We define all 32 integer registers, even though $31 is always zero, | |
390 | and all 32 floating-point registers, even though $f31 is also | |
391 | always zero. We do not bother defining the FP status register and | |
130d2d72 RK |
392 | there are no other registers. |
393 | ||
394 | Since $31 is always zero, we will use register number 31 as the | |
395 | argument pointer. It will never appear in the generated code | |
396 | because we will always be eliminating it in favor of the stack | |
52a69200 RK |
397 | pointer or hardware frame pointer. |
398 | ||
399 | Likewise, we use $f31 for the frame pointer, which will always | |
400 | be eliminated in favor of the hardware frame pointer or the | |
401 | stack pointer. */ | |
1a94ca49 RK |
402 | |
403 | #define FIRST_PSEUDO_REGISTER 64 | |
404 | ||
405 | /* 1 for registers that have pervasive standard uses | |
406 | and are not available for the register allocator. */ | |
407 | ||
408 | #define FIXED_REGISTERS \ | |
409 | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
410 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \ | |
411 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ | |
412 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 } | |
413 | ||
414 | /* 1 for registers not available across function calls. | |
415 | These must include the FIXED_REGISTERS and also any | |
416 | registers that can be used without being saved. | |
417 | The latter must include the registers where values are returned | |
418 | and the register where structure-value addresses are passed. | |
419 | Aside from that, you can include as many other registers as you like. */ | |
420 | #define CALL_USED_REGISTERS \ | |
421 | {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ | |
422 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \ | |
423 | 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \ | |
424 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 } | |
425 | ||
426 | /* List the order in which to allocate registers. Each register must be | |
427 | listed once, even those in FIXED_REGISTERS. | |
428 | ||
429 | We allocate in the following order: | |
430 | $f1 (nonsaved floating-point register) | |
431 | $f10-$f15 (likewise) | |
432 | $f22-$f30 (likewise) | |
433 | $f21-$f16 (likewise, but input args) | |
434 | $f0 (nonsaved, but return value) | |
435 | $f2-$f9 (saved floating-point registers) | |
436 | $1-$8 (nonsaved integer registers) | |
437 | $22-$25 (likewise) | |
438 | $28 (likewise) | |
439 | $0 (likewise, but return value) | |
440 | $21-$16 (likewise, but input args) | |
0076aa6b | 441 | $27 (procedure value in OSF, nonsaved in NT) |
1a94ca49 RK |
442 | $9-$14 (saved integer registers) |
443 | $26 (return PC) | |
444 | $15 (frame pointer) | |
445 | $29 (global pointer) | |
52a69200 | 446 | $30, $31, $f31 (stack pointer and always zero/ap & fp) */ |
1a94ca49 RK |
447 | |
448 | #define REG_ALLOC_ORDER \ | |
449 | {33, \ | |
da01bc2c | 450 | 42, 43, 44, 45, 46, 47, \ |
1a94ca49 RK |
451 | 54, 55, 56, 57, 58, 59, 60, 61, 62, \ |
452 | 53, 52, 51, 50, 49, 48, \ | |
453 | 32, \ | |
454 | 34, 35, 36, 37, 38, 39, 40, 41, \ | |
455 | 1, 2, 3, 4, 5, 6, 7, 8, \ | |
456 | 22, 23, 24, 25, \ | |
457 | 28, \ | |
458 | 0, \ | |
459 | 21, 20, 19, 18, 17, 16, \ | |
460 | 27, \ | |
461 | 9, 10, 11, 12, 13, 14, \ | |
462 | 26, \ | |
463 | 15, \ | |
464 | 29, \ | |
465 | 30, 31, 63 } | |
466 | ||
467 | /* Return number of consecutive hard regs needed starting at reg REGNO | |
468 | to hold something of mode MODE. | |
469 | This is ordinarily the length in words of a value of mode MODE | |
470 | but can be less for certain modes in special long registers. */ | |
471 | ||
472 | #define HARD_REGNO_NREGS(REGNO, MODE) \ | |
473 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
474 | ||
475 | /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. | |
476 | On Alpha, the integer registers can hold any mode. The floating-point | |
477 | registers can hold 32-bit and 64-bit integers as well, but not 16-bit | |
478 | or 8-bit values. If we only allowed the larger integers into FP registers, | |
479 | we'd have to say that QImode and SImode aren't tiable, which is a | |
480 | pain. So say all registers can hold everything and see how that works. */ | |
481 | ||
482 | #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 | |
483 | ||
484 | /* Value is 1 if it is a good idea to tie two pseudo registers | |
485 | when one has mode MODE1 and one has mode MODE2. | |
486 | If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, | |
487 | for any hard reg, then this must be 0 for correct output. */ | |
488 | ||
489 | #define MODES_TIEABLE_P(MODE1, MODE2) 1 | |
490 | ||
491 | /* Specify the registers used for certain standard purposes. | |
492 | The values of these macros are register numbers. */ | |
493 | ||
494 | /* Alpha pc isn't overloaded on a register that the compiler knows about. */ | |
495 | /* #define PC_REGNUM */ | |
496 | ||
497 | /* Register to use for pushing function arguments. */ | |
498 | #define STACK_POINTER_REGNUM 30 | |
499 | ||
500 | /* Base register for access to local variables of the function. */ | |
52a69200 | 501 | #define HARD_FRAME_POINTER_REGNUM 15 |
1a94ca49 RK |
502 | |
503 | /* Value should be nonzero if functions must have frame pointers. | |
504 | Zero means the frame pointer need not be set up (and parms | |
505 | may be accessed via the stack pointer) in functions that seem suitable. | |
506 | This is computed in `reload', in reload1.c. */ | |
507 | #define FRAME_POINTER_REQUIRED 0 | |
508 | ||
509 | /* Base register for access to arguments of the function. */ | |
130d2d72 | 510 | #define ARG_POINTER_REGNUM 31 |
1a94ca49 | 511 | |
52a69200 RK |
512 | /* Base register for access to local variables of function. */ |
513 | #define FRAME_POINTER_REGNUM 63 | |
514 | ||
1a94ca49 RK |
515 | /* Register in which static-chain is passed to a function. |
516 | ||
517 | For the Alpha, this is based on an example; the calling sequence | |
518 | doesn't seem to specify this. */ | |
519 | #define STATIC_CHAIN_REGNUM 1 | |
520 | ||
521 | /* Register in which address to store a structure value | |
522 | arrives in the function. On the Alpha, the address is passed | |
523 | as a hidden argument. */ | |
524 | #define STRUCT_VALUE 0 | |
525 | \f | |
526 | /* Define the classes of registers for register constraints in the | |
527 | machine description. Also define ranges of constants. | |
528 | ||
529 | One of the classes must always be named ALL_REGS and include all hard regs. | |
530 | If there is more than one class, another class must be named NO_REGS | |
531 | and contain no registers. | |
532 | ||
533 | The name GENERAL_REGS must be the name of a class (or an alias for | |
534 | another name such as ALL_REGS). This is the class of registers | |
535 | that is allowed by "g" or "r" in a register constraint. | |
536 | Also, registers outside this class are allocated only when | |
537 | instructions express preferences for them. | |
538 | ||
539 | The classes must be numbered in nondecreasing order; that is, | |
540 | a larger-numbered class must never be contained completely | |
541 | in a smaller-numbered class. | |
542 | ||
543 | For any two classes, it is very desirable that there be another | |
544 | class that represents their union. */ | |
545 | ||
546 | enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS, | |
547 | LIM_REG_CLASSES }; | |
548 | ||
549 | #define N_REG_CLASSES (int) LIM_REG_CLASSES | |
550 | ||
551 | /* Give names of register classes as strings for dump file. */ | |
552 | ||
553 | #define REG_CLASS_NAMES \ | |
554 | {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" } | |
555 | ||
556 | /* Define which registers fit in which classes. | |
557 | This is an initializer for a vector of HARD_REG_SET | |
558 | of length N_REG_CLASSES. */ | |
559 | ||
560 | #define REG_CLASS_CONTENTS \ | |
52a69200 | 561 | { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} } |
1a94ca49 RK |
562 | |
563 | /* The same information, inverted: | |
564 | Return the class number of the smallest class containing | |
565 | reg number REGNO. This could be a conditional expression | |
566 | or could index an array. */ | |
567 | ||
52a69200 RK |
568 | #define REGNO_REG_CLASS(REGNO) \ |
569 | ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS) | |
1a94ca49 RK |
570 | |
571 | /* The class value for index registers, and the one for base regs. */ | |
572 | #define INDEX_REG_CLASS NO_REGS | |
573 | #define BASE_REG_CLASS GENERAL_REGS | |
574 | ||
575 | /* Get reg_class from a letter such as appears in the machine description. */ | |
576 | ||
577 | #define REG_CLASS_FROM_LETTER(C) \ | |
578 | ((C) == 'f' ? FLOAT_REGS : NO_REGS) | |
579 | ||
580 | /* Define this macro to change register usage conditional on target flags. */ | |
581 | /* #define CONDITIONAL_REGISTER_USAGE */ | |
582 | ||
583 | /* The letters I, J, K, L, M, N, O, and P in a register constraint string | |
584 | can be used to stand for particular ranges of immediate operands. | |
585 | This macro defines what the ranges are. | |
586 | C is the letter, and VALUE is a constant value. | |
587 | Return 1 if VALUE is in the range specified by C. | |
588 | ||
589 | For Alpha: | |
590 | `I' is used for the range of constants most insns can contain. | |
591 | `J' is the constant zero. | |
592 | `K' is used for the constant in an LDA insn. | |
593 | `L' is used for the constant in a LDAH insn. | |
594 | `M' is used for the constants that can be AND'ed with using a ZAP insn. | |
595 | `N' is used for complemented 8-bit constants. | |
596 | `O' is used for negated 8-bit constants. | |
597 | `P' is used for the constants 1, 2 and 3. */ | |
598 | ||
599 | #define CONST_OK_FOR_LETTER_P(VALUE, C) \ | |
600 | ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \ | |
601 | : (C) == 'J' ? (VALUE) == 0 \ | |
602 | : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \ | |
603 | : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \ | |
c89e8dc2 RK |
604 | && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0) \ |
605 | && ((HOST_BITS_PER_WIDE_INT == 64 \ | |
23334240 | 606 | || (unsigned) (VALUE) != 0x80000000U))) \ |
1a94ca49 RK |
607 | : (C) == 'M' ? zap_mask (VALUE) \ |
608 | : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \ | |
609 | : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \ | |
610 | : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \ | |
611 | : 0) | |
612 | ||
613 | /* Similar, but for floating or large integer constants, and defining letters | |
614 | G and H. Here VALUE is the CONST_DOUBLE rtx itself. | |
615 | ||
616 | For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE | |
617 | that is the operand of a ZAP insn. */ | |
618 | ||
619 | #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ | |
620 | ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \ | |
621 | && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \ | |
622 | : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \ | |
623 | && zap_mask (CONST_DOUBLE_LOW (VALUE)) \ | |
624 | && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \ | |
625 | : 0) | |
626 | ||
e560f226 RK |
627 | /* Optional extra constraints for this machine. |
628 | ||
629 | For the Alpha, `Q' means that this is a memory operand but not a | |
ac030a7b RK |
630 | reference to an unaligned location. |
631 | `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current | |
632 | function. */ | |
e560f226 RK |
633 | |
634 | #define EXTRA_CONSTRAINT(OP, C) \ | |
635 | ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \ | |
ac030a7b | 636 | : (C) == 'R' ? current_file_function_operand (OP, Pmode) \ |
e560f226 RK |
637 | : 0) |
638 | ||
1a94ca49 RK |
639 | /* Given an rtx X being reloaded into a reg required to be |
640 | in class CLASS, return the class of reg to actually use. | |
641 | In general this is just CLASS; but on some machines | |
642 | in some cases it is preferable to use a more restrictive class. | |
643 | ||
644 | On the Alpha, all constants except zero go into a floating-point | |
645 | register via memory. */ | |
646 | ||
647 | #define PREFERRED_RELOAD_CLASS(X, CLASS) \ | |
648 | (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \ | |
649 | ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \ | |
650 | : (CLASS)) | |
651 | ||
652 | /* Loading and storing HImode or QImode values to and from memory | |
653 | usually requires a scratch register. The exceptions are loading | |
e560f226 | 654 | QImode and HImode from an aligned address to a general register. |
ddd5a7c1 | 655 | We also cannot load an unaligned address or a paradoxical SUBREG into an |
e868b518 | 656 | FP register. */ |
1a94ca49 RK |
657 | |
658 | #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \ | |
659 | (((GET_CODE (IN) == MEM \ | |
660 | || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \ | |
661 | || (GET_CODE (IN) == SUBREG \ | |
662 | && (GET_CODE (SUBREG_REG (IN)) == MEM \ | |
663 | || (GET_CODE (SUBREG_REG (IN)) == REG \ | |
664 | && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \ | |
665 | && (((CLASS) == FLOAT_REGS \ | |
666 | && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \ | |
667 | || (((MODE) == QImode || (MODE) == HImode) \ | |
668 | && unaligned_memory_operand (IN, MODE)))) \ | |
e560f226 RK |
669 | ? GENERAL_REGS \ |
670 | : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \ | |
671 | && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \ | |
e868b518 RK |
672 | : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == SUBREG \ |
673 | && (GET_MODE_SIZE (GET_MODE (IN)) \ | |
674 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (IN))))) ? GENERAL_REGS \ | |
e560f226 | 675 | : NO_REGS) |
1a94ca49 RK |
676 | |
677 | #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \ | |
678 | (((GET_CODE (OUT) == MEM \ | |
679 | || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \ | |
680 | || (GET_CODE (OUT) == SUBREG \ | |
681 | && (GET_CODE (SUBREG_REG (OUT)) == MEM \ | |
682 | || (GET_CODE (SUBREG_REG (OUT)) == REG \ | |
683 | && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \ | |
684 | && (((MODE) == HImode || (MODE) == QImode \ | |
685 | || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \ | |
e560f226 RK |
686 | ? GENERAL_REGS \ |
687 | : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \ | |
688 | && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \ | |
e868b518 RK |
689 | : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == SUBREG \ |
690 | && (GET_MODE_SIZE (GET_MODE (OUT)) \ | |
691 | > GET_MODE_SIZE (GET_MODE (SUBREG_REG (OUT))))) ? GENERAL_REGS \ | |
692 | : NO_REGS) | |
1a94ca49 RK |
693 | |
694 | /* If we are copying between general and FP registers, we need a memory | |
695 | location. */ | |
696 | ||
697 | #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2)) | |
698 | ||
acd94aaf RK |
699 | /* Specify the mode to be used for memory when a secondary memory |
700 | location is needed. If MODE is floating-point, use it. Otherwise, | |
701 | widen to a word like the default. This is needed because we always | |
702 | store integers in FP registers in quadword format. This whole | |
703 | area is very tricky! */ | |
704 | #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \ | |
705 | (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \ | |
e868b518 | 706 | : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \ |
acd94aaf RK |
707 | : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0)) |
708 | ||
1a94ca49 RK |
709 | /* Return the maximum number of consecutive registers |
710 | needed to represent mode MODE in a register of class CLASS. */ | |
711 | ||
712 | #define CLASS_MAX_NREGS(CLASS, MODE) \ | |
713 | ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) | |
714 | ||
c31dfe4d RK |
715 | /* If defined, gives a class of registers that cannot be used as the |
716 | operand of a SUBREG that changes the size of the object. */ | |
717 | ||
718 | #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS | |
719 | ||
1a94ca49 RK |
720 | /* Define the cost of moving between registers of various classes. Moving |
721 | between FLOAT_REGS and anything else except float regs is expensive. | |
722 | In fact, we make it quite expensive because we really don't want to | |
723 | do these moves unless it is clearly worth it. Optimizations may | |
724 | reduce the impact of not being able to allocate a pseudo to a | |
725 | hard register. */ | |
726 | ||
727 | #define REGISTER_MOVE_COST(CLASS1, CLASS2) \ | |
728 | (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20) | |
729 | ||
730 | /* A C expressions returning the cost of moving data of MODE from a register to | |
731 | or from memory. | |
732 | ||
733 | On the Alpha, bump this up a bit. */ | |
734 | ||
735 | #define MEMORY_MOVE_COST(MODE) 6 | |
736 | ||
737 | /* Provide the cost of a branch. Exact meaning under development. */ | |
738 | #define BRANCH_COST 5 | |
739 | ||
740 | /* Adjust the cost of dependencies. */ | |
741 | ||
742 | #define ADJUST_COST(INSN,LINK,DEP,COST) \ | |
743 | (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST) | |
744 | \f | |
745 | /* Stack layout; function entry, exit and calling. */ | |
746 | ||
747 | /* Define this if pushing a word on the stack | |
748 | makes the stack pointer a smaller address. */ | |
749 | #define STACK_GROWS_DOWNWARD | |
750 | ||
751 | /* Define this if the nominal address of the stack frame | |
752 | is at the high-address end of the local variables; | |
753 | that is, each additional local variable allocated | |
754 | goes at a more negative offset in the frame. */ | |
130d2d72 | 755 | /* #define FRAME_GROWS_DOWNWARD */ |
1a94ca49 RK |
756 | |
757 | /* Offset within stack frame to start allocating local variables at. | |
758 | If FRAME_GROWS_DOWNWARD, this is the offset to the END of the | |
759 | first local allocated. Otherwise, it is the offset to the BEGINNING | |
760 | of the first local allocated. */ | |
761 | ||
52a69200 | 762 | #define STARTING_FRAME_OFFSET 0 |
1a94ca49 RK |
763 | |
764 | /* If we generate an insn to push BYTES bytes, | |
765 | this says how many the stack pointer really advances by. | |
766 | On Alpha, don't define this because there are no push insns. */ | |
767 | /* #define PUSH_ROUNDING(BYTES) */ | |
768 | ||
769 | /* Define this if the maximum size of all the outgoing args is to be | |
770 | accumulated and pushed during the prologue. The amount can be | |
771 | found in the variable current_function_outgoing_args_size. */ | |
772 | #define ACCUMULATE_OUTGOING_ARGS | |
773 | ||
774 | /* Offset of first parameter from the argument pointer register value. */ | |
775 | ||
130d2d72 | 776 | #define FIRST_PARM_OFFSET(FNDECL) 0 |
1a94ca49 RK |
777 | |
778 | /* Definitions for register eliminations. | |
779 | ||
978e8952 | 780 | We have two registers that can be eliminated on the Alpha. First, the |
1a94ca49 | 781 | frame pointer register can often be eliminated in favor of the stack |
130d2d72 RK |
782 | pointer register. Secondly, the argument pointer register can always be |
783 | eliminated; it is replaced with either the stack or frame pointer. */ | |
1a94ca49 RK |
784 | |
785 | /* This is an array of structures. Each structure initializes one pair | |
786 | of eliminable registers. The "from" register number is given first, | |
787 | followed by "to". Eliminations of the same "from" register are listed | |
788 | in order of preference. */ | |
789 | ||
52a69200 RK |
790 | #define ELIMINABLE_REGS \ |
791 | {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
792 | { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ | |
793 | { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ | |
794 | { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}} | |
1a94ca49 RK |
795 | |
796 | /* Given FROM and TO register numbers, say whether this elimination is allowed. | |
797 | Frame pointer elimination is automatically handled. | |
798 | ||
130d2d72 | 799 | All eliminations are valid since the cases where FP can't be |
1a94ca49 RK |
800 | eliminated are already handled. */ |
801 | ||
130d2d72 | 802 | #define CAN_ELIMINATE(FROM, TO) 1 |
1a94ca49 | 803 | |
52a69200 RK |
804 | /* Round up to a multiple of 16 bytes. */ |
805 | #define ALPHA_ROUND(X) (((X) + 15) & ~ 15) | |
806 | ||
1a94ca49 RK |
807 | /* Define the offset between two registers, one to be eliminated, and the other |
808 | its replacement, at the start of a routine. */ | |
809 | #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ | |
52a69200 RK |
810 | { if ((FROM) == FRAME_POINTER_REGNUM) \ |
811 | (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ | |
812 | + alpha_sa_size ()); \ | |
813 | else if ((FROM) == ARG_POINTER_REGNUM) \ | |
814 | (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \ | |
815 | + alpha_sa_size () \ | |
d772039b RK |
816 | + (ALPHA_ROUND (get_frame_size () \ |
817 | + current_function_pretend_args_size) \ | |
818 | - current_function_pretend_args_size)); \ | |
1a94ca49 RK |
819 | } |
820 | ||
821 | /* Define this if stack space is still allocated for a parameter passed | |
822 | in a register. */ | |
823 | /* #define REG_PARM_STACK_SPACE */ | |
824 | ||
825 | /* Value is the number of bytes of arguments automatically | |
826 | popped when returning from a subroutine call. | |
8b109b37 | 827 | FUNDECL is the declaration node of the function (as a tree), |
1a94ca49 RK |
828 | FUNTYPE is the data type of the function (as a tree), |
829 | or for a library call it is an identifier node for the subroutine name. | |
830 | SIZE is the number of bytes of arguments passed on the stack. */ | |
831 | ||
8b109b37 | 832 | #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0 |
1a94ca49 RK |
833 | |
834 | /* Define how to find the value returned by a function. | |
835 | VALTYPE is the data type of the value (as a tree). | |
836 | If the precise function being called is known, FUNC is its FUNCTION_DECL; | |
837 | otherwise, FUNC is 0. | |
838 | ||
839 | On Alpha the value is found in $0 for integer functions and | |
840 | $f0 for floating-point functions. */ | |
841 | ||
842 | #define FUNCTION_VALUE(VALTYPE, FUNC) \ | |
843 | gen_rtx (REG, \ | |
20e76cb9 | 844 | (INTEGRAL_MODE_P (TYPE_MODE (VALTYPE)) \ |
1a94ca49 RK |
845 | && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ |
846 | ? word_mode : TYPE_MODE (VALTYPE), \ | |
847 | TARGET_FPREGS && TREE_CODE (VALTYPE) == REAL_TYPE ? 32 : 0) | |
848 | ||
849 | /* Define how to find the value returned by a library function | |
850 | assuming the value has mode MODE. */ | |
851 | ||
852 | #define LIBCALL_VALUE(MODE) \ | |
853 | gen_rtx (REG, MODE, \ | |
854 | TARGET_FPREGS && GET_MODE_CLASS (MODE) == MODE_FLOAT ? 32 : 0) | |
855 | ||
130d2d72 RK |
856 | /* The definition of this macro implies that there are cases where |
857 | a scalar value cannot be returned in registers. | |
858 | ||
859 | For the Alpha, any structure or union type is returned in memory, as | |
860 | are integers whose size is larger than 64 bits. */ | |
861 | ||
862 | #define RETURN_IN_MEMORY(TYPE) \ | |
e14fa9c4 | 863 | (TYPE_MODE (TYPE) == BLKmode \ |
130d2d72 RK |
864 | || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64)) |
865 | ||
1a94ca49 RK |
866 | /* 1 if N is a possible register number for a function value |
867 | as seen by the caller. */ | |
868 | ||
869 | #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 32) | |
870 | ||
871 | /* 1 if N is a possible register number for function argument passing. | |
872 | On Alpha, these are $16-$21 and $f16-$f21. */ | |
873 | ||
874 | #define FUNCTION_ARG_REGNO_P(N) \ | |
875 | (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) | |
876 | \f | |
877 | /* Define a data type for recording info about an argument list | |
878 | during the scan of that argument list. This data type should | |
879 | hold all necessary information about the function itself | |
880 | and about the args processed so far, enough to enable macros | |
881 | such as FUNCTION_ARG to determine where the next arg should go. | |
882 | ||
883 | On Alpha, this is a single integer, which is a number of words | |
884 | of arguments scanned so far. | |
885 | Thus 6 or more means all following args should go on the stack. */ | |
886 | ||
887 | #define CUMULATIVE_ARGS int | |
888 | ||
889 | /* Initialize a variable CUM of type CUMULATIVE_ARGS | |
890 | for a call to a function whose data type is FNTYPE. | |
891 | For a library call, FNTYPE is 0. */ | |
892 | ||
2c7ee1a6 | 893 | #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0 |
1a94ca49 RK |
894 | |
895 | /* Define intermediate macro to compute the size (in registers) of an argument | |
896 | for the Alpha. */ | |
897 | ||
898 | #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \ | |
899 | ((MODE) != BLKmode \ | |
900 | ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \ | |
901 | : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) | |
902 | ||
903 | /* Update the data in CUM to advance over an argument | |
904 | of mode MODE and data type TYPE. | |
905 | (TYPE is null for libcalls where that information may not be available.) */ | |
906 | ||
907 | #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ | |
908 | if (MUST_PASS_IN_STACK (MODE, TYPE)) \ | |
909 | (CUM) = 6; \ | |
910 | else \ | |
911 | (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED) | |
912 | ||
913 | /* Determine where to put an argument to a function. | |
914 | Value is zero to push the argument on the stack, | |
915 | or a hard register in which to store the argument. | |
916 | ||
917 | MODE is the argument's machine mode. | |
918 | TYPE is the data type of the argument (as a tree). | |
919 | This is null for libcalls where that information may | |
920 | not be available. | |
921 | CUM is a variable of type CUMULATIVE_ARGS which gives info about | |
922 | the preceding args and about the function being called. | |
923 | NAMED is nonzero if this argument is a named parameter | |
924 | (otherwise it is an extra parameter matching an ellipsis). | |
925 | ||
926 | On Alpha the first 6 words of args are normally in registers | |
927 | and the rest are pushed. */ | |
928 | ||
929 | #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ | |
930 | ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \ | |
931 | ? gen_rtx(REG, (MODE), \ | |
14d4a67a RK |
932 | (CUM) + 16 + ((TARGET_FPREGS \ |
933 | && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \ | |
934 | || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \ | |
935 | * 32)) \ | |
936 | : 0) | |
1a94ca49 | 937 | |
1a94ca49 RK |
938 | /* Specify the padding direction of arguments. |
939 | ||
940 | On the Alpha, we must pad upwards in order to be able to pass args in | |
941 | registers. */ | |
942 | ||
943 | #define FUNCTION_ARG_PADDING(MODE, TYPE) upward | |
944 | ||
945 | /* For an arg passed partly in registers and partly in memory, | |
946 | this is the number of registers used. | |
947 | For args passed entirely in registers or entirely in memory, zero. */ | |
948 | ||
949 | #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \ | |
950 | ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \ | |
951 | ? 6 - (CUM) : 0) | |
952 | ||
130d2d72 RK |
953 | /* Perform any needed actions needed for a function that is receiving a |
954 | variable number of arguments. | |
955 | ||
956 | CUM is as above. | |
957 | ||
958 | MODE and TYPE are the mode and type of the current parameter. | |
959 | ||
960 | PRETEND_SIZE is a variable that should be set to the amount of stack | |
961 | that must be pushed by the prolog to pretend that our caller pushed | |
962 | it. | |
963 | ||
964 | Normally, this macro will push all remaining incoming registers on the | |
965 | stack and set PRETEND_SIZE to the length of the registers pushed. | |
966 | ||
967 | On the Alpha, we allocate space for all 12 arg registers, but only | |
968 | push those that are remaining. | |
969 | ||
970 | However, if NO registers need to be saved, don't allocate any space. | |
971 | This is not only because we won't need the space, but because AP includes | |
972 | the current_pretend_args_size and we don't want to mess up any | |
7a92339b RK |
973 | ap-relative addresses already made. |
974 | ||
975 | If we are not to use the floating-point registers, save the integer | |
976 | registers where we would put the floating-point registers. This is | |
977 | not the most efficient way to implement varargs with just one register | |
978 | class, but it isn't worth doing anything more efficient in this rare | |
979 | case. */ | |
980 | ||
130d2d72 RK |
981 | |
982 | #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \ | |
983 | { if ((CUM) < 6) \ | |
984 | { \ | |
985 | if (! (NO_RTL)) \ | |
986 | { \ | |
987 | move_block_from_reg \ | |
988 | (16 + CUM, \ | |
989 | gen_rtx (MEM, BLKmode, \ | |
990 | plus_constant (virtual_incoming_args_rtx, \ | |
7f5bd4ff | 991 | ((CUM) + 6)* UNITS_PER_WORD)), \ |
02892e06 | 992 | 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ |
130d2d72 | 993 | move_block_from_reg \ |
7a92339b | 994 | (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \ |
130d2d72 RK |
995 | gen_rtx (MEM, BLKmode, \ |
996 | plus_constant (virtual_incoming_args_rtx, \ | |
7f5bd4ff | 997 | (CUM) * UNITS_PER_WORD)), \ |
02892e06 | 998 | 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \ |
130d2d72 RK |
999 | } \ |
1000 | PRETEND_SIZE = 12 * UNITS_PER_WORD; \ | |
1001 | } \ | |
1002 | } | |
1003 | ||
c8e9adec RK |
1004 | /* Try to output insns to set TARGET equal to the constant C if it can be |
1005 | done in less than N insns. Do all computations in MODE. Returns the place | |
1006 | where the output has been placed if it can be done and the insns have been | |
1007 | emitted. If it would take more than N insns, zero is returned and no | |
1008 | insns and emitted. */ | |
1009 | extern struct rtx_def *alpha_emit_set_const (); | |
803fee69 | 1010 | extern struct rtx_def *alpha_emit_set_long_const (); |
92e40a7a RK |
1011 | extern struct rtx_def *alpha_emit_conditional_move (); |
1012 | ||
1a94ca49 RK |
1013 | /* Generate necessary RTL for __builtin_saveregs(). |
1014 | ARGLIST is the argument list; see expr.c. */ | |
1015 | extern struct rtx_def *alpha_builtin_saveregs (); | |
1016 | #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST) | |
1017 | ||
1018 | /* Define the information needed to generate branch and scc insns. This is | |
1019 | stored from the compare operation. Note that we can't use "rtx" here | |
1020 | since it hasn't been defined! */ | |
1021 | ||
1022 | extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1; | |
1023 | extern int alpha_compare_fp_p; | |
1024 | ||
1025 | /* This macro produces the initial definition of a function name. On the | |
03f8c4cc | 1026 | Alpha, we need to save the function name for the prologue and epilogue. */ |
1a94ca49 RK |
1027 | |
1028 | extern char *alpha_function_name; | |
1029 | ||
1030 | #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \ | |
03f8c4cc | 1031 | { \ |
1a94ca49 RK |
1032 | alpha_function_name = NAME; \ |
1033 | } | |
1034 | ||
1035 | /* This macro generates the assembly code for function entry. | |
1036 | FILE is a stdio stream to output the code to. | |
1037 | SIZE is an int: how many units of temporary storage to allocate. | |
1038 | Refer to the array `regs_ever_live' to determine which registers | |
1039 | to save; `regs_ever_live[I]' is nonzero if register number I | |
1040 | is ever used in the function. This macro is responsible for | |
1041 | knowing which registers should not be saved even if used. */ | |
1042 | ||
1043 | #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE) | |
1044 | ||
1045 | /* Output assembler code to FILE to increment profiler label # LABELNO | |
e0fb9029 | 1046 | for profiling a function entry. Under OSF/1, profiling is enabled |
ddd5a7c1 | 1047 | by simply passing -pg to the assembler and linker. */ |
85d159a3 | 1048 | |
e0fb9029 | 1049 | #define FUNCTION_PROFILER(FILE, LABELNO) |
85d159a3 RK |
1050 | |
1051 | /* Output assembler code to FILE to initialize this source file's | |
1052 | basic block profiling info, if that has not already been done. | |
1053 | This assumes that __bb_init_func doesn't garble a1-a5. */ | |
1054 | ||
1055 | #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \ | |
1056 | do { \ | |
1057 | ASM_OUTPUT_REG_PUSH (FILE, 16); \ | |
a62eb16f JW |
1058 | fputs ("\tlda $16,$PBX32\n", (FILE)); \ |
1059 | fputs ("\tldq $26,0($16)\n", (FILE)); \ | |
1060 | fputs ("\tbne $26,1f\n", (FILE)); \ | |
1061 | fputs ("\tlda $27,__bb_init_func\n", (FILE)); \ | |
1062 | fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \ | |
1063 | fputs ("\tldgp $29,0($26)\n", (FILE)); \ | |
1064 | fputs ("1:\n", (FILE)); \ | |
85d159a3 RK |
1065 | ASM_OUTPUT_REG_POP (FILE, 16); \ |
1066 | } while (0); | |
1067 | ||
1068 | /* Output assembler code to FILE to increment the entry-count for | |
1069 | the BLOCKNO'th basic block in this source file. */ | |
1070 | ||
1071 | #define BLOCK_PROFILER(FILE, BLOCKNO) \ | |
1072 | do { \ | |
1073 | int blockn = (BLOCKNO); \ | |
a62eb16f | 1074 | fputs ("\tsubq $30,16,$30\n", (FILE)); \ |
70a76f06 RK |
1075 | fputs ("\tstq $26,0($30)\n", (FILE)); \ |
1076 | fputs ("\tstq $27,8($30)\n", (FILE)); \ | |
1077 | fputs ("\tlda $26,$PBX34\n", (FILE)); \ | |
1078 | fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \ | |
1079 | fputs ("\taddq $27,1,$27\n", (FILE)); \ | |
1080 | fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \ | |
1081 | fputs ("\tldq $26,0($30)\n", (FILE)); \ | |
1082 | fputs ("\tldq $27,8($30)\n", (FILE)); \ | |
a62eb16f | 1083 | fputs ("\taddq $30,16,$30\n", (FILE)); \ |
85d159a3 | 1084 | } while (0) |
1a94ca49 | 1085 | |
1a94ca49 RK |
1086 | |
1087 | /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, | |
1088 | the stack pointer does not matter. The value is tested only in | |
1089 | functions that have frame pointers. | |
1090 | No definition is equivalent to always zero. */ | |
1091 | ||
1092 | #define EXIT_IGNORE_STACK 1 | |
1093 | ||
1094 | /* This macro generates the assembly code for function exit, | |
1095 | on machines that need it. If FUNCTION_EPILOGUE is not defined | |
1096 | then individual return instructions are generated for each | |
1097 | return statement. Args are same as for FUNCTION_PROLOGUE. | |
1098 | ||
1099 | The function epilogue should not depend on the current stack pointer! | |
1100 | It should use the frame pointer only. This is mandatory because | |
1101 | of alloca; we also take advantage of it to omit stack adjustments | |
1102 | before returning. */ | |
1103 | ||
1104 | #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE) | |
1105 | ||
1106 | \f | |
1107 | /* Output assembler code for a block containing the constant parts | |
1108 | of a trampoline, leaving space for the variable parts. | |
1109 | ||
1110 | The trampoline should set the static chain pointer to value placed | |
7981384f RK |
1111 | into the trampoline and should branch to the specified routine. |
1112 | Note that $27 has been set to the address of the trampoline, so we can | |
1113 | use it for addressability of the two data items. Trampolines are always | |
1114 | aligned to FUNCTION_BOUNDARY, which is 64 bits. */ | |
1a94ca49 RK |
1115 | |
1116 | #define TRAMPOLINE_TEMPLATE(FILE) \ | |
1117 | { \ | |
7981384f | 1118 | fprintf (FILE, "\tldq $1,24($27)\n"); \ |
1a94ca49 | 1119 | fprintf (FILE, "\tldq $27,16($27)\n"); \ |
7981384f RK |
1120 | fprintf (FILE, "\tjmp $31,($27),0\n"); \ |
1121 | fprintf (FILE, "\tnop\n"); \ | |
1a94ca49 RK |
1122 | fprintf (FILE, "\t.quad 0,0\n"); \ |
1123 | } | |
1124 | ||
3a523eeb RS |
1125 | /* Section in which to place the trampoline. On Alpha, instructions |
1126 | may only be placed in a text segment. */ | |
1127 | ||
1128 | #define TRAMPOLINE_SECTION text_section | |
1129 | ||
1a94ca49 RK |
1130 | /* Length in units of the trampoline for entering a nested function. */ |
1131 | ||
7981384f | 1132 | #define TRAMPOLINE_SIZE 32 |
1a94ca49 RK |
1133 | |
1134 | /* Emit RTL insns to initialize the variable parts of a trampoline. | |
1135 | FNADDR is an RTX for the address of the function's pure code. | |
1136 | CXT is an RTX for the static chain value for the function. We assume | |
1137 | here that a function will be called many more times than its address | |
1138 | is taken (e.g., it might be passed to qsort), so we take the trouble | |
7981384f RK |
1139 | to initialize the "hint" field in the JMP insn. Note that the hint |
1140 | field is PC (new) + 4 * bits 13:0. */ | |
1a94ca49 RK |
1141 | |
1142 | #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ | |
1143 | { \ | |
1144 | rtx _temp, _temp1, _addr; \ | |
1145 | \ | |
1146 | _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \ | |
1147 | emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \ | |
7981384f | 1148 | _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \ |
1a94ca49 RK |
1149 | emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \ |
1150 | \ | |
7981384f RK |
1151 | _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \ |
1152 | _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \ | |
1153 | OPTAB_WIDEN); \ | |
1154 | _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \ | |
1a94ca49 | 1155 | build_int_2 (2, 0), NULL_RTX, 1); \ |
7981384f RK |
1156 | _temp = expand_and (gen_lowpart (SImode, _temp), \ |
1157 | GEN_INT (0x3fff), 0); \ | |
1a94ca49 | 1158 | \ |
7981384f | 1159 | _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \ |
1a94ca49 | 1160 | _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \ |
7981384f | 1161 | _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \ |
1a94ca49 RK |
1162 | _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \ |
1163 | OPTAB_WIDEN); \ | |
1164 | \ | |
1165 | emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \ | |
7981384f RK |
1166 | \ |
1167 | emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \ | |
1168 | "__enable_execute_stack"), \ | |
1169 | 0, VOIDmode, 1,_addr, Pmode); \ | |
1170 | \ | |
1171 | emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \ | |
1172 | gen_rtvec (1, const0_rtx), 0)); \ | |
1173 | } | |
1174 | ||
1175 | /* Attempt to turn on access permissions for the stack. */ | |
1176 | ||
1177 | #define TRANSFER_FROM_TRAMPOLINE \ | |
1178 | \ | |
1179 | void \ | |
1180 | __enable_execute_stack (addr) \ | |
1181 | void *addr; \ | |
1182 | { \ | |
1183 | long size = getpagesize (); \ | |
1184 | long mask = ~(size-1); \ | |
1185 | char *page = (char *) (((long) addr) & mask); \ | |
1186 | char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \ | |
1187 | \ | |
1188 | /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \ | |
1189 | if (mprotect (page, end - page, 7) < 0) \ | |
1190 | perror ("mprotect of trampoline code"); \ | |
1a94ca49 | 1191 | } |
675f0e7c RK |
1192 | |
1193 | /* A C expression whose value is RTL representing the value of the return | |
1194 | address for the frame COUNT steps up from the current frame. | |
1195 | FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of | |
1196 | the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME} is defined. | |
1197 | ||
1198 | This definition for Alpha is broken, but is put in at the request of | |
1199 | Mike Stump. */ | |
1200 | ||
1201 | #define RETURN_ADDR_RTX(COUNT, FRAME) \ | |
1202 | ((COUNT == 0 && alpha_sa_size () == 0 && 0 /* not right. */) \ | |
6ea0cab3 RK |
1203 | ? gen_rtx (REG, Pmode, 26) \ |
1204 | : gen_rtx (MEM, Pmode, \ | |
675f0e7c RK |
1205 | memory_address (Pmode, FRAME))) |
1206 | \f | |
1a94ca49 RK |
1207 | /* Addressing modes, and classification of registers for them. */ |
1208 | ||
1209 | /* #define HAVE_POST_INCREMENT */ | |
1210 | /* #define HAVE_POST_DECREMENT */ | |
1211 | ||
1212 | /* #define HAVE_PRE_DECREMENT */ | |
1213 | /* #define HAVE_PRE_INCREMENT */ | |
1214 | ||
1215 | /* Macros to check register numbers against specific register classes. */ | |
1216 | ||
1217 | /* These assume that REGNO is a hard or pseudo reg number. | |
1218 | They give nonzero only if REGNO is a hard reg of the suitable class | |
1219 | or a pseudo reg currently allocated to a suitable hard reg. | |
1220 | Since they use reg_renumber, they are safe only once reg_renumber | |
1221 | has been allocated, which happens in local-alloc.c. */ | |
1222 | ||
1223 | #define REGNO_OK_FOR_INDEX_P(REGNO) 0 | |
1224 | #define REGNO_OK_FOR_BASE_P(REGNO) \ | |
52a69200 RK |
1225 | ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \ |
1226 | || (REGNO) == 63 || reg_renumber[REGNO] == 63) | |
1a94ca49 RK |
1227 | \f |
1228 | /* Maximum number of registers that can appear in a valid memory address. */ | |
1229 | #define MAX_REGS_PER_ADDRESS 1 | |
1230 | ||
1231 | /* Recognize any constant value that is a valid address. For the Alpha, | |
1232 | there are only constants none since we want to use LDA to load any | |
1233 | symbolic addresses into registers. */ | |
1234 | ||
1235 | #define CONSTANT_ADDRESS_P(X) \ | |
1236 | (GET_CODE (X) == CONST_INT \ | |
1237 | && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000) | |
1238 | ||
1239 | /* Include all constant integers and constant doubles, but not | |
1240 | floating-point, except for floating-point zero. */ | |
1241 | ||
1242 | #define LEGITIMATE_CONSTANT_P(X) \ | |
1243 | (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \ | |
1244 | || (X) == CONST0_RTX (GET_MODE (X))) | |
1245 | ||
1246 | /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx | |
1247 | and check its validity for a certain class. | |
1248 | We have two alternate definitions for each of them. | |
1249 | The usual definition accepts all pseudo regs; the other rejects | |
1250 | them unless they have been allocated suitable hard regs. | |
1251 | The symbol REG_OK_STRICT causes the latter definition to be used. | |
1252 | ||
1253 | Most source files want to accept pseudo regs in the hope that | |
1254 | they will get allocated to the class that the insn wants them to be in. | |
1255 | Source files for reload pass need to be strict. | |
1256 | After reload, it makes no difference, since pseudo regs have | |
1257 | been eliminated by then. */ | |
1258 | ||
1259 | #ifndef REG_OK_STRICT | |
1260 | ||
1261 | /* Nonzero if X is a hard reg that can be used as an index | |
1262 | or if it is a pseudo reg. */ | |
1263 | #define REG_OK_FOR_INDEX_P(X) 0 | |
1264 | /* Nonzero if X is a hard reg that can be used as a base reg | |
1265 | or if it is a pseudo reg. */ | |
1266 | #define REG_OK_FOR_BASE_P(X) \ | |
52a69200 | 1267 | (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
1a94ca49 RK |
1268 | |
1269 | #else | |
1270 | ||
1271 | /* Nonzero if X is a hard reg that can be used as an index. */ | |
1272 | #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) | |
1273 | /* Nonzero if X is a hard reg that can be used as a base reg. */ | |
1274 | #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) | |
1275 | ||
1276 | #endif | |
1277 | \f | |
1278 | /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression | |
1279 | that is a valid memory address for an instruction. | |
1280 | The MODE argument is the machine mode for the MEM expression | |
1281 | that wants to use this address. | |
1282 | ||
1283 | For Alpha, we have either a constant address or the sum of a register | |
1284 | and a constant address, or just a register. For DImode, any of those | |
1285 | forms can be surrounded with an AND that clear the low-order three bits; | |
1286 | this is an "unaligned" access. | |
1287 | ||
1a94ca49 RK |
1288 | First define the basic valid address. */ |
1289 | ||
1290 | #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \ | |
1291 | { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \ | |
1292 | goto ADDR; \ | |
1293 | if (CONSTANT_ADDRESS_P (X)) \ | |
1294 | goto ADDR; \ | |
1295 | if (GET_CODE (X) == PLUS \ | |
1296 | && REG_P (XEXP (X, 0)) \ | |
1297 | && REG_OK_FOR_BASE_P (XEXP (X, 0)) \ | |
1298 | && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
1299 | goto ADDR; \ | |
1300 | } | |
1301 | ||
1302 | /* Now accept the simple address, or, for DImode only, an AND of a simple | |
1303 | address that turns off the low three bits. */ | |
1304 | ||
1a94ca49 RK |
1305 | #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ |
1306 | { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \ | |
1307 | if ((MODE) == DImode \ | |
1308 | && GET_CODE (X) == AND \ | |
1309 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1310 | && INTVAL (XEXP (X, 1)) == -8) \ | |
1311 | GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \ | |
1a94ca49 RK |
1312 | } |
1313 | ||
1314 | /* Try machine-dependent ways of modifying an illegitimate address | |
1315 | to be legitimate. If we find one, return the new, valid address. | |
1316 | This macro is used in only one place: `memory_address' in explow.c. | |
1317 | ||
1318 | OLDX is the address as it was before break_out_memory_refs was called. | |
1319 | In some cases it is useful to look at this to decide what needs to be done. | |
1320 | ||
1321 | MODE and WIN are passed so that this macro can use | |
1322 | GO_IF_LEGITIMATE_ADDRESS. | |
1323 | ||
1324 | It is always safe for this macro to do nothing. It exists to recognize | |
1325 | opportunities to optimize the output. | |
1326 | ||
1327 | For the Alpha, there are three cases we handle: | |
1328 | ||
1329 | (1) If the address is (plus reg const_int) and the CONST_INT is not a | |
1330 | valid offset, compute the high part of the constant and add it to the | |
1331 | register. Then our address is (plus temp low-part-const). | |
1332 | (2) If the address is (const (plus FOO const_int)), find the low-order | |
1333 | part of the CONST_INT. Then load FOO plus any high-order part of the | |
1334 | CONST_INT into a register. Our address is (plus reg low-part-const). | |
1335 | This is done to reduce the number of GOT entries. | |
1336 | (3) If we have a (plus reg const), emit the load as in (2), then add | |
1337 | the two registers, and finally generate (plus reg low-part-const) as | |
1338 | our address. */ | |
1339 | ||
1340 | #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \ | |
1341 | { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1342 | && GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1343 | && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \ | |
1344 | { \ | |
1345 | HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \ | |
1346 | HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ | |
1347 | HOST_WIDE_INT highpart = val - lowpart; \ | |
1348 | rtx high = GEN_INT (highpart); \ | |
1349 | rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \ | |
80f251fe | 1350 | high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \ |
1a94ca49 RK |
1351 | \ |
1352 | (X) = plus_constant (temp, lowpart); \ | |
1353 | goto WIN; \ | |
1354 | } \ | |
1355 | else if (GET_CODE (X) == CONST \ | |
1356 | && GET_CODE (XEXP (X, 0)) == PLUS \ | |
1357 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \ | |
1358 | { \ | |
1359 | HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \ | |
1360 | HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ | |
1361 | HOST_WIDE_INT highpart = val - lowpart; \ | |
1362 | rtx high = XEXP (XEXP (X, 0), 0); \ | |
1363 | \ | |
1364 | if (highpart) \ | |
1365 | high = plus_constant (high, highpart); \ | |
1366 | \ | |
1367 | (X) = plus_constant (force_reg (Pmode, high), lowpart); \ | |
1368 | goto WIN; \ | |
1369 | } \ | |
1370 | else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \ | |
1371 | && GET_CODE (XEXP (X, 1)) == CONST \ | |
1372 | && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \ | |
1373 | && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \ | |
1374 | { \ | |
1375 | HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \ | |
1376 | HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \ | |
1377 | HOST_WIDE_INT highpart = val - lowpart; \ | |
1378 | rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \ | |
1379 | \ | |
1380 | if (highpart) \ | |
1381 | high = plus_constant (high, highpart); \ | |
1382 | \ | |
1383 | high = expand_binop (Pmode, add_optab, XEXP (X, 0), \ | |
1384 | force_reg (Pmode, high), \ | |
80f251fe | 1385 | high, 1, OPTAB_LIB_WIDEN); \ |
1a94ca49 RK |
1386 | (X) = plus_constant (high, lowpart); \ |
1387 | goto WIN; \ | |
1388 | } \ | |
1389 | } | |
1390 | ||
1391 | /* Go to LABEL if ADDR (a legitimate address expression) | |
1392 | has an effect that depends on the machine mode it is used for. | |
1393 | On the Alpha this is true only for the unaligned modes. We can | |
1394 | simplify this test since we know that the address must be valid. */ | |
1395 | ||
1396 | #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ | |
1397 | { if (GET_CODE (ADDR) == AND) goto LABEL; } | |
1398 | ||
1399 | /* Compute the cost of an address. For the Alpha, all valid addresses are | |
1400 | the same cost. */ | |
1401 | ||
1402 | #define ADDRESS_COST(X) 0 | |
1403 | ||
1404 | /* Define this if some processing needs to be done immediately before | |
1405 | emitting code for an insn. */ | |
1406 | ||
2bf6230d RK |
1407 | extern void final_prescan_insn (); |
1408 | #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \ | |
1409 | final_prescan_insn ((INSN), (OPERANDS), (NOPERANDS)) | |
1410 | ||
1411 | /* Define this if FINAL_PRESCAN_INSN should be called for a CODE_LABEL. */ | |
1412 | #define FINAL_PRESCAN_LABEL | |
1a94ca49 RK |
1413 | \f |
1414 | /* Specify the machine mode that this machine uses | |
1415 | for the index in the tablejump instruction. */ | |
1416 | #define CASE_VECTOR_MODE SImode | |
1417 | ||
1418 | /* Define this if the tablejump instruction expects the table | |
1419 | to contain offsets from the address of the table. | |
260ced47 RK |
1420 | Do not define this if the table should contain absolute addresses. |
1421 | On the Alpha, the table is really GP-relative, not relative to the PC | |
1422 | of the table, but we pretend that it is PC-relative; this should be OK, | |
0076aa6b | 1423 | but we should try to find some better way sometime. */ |
260ced47 | 1424 | #define CASE_VECTOR_PC_RELATIVE |
1a94ca49 RK |
1425 | |
1426 | /* Specify the tree operation to be used to convert reals to integers. */ | |
1427 | #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR | |
1428 | ||
1429 | /* This is the kind of divide that is easiest to do in the general case. */ | |
1430 | #define EASY_DIV_EXPR TRUNC_DIV_EXPR | |
1431 | ||
1432 | /* Define this as 1 if `char' should by default be signed; else as 0. */ | |
1433 | #define DEFAULT_SIGNED_CHAR 1 | |
1434 | ||
1435 | /* This flag, if defined, says the same insns that convert to a signed fixnum | |
1436 | also convert validly to an unsigned one. | |
1437 | ||
1438 | We actually lie a bit here as overflow conditions are different. But | |
1439 | they aren't being checked anyway. */ | |
1440 | ||
1441 | #define FIXUNS_TRUNC_LIKE_FIX_TRUNC | |
1442 | ||
1443 | /* Max number of bytes we can move to or from memory | |
1444 | in one reasonably fast instruction. */ | |
1445 | ||
1446 | #define MOVE_MAX 8 | |
1447 | ||
1448 | /* Largest number of bytes of an object that can be placed in a register. | |
1449 | On the Alpha we have plenty of registers, so use TImode. */ | |
1450 | #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) | |
1451 | ||
1452 | /* Nonzero if access to memory by bytes is no faster than for words. | |
1453 | Also non-zero if doing byte operations (specifically shifts) in registers | |
1454 | is undesirable. | |
1455 | ||
1456 | On the Alpha, we want to not use the byte operation and instead use | |
1457 | masking operations to access fields; these will save instructions. */ | |
1458 | ||
1459 | #define SLOW_BYTE_ACCESS 1 | |
1460 | ||
9a63901f RK |
1461 | /* Define if operations between registers always perform the operation |
1462 | on the full register even if a narrower mode is specified. */ | |
1463 | #define WORD_REGISTER_OPERATIONS | |
1464 | ||
1465 | /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD | |
1466 | will either zero-extend or sign-extend. The value of this macro should | |
1467 | be the code that says which one of the two operations is implicitly | |
1468 | done, NIL if none. */ | |
1469 | #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND | |
1a94ca49 | 1470 | |
225211e2 RK |
1471 | /* Define if loading short immediate values into registers sign extends. */ |
1472 | #define SHORT_IMMEDIATES_SIGN_EXTEND | |
1473 | ||
1a94ca49 RK |
1474 | /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits |
1475 | is done just by pretending it is already truncated. */ | |
1476 | #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 | |
1477 | ||
1478 | /* We assume that the store-condition-codes instructions store 0 for false | |
1479 | and some other value for true. This is the value stored for true. */ | |
1480 | ||
1481 | #define STORE_FLAG_VALUE 1 | |
1482 | ||
1483 | /* Define the value returned by a floating-point comparison instruction. */ | |
1484 | ||
1485 | #define FLOAT_STORE_FLAG_VALUE 0.5 | |
1486 | ||
35bb77fd RK |
1487 | /* Canonicalize a comparison from one we don't have to one we do have. */ |
1488 | ||
1489 | #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \ | |
1490 | do { \ | |
1491 | if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \ | |
1492 | && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \ | |
1493 | { \ | |
1494 | rtx tem = (OP0); \ | |
1495 | (OP0) = (OP1); \ | |
1496 | (OP1) = tem; \ | |
1497 | (CODE) = swap_condition (CODE); \ | |
1498 | } \ | |
1499 | if (((CODE) == LT || (CODE) == LTU) \ | |
1500 | && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \ | |
1501 | { \ | |
1502 | (CODE) = (CODE) == LT ? LE : LEU; \ | |
1503 | (OP1) = GEN_INT (255); \ | |
1504 | } \ | |
1505 | } while (0) | |
1506 | ||
1a94ca49 RK |
1507 | /* Specify the machine mode that pointers have. |
1508 | After generation of rtl, the compiler makes no further distinction | |
1509 | between pointers and any other objects of this machine mode. */ | |
1510 | #define Pmode DImode | |
1511 | ||
1512 | /* Mode of a function address in a call instruction (for indexing purposes). */ | |
1513 | ||
1514 | #define FUNCTION_MODE Pmode | |
1515 | ||
1516 | /* Define this if addresses of constant functions | |
1517 | shouldn't be put through pseudo regs where they can be cse'd. | |
1518 | Desirable on machines where ordinary constants are expensive | |
1519 | but a CALL with constant address is cheap. | |
1520 | ||
1521 | We define this on the Alpha so that gen_call and gen_call_value | |
1522 | get to see the SYMBOL_REF (for the hint field of the jsr). It will | |
1523 | then copy it into a register, thus actually letting the address be | |
1524 | cse'ed. */ | |
1525 | ||
1526 | #define NO_FUNCTION_CSE | |
1527 | ||
d969caf8 | 1528 | /* Define this to be nonzero if shift instructions ignore all but the low-order |
1a94ca49 | 1529 | few bits. */ |
d969caf8 | 1530 | #define SHIFT_COUNT_TRUNCATED 1 |
1a94ca49 | 1531 | |
d721b776 RK |
1532 | /* Use atexit for static constructors/destructors, instead of defining |
1533 | our own exit function. */ | |
1534 | #define HAVE_ATEXIT | |
1535 | ||
1a94ca49 RK |
1536 | /* Compute the cost of computing a constant rtl expression RTX |
1537 | whose rtx-code is CODE. The body of this macro is a portion | |
1538 | of a switch statement. If the code is computed here, | |
1539 | return it with a return statement. Otherwise, break from the switch. | |
1540 | ||
8b7b2e36 RK |
1541 | If this is an 8-bit constant, return zero since it can be used |
1542 | nearly anywhere with no cost. If it is a valid operand for an | |
1543 | ADD or AND, likewise return 0 if we know it will be used in that | |
1544 | context. Otherwise, return 2 since it might be used there later. | |
1545 | All other constants take at least two insns. */ | |
1a94ca49 RK |
1546 | |
1547 | #define CONST_COSTS(RTX,CODE,OUTER_CODE) \ | |
1548 | case CONST_INT: \ | |
06eb8e92 | 1549 | if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \ |
8b7b2e36 | 1550 | return 0; \ |
1a94ca49 | 1551 | case CONST_DOUBLE: \ |
8b7b2e36 RK |
1552 | if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \ |
1553 | || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \ | |
1554 | return 0; \ | |
1555 | else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \ | |
1556 | return 2; \ | |
1557 | else \ | |
1558 | return COSTS_N_INSNS (2); \ | |
1a94ca49 RK |
1559 | case CONST: \ |
1560 | case SYMBOL_REF: \ | |
1561 | case LABEL_REF: \ | |
f6f6a13c RK |
1562 | switch (alpha_cpu) \ |
1563 | { \ | |
1564 | case PROCESSOR_EV4: \ | |
1565 | return COSTS_N_INSNS (3); \ | |
1566 | case PROCESSOR_EV5: \ | |
1567 | return COSTS_N_INSNS (2); \ | |
1568 | } | |
1a94ca49 RK |
1569 | |
1570 | /* Provide the costs of a rtl expression. This is in the body of a | |
1571 | switch on CODE. */ | |
1572 | ||
1573 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ | |
3bda6d11 RK |
1574 | case PLUS: case MINUS: \ |
1575 | if (FLOAT_MODE_P (GET_MODE (X))) \ | |
f6f6a13c RK |
1576 | switch (alpha_cpu) \ |
1577 | { \ | |
1578 | case PROCESSOR_EV4: \ | |
1579 | return COSTS_N_INSNS (6); \ | |
1580 | case PROCESSOR_EV5: \ | |
1581 | return COSTS_N_INSNS (4); \ | |
1582 | } \ | |
b49e978e RK |
1583 | else if (GET_CODE (XEXP (X, 0)) == MULT \ |
1584 | && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \ | |
a5da0afe RK |
1585 | return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \ |
1586 | + rtx_cost (XEXP (X, 1), OUTER_CODE)); \ | |
1a94ca49 RK |
1587 | break; \ |
1588 | case MULT: \ | |
f6f6a13c RK |
1589 | switch (alpha_cpu) \ |
1590 | { \ | |
1591 | case PROCESSOR_EV4: \ | |
1592 | if (FLOAT_MODE_P (GET_MODE (X))) \ | |
1593 | return COSTS_N_INSNS (6); \ | |
1594 | return COSTS_N_INSNS (23); \ | |
1595 | case PROCESSOR_EV5: \ | |
1596 | if (FLOAT_MODE_P (GET_MODE (X))) \ | |
1597 | return COSTS_N_INSNS (4); \ | |
1598 | else if (GET_MODE (X) == DImode) \ | |
1599 | return COSTS_N_INSNS (12); \ | |
1600 | else \ | |
1601 | return COSTS_N_INSNS (8); \ | |
1602 | } \ | |
b49e978e RK |
1603 | case ASHIFT: \ |
1604 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
1605 | && INTVAL (XEXP (X, 1)) <= 3) \ | |
1606 | break; \ | |
1607 | /* ... fall through ... */ \ | |
1608 | case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \ | |
f6f6a13c RK |
1609 | switch (alpha_cpu) \ |
1610 | { \ | |
1611 | case PROCESSOR_EV4: \ | |
1612 | return COSTS_N_INSNS (2); \ | |
1613 | case PROCESSOR_EV5: \ | |
1614 | return COSTS_N_INSNS (1); \ | |
1615 | } \ | |
3bda6d11 | 1616 | case DIV: case UDIV: case MOD: case UMOD: \ |
f6f6a13c RK |
1617 | switch (alpha_cpu) \ |
1618 | { \ | |
1619 | case PROCESSOR_EV4: \ | |
1620 | if (GET_MODE (X) == SFmode) \ | |
1621 | return COSTS_N_INSNS (34); \ | |
1622 | else if (GET_MODE (X) == DFmode) \ | |
1623 | return COSTS_N_INSNS (63); \ | |
1624 | else \ | |
1625 | return COSTS_N_INSNS (70); \ | |
1626 | case PROCESSOR_EV5: \ | |
1627 | if (GET_MODE (X) == SFmode) \ | |
1628 | return COSTS_N_INSNS (15); \ | |
1629 | else if (GET_MODE (X) == DFmode) \ | |
1630 | return COSTS_N_INSNS (22); \ | |
1631 | else \ | |
1632 | return COSTS_N_INSNS (70); /* EV5 ??? */ \ | |
1633 | } \ | |
1a94ca49 | 1634 | case MEM: \ |
f6f6a13c RK |
1635 | switch (alpha_cpu) \ |
1636 | { \ | |
1637 | case PROCESSOR_EV4: \ | |
1638 | return COSTS_N_INSNS (3); \ | |
1639 | case PROCESSOR_EV5: \ | |
1640 | return COSTS_N_INSNS (2); \ | |
1641 | } \ | |
1642 | case NEG: case ABS: \ | |
1643 | if (! FLOAT_MODE_P (GET_MODE (X))) \ | |
1644 | break; \ | |
1645 | /* ... fall through ... */ \ | |
3bda6d11 RK |
1646 | case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \ |
1647 | case FLOAT_EXTEND: case FLOAT_TRUNCATE: \ | |
f6f6a13c RK |
1648 | switch (alpha_cpu) \ |
1649 | { \ | |
1650 | case PROCESSOR_EV4: \ | |
1651 | return COSTS_N_INSNS (6); \ | |
1652 | case PROCESSOR_EV5: \ | |
1653 | return COSTS_N_INSNS (4); \ | |
1654 | } | |
1a94ca49 RK |
1655 | \f |
1656 | /* Control the assembler format that we output. */ | |
1657 | ||
1658 | /* Output at beginning of assembler file. */ | |
1659 | ||
1660 | #define ASM_FILE_START(FILE) \ | |
03f8c4cc | 1661 | { \ |
130d2d72 RK |
1662 | alpha_write_verstamp (FILE); \ |
1663 | fprintf (FILE, "\t.set noreorder\n"); \ | |
fee3a4a8 | 1664 | fprintf (FILE, "\t.set volatile\n"); \ |
1a94ca49 | 1665 | fprintf (FILE, "\t.set noat\n"); \ |
03f8c4cc | 1666 | ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \ |
1a94ca49 RK |
1667 | } |
1668 | ||
1669 | /* Output to assembler file text saying following lines | |
1670 | may contain character constants, extra white space, comments, etc. */ | |
1671 | ||
1672 | #define ASM_APP_ON "" | |
1673 | ||
1674 | /* Output to assembler file text saying following lines | |
1675 | no longer contain unusual constructs. */ | |
1676 | ||
1677 | #define ASM_APP_OFF "" | |
1678 | ||
1679 | #define TEXT_SECTION_ASM_OP ".text" | |
1680 | ||
1681 | /* Output before read-only data. */ | |
1682 | ||
1683 | #define READONLY_DATA_SECTION_ASM_OP ".rdata" | |
1684 | ||
1685 | /* Output before writable data. */ | |
1686 | ||
1687 | #define DATA_SECTION_ASM_OP ".data" | |
1688 | ||
1689 | /* Define an extra section for read-only data, a routine to enter it, and | |
c0388f29 RK |
1690 | indicate that it is for read-only data. |
1691 | ||
abc95ed3 | 1692 | The first time we enter the readonly data section for a file, we write |
c0388f29 RK |
1693 | eight bytes of zero. This works around a bug in DEC's assembler in |
1694 | some versions of OSF/1 V3.x. */ | |
1a94ca49 RK |
1695 | |
1696 | #define EXTRA_SECTIONS readonly_data | |
1697 | ||
1698 | #define EXTRA_SECTION_FUNCTIONS \ | |
1699 | void \ | |
1700 | literal_section () \ | |
1701 | { \ | |
1702 | if (in_section != readonly_data) \ | |
1703 | { \ | |
c0388f29 RK |
1704 | static int firsttime = 1; \ |
1705 | \ | |
1a94ca49 | 1706 | fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \ |
c0388f29 RK |
1707 | if (firsttime) \ |
1708 | { \ | |
1709 | firsttime = 0; \ | |
1710 | ASM_OUTPUT_DOUBLE_INT (asm_out_file, const0_rtx); \ | |
1711 | } \ | |
1712 | \ | |
1a94ca49 RK |
1713 | in_section = readonly_data; \ |
1714 | } \ | |
1715 | } \ | |
1716 | ||
1717 | #define READONLY_DATA_SECTION literal_section | |
1718 | ||
ac030a7b RK |
1719 | /* If we are referencing a function that is static, make the SYMBOL_REF |
1720 | special. We use this to see indicate we can branch to this function | |
1721 | without setting PV or restoring GP. */ | |
130d2d72 RK |
1722 | |
1723 | #define ENCODE_SECTION_INFO(DECL) \ | |
ac030a7b | 1724 | if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL)) \ |
130d2d72 RK |
1725 | SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; |
1726 | ||
1a94ca49 RK |
1727 | /* How to refer to registers in assembler output. |
1728 | This sequence is indexed by compiler's hard-register-number (see above). */ | |
1729 | ||
1730 | #define REGISTER_NAMES \ | |
1731 | {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \ | |
1732 | "$9", "$10", "$11", "$12", "$13", "$14", "$15", \ | |
1733 | "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \ | |
130d2d72 | 1734 | "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \ |
1a94ca49 RK |
1735 | "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \ |
1736 | "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \ | |
1737 | "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\ | |
52a69200 | 1738 | "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"} |
1a94ca49 RK |
1739 | |
1740 | /* How to renumber registers for dbx and gdb. */ | |
1741 | ||
1742 | #define DBX_REGISTER_NUMBER(REGNO) (REGNO) | |
1743 | ||
1744 | /* This is how to output the definition of a user-level label named NAME, | |
1745 | such as the label on a static function or variable NAME. */ | |
1746 | ||
1747 | #define ASM_OUTPUT_LABEL(FILE,NAME) \ | |
1748 | do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) | |
1749 | ||
1750 | /* This is how to output a command to make the user-level label named NAME | |
1751 | defined for reference from other files. */ | |
1752 | ||
1753 | #define ASM_GLOBALIZE_LABEL(FILE,NAME) \ | |
1754 | do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) | |
1755 | ||
1756 | /* This is how to output a reference to a user-level label named NAME. | |
1757 | `assemble_name' uses this. */ | |
1758 | ||
1759 | #define ASM_OUTPUT_LABELREF(FILE,NAME) \ | |
1760 | fprintf (FILE, "%s", NAME) | |
1761 | ||
1762 | /* This is how to output an internal numbered label where | |
1763 | PREFIX is the class of label and NUM is the number within the class. */ | |
1764 | ||
1765 | #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \ | |
1766 | if ((PREFIX)[0] == 'L') \ | |
1767 | fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \ | |
1768 | else \ | |
1769 | fprintf (FILE, "%s%d:\n", PREFIX, NUM); | |
1770 | ||
1771 | /* This is how to output a label for a jump table. Arguments are the same as | |
1772 | for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is | |
1773 | passed. */ | |
1774 | ||
1775 | #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \ | |
1776 | { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); } | |
1777 | ||
1778 | /* This is how to store into the string LABEL | |
1779 | the symbol_ref name of an internal numbered label where | |
1780 | PREFIX is the class of label and NUM is the number within the class. | |
1781 | This is suitable for output with `assemble_name'. */ | |
1782 | ||
1783 | #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \ | |
1784 | if ((PREFIX)[0] == 'L') \ | |
1785 | sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \ | |
1786 | else \ | |
1787 | sprintf (LABEL, "*%s%d", PREFIX, NUM) | |
1788 | ||
e247ca2a RK |
1789 | /* Check a floating-point value for validity for a particular machine mode. */ |
1790 | ||
1791 | #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \ | |
1792 | ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW)) | |
1793 | ||
1a94ca49 RK |
1794 | /* This is how to output an assembler line defining a `double' constant. */ |
1795 | ||
e99300f1 RS |
1796 | #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \ |
1797 | { \ | |
1798 | if (REAL_VALUE_ISINF (VALUE) \ | |
1799 | || REAL_VALUE_ISNAN (VALUE) \ | |
1800 | || REAL_VALUE_MINUS_ZERO (VALUE)) \ | |
1801 | { \ | |
1802 | long t[2]; \ | |
1803 | REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \ | |
1804 | fprintf (FILE, "\t.quad 0x%lx%08lx\n", \ | |
1805 | t[1] & 0xffffffff, t[0] & 0xffffffff); \ | |
1806 | } \ | |
1807 | else \ | |
1808 | { \ | |
1809 | char str[30]; \ | |
1810 | REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \ | |
1811 | fprintf (FILE, "\t.t_floating %s\n", str); \ | |
1812 | } \ | |
1813 | } | |
1a94ca49 RK |
1814 | |
1815 | /* This is how to output an assembler line defining a `float' constant. */ | |
1816 | ||
e247ca2a RK |
1817 | #define ASM_OUTPUT_FLOAT(FILE,VALUE) \ |
1818 | do { \ | |
1819 | long t; \ | |
1820 | REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \ | |
1821 | fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \ | |
1822 | } while (0) | |
2700ac93 | 1823 | |
1a94ca49 RK |
1824 | /* This is how to output an assembler line defining an `int' constant. */ |
1825 | ||
1826 | #define ASM_OUTPUT_INT(FILE,VALUE) \ | |
0076aa6b RK |
1827 | ( fprintf (FILE, "\t.long "), \ |
1828 | output_addr_const (FILE, (VALUE)), \ | |
1829 | fprintf (FILE, "\n")) | |
1a94ca49 RK |
1830 | |
1831 | /* This is how to output an assembler line defining a `long' constant. */ | |
1832 | ||
1833 | #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \ | |
1834 | ( fprintf (FILE, "\t.quad "), \ | |
1835 | output_addr_const (FILE, (VALUE)), \ | |
1836 | fprintf (FILE, "\n")) | |
1837 | ||
1838 | /* Likewise for `char' and `short' constants. */ | |
1839 | ||
1840 | #define ASM_OUTPUT_SHORT(FILE,VALUE) \ | |
690ef02f | 1841 | fprintf (FILE, "\t.word %d\n", \ |
45c45e79 RK |
1842 | (GET_CODE (VALUE) == CONST_INT \ |
1843 | ? INTVAL (VALUE) & 0xffff : (abort (), 0))) | |
1a94ca49 RK |
1844 | |
1845 | #define ASM_OUTPUT_CHAR(FILE,VALUE) \ | |
45c45e79 RK |
1846 | fprintf (FILE, "\t.byte %d\n", \ |
1847 | (GET_CODE (VALUE) == CONST_INT \ | |
1848 | ? INTVAL (VALUE) & 0xff : (abort (), 0))) | |
1a94ca49 RK |
1849 | |
1850 | /* We use the default ASCII-output routine, except that we don't write more | |
1851 | than 50 characters since the assembler doesn't support very long lines. */ | |
1852 | ||
1853 | #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \ | |
1854 | do { \ | |
1855 | FILE *_hide_asm_out_file = (MYFILE); \ | |
1856 | unsigned char *_hide_p = (unsigned char *) (MYSTRING); \ | |
1857 | int _hide_thissize = (MYLENGTH); \ | |
1858 | int _size_so_far = 0; \ | |
1859 | { \ | |
1860 | FILE *asm_out_file = _hide_asm_out_file; \ | |
1861 | unsigned char *p = _hide_p; \ | |
1862 | int thissize = _hide_thissize; \ | |
1863 | int i; \ | |
1864 | fprintf (asm_out_file, "\t.ascii \""); \ | |
1865 | \ | |
1866 | for (i = 0; i < thissize; i++) \ | |
1867 | { \ | |
1868 | register int c = p[i]; \ | |
1869 | \ | |
1870 | if (_size_so_far ++ > 50 && i < thissize - 4) \ | |
1871 | _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ | |
1872 | \ | |
1873 | if (c == '\"' || c == '\\') \ | |
1874 | putc ('\\', asm_out_file); \ | |
1875 | if (c >= ' ' && c < 0177) \ | |
1876 | putc (c, asm_out_file); \ | |
1877 | else \ | |
1878 | { \ | |
1879 | fprintf (asm_out_file, "\\%o", c); \ | |
1880 | /* After an octal-escape, if a digit follows, \ | |
1881 | terminate one string constant and start another. \ | |
1882 | The Vax assembler fails to stop reading the escape \ | |
1883 | after three digits, so this is the only way we \ | |
1884 | can get it to parse the data properly. */ \ | |
1885 | if (i < thissize - 1 \ | |
1886 | && p[i + 1] >= '0' && p[i + 1] <= '9') \ | |
b2d5e311 | 1887 | _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \ |
1a94ca49 RK |
1888 | } \ |
1889 | } \ | |
1890 | fprintf (asm_out_file, "\"\n"); \ | |
1891 | } \ | |
1892 | } \ | |
1893 | while (0) | |
52a69200 | 1894 | |
1a94ca49 RK |
1895 | /* This is how to output an insn to push a register on the stack. |
1896 | It need not be very fast code. */ | |
1897 | ||
1898 | #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \ | |
1899 | fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \ | |
1900 | (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ | |
1901 | (REGNO) & 31); | |
1902 | ||
1903 | /* This is how to output an insn to pop a register from the stack. | |
1904 | It need not be very fast code. */ | |
1905 | ||
1906 | #define ASM_OUTPUT_REG_POP(FILE,REGNO) \ | |
1907 | fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \ | |
1908 | (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \ | |
1909 | (REGNO) & 31); | |
1910 | ||
1911 | /* This is how to output an assembler line for a numeric constant byte. */ | |
1912 | ||
1913 | #define ASM_OUTPUT_BYTE(FILE,VALUE) \ | |
45c45e79 | 1914 | fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff) |
1a94ca49 | 1915 | |
260ced47 RK |
1916 | /* This is how to output an element of a case-vector that is absolute. |
1917 | (Alpha does not use such vectors, but we must define this macro anyway.) */ | |
1a94ca49 | 1918 | |
260ced47 | 1919 | #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort () |
1a94ca49 | 1920 | |
260ced47 | 1921 | /* This is how to output an element of a case-vector that is relative. */ |
1a94ca49 | 1922 | |
0076aa6b | 1923 | #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \ |
e7a2eff8 RK |
1924 | fprintf (FILE, "\t.%s $%d\n", TARGET_WINDOWS_NT ? "long" : "gprel32", \ |
1925 | (VALUE) + 32) | |
1a94ca49 RK |
1926 | |
1927 | /* This is how to output an assembler line | |
1928 | that says to advance the location counter | |
1929 | to a multiple of 2**LOG bytes. */ | |
1930 | ||
1931 | #define ASM_OUTPUT_ALIGN(FILE,LOG) \ | |
1932 | if ((LOG) != 0) \ | |
1933 | fprintf (FILE, "\t.align %d\n", LOG); | |
1934 | ||
1935 | /* This is how to advance the location counter by SIZE bytes. */ | |
1936 | ||
1937 | #define ASM_OUTPUT_SKIP(FILE,SIZE) \ | |
1938 | fprintf (FILE, "\t.space %d\n", (SIZE)) | |
1939 | ||
1940 | /* This says how to output an assembler line | |
1941 | to define a global common symbol. */ | |
1942 | ||
1943 | #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ | |
1944 | ( fputs ("\t.comm ", (FILE)), \ | |
1945 | assemble_name ((FILE), (NAME)), \ | |
1946 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1947 | ||
1948 | /* This says how to output an assembler line | |
1949 | to define a local common symbol. */ | |
1950 | ||
1951 | #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \ | |
1952 | ( fputs ("\t.lcomm ", (FILE)), \ | |
1953 | assemble_name ((FILE), (NAME)), \ | |
1954 | fprintf ((FILE), ",%d\n", (SIZE))) | |
1955 | ||
1956 | /* Store in OUTPUT a string (made with alloca) containing | |
1957 | an assembler-name for a local static variable named NAME. | |
1958 | LABELNO is an integer which is different for each call. */ | |
1959 | ||
1960 | #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \ | |
1961 | ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \ | |
1962 | sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO))) | |
1963 | ||
1964 | /* Define the parentheses used to group arithmetic operations | |
1965 | in assembler code. */ | |
1966 | ||
1967 | #define ASM_OPEN_PAREN "(" | |
1968 | #define ASM_CLOSE_PAREN ")" | |
1969 | ||
1970 | /* Define results of standard character escape sequences. */ | |
1971 | #define TARGET_BELL 007 | |
1972 | #define TARGET_BS 010 | |
1973 | #define TARGET_TAB 011 | |
1974 | #define TARGET_NEWLINE 012 | |
1975 | #define TARGET_VT 013 | |
1976 | #define TARGET_FF 014 | |
1977 | #define TARGET_CR 015 | |
1978 | ||
1979 | /* Print operand X (an rtx) in assembler syntax to file FILE. | |
1980 | CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified. | |
1981 | For `%' followed by punctuation, CODE is the punctuation and X is null. */ | |
1982 | ||
1983 | #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) | |
1984 | ||
1985 | /* Determine which codes are valid without a following integer. These must | |
2bf6230d RK |
1986 | not be alphabetic (the characters are chosen so that |
1987 | PRINT_OPERAND_PUNCT_VALID_P translates into a simple range change when | |
1988 | using ASCII). | |
1989 | ||
1990 | & Generates fp-rounding mode suffix: nothing for normal, 'c' for | |
1991 | chopped, 'm' for minus-infinity, and 'd' for dynamic rounding | |
1992 | mode. alpha_fprm controls which suffix is generated. | |
1993 | ||
1994 | ' Generates trap-mode suffix for instructions that accept the | |
1995 | su suffix only (cmpt et al). | |
1996 | ||
1997 | ) Generates trap-mode suffix for instructions that accept the | |
1998 | u, su, and sui suffix. This is the bulk of the IEEE floating | |
1999 | point instructions (addt et al). | |
2000 | ||
2001 | + Generates trap-mode suffix for instructions that accept the | |
2002 | sui suffix (cvtqt and cvtqs). | |
2003 | */ | |
1a94ca49 | 2004 | |
2bf6230d RK |
2005 | #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ |
2006 | ((CODE) == '&' || (CODE) == '\'' || (CODE) == ')' || (CODE) == '+') | |
1a94ca49 RK |
2007 | \f |
2008 | /* Print a memory address as an operand to reference that memory location. */ | |
2009 | ||
2010 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ | |
2011 | { rtx addr = (ADDR); \ | |
2012 | int basereg = 31; \ | |
2013 | HOST_WIDE_INT offset = 0; \ | |
2014 | \ | |
2015 | if (GET_CODE (addr) == AND) \ | |
2016 | addr = XEXP (addr, 0); \ | |
2017 | \ | |
2018 | if (GET_CODE (addr) == REG) \ | |
2019 | basereg = REGNO (addr); \ | |
2020 | else if (GET_CODE (addr) == CONST_INT) \ | |
2021 | offset = INTVAL (addr); \ | |
2022 | else if (GET_CODE (addr) == PLUS \ | |
2023 | && GET_CODE (XEXP (addr, 0)) == REG \ | |
2024 | && GET_CODE (XEXP (addr, 1)) == CONST_INT) \ | |
2025 | basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \ | |
2026 | else \ | |
2027 | abort (); \ | |
2028 | \ | |
2029 | fprintf (FILE, "%d($%d)", offset, basereg); \ | |
2030 | } | |
2031 | /* Define the codes that are matched by predicates in alpha.c. */ | |
2032 | ||
2033 | #define PREDICATE_CODES \ | |
2034 | {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ | |
4a1d2a46 | 2035 | {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \ |
1a94ca49 | 2036 | {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \ |
9e2befc2 | 2037 | {"cint8_operand", {CONST_INT}}, \ |
1a94ca49 RK |
2038 | {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \ |
2039 | {"add_operand", {SUBREG, REG, CONST_INT}}, \ | |
2040 | {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \ | |
2041 | {"const48_operand", {CONST_INT}}, \ | |
2042 | {"and_operand", {SUBREG, REG, CONST_INT}}, \ | |
8395de26 | 2043 | {"or_operand", {SUBREG, REG, CONST_INT}}, \ |
1a94ca49 RK |
2044 | {"mode_mask_operand", {CONST_INT}}, \ |
2045 | {"mul8_operand", {CONST_INT}}, \ | |
2046 | {"mode_width_operand", {CONST_INT}}, \ | |
2047 | {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ | |
2048 | {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ | |
2049 | {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ | |
f8634644 | 2050 | {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ |
1a94ca49 | 2051 | {"fp0_operand", {CONST_DOUBLE}}, \ |
f8634644 | 2052 | {"current_file_function_operand", {SYMBOL_REF}}, \ |
ac030a7b | 2053 | {"call_operand", {REG, SYMBOL_REF}}, \ |
1a94ca49 RK |
2054 | {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ |
2055 | SYMBOL_REF, CONST, LABEL_REF}}, \ | |
4e26af5f RK |
2056 | {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ |
2057 | SYMBOL_REF, CONST, LABEL_REF}}, \ | |
1a94ca49 RK |
2058 | {"aligned_memory_operand", {MEM}}, \ |
2059 | {"unaligned_memory_operand", {MEM}}, \ | |
442b1685 | 2060 | {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \ |
1a94ca49 | 2061 | {"any_memory_operand", {MEM}}, |
03f8c4cc | 2062 | \f |
34fa88ab RK |
2063 | /* Tell collect that the object format is ECOFF. */ |
2064 | #define OBJECT_FORMAT_COFF | |
2065 | #define EXTENDED_COFF | |
2066 | ||
2067 | /* If we use NM, pass -g to it so it only lists globals. */ | |
2068 | #define NM_FLAGS "-pg" | |
2069 | ||
03f8c4cc RK |
2070 | /* Definitions for debugging. */ |
2071 | ||
2072 | #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */ | |
2073 | #define DBX_DEBUGGING_INFO /* generate embedded stabs */ | |
2074 | #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */ | |
2075 | ||
2076 | #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */ | |
52a69200 RK |
2077 | #define PREFERRED_DEBUGGING_TYPE \ |
2078 | ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG) | |
03f8c4cc RK |
2079 | #endif |
2080 | ||
2081 | ||
2082 | /* Correct the offset of automatic variables and arguments. Note that | |
2083 | the Alpha debug format wants all automatic variables and arguments | |
2084 | to be in terms of two different offsets from the virtual frame pointer, | |
2085 | which is the stack pointer before any adjustment in the function. | |
2086 | The offset for the argument pointer is fixed for the native compiler, | |
2087 | it is either zero (for the no arguments case) or large enough to hold | |
2088 | all argument registers. | |
2089 | The offset for the auto pointer is the fourth argument to the .frame | |
2090 | directive (local_offset). | |
2091 | To stay compatible with the native tools we use the same offsets | |
2092 | from the virtual frame pointer and adjust the debugger arg/auto offsets | |
2093 | accordingly. These debugger offsets are set up in output_prolog. */ | |
2094 | ||
9a0b18f2 RK |
2095 | extern long alpha_arg_offset; |
2096 | extern long alpha_auto_offset; | |
03f8c4cc RK |
2097 | #define DEBUGGER_AUTO_OFFSET(X) \ |
2098 | ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) | |
2099 | #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) | |
2100 | ||
2101 | ||
2102 | #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \ | |
2103 | alpha_output_lineno (STREAM, LINE) | |
2104 | extern void alpha_output_lineno (); | |
2105 | ||
2106 | #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \ | |
2107 | alpha_output_filename (STREAM, NAME) | |
2108 | extern void alpha_output_filename (); | |
2109 | ||
2110 | ||
ab8b8941 RK |
2111 | /* mips-tfile.c limits us to strings of one page. */ |
2112 | #define DBX_CONTIN_LENGTH 4000 | |
03f8c4cc RK |
2113 | |
2114 | /* By default, turn on GDB extensions. */ | |
2115 | #define DEFAULT_GDB_EXTENSIONS 1 | |
2116 | ||
7aadc7c2 RK |
2117 | /* Stabs-in-ECOFF can't handle dbxout_function_end(). */ |
2118 | #define NO_DBX_FUNCTION_END 1 | |
2119 | ||
03f8c4cc RK |
2120 | /* If we are smuggling stabs through the ALPHA ECOFF object |
2121 | format, put a comment in front of the .stab<x> operation so | |
2122 | that the ALPHA assembler does not choke. The mips-tfile program | |
2123 | will correctly put the stab into the object file. */ | |
2124 | ||
2125 | #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs") | |
2126 | #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn") | |
2127 | #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd") | |
2128 | ||
2129 | /* Forward references to tags are allowed. */ | |
2130 | #define SDB_ALLOW_FORWARD_REFERENCES | |
2131 | ||
2132 | /* Unknown tags are also allowed. */ | |
2133 | #define SDB_ALLOW_UNKNOWN_REFERENCES | |
2134 | ||
2135 | #define PUT_SDB_DEF(a) \ | |
2136 | do { \ | |
2137 | fprintf (asm_out_file, "\t%s.def\t", \ | |
2138 | (TARGET_GAS) ? "" : "#"); \ | |
2139 | ASM_OUTPUT_LABELREF (asm_out_file, a); \ | |
2140 | fputc (';', asm_out_file); \ | |
2141 | } while (0) | |
2142 | ||
2143 | #define PUT_SDB_PLAIN_DEF(a) \ | |
2144 | do { \ | |
2145 | fprintf (asm_out_file, "\t%s.def\t.%s;", \ | |
2146 | (TARGET_GAS) ? "" : "#", (a)); \ | |
2147 | } while (0) | |
2148 | ||
2149 | #define PUT_SDB_TYPE(a) \ | |
2150 | do { \ | |
2151 | fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \ | |
2152 | } while (0) | |
2153 | ||
2154 | /* For block start and end, we create labels, so that | |
2155 | later we can figure out where the correct offset is. | |
2156 | The normal .ent/.end serve well enough for functions, | |
2157 | so those are just commented out. */ | |
2158 | ||
2159 | extern int sdb_label_count; /* block start/end next label # */ | |
2160 | ||
2161 | #define PUT_SDB_BLOCK_START(LINE) \ | |
2162 | do { \ | |
2163 | fprintf (asm_out_file, \ | |
2164 | "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \ | |
2165 | sdb_label_count, \ | |
2166 | (TARGET_GAS) ? "" : "#", \ | |
2167 | sdb_label_count, \ | |
2168 | (LINE)); \ | |
2169 | sdb_label_count++; \ | |
2170 | } while (0) | |
2171 | ||
2172 | #define PUT_SDB_BLOCK_END(LINE) \ | |
2173 | do { \ | |
2174 | fprintf (asm_out_file, \ | |
2175 | "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \ | |
2176 | sdb_label_count, \ | |
2177 | (TARGET_GAS) ? "" : "#", \ | |
2178 | sdb_label_count, \ | |
2179 | (LINE)); \ | |
2180 | sdb_label_count++; \ | |
2181 | } while (0) | |
2182 | ||
2183 | #define PUT_SDB_FUNCTION_START(LINE) | |
2184 | ||
2185 | #define PUT_SDB_FUNCTION_END(LINE) | |
2186 | ||
2187 | #define PUT_SDB_EPILOGUE_END(NAME) | |
2188 | ||
7bd7a756 RK |
2189 | /* No point in running CPP on our assembler output. */ |
2190 | #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0 | |
2191 | /* Don't pass -g to GNU as, because some versions don't accept this option. */ | |
2192 | #define ASM_SPEC "%{malpha-as:-g} -nocpp %{pg}" | |
2193 | #else | |
2194 | /* In OSF/1 v3.2c, the assembler by default does not output file names which | |
2195 | causes mips-tfile to fail. Passing -g to the assembler fixes this problem. | |
2196 | ??? Stricly speaking, we only need -g if the user specifies -g. Passing | |
2197 | it always means that we get slightly larger than necessary object files | |
2198 | if the user does not specify -g. If we don't pass -g, then mips-tfile | |
2199 | will need to be fixed to work in this case. */ | |
2200 | #define ASM_SPEC "%{!mgas:-g} -nocpp %{pg}" | |
2201 | #endif | |
2202 | ||
03f8c4cc RK |
2203 | /* Specify to run a post-processor, mips-tfile after the assembler |
2204 | has run to stuff the ecoff debug information into the object file. | |
2205 | This is needed because the Alpha assembler provides no way | |
2206 | of specifying such information in the assembly file. */ | |
2207 | ||
88681624 | 2208 | #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0 |
03f8c4cc RK |
2209 | |
2210 | #define ASM_FINAL_SPEC "\ | |
2211 | %{malpha-as: %{!mno-mips-tfile: \ | |
2212 | \n mips-tfile %{v*: -v} \ | |
2213 | %{K: -I %b.o~} \ | |
2214 | %{!K: %{save-temps: -I %b.o~}} \ | |
2215 | %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ | |
2216 | %{.s:%i} %{!.s:%g.s}}}" | |
2217 | ||
2218 | #else | |
2219 | #define ASM_FINAL_SPEC "\ | |
2220 | %{!mgas: %{!mno-mips-tfile: \ | |
2221 | \n mips-tfile %{v*: -v} \ | |
2222 | %{K: -I %b.o~} \ | |
2223 | %{!K: %{save-temps: -I %b.o~}} \ | |
2224 | %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \ | |
2225 | %{.s:%i} %{!.s:%g.s}}}" | |
2226 | ||
2227 | #endif | |
2228 | ||
2229 | /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for | |
2230 | mips-tdump.c to print them out. | |
2231 | ||
2232 | These must match the corresponding definitions in gdb/mipsread.c. | |
2233 | Unfortunately, gcc and gdb do not currently share any directories. */ | |
2234 | ||
2235 | #define CODE_MASK 0x8F300 | |
2236 | #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) | |
2237 | #define MIPS_MARK_STAB(code) ((code)+CODE_MASK) | |
2238 | #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) | |
2239 | ||
2240 | /* Override some mips-tfile definitions. */ | |
2241 | ||
2242 | #define SHASH_SIZE 511 | |
2243 | #define THASH_SIZE 55 | |
1e6c6f11 RK |
2244 | |
2245 | /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */ | |
2246 | ||
2247 | #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7) | |
2f55b70b JM |
2248 | |
2249 | /* The system headers under OSF/1 are C++-aware. */ | |
2250 | #define NO_IMPLICIT_EXTERN_C | |
54190234 JM |
2251 | |
2252 | /* The linker will stick __main into the .init section. */ | |
2253 | #define HAS_INIT_SECTION | |
68d69835 JM |
2254 | #define LD_INIT_SWITCH "-init" |
2255 | #define LD_FINI_SWITCH "-fini" |