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c5986054 1/* Save and restore call-clobbered registers which are live across a call.
54bd7fd4 2 Copyright (C) 1989, 1992, 1994 Free Software Foundation, Inc.
c5986054
RS
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20#include "config.h"
21#include "rtl.h"
22#include "insn-config.h"
23#include "flags.h"
24#include "regs.h"
25#include "hard-reg-set.h"
26#include "recog.h"
27#include "basic-block.h"
28#include "reload.h"
29#include "expr.h"
30
dc17cfda
DE
31#ifndef MAX_MOVE_MAX
32#define MAX_MOVE_MAX MOVE_MAX
33#endif
34
35#ifndef MAX_UNITS_PER_WORD
36#define MAX_UNITS_PER_WORD UNITS_PER_WORD
37#endif
38
f95361c8
JL
39/* Modes for each hard register that we can save. The smallest mode is wide
40 enough to save the entire contents of the register. When saving the
41 register because it is live we first try to save in multi-register modes.
42 If that is not possible the save is done one register at a time. */
c5986054 43
f95361c8 44static enum machine_mode
dc17cfda 45 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1];
c5986054
RS
46
47/* For each hard register, a place on the stack where it can be saved,
48 if needed. */
49
f95361c8 50static rtx
dc17cfda 51 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1];
c5986054
RS
52
53/* We will only make a register eligible for caller-save if it can be
54 saved in its widest mode with a simple SET insn as long as the memory
55 address is valid. We record the INSN_CODE is those insns here since
56 when we emit them, the addresses might not be valid, so they might not
57 be recognized. */
58
f95361c8 59static enum insn_code
dc17cfda 60 reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1];
f95361c8 61static enum insn_code
dc17cfda 62 reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1];
c5986054
RS
63
64/* Set of hard regs currently live (during scan of all insns). */
65
66static HARD_REG_SET hard_regs_live;
67
68/* Set of hard regs currently residing in save area (during insn scan). */
69
70static HARD_REG_SET hard_regs_saved;
71
f95361c8
JL
72/* Set of hard regs which need to be restored before referenced. */
73
74static HARD_REG_SET hard_regs_need_restore;
75
c5986054
RS
76/* Number of registers currently in hard_regs_saved. */
77
78int n_regs_saved;
79
c1f04022
RK
80static enum machine_mode choose_hard_reg_mode PROTO((int, int));
81static void set_reg_live PROTO((rtx, rtx));
82static void clear_reg_live PROTO((rtx));
83static void restore_referenced_regs PROTO((rtx, rtx, enum machine_mode));
84static int insert_save_restore PROTO((rtx, int, int,
85 enum machine_mode, int));
c5986054
RS
86\f
87/* Return a machine mode that is legitimate for hard reg REGNO and large
f95361c8 88 enough to save nregs. If we can't find one, return VOIDmode. */
c5986054
RS
89
90static enum machine_mode
f95361c8 91choose_hard_reg_mode (regno, nregs)
c5986054 92 int regno;
c1f04022 93 int nregs;
c5986054
RS
94{
95 enum machine_mode found_mode = VOIDmode, mode;
96
97 /* We first look for the largest integer mode that can be validly
98 held in REGNO. If none, we look for the largest floating-point mode.
99 If we still didn't find a valid mode, try CCmode. */
100
101 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
102 mode = GET_MODE_WIDER_MODE (mode))
f95361c8 103 if (HARD_REGNO_NREGS (regno, mode) == nregs
c5986054
RS
104 && HARD_REGNO_MODE_OK (regno, mode))
105 found_mode = mode;
106
107 if (found_mode != VOIDmode)
108 return found_mode;
109
110 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
111 mode = GET_MODE_WIDER_MODE (mode))
f95361c8 112 if (HARD_REGNO_NREGS (regno, mode) == nregs
c5986054
RS
113 && HARD_REGNO_MODE_OK (regno, mode))
114 found_mode = mode;
115
116 if (found_mode != VOIDmode)
117 return found_mode;
118
f95361c8 119 if (HARD_REGNO_NREGS (regno, CCmode) == nregs
c5986054
RS
120 && HARD_REGNO_MODE_OK (regno, CCmode))
121 return CCmode;
122
123 /* We can't find a mode valid for this register. */
124 return VOIDmode;
125}
126\f
127/* Initialize for caller-save.
128
129 Look at all the hard registers that are used by a call and for which
130 regclass.c has not already excluded from being used across a call.
131
132 Ensure that we can find a mode to save the register and that there is a
133 simple insn to save and restore the register. This latter check avoids
134 problems that would occur if we tried to save the MQ register of some
135 machines directly into memory. */
136
137void
138init_caller_save ()
139{
140 char *first_obj = (char *) oballoc (0);
141 rtx addr_reg;
142 int offset;
143 rtx address;
f95361c8 144 int i, j;
c5986054
RS
145
146 /* First find all the registers that we need to deal with and all
147 the modes that they can have. If we can't find a mode to use,
148 we can't have the register live over calls. */
149
150 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
151 {
152 if (call_used_regs[i] && ! call_fixed_regs[i])
153 {
f95361c8 154 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
c5986054 155 {
f95361c8
JL
156 regno_save_mode[i][j] = choose_hard_reg_mode (i, j);
157 if (regno_save_mode[i][j] == VOIDmode && j == 1)
158 {
159 call_fixed_regs[i] = 1;
160 SET_HARD_REG_BIT (call_fixed_reg_set, i);
161 }
c5986054
RS
162 }
163 }
164 else
f95361c8 165 regno_save_mode[i][1] = VOIDmode;
c5986054
RS
166 }
167
168 /* The following code tries to approximate the conditions under which
169 we can easily save and restore a register without scratch registers or
170 other complexities. It will usually work, except under conditions where
171 the validity of an insn operand is dependent on the address offset.
172 No such cases are currently known.
173
174 We first find a typical offset from some BASE_REG_CLASS register.
175 This address is chosen by finding the first register in the class
176 and by finding the smallest power of two that is a valid offset from
177 that register in every mode we will use to save registers. */
178
179 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
180 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
181 break;
182
183 if (i == FIRST_PSEUDO_REGISTER)
184 abort ();
185
186 addr_reg = gen_rtx (REG, Pmode, i);
187
188 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
189 {
3245eea0 190 address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset));
c5986054
RS
191
192 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
193 if (regno_save_mode[i][1] != VOIDmode
194 && ! strict_memory_address_p (regno_save_mode[i][1], address))
c5986054
RS
195 break;
196
197 if (i == FIRST_PSEUDO_REGISTER)
198 break;
199 }
200
201 /* If we didn't find a valid address, we must use register indirect. */
202 if (offset == 0)
203 address = addr_reg;
204
205 /* Next we try to form an insn to save and restore the register. We
206 see if such an insn is recognized and meets its constraints. */
207
208 start_sequence ();
209
210 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
211 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
212 if (regno_save_mode[i][j] != VOIDmode)
213 {
214 rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address);
215 rtx reg = gen_rtx (REG, regno_save_mode[i][j], i);
216 rtx savepat = gen_rtx (SET, VOIDmode, mem, reg);
217 rtx restpat = gen_rtx (SET, VOIDmode, reg, mem);
218 rtx saveinsn = emit_insn (savepat);
219 rtx restinsn = emit_insn (restpat);
220 int ok;
221
222 reg_save_code[i][j] = recog_memoized (saveinsn);
223 reg_restore_code[i][j] = recog_memoized (restinsn);
224
225 /* Now extract both insns and see if we can meet their constraints. */
226 ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1);
227 if (ok)
228 {
229 insn_extract (saveinsn);
230 ok = constrain_operands (reg_save_code[i][j], 1);
231 insn_extract (restinsn);
232 ok &= constrain_operands (reg_restore_code[i][j], 1);
233 }
c5986054 234
c515799c
JL
235 if (! ok)
236 {
237 regno_save_mode[i][j] = VOIDmode;
238 if (j == 1)
239 {
240 call_fixed_regs[i] = 1;
241 SET_HARD_REG_BIT (call_fixed_reg_set, i);
242 }
243 }
c5986054
RS
244 }
245
246 end_sequence ();
247
248 obfree (first_obj);
249}
250\f
251/* Initialize save areas by showing that we haven't allocated any yet. */
252
253void
254init_save_areas ()
255{
f95361c8 256 int i, j;
c5986054
RS
257
258 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
259 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
260 regno_save_mem[i][j] = 0;
c5986054
RS
261}
262
263/* Allocate save areas for any hard registers that might need saving.
264 We take a conservative approach here and look for call-clobbered hard
265 registers that are assigned to pseudos that cross calls. This may
266 overestimate slightly (especially if some of these registers are later
267 used as spill registers), but it should not be significant.
268
269 Then perform register elimination in the addresses of the save area
270 locations; return 1 if all eliminated addresses are strictly valid.
271 We assume that our caller has set up the elimination table to the
272 worst (largest) possible offsets.
273
f95361c8
JL
274 Set *PCHANGED to 1 if we had to allocate some memory for the save area.
275
276 Future work:
277
278 In the fallback case we should iterate backwards across all possible
279 modes for the save, choosing the largest available one instead of
280 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
281
282 We do not try to use "move multiple" instructions that exist
283 on some machines (such as the 68k moveml). It could be a win to try
284 and use them when possible. The hard part is doing it in a way that is
285 machine independent since they might be saving non-consecutive
286 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
c5986054
RS
287
288int
289setup_save_areas (pchanged)
290 int *pchanged;
291{
f95361c8
JL
292 int i, j, k;
293 HARD_REG_SET hard_regs_used;
c5986054 294 int ok = 1;
c5986054 295
f95361c8
JL
296
297 /* Allocate space in the save area for the largest multi-register
298 pseudos first, then work backwards to single register
299 pseudos. */
300
301 /* Find and record all call-used hard-registers in this function. */
302 CLEAR_HARD_REG_SET (hard_regs_used);
c5986054
RS
303 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
304 if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0)
305 {
306 int regno = reg_renumber[i];
f95361c8 307 int endregno
c5986054 308 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
f95361c8 309 int nregs = endregno - regno;
c5986054 310
f95361c8
JL
311 for (j = 0; j < nregs; j++)
312 {
313 if (call_used_regs[regno+j])
314 SET_HARD_REG_BIT (hard_regs_used, regno+j);
315 }
316 }
317
318 /* Now run through all the call-used hard-registers and allocate
319 space for them in the caller-save area. Try to allocate space
320 in a manner which allows multi-register saves/restores to be done. */
321
322 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
323 for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--)
324 {
325 int ok = 1;
b5c2c9bc 326 int do_save;
f95361c8
JL
327
328 /* If no mode exists for this size, try another. Also break out
329 if we have already saved this hard register. */
330 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
331 continue;
332
b5c2c9bc
RK
333 /* See if any register in this group has been saved. */
334 do_save = 1;
335 for (k = 0; k < j; k++)
336 if (regno_save_mem[i + k][1])
337 {
338 do_save = 0;
339 break;
340 }
341 if (! do_save)
342 continue;
343
f95361c8 344 for (k = 0; k < j; k++)
c5986054 345 {
f95361c8
JL
346 int regno = i + k;
347 ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0);
c5986054 348 }
f95361c8
JL
349
350 /* We have found an acceptable mode to store in. */
351 if (ok)
352 {
353
354 regno_save_mem[i][j]
355 = assign_stack_local (regno_save_mode[i][j],
356 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
357
39fa3485 358 /* Setup single word save area just in case... */
f95361c8
JL
359 for (k = 0; k < j; k++)
360 {
39fa3485
RS
361 /* This should not depend on WORDS_BIG_ENDIAN.
362 The order of words in regs is the same as in memory. */
363 rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1],
364 XEXP (regno_save_mem[i][j], 0));
f95361c8 365
f95361c8 366 regno_save_mem[i+k][1]
39fa3485 367 = adj_offsettable_operand (temp, k * UNITS_PER_WORD);
f95361c8
JL
368 }
369 *pchanged = 1;
370 }
c5986054
RS
371 }
372
373 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
374 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
375 if (regno_save_mem[i][j] != 0)
376 ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]),
377 XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0));
c5986054
RS
378
379 return ok;
380}
381\f
382/* Find the places where hard regs are live across calls and save them.
383
384 INSN_MODE is the mode to assign to any insns that we add. This is used
385 by reload to determine whether or not reloads or register eliminations
386 need be done on these insns. */
387
388void
389save_call_clobbered_regs (insn_mode)
390 enum machine_mode insn_mode;
391{
392 rtx insn;
393 int b;
394
395 for (b = 0; b < n_basic_blocks; b++)
396 {
397 regset regs_live = basic_block_live_at_start[b];
34536f93 398 rtx prev_block_last = PREV_INSN (basic_block_head[b]);
3245eea0
CH
399 REGSET_ELT_TYPE bit;
400 int offset, i, j;
c5986054
RS
401 int regno;
402
403 /* Compute hard regs live at start of block -- this is the
404 real hard regs marked live, plus live pseudo regs that
405 have been renumbered to hard regs. No registers have yet been
406 saved because we restore all of them before the end of the basic
407 block. */
408
54bd7fd4 409 COPY_HARD_REG_SET (hard_regs_live, *regs_live);
c5986054
RS
410
411 CLEAR_HARD_REG_SET (hard_regs_saved);
f95361c8 412 CLEAR_HARD_REG_SET (hard_regs_need_restore);
c5986054
RS
413 n_regs_saved = 0;
414
415 for (offset = 0, i = 0; offset < regset_size; offset++)
416 {
417 if (regs_live[offset] == 0)
3245eea0 418 i += REGSET_ELT_BITS;
c5986054
RS
419 else
420 for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
421 if ((regs_live[offset] & bit)
422 && (regno = reg_renumber[i]) >= 0)
423 for (j = regno;
424 j < regno + HARD_REGNO_NREGS (regno,
425 PSEUDO_REGNO_MODE (i));
426 j++)
427 SET_HARD_REG_BIT (hard_regs_live, j);
f95361c8 428
c5986054
RS
429 }
430
431 /* Now scan the insns in the block, keeping track of what hard
432 regs are live as we go. When we see a call, save the live
433 call-clobbered hard regs. */
434
435 for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn))
436 {
437 RTX_CODE code = GET_CODE (insn);
438
439 if (GET_RTX_CLASS (code) == 'i')
440 {
441 rtx link;
442
443 /* If some registers have been saved, see if INSN references
444 any of them. We must restore them before the insn if so. */
445
446 if (n_regs_saved)
447 restore_referenced_regs (PATTERN (insn), insn, insn_mode);
448
449 /* NB: the normal procedure is to first enliven any
450 registers set by insn, then deaden any registers that
451 had their last use at insn. This is incorrect now,
452 since multiple pseudos may have been mapped to the
453 same hard reg, and the death notes are ambiguous. So
454 it must be done in the other, safe, order. */
455
456 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
457 if (REG_NOTE_KIND (link) == REG_DEAD)
458 clear_reg_live (XEXP (link, 0));
459
460 /* When we reach a call, we need to save all registers that are
461 live, call-used, not fixed, and not already saved. We must
462 test at this point because registers that die in a CALL_INSN
463 are not live across the call and likewise for registers that
464 are born in the CALL_INSN. */
465
466 if (code == CALL_INSN)
f95361c8
JL
467 {
468 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
469 if (call_used_regs[regno] && ! call_fixed_regs[regno]
470 && TEST_HARD_REG_BIT (hard_regs_live, regno)
471 && ! TEST_HARD_REG_BIT (hard_regs_saved, regno))
472 regno += insert_save_restore (insn, 1, regno,
473 insn_mode, 0);
474#ifdef HARD_REG_SET
475 hard_regs_need_restore = hard_regs_saved;
476#else
477 COPY_HARD_REG_SET (hard_regs_need_restore,
478 hard_regs_saved);
479#endif
480
481 /* Must recompute n_regs_saved. */
482 n_regs_saved = 0;
483 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
484 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
485 n_regs_saved++;
486
487 }
c5986054
RS
488
489 note_stores (PATTERN (insn), set_reg_live);
490
491 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
492 if (REG_NOTE_KIND (link) == REG_UNUSED)
493 clear_reg_live (XEXP (link, 0));
494 }
495
496 if (insn == basic_block_end[b])
497 break;
498 }
499
500 /* At the end of the basic block, we must restore any registers that
501 remain saved. If the last insn in the block is a JUMP_INSN, put
502 the restore before the insn, otherwise, put it after the insn. */
503
504 if (n_regs_saved)
505 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
f95361c8
JL
506 if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno))
507 regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN
508 ? insn : NEXT_INSN (insn)), 0,
509 regno, insn_mode, MOVE_MAX / UNITS_PER_WORD);
510
34536f93
RS
511 /* If we added any insns at the start of the block, update the start
512 of the block to point at those insns. */
513 basic_block_head[b] = NEXT_INSN (prev_block_last);
c5986054
RS
514 }
515}
516
517/* Here from note_stores when an insn stores a value in a register.
518 Set the proper bit or bits in hard_regs_live. All pseudos that have
519 been assigned hard regs have had their register number changed already,
520 so we can ignore pseudos. */
521
522static void
523set_reg_live (reg, setter)
524 rtx reg, setter;
525{
526 register int regno, endregno, i;
e048626b 527 enum machine_mode mode = GET_MODE (reg);
c5986054
RS
528 int word = 0;
529
530 if (GET_CODE (reg) == SUBREG)
531 {
532 word = SUBREG_WORD (reg);
533 reg = SUBREG_REG (reg);
534 }
535
536 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
537 return;
538
539 regno = REGNO (reg) + word;
e048626b 540 endregno = regno + HARD_REGNO_NREGS (regno, mode);
c5986054
RS
541
542 for (i = regno; i < endregno; i++)
f95361c8
JL
543 {
544 SET_HARD_REG_BIT (hard_regs_live, i);
545 CLEAR_HARD_REG_BIT (hard_regs_saved, i);
546 CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
547 }
c5986054
RS
548}
549
550/* Here when a REG_DEAD note records the last use of a reg. Clear
551 the appropriate bit or bits in hard_regs_live. Again we can ignore
552 pseudos. */
553
554static void
555clear_reg_live (reg)
556 rtx reg;
557{
558 register int regno, endregno, i;
559
560 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
561 return;
562
563 regno = REGNO (reg);
564 endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
565
566 for (i = regno; i < endregno; i++)
f95361c8
JL
567 {
568 CLEAR_HARD_REG_BIT (hard_regs_live, i);
569 CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
570 CLEAR_HARD_REG_BIT (hard_regs_saved, i);
571 }
c5986054
RS
572}
573\f
574/* If any register currently residing in the save area is referenced in X,
575 which is part of INSN, emit code to restore the register in front of INSN.
576 INSN_MODE is the mode to assign to any insns that we add. */
577
578static void
579restore_referenced_regs (x, insn, insn_mode)
580 rtx x;
581 rtx insn;
582 enum machine_mode insn_mode;
583{
584 enum rtx_code code = GET_CODE (x);
585 char *fmt;
586 int i, j;
587
f95361c8
JL
588 if (code == CLOBBER)
589 return;
590
c5986054
RS
591 if (code == REG)
592 {
593 int regno = REGNO (x);
594
595 /* If this is a pseudo, scan its memory location, since it might
596 involve the use of another register, which might be saved. */
597
598 if (regno >= FIRST_PSEUDO_REGISTER
599 && reg_equiv_mem[regno] != 0)
600 restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0),
601 insn, insn_mode);
602 else if (regno >= FIRST_PSEUDO_REGISTER
603 && reg_equiv_address[regno] != 0)
916f14f1 604 restore_referenced_regs (reg_equiv_address[regno],
c5986054
RS
605 insn, insn_mode);
606
607 /* Otherwise if this is a hard register, restore any piece of it that
608 is currently saved. */
609
610 else if (regno < FIRST_PSEUDO_REGISTER)
611 {
73737e86
RS
612 int numregs = HARD_REGNO_NREGS (regno, GET_MODE (x));
613 /* Save at most SAVEREGS at a time. This can not be larger than
614 MOVE_MAX, because that causes insert_save_restore to fail. */
615 int saveregs = MIN (numregs, MOVE_MAX / UNITS_PER_WORD);
19301310 616 int endregno = regno + numregs;
c5986054 617
f95361c8
JL
618 for (i = regno; i < endregno; i++)
619 if (TEST_HARD_REG_BIT (hard_regs_need_restore, i))
73737e86 620 i += insert_save_restore (insn, 0, i, insn_mode, saveregs);
c5986054
RS
621 }
622
623 return;
624 }
625
626 fmt = GET_RTX_FORMAT (code);
627 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
628 {
629 if (fmt[i] == 'e')
630 restore_referenced_regs (XEXP (x, i), insn, insn_mode);
631 else if (fmt[i] == 'E')
632 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
633 restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode);
634 }
635}
636\f
637/* Insert a sequence of insns to save or restore, SAVE_P says which,
638 REGNO. Place these insns in front of INSN. INSN_MODE is the mode
d8ed9afb
JL
639 to assign to these insns. MAXRESTORE is the maximum number of registers
640 which should be restored during this call (when SAVE_P == 0). It should
641 never be less than 1 since we only work with entire registers.
c5986054
RS
642
643 Note that we have verified in init_caller_save that we can do this
644 with a simple SET, so use it. Set INSN_CODE to what we save there
645 since the address might not be valid so the insn might not be recognized.
646 These insns will be reloaded and have register elimination done by
f95361c8 647 find_reload, so we need not worry about that here.
c5986054 648
f95361c8
JL
649 Return the extra number of registers saved. */
650
651static int
652insert_save_restore (insn, save_p, regno, insn_mode, maxrestore)
c5986054
RS
653 rtx insn;
654 int save_p;
655 int regno;
656 enum machine_mode insn_mode;
f95361c8 657 int maxrestore;
c5986054
RS
658{
659 rtx pat;
660 enum insn_code code;
f95361c8 661 int i, numregs;
c5986054 662
09835ed2
RK
663 /* A common failure mode if register status is not correct in the RTL
664 is for this routine to be called with a REGNO we didn't expect to
665 save. That will cause us to write an insn with a (nil) SET_DEST
666 or SET_SRC. Instead of doing so and causing a crash later, check
667 for this common case and abort here instead. This will remove one
668 step in debugging such problems. */
669
f95361c8 670 if (regno_save_mem[regno][1] == 0)
09835ed2
RK
671 abort ();
672
c5986054
RS
673 /* If INSN is a CALL_INSN, we must insert our insns before any
674 USE insns in front of the CALL_INSN. */
675
676 if (GET_CODE (insn) == CALL_INSN)
677 while (GET_CODE (PREV_INSN (insn)) == INSN
678 && GET_CODE (PATTERN (PREV_INSN (insn))) == USE)
679 insn = PREV_INSN (insn);
680
681#ifdef HAVE_cc0
682 /* If INSN references CC0, put our insns in front of the insn that sets
683 CC0. This is always safe, since the only way we could be passed an
684 insn that references CC0 is for a restore, and doing a restore earlier
685 isn't a problem. We do, however, assume here that CALL_INSNs don't
686 reference CC0. Guard against non-INSN's like CODE_LABEL. */
687
688 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
689 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
690 insn = prev_nonnote_insn (insn);
691#endif
692
693 /* Get the pattern to emit and update our status. */
694 if (save_p)
695 {
f95361c8
JL
696 int i, j, k;
697 int ok;
698
699 /* See if we can save several registers with a single instruction.
700 Work backwards to the single register case. */
701 for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--)
702 {
703 ok = 1;
704 if (regno_save_mem[regno][i] != 0)
705 for (j = 0; j < i; j++)
706 {
9233f8ce
RS
707 if (! call_used_regs[regno + j] || call_fixed_regs[regno + j]
708 || ! TEST_HARD_REG_BIT (hard_regs_live, regno + j)
709 || TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
f95361c8
JL
710 ok = 0;
711 }
712 else
713 continue;
714
715 /* Must do this one save at a time */
716 if (! ok)
717 continue;
718
719 pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i],
720 gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno));
721 code = reg_save_code[regno][i];
722
723 /* Set hard_regs_saved for all the registers we saved. */
724 for (k = 0; k < i; k++)
725 {
726 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
727 SET_HARD_REG_BIT (hard_regs_need_restore, regno + k);
728 n_regs_saved++;
729 }
730
731 numregs = i;
732 break;
733 }
c5986054
RS
734 }
735 else
736 {
f95361c8
JL
737 int i, j, k;
738 int ok;
739
740 /* See if we can restore `maxrestore' registers at once. Work
741 backwards to the single register case. */
742 for (i = maxrestore; i > 0; i--)
743 {
744 ok = 1;
745 if (regno_save_mem[regno][i])
746 for (j = 0; j < i; j++)
747 {
748 if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j))
749 ok = 0;
750 }
751 else
752 continue;
753
754 /* Must do this one restore at a time */
755 if (! ok)
756 continue;
757
758 pat = gen_rtx (SET, VOIDmode,
759 gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]),
760 regno),
761 regno_save_mem[regno][i]);
762 code = reg_restore_code[regno][i];
c5986054 763
f95361c8
JL
764
765 /* Clear status for all registers we restored. */
766 for (k = 0; k < i; k++)
767 {
768 CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k);
769 n_regs_saved--;
770 }
771
772 numregs = i;
773 break;
774 }
775 }
c5986054
RS
776 /* Emit the insn and set the code and mode. */
777
778 insn = emit_insn_before (pat, insn);
779 PUT_MODE (insn, insn_mode);
780 INSN_CODE (insn) = code;
f95361c8
JL
781
782 /* Tell our callers how many extra registers we saved/restored */
783 return numregs - 1;
c5986054 784}
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