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c5986054 RS |
1 | /* Save and restore call-clobbered registers which are live across a call. |
2 | Copyright (C) 1989, 1992 Free Software Foundation, Inc. | |
3 | ||
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
18 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
20 | #include "config.h" | |
21 | #include "rtl.h" | |
22 | #include "insn-config.h" | |
23 | #include "flags.h" | |
24 | #include "regs.h" | |
25 | #include "hard-reg-set.h" | |
26 | #include "recog.h" | |
27 | #include "basic-block.h" | |
28 | #include "reload.h" | |
29 | #include "expr.h" | |
30 | ||
d8ed9afb JL |
31 | #define CEIL(x,y) (((x) + (y) - 1) / (y)) |
32 | ||
f95361c8 JL |
33 | /* Modes for each hard register that we can save. The smallest mode is wide |
34 | enough to save the entire contents of the register. When saving the | |
35 | register because it is live we first try to save in multi-register modes. | |
36 | If that is not possible the save is done one register at a time. */ | |
c5986054 | 37 | |
f95361c8 JL |
38 | static enum machine_mode |
39 | regno_save_mode[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1]; | |
c5986054 RS |
40 | |
41 | /* For each hard register, a place on the stack where it can be saved, | |
42 | if needed. */ | |
43 | ||
f95361c8 JL |
44 | static rtx |
45 | regno_save_mem[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1]; | |
c5986054 RS |
46 | |
47 | /* We will only make a register eligible for caller-save if it can be | |
48 | saved in its widest mode with a simple SET insn as long as the memory | |
49 | address is valid. We record the INSN_CODE is those insns here since | |
50 | when we emit them, the addresses might not be valid, so they might not | |
51 | be recognized. */ | |
52 | ||
f95361c8 JL |
53 | static enum insn_code |
54 | reg_save_code[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1]; | |
55 | static enum insn_code | |
56 | reg_restore_code[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1]; | |
c5986054 RS |
57 | |
58 | /* Set of hard regs currently live (during scan of all insns). */ | |
59 | ||
60 | static HARD_REG_SET hard_regs_live; | |
61 | ||
62 | /* Set of hard regs currently residing in save area (during insn scan). */ | |
63 | ||
64 | static HARD_REG_SET hard_regs_saved; | |
65 | ||
f95361c8 JL |
66 | /* Set of hard regs which need to be restored before referenced. */ |
67 | ||
68 | static HARD_REG_SET hard_regs_need_restore; | |
69 | ||
c5986054 RS |
70 | /* Number of registers currently in hard_regs_saved. */ |
71 | ||
72 | int n_regs_saved; | |
73 | ||
74 | static void set_reg_live (); | |
75 | static void clear_reg_live (); | |
76 | static void restore_referenced_regs (); | |
f95361c8 | 77 | static int insert_save_restore (); |
c5986054 RS |
78 | \f |
79 | /* Return a machine mode that is legitimate for hard reg REGNO and large | |
f95361c8 | 80 | enough to save nregs. If we can't find one, return VOIDmode. */ |
c5986054 RS |
81 | |
82 | static enum machine_mode | |
f95361c8 | 83 | choose_hard_reg_mode (regno, nregs) |
c5986054 RS |
84 | int regno; |
85 | { | |
86 | enum machine_mode found_mode = VOIDmode, mode; | |
87 | ||
88 | /* We first look for the largest integer mode that can be validly | |
89 | held in REGNO. If none, we look for the largest floating-point mode. | |
90 | If we still didn't find a valid mode, try CCmode. */ | |
91 | ||
92 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; | |
93 | mode = GET_MODE_WIDER_MODE (mode)) | |
f95361c8 | 94 | if (HARD_REGNO_NREGS (regno, mode) == nregs |
c5986054 RS |
95 | && HARD_REGNO_MODE_OK (regno, mode)) |
96 | found_mode = mode; | |
97 | ||
98 | if (found_mode != VOIDmode) | |
99 | return found_mode; | |
100 | ||
101 | for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; | |
102 | mode = GET_MODE_WIDER_MODE (mode)) | |
f95361c8 | 103 | if (HARD_REGNO_NREGS (regno, mode) == nregs |
c5986054 RS |
104 | && HARD_REGNO_MODE_OK (regno, mode)) |
105 | found_mode = mode; | |
106 | ||
107 | if (found_mode != VOIDmode) | |
108 | return found_mode; | |
109 | ||
f95361c8 | 110 | if (HARD_REGNO_NREGS (regno, CCmode) == nregs |
c5986054 RS |
111 | && HARD_REGNO_MODE_OK (regno, CCmode)) |
112 | return CCmode; | |
113 | ||
114 | /* We can't find a mode valid for this register. */ | |
115 | return VOIDmode; | |
116 | } | |
117 | \f | |
118 | /* Initialize for caller-save. | |
119 | ||
120 | Look at all the hard registers that are used by a call and for which | |
121 | regclass.c has not already excluded from being used across a call. | |
122 | ||
123 | Ensure that we can find a mode to save the register and that there is a | |
124 | simple insn to save and restore the register. This latter check avoids | |
125 | problems that would occur if we tried to save the MQ register of some | |
126 | machines directly into memory. */ | |
127 | ||
128 | void | |
129 | init_caller_save () | |
130 | { | |
131 | char *first_obj = (char *) oballoc (0); | |
132 | rtx addr_reg; | |
133 | int offset; | |
134 | rtx address; | |
f95361c8 | 135 | int i, j; |
c5986054 RS |
136 | |
137 | /* First find all the registers that we need to deal with and all | |
138 | the modes that they can have. If we can't find a mode to use, | |
139 | we can't have the register live over calls. */ | |
140 | ||
141 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
142 | { | |
143 | if (call_used_regs[i] && ! call_fixed_regs[i]) | |
144 | { | |
f95361c8 | 145 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
c5986054 | 146 | { |
f95361c8 JL |
147 | regno_save_mode[i][j] = choose_hard_reg_mode (i, j); |
148 | if (regno_save_mode[i][j] == VOIDmode && j == 1) | |
149 | { | |
150 | call_fixed_regs[i] = 1; | |
151 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
152 | } | |
c5986054 RS |
153 | } |
154 | } | |
155 | else | |
f95361c8 | 156 | regno_save_mode[i][1] = VOIDmode; |
c5986054 RS |
157 | } |
158 | ||
159 | /* The following code tries to approximate the conditions under which | |
160 | we can easily save and restore a register without scratch registers or | |
161 | other complexities. It will usually work, except under conditions where | |
162 | the validity of an insn operand is dependent on the address offset. | |
163 | No such cases are currently known. | |
164 | ||
165 | We first find a typical offset from some BASE_REG_CLASS register. | |
166 | This address is chosen by finding the first register in the class | |
167 | and by finding the smallest power of two that is a valid offset from | |
168 | that register in every mode we will use to save registers. */ | |
169 | ||
170 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
171 | if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i)) | |
172 | break; | |
173 | ||
174 | if (i == FIRST_PSEUDO_REGISTER) | |
175 | abort (); | |
176 | ||
177 | addr_reg = gen_rtx (REG, Pmode, i); | |
178 | ||
179 | for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
180 | { | |
3245eea0 | 181 | address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset)); |
c5986054 RS |
182 | |
183 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
184 | if (regno_save_mode[i][1] != VOIDmode |
185 | && ! strict_memory_address_p (regno_save_mode[i][1], address)) | |
c5986054 RS |
186 | break; |
187 | ||
188 | if (i == FIRST_PSEUDO_REGISTER) | |
189 | break; | |
190 | } | |
191 | ||
192 | /* If we didn't find a valid address, we must use register indirect. */ | |
193 | if (offset == 0) | |
194 | address = addr_reg; | |
195 | ||
196 | /* Next we try to form an insn to save and restore the register. We | |
197 | see if such an insn is recognized and meets its constraints. */ | |
198 | ||
199 | start_sequence (); | |
200 | ||
201 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
202 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
203 | if (regno_save_mode[i][j] != VOIDmode) | |
204 | { | |
205 | rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address); | |
206 | rtx reg = gen_rtx (REG, regno_save_mode[i][j], i); | |
207 | rtx savepat = gen_rtx (SET, VOIDmode, mem, reg); | |
208 | rtx restpat = gen_rtx (SET, VOIDmode, reg, mem); | |
209 | rtx saveinsn = emit_insn (savepat); | |
210 | rtx restinsn = emit_insn (restpat); | |
211 | int ok; | |
212 | ||
213 | reg_save_code[i][j] = recog_memoized (saveinsn); | |
214 | reg_restore_code[i][j] = recog_memoized (restinsn); | |
215 | ||
216 | /* Now extract both insns and see if we can meet their constraints. */ | |
217 | ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1); | |
218 | if (ok) | |
219 | { | |
220 | insn_extract (saveinsn); | |
221 | ok = constrain_operands (reg_save_code[i][j], 1); | |
222 | insn_extract (restinsn); | |
223 | ok &= constrain_operands (reg_restore_code[i][j], 1); | |
224 | } | |
c5986054 | 225 | |
c515799c JL |
226 | if (! ok) |
227 | { | |
228 | regno_save_mode[i][j] = VOIDmode; | |
229 | if (j == 1) | |
230 | { | |
231 | call_fixed_regs[i] = 1; | |
232 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
233 | } | |
234 | } | |
c5986054 RS |
235 | } |
236 | ||
237 | end_sequence (); | |
238 | ||
239 | obfree (first_obj); | |
240 | } | |
241 | \f | |
242 | /* Initialize save areas by showing that we haven't allocated any yet. */ | |
243 | ||
244 | void | |
245 | init_save_areas () | |
246 | { | |
f95361c8 | 247 | int i, j; |
c5986054 RS |
248 | |
249 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
250 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
251 | regno_save_mem[i][j] = 0; | |
c5986054 RS |
252 | } |
253 | ||
254 | /* Allocate save areas for any hard registers that might need saving. | |
255 | We take a conservative approach here and look for call-clobbered hard | |
256 | registers that are assigned to pseudos that cross calls. This may | |
257 | overestimate slightly (especially if some of these registers are later | |
258 | used as spill registers), but it should not be significant. | |
259 | ||
260 | Then perform register elimination in the addresses of the save area | |
261 | locations; return 1 if all eliminated addresses are strictly valid. | |
262 | We assume that our caller has set up the elimination table to the | |
263 | worst (largest) possible offsets. | |
264 | ||
f95361c8 JL |
265 | Set *PCHANGED to 1 if we had to allocate some memory for the save area. |
266 | ||
267 | Future work: | |
268 | ||
269 | In the fallback case we should iterate backwards across all possible | |
270 | modes for the save, choosing the largest available one instead of | |
271 | falling back to the smallest mode immediately. (eg TF -> DF -> SF). | |
272 | ||
273 | We do not try to use "move multiple" instructions that exist | |
274 | on some machines (such as the 68k moveml). It could be a win to try | |
275 | and use them when possible. The hard part is doing it in a way that is | |
276 | machine independent since they might be saving non-consecutive | |
277 | registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ | |
c5986054 RS |
278 | |
279 | int | |
280 | setup_save_areas (pchanged) | |
281 | int *pchanged; | |
282 | { | |
f95361c8 JL |
283 | int i, j, k; |
284 | HARD_REG_SET hard_regs_used; | |
c5986054 | 285 | int ok = 1; |
c5986054 | 286 | |
f95361c8 JL |
287 | |
288 | /* Allocate space in the save area for the largest multi-register | |
289 | pseudos first, then work backwards to single register | |
290 | pseudos. */ | |
291 | ||
292 | /* Find and record all call-used hard-registers in this function. */ | |
293 | CLEAR_HARD_REG_SET (hard_regs_used); | |
c5986054 RS |
294 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
295 | if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0) | |
296 | { | |
297 | int regno = reg_renumber[i]; | |
f95361c8 | 298 | int endregno |
c5986054 | 299 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); |
f95361c8 | 300 | int nregs = endregno - regno; |
c5986054 | 301 | |
f95361c8 JL |
302 | for (j = 0; j < nregs; j++) |
303 | { | |
304 | if (call_used_regs[regno+j]) | |
305 | SET_HARD_REG_BIT (hard_regs_used, regno+j); | |
306 | } | |
307 | } | |
308 | ||
309 | /* Now run through all the call-used hard-registers and allocate | |
310 | space for them in the caller-save area. Try to allocate space | |
311 | in a manner which allows multi-register saves/restores to be done. */ | |
312 | ||
313 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
314 | for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--) | |
315 | { | |
316 | int ok = 1; | |
317 | ||
318 | /* If no mode exists for this size, try another. Also break out | |
319 | if we have already saved this hard register. */ | |
320 | if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) | |
321 | continue; | |
322 | ||
323 | for (k = 0; k < j; k++) | |
c5986054 | 324 | { |
f95361c8 JL |
325 | int regno = i + k; |
326 | ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0); | |
c5986054 | 327 | } |
f95361c8 JL |
328 | |
329 | /* We have found an acceptable mode to store in. */ | |
330 | if (ok) | |
331 | { | |
332 | ||
333 | regno_save_mem[i][j] | |
334 | = assign_stack_local (regno_save_mode[i][j], | |
335 | GET_MODE_SIZE (regno_save_mode[i][j]), 0); | |
336 | ||
337 | /* Setup singe word save area just in case... */ | |
338 | for (k = 0; k < j; k++) | |
339 | { | |
340 | int offset; | |
341 | rtx temp; | |
342 | ||
343 | if (WORDS_BIG_ENDIAN) | |
344 | offset = k * UNITS_PER_WORD; | |
345 | else | |
346 | offset = - k * UNITS_PER_WORD; | |
347 | ||
348 | temp | |
349 | = gen_rtx(MEM, regno_save_mode[i+k][1], | |
350 | XEXP (regno_save_mem[i][j], 0)); | |
351 | regno_save_mem[i+k][1] | |
352 | = adj_offsettable_operand(temp, offset); | |
353 | } | |
354 | *pchanged = 1; | |
355 | } | |
c5986054 RS |
356 | } |
357 | ||
358 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
359 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
360 | if (regno_save_mem[i][j] != 0) | |
361 | ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]), | |
362 | XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0)); | |
c5986054 RS |
363 | |
364 | return ok; | |
365 | } | |
366 | \f | |
367 | /* Find the places where hard regs are live across calls and save them. | |
368 | ||
369 | INSN_MODE is the mode to assign to any insns that we add. This is used | |
370 | by reload to determine whether or not reloads or register eliminations | |
371 | need be done on these insns. */ | |
372 | ||
373 | void | |
374 | save_call_clobbered_regs (insn_mode) | |
375 | enum machine_mode insn_mode; | |
376 | { | |
377 | rtx insn; | |
378 | int b; | |
379 | ||
380 | for (b = 0; b < n_basic_blocks; b++) | |
381 | { | |
382 | regset regs_live = basic_block_live_at_start[b]; | |
3245eea0 CH |
383 | REGSET_ELT_TYPE bit; |
384 | int offset, i, j; | |
c5986054 RS |
385 | int regno; |
386 | ||
387 | /* Compute hard regs live at start of block -- this is the | |
388 | real hard regs marked live, plus live pseudo regs that | |
389 | have been renumbered to hard regs. No registers have yet been | |
390 | saved because we restore all of them before the end of the basic | |
391 | block. */ | |
392 | ||
393 | #ifdef HARD_REG_SET | |
394 | hard_regs_live = *regs_live; | |
395 | #else | |
396 | COPY_HARD_REG_SET (hard_regs_live, regs_live); | |
397 | #endif | |
398 | ||
399 | CLEAR_HARD_REG_SET (hard_regs_saved); | |
f95361c8 | 400 | CLEAR_HARD_REG_SET (hard_regs_need_restore); |
c5986054 RS |
401 | n_regs_saved = 0; |
402 | ||
403 | for (offset = 0, i = 0; offset < regset_size; offset++) | |
404 | { | |
405 | if (regs_live[offset] == 0) | |
3245eea0 | 406 | i += REGSET_ELT_BITS; |
c5986054 RS |
407 | else |
408 | for (bit = 1; bit && i < max_regno; bit <<= 1, i++) | |
409 | if ((regs_live[offset] & bit) | |
410 | && (regno = reg_renumber[i]) >= 0) | |
411 | for (j = regno; | |
412 | j < regno + HARD_REGNO_NREGS (regno, | |
413 | PSEUDO_REGNO_MODE (i)); | |
414 | j++) | |
415 | SET_HARD_REG_BIT (hard_regs_live, j); | |
f95361c8 | 416 | |
c5986054 RS |
417 | } |
418 | ||
419 | /* Now scan the insns in the block, keeping track of what hard | |
420 | regs are live as we go. When we see a call, save the live | |
421 | call-clobbered hard regs. */ | |
422 | ||
423 | for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn)) | |
424 | { | |
425 | RTX_CODE code = GET_CODE (insn); | |
426 | ||
427 | if (GET_RTX_CLASS (code) == 'i') | |
428 | { | |
429 | rtx link; | |
430 | ||
431 | /* If some registers have been saved, see if INSN references | |
432 | any of them. We must restore them before the insn if so. */ | |
433 | ||
434 | if (n_regs_saved) | |
435 | restore_referenced_regs (PATTERN (insn), insn, insn_mode); | |
436 | ||
437 | /* NB: the normal procedure is to first enliven any | |
438 | registers set by insn, then deaden any registers that | |
439 | had their last use at insn. This is incorrect now, | |
440 | since multiple pseudos may have been mapped to the | |
441 | same hard reg, and the death notes are ambiguous. So | |
442 | it must be done in the other, safe, order. */ | |
443 | ||
444 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
445 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
446 | clear_reg_live (XEXP (link, 0)); | |
447 | ||
448 | /* When we reach a call, we need to save all registers that are | |
449 | live, call-used, not fixed, and not already saved. We must | |
450 | test at this point because registers that die in a CALL_INSN | |
451 | are not live across the call and likewise for registers that | |
452 | are born in the CALL_INSN. */ | |
453 | ||
454 | if (code == CALL_INSN) | |
f95361c8 JL |
455 | { |
456 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
457 | if (call_used_regs[regno] && ! call_fixed_regs[regno] | |
458 | && TEST_HARD_REG_BIT (hard_regs_live, regno) | |
459 | && ! TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
460 | regno += insert_save_restore (insn, 1, regno, | |
461 | insn_mode, 0); | |
462 | #ifdef HARD_REG_SET | |
463 | hard_regs_need_restore = hard_regs_saved; | |
464 | #else | |
465 | COPY_HARD_REG_SET (hard_regs_need_restore, | |
466 | hard_regs_saved); | |
467 | #endif | |
468 | ||
469 | /* Must recompute n_regs_saved. */ | |
470 | n_regs_saved = 0; | |
471 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
472 | if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
473 | n_regs_saved++; | |
474 | ||
475 | } | |
c5986054 RS |
476 | |
477 | note_stores (PATTERN (insn), set_reg_live); | |
478 | ||
479 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
480 | if (REG_NOTE_KIND (link) == REG_UNUSED) | |
481 | clear_reg_live (XEXP (link, 0)); | |
482 | } | |
483 | ||
484 | if (insn == basic_block_end[b]) | |
485 | break; | |
486 | } | |
487 | ||
488 | /* At the end of the basic block, we must restore any registers that | |
489 | remain saved. If the last insn in the block is a JUMP_INSN, put | |
490 | the restore before the insn, otherwise, put it after the insn. */ | |
491 | ||
492 | if (n_regs_saved) | |
493 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
f95361c8 JL |
494 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno)) |
495 | regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN | |
496 | ? insn : NEXT_INSN (insn)), 0, | |
497 | regno, insn_mode, MOVE_MAX / UNITS_PER_WORD); | |
498 | ||
c5986054 RS |
499 | } |
500 | } | |
501 | ||
502 | /* Here from note_stores when an insn stores a value in a register. | |
503 | Set the proper bit or bits in hard_regs_live. All pseudos that have | |
504 | been assigned hard regs have had their register number changed already, | |
505 | so we can ignore pseudos. */ | |
506 | ||
507 | static void | |
508 | set_reg_live (reg, setter) | |
509 | rtx reg, setter; | |
510 | { | |
511 | register int regno, endregno, i; | |
e048626b | 512 | enum machine_mode mode = GET_MODE (reg); |
c5986054 RS |
513 | int word = 0; |
514 | ||
515 | if (GET_CODE (reg) == SUBREG) | |
516 | { | |
517 | word = SUBREG_WORD (reg); | |
518 | reg = SUBREG_REG (reg); | |
519 | } | |
520 | ||
521 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
522 | return; | |
523 | ||
524 | regno = REGNO (reg) + word; | |
e048626b | 525 | endregno = regno + HARD_REGNO_NREGS (regno, mode); |
c5986054 RS |
526 | |
527 | for (i = regno; i < endregno; i++) | |
f95361c8 JL |
528 | { |
529 | SET_HARD_REG_BIT (hard_regs_live, i); | |
530 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); | |
531 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); | |
532 | } | |
c5986054 RS |
533 | } |
534 | ||
535 | /* Here when a REG_DEAD note records the last use of a reg. Clear | |
536 | the appropriate bit or bits in hard_regs_live. Again we can ignore | |
537 | pseudos. */ | |
538 | ||
539 | static void | |
540 | clear_reg_live (reg) | |
541 | rtx reg; | |
542 | { | |
543 | register int regno, endregno, i; | |
544 | ||
545 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
546 | return; | |
547 | ||
548 | regno = REGNO (reg); | |
549 | endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
550 | ||
551 | for (i = regno; i < endregno; i++) | |
f95361c8 JL |
552 | { |
553 | CLEAR_HARD_REG_BIT (hard_regs_live, i); | |
554 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); | |
555 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); | |
556 | } | |
c5986054 RS |
557 | } |
558 | \f | |
559 | /* If any register currently residing in the save area is referenced in X, | |
560 | which is part of INSN, emit code to restore the register in front of INSN. | |
561 | INSN_MODE is the mode to assign to any insns that we add. */ | |
562 | ||
563 | static void | |
564 | restore_referenced_regs (x, insn, insn_mode) | |
565 | rtx x; | |
566 | rtx insn; | |
567 | enum machine_mode insn_mode; | |
568 | { | |
569 | enum rtx_code code = GET_CODE (x); | |
570 | char *fmt; | |
571 | int i, j; | |
572 | ||
f95361c8 JL |
573 | if (code == CLOBBER) |
574 | return; | |
575 | ||
c5986054 RS |
576 | if (code == REG) |
577 | { | |
578 | int regno = REGNO (x); | |
579 | ||
580 | /* If this is a pseudo, scan its memory location, since it might | |
581 | involve the use of another register, which might be saved. */ | |
582 | ||
583 | if (regno >= FIRST_PSEUDO_REGISTER | |
584 | && reg_equiv_mem[regno] != 0) | |
585 | restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0), | |
586 | insn, insn_mode); | |
587 | else if (regno >= FIRST_PSEUDO_REGISTER | |
588 | && reg_equiv_address[regno] != 0) | |
916f14f1 | 589 | restore_referenced_regs (reg_equiv_address[regno], |
c5986054 RS |
590 | insn, insn_mode); |
591 | ||
592 | /* Otherwise if this is a hard register, restore any piece of it that | |
593 | is currently saved. */ | |
594 | ||
595 | else if (regno < FIRST_PSEUDO_REGISTER) | |
596 | { | |
597 | int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); | |
598 | ||
f95361c8 JL |
599 | for (i = regno; i < endregno; i++) |
600 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, i)) | |
601 | i += insert_save_restore (insn, 0, i, insn_mode, | |
d8ed9afb | 602 | CEIL (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)); |
c5986054 RS |
603 | } |
604 | ||
605 | return; | |
606 | } | |
607 | ||
608 | fmt = GET_RTX_FORMAT (code); | |
609 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
610 | { | |
611 | if (fmt[i] == 'e') | |
612 | restore_referenced_regs (XEXP (x, i), insn, insn_mode); | |
613 | else if (fmt[i] == 'E') | |
614 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
615 | restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode); | |
616 | } | |
617 | } | |
618 | \f | |
619 | /* Insert a sequence of insns to save or restore, SAVE_P says which, | |
620 | REGNO. Place these insns in front of INSN. INSN_MODE is the mode | |
d8ed9afb JL |
621 | to assign to these insns. MAXRESTORE is the maximum number of registers |
622 | which should be restored during this call (when SAVE_P == 0). It should | |
623 | never be less than 1 since we only work with entire registers. | |
c5986054 RS |
624 | |
625 | Note that we have verified in init_caller_save that we can do this | |
626 | with a simple SET, so use it. Set INSN_CODE to what we save there | |
627 | since the address might not be valid so the insn might not be recognized. | |
628 | These insns will be reloaded and have register elimination done by | |
f95361c8 | 629 | find_reload, so we need not worry about that here. |
c5986054 | 630 | |
f95361c8 JL |
631 | Return the extra number of registers saved. */ |
632 | ||
633 | static int | |
634 | insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) | |
c5986054 RS |
635 | rtx insn; |
636 | int save_p; | |
637 | int regno; | |
638 | enum machine_mode insn_mode; | |
f95361c8 | 639 | int maxrestore; |
c5986054 RS |
640 | { |
641 | rtx pat; | |
642 | enum insn_code code; | |
f95361c8 | 643 | int i, numregs; |
c5986054 | 644 | |
09835ed2 RK |
645 | /* A common failure mode if register status is not correct in the RTL |
646 | is for this routine to be called with a REGNO we didn't expect to | |
647 | save. That will cause us to write an insn with a (nil) SET_DEST | |
648 | or SET_SRC. Instead of doing so and causing a crash later, check | |
649 | for this common case and abort here instead. This will remove one | |
650 | step in debugging such problems. */ | |
651 | ||
f95361c8 | 652 | if (regno_save_mem[regno][1] == 0) |
09835ed2 RK |
653 | abort (); |
654 | ||
c5986054 RS |
655 | /* If INSN is a CALL_INSN, we must insert our insns before any |
656 | USE insns in front of the CALL_INSN. */ | |
657 | ||
658 | if (GET_CODE (insn) == CALL_INSN) | |
659 | while (GET_CODE (PREV_INSN (insn)) == INSN | |
660 | && GET_CODE (PATTERN (PREV_INSN (insn))) == USE) | |
661 | insn = PREV_INSN (insn); | |
662 | ||
663 | #ifdef HAVE_cc0 | |
664 | /* If INSN references CC0, put our insns in front of the insn that sets | |
665 | CC0. This is always safe, since the only way we could be passed an | |
666 | insn that references CC0 is for a restore, and doing a restore earlier | |
667 | isn't a problem. We do, however, assume here that CALL_INSNs don't | |
668 | reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
669 | ||
670 | if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN) | |
671 | && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
672 | insn = prev_nonnote_insn (insn); | |
673 | #endif | |
674 | ||
675 | /* Get the pattern to emit and update our status. */ | |
676 | if (save_p) | |
677 | { | |
f95361c8 JL |
678 | int i, j, k; |
679 | int ok; | |
680 | ||
681 | /* See if we can save several registers with a single instruction. | |
682 | Work backwards to the single register case. */ | |
683 | for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--) | |
684 | { | |
685 | ok = 1; | |
686 | if (regno_save_mem[regno][i] != 0) | |
687 | for (j = 0; j < i; j++) | |
688 | { | |
689 | if (! call_used_regs[regno + j] && call_fixed_regs[regno + j] | |
690 | && ! TEST_HARD_REG_BIT (hard_regs_live, regno + j) | |
691 | && TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) | |
692 | ok = 0; | |
693 | } | |
694 | else | |
695 | continue; | |
696 | ||
697 | /* Must do this one save at a time */ | |
698 | if (! ok) | |
699 | continue; | |
700 | ||
701 | pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i], | |
702 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno)); | |
703 | code = reg_save_code[regno][i]; | |
704 | ||
705 | /* Set hard_regs_saved for all the registers we saved. */ | |
706 | for (k = 0; k < i; k++) | |
707 | { | |
708 | SET_HARD_REG_BIT (hard_regs_saved, regno + k); | |
709 | SET_HARD_REG_BIT (hard_regs_need_restore, regno + k); | |
710 | n_regs_saved++; | |
711 | } | |
712 | ||
713 | numregs = i; | |
714 | break; | |
715 | } | |
c5986054 RS |
716 | } |
717 | else | |
718 | { | |
f95361c8 JL |
719 | int i, j, k; |
720 | int ok; | |
721 | ||
722 | /* See if we can restore `maxrestore' registers at once. Work | |
723 | backwards to the single register case. */ | |
724 | for (i = maxrestore; i > 0; i--) | |
725 | { | |
726 | ok = 1; | |
727 | if (regno_save_mem[regno][i]) | |
728 | for (j = 0; j < i; j++) | |
729 | { | |
730 | if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j)) | |
731 | ok = 0; | |
732 | } | |
733 | else | |
734 | continue; | |
735 | ||
736 | /* Must do this one restore at a time */ | |
737 | if (! ok) | |
738 | continue; | |
739 | ||
740 | pat = gen_rtx (SET, VOIDmode, | |
741 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), | |
742 | regno), | |
743 | regno_save_mem[regno][i]); | |
744 | code = reg_restore_code[regno][i]; | |
c5986054 | 745 | |
f95361c8 JL |
746 | |
747 | /* Clear status for all registers we restored. */ | |
748 | for (k = 0; k < i; k++) | |
749 | { | |
750 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k); | |
751 | n_regs_saved--; | |
752 | } | |
753 | ||
754 | numregs = i; | |
755 | break; | |
756 | } | |
757 | } | |
c5986054 RS |
758 | /* Emit the insn and set the code and mode. */ |
759 | ||
760 | insn = emit_insn_before (pat, insn); | |
761 | PUT_MODE (insn, insn_mode); | |
762 | INSN_CODE (insn) = code; | |
f95361c8 JL |
763 | |
764 | /* Tell our callers how many extra registers we saved/restored */ | |
765 | return numregs - 1; | |
c5986054 | 766 | } |