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c5986054
RS
1/* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992 Free Software Foundation, Inc.
3
4This file is part of GNU CC.
5
6GNU CC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2, or (at your option)
9any later version.
10
11GNU CC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GNU CC; see the file COPYING. If not, write to
18the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19
20#include "config.h"
21#include "rtl.h"
22#include "insn-config.h"
23#include "flags.h"
24#include "regs.h"
25#include "hard-reg-set.h"
26#include "recog.h"
27#include "basic-block.h"
28#include "reload.h"
29#include "expr.h"
30
f95361c8
JL
31/* Modes for each hard register that we can save. The smallest mode is wide
32 enough to save the entire contents of the register. When saving the
33 register because it is live we first try to save in multi-register modes.
34 If that is not possible the save is done one register at a time. */
c5986054 35
f95361c8
JL
36static enum machine_mode
37 regno_save_mode[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
c5986054
RS
38
39/* For each hard register, a place on the stack where it can be saved,
40 if needed. */
41
f95361c8
JL
42static rtx
43 regno_save_mem[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
c5986054
RS
44
45/* We will only make a register eligible for caller-save if it can be
46 saved in its widest mode with a simple SET insn as long as the memory
47 address is valid. We record the INSN_CODE is those insns here since
48 when we emit them, the addresses might not be valid, so they might not
49 be recognized. */
50
f95361c8
JL
51static enum insn_code
52 reg_save_code[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
53static enum insn_code
54 reg_restore_code[FIRST_PSEUDO_REGISTER][MOVE_MAX / UNITS_PER_WORD + 1];
c5986054
RS
55
56/* Set of hard regs currently live (during scan of all insns). */
57
58static HARD_REG_SET hard_regs_live;
59
60/* Set of hard regs currently residing in save area (during insn scan). */
61
62static HARD_REG_SET hard_regs_saved;
63
f95361c8
JL
64/* Set of hard regs which need to be restored before referenced. */
65
66static HARD_REG_SET hard_regs_need_restore;
67
c5986054
RS
68/* Number of registers currently in hard_regs_saved. */
69
70int n_regs_saved;
71
72static void set_reg_live ();
73static void clear_reg_live ();
74static void restore_referenced_regs ();
f95361c8 75static int insert_save_restore ();
c5986054
RS
76\f
77/* Return a machine mode that is legitimate for hard reg REGNO and large
f95361c8 78 enough to save nregs. If we can't find one, return VOIDmode. */
c5986054
RS
79
80static enum machine_mode
f95361c8 81choose_hard_reg_mode (regno, nregs)
c5986054
RS
82 int regno;
83{
84 enum machine_mode found_mode = VOIDmode, mode;
85
86 /* We first look for the largest integer mode that can be validly
87 held in REGNO. If none, we look for the largest floating-point mode.
88 If we still didn't find a valid mode, try CCmode. */
89
90 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
91 mode = GET_MODE_WIDER_MODE (mode))
f95361c8 92 if (HARD_REGNO_NREGS (regno, mode) == nregs
c5986054
RS
93 && HARD_REGNO_MODE_OK (regno, mode))
94 found_mode = mode;
95
96 if (found_mode != VOIDmode)
97 return found_mode;
98
99 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
100 mode = GET_MODE_WIDER_MODE (mode))
f95361c8 101 if (HARD_REGNO_NREGS (regno, mode) == nregs
c5986054
RS
102 && HARD_REGNO_MODE_OK (regno, mode))
103 found_mode = mode;
104
105 if (found_mode != VOIDmode)
106 return found_mode;
107
f95361c8 108 if (HARD_REGNO_NREGS (regno, CCmode) == nregs
c5986054
RS
109 && HARD_REGNO_MODE_OK (regno, CCmode))
110 return CCmode;
111
112 /* We can't find a mode valid for this register. */
113 return VOIDmode;
114}
115\f
116/* Initialize for caller-save.
117
118 Look at all the hard registers that are used by a call and for which
119 regclass.c has not already excluded from being used across a call.
120
121 Ensure that we can find a mode to save the register and that there is a
122 simple insn to save and restore the register. This latter check avoids
123 problems that would occur if we tried to save the MQ register of some
124 machines directly into memory. */
125
126void
127init_caller_save ()
128{
129 char *first_obj = (char *) oballoc (0);
130 rtx addr_reg;
131 int offset;
132 rtx address;
f95361c8 133 int i, j;
c5986054
RS
134
135 /* First find all the registers that we need to deal with and all
136 the modes that they can have. If we can't find a mode to use,
137 we can't have the register live over calls. */
138
139 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
140 {
141 if (call_used_regs[i] && ! call_fixed_regs[i])
142 {
f95361c8 143 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
c5986054 144 {
f95361c8
JL
145 regno_save_mode[i][j] = choose_hard_reg_mode (i, j);
146 if (regno_save_mode[i][j] == VOIDmode && j == 1)
147 {
148 call_fixed_regs[i] = 1;
149 SET_HARD_REG_BIT (call_fixed_reg_set, i);
150 }
c5986054
RS
151 }
152 }
153 else
f95361c8 154 regno_save_mode[i][1] = VOIDmode;
c5986054
RS
155 }
156
157 /* The following code tries to approximate the conditions under which
158 we can easily save and restore a register without scratch registers or
159 other complexities. It will usually work, except under conditions where
160 the validity of an insn operand is dependent on the address offset.
161 No such cases are currently known.
162
163 We first find a typical offset from some BASE_REG_CLASS register.
164 This address is chosen by finding the first register in the class
165 and by finding the smallest power of two that is a valid offset from
166 that register in every mode we will use to save registers. */
167
168 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
169 if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i))
170 break;
171
172 if (i == FIRST_PSEUDO_REGISTER)
173 abort ();
174
175 addr_reg = gen_rtx (REG, Pmode, i);
176
177 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
178 {
3245eea0 179 address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset));
c5986054
RS
180
181 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
182 if (regno_save_mode[i][1] != VOIDmode
183 && ! strict_memory_address_p (regno_save_mode[i][1], address))
c5986054
RS
184 break;
185
186 if (i == FIRST_PSEUDO_REGISTER)
187 break;
188 }
189
190 /* If we didn't find a valid address, we must use register indirect. */
191 if (offset == 0)
192 address = addr_reg;
193
194 /* Next we try to form an insn to save and restore the register. We
195 see if such an insn is recognized and meets its constraints. */
196
197 start_sequence ();
198
199 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
200 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
201 if (regno_save_mode[i][j] != VOIDmode)
202 {
203 rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address);
204 rtx reg = gen_rtx (REG, regno_save_mode[i][j], i);
205 rtx savepat = gen_rtx (SET, VOIDmode, mem, reg);
206 rtx restpat = gen_rtx (SET, VOIDmode, reg, mem);
207 rtx saveinsn = emit_insn (savepat);
208 rtx restinsn = emit_insn (restpat);
209 int ok;
210
211 reg_save_code[i][j] = recog_memoized (saveinsn);
212 reg_restore_code[i][j] = recog_memoized (restinsn);
213
214 /* Now extract both insns and see if we can meet their constraints. */
215 ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1);
216 if (ok)
217 {
218 insn_extract (saveinsn);
219 ok = constrain_operands (reg_save_code[i][j], 1);
220 insn_extract (restinsn);
221 ok &= constrain_operands (reg_restore_code[i][j], 1);
222 }
c5986054 223
f95361c8 224 if (! ok && j == 1)
c5986054
RS
225 {
226 call_fixed_regs[i] = 1;
227 SET_HARD_REG_BIT (call_fixed_reg_set, i);
228 }
229 }
230
231 end_sequence ();
232
233 obfree (first_obj);
234}
235\f
236/* Initialize save areas by showing that we haven't allocated any yet. */
237
238void
239init_save_areas ()
240{
f95361c8 241 int i, j;
c5986054
RS
242
243 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
244 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
245 regno_save_mem[i][j] = 0;
c5986054
RS
246}
247
248/* Allocate save areas for any hard registers that might need saving.
249 We take a conservative approach here and look for call-clobbered hard
250 registers that are assigned to pseudos that cross calls. This may
251 overestimate slightly (especially if some of these registers are later
252 used as spill registers), but it should not be significant.
253
254 Then perform register elimination in the addresses of the save area
255 locations; return 1 if all eliminated addresses are strictly valid.
256 We assume that our caller has set up the elimination table to the
257 worst (largest) possible offsets.
258
f95361c8
JL
259 Set *PCHANGED to 1 if we had to allocate some memory for the save area.
260
261 Future work:
262
263 In the fallback case we should iterate backwards across all possible
264 modes for the save, choosing the largest available one instead of
265 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
266
267 We do not try to use "move multiple" instructions that exist
268 on some machines (such as the 68k moveml). It could be a win to try
269 and use them when possible. The hard part is doing it in a way that is
270 machine independent since they might be saving non-consecutive
271 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
c5986054
RS
272
273int
274setup_save_areas (pchanged)
275 int *pchanged;
276{
f95361c8
JL
277 int i, j, k;
278 HARD_REG_SET hard_regs_used;
c5986054 279 int ok = 1;
c5986054 280
f95361c8
JL
281
282 /* Allocate space in the save area for the largest multi-register
283 pseudos first, then work backwards to single register
284 pseudos. */
285
286 /* Find and record all call-used hard-registers in this function. */
287 CLEAR_HARD_REG_SET (hard_regs_used);
c5986054
RS
288 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
289 if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0)
290 {
291 int regno = reg_renumber[i];
f95361c8 292 int endregno
c5986054 293 = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i]));
f95361c8 294 int nregs = endregno - regno;
c5986054 295
f95361c8
JL
296 for (j = 0; j < nregs; j++)
297 {
298 if (call_used_regs[regno+j])
299 SET_HARD_REG_BIT (hard_regs_used, regno+j);
300 }
301 }
302
303 /* Now run through all the call-used hard-registers and allocate
304 space for them in the caller-save area. Try to allocate space
305 in a manner which allows multi-register saves/restores to be done. */
306
307 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
308 for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--)
309 {
310 int ok = 1;
311
312 /* If no mode exists for this size, try another. Also break out
313 if we have already saved this hard register. */
314 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
315 continue;
316
317 for (k = 0; k < j; k++)
c5986054 318 {
f95361c8
JL
319 int regno = i + k;
320 ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0);
c5986054 321 }
f95361c8
JL
322
323 /* We have found an acceptable mode to store in. */
324 if (ok)
325 {
326
327 regno_save_mem[i][j]
328 = assign_stack_local (regno_save_mode[i][j],
329 GET_MODE_SIZE (regno_save_mode[i][j]), 0);
330
331 /* Setup singe word save area just in case... */
332 for (k = 0; k < j; k++)
333 {
334 int offset;
335 rtx temp;
336
337 if (WORDS_BIG_ENDIAN)
338 offset = k * UNITS_PER_WORD;
339 else
340 offset = - k * UNITS_PER_WORD;
341
342 temp
343 = gen_rtx(MEM, regno_save_mode[i+k][1],
344 XEXP (regno_save_mem[i][j], 0));
345 regno_save_mem[i+k][1]
346 = adj_offsettable_operand(temp, offset);
347 }
348 *pchanged = 1;
349 }
c5986054
RS
350 }
351
352 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
f95361c8
JL
353 for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++)
354 if (regno_save_mem[i][j] != 0)
355 ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]),
356 XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0));
c5986054
RS
357
358 return ok;
359}
360\f
361/* Find the places where hard regs are live across calls and save them.
362
363 INSN_MODE is the mode to assign to any insns that we add. This is used
364 by reload to determine whether or not reloads or register eliminations
365 need be done on these insns. */
366
367void
368save_call_clobbered_regs (insn_mode)
369 enum machine_mode insn_mode;
370{
371 rtx insn;
372 int b;
373
374 for (b = 0; b < n_basic_blocks; b++)
375 {
376 regset regs_live = basic_block_live_at_start[b];
3245eea0
CH
377 REGSET_ELT_TYPE bit;
378 int offset, i, j;
c5986054
RS
379 int regno;
380
381 /* Compute hard regs live at start of block -- this is the
382 real hard regs marked live, plus live pseudo regs that
383 have been renumbered to hard regs. No registers have yet been
384 saved because we restore all of them before the end of the basic
385 block. */
386
387#ifdef HARD_REG_SET
388 hard_regs_live = *regs_live;
389#else
390 COPY_HARD_REG_SET (hard_regs_live, regs_live);
391#endif
392
393 CLEAR_HARD_REG_SET (hard_regs_saved);
f95361c8 394 CLEAR_HARD_REG_SET (hard_regs_need_restore);
c5986054
RS
395 n_regs_saved = 0;
396
397 for (offset = 0, i = 0; offset < regset_size; offset++)
398 {
399 if (regs_live[offset] == 0)
3245eea0 400 i += REGSET_ELT_BITS;
c5986054
RS
401 else
402 for (bit = 1; bit && i < max_regno; bit <<= 1, i++)
403 if ((regs_live[offset] & bit)
404 && (regno = reg_renumber[i]) >= 0)
405 for (j = regno;
406 j < regno + HARD_REGNO_NREGS (regno,
407 PSEUDO_REGNO_MODE (i));
408 j++)
409 SET_HARD_REG_BIT (hard_regs_live, j);
f95361c8 410
c5986054
RS
411 }
412
413 /* Now scan the insns in the block, keeping track of what hard
414 regs are live as we go. When we see a call, save the live
415 call-clobbered hard regs. */
416
417 for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn))
418 {
419 RTX_CODE code = GET_CODE (insn);
420
421 if (GET_RTX_CLASS (code) == 'i')
422 {
423 rtx link;
424
425 /* If some registers have been saved, see if INSN references
426 any of them. We must restore them before the insn if so. */
427
428 if (n_regs_saved)
429 restore_referenced_regs (PATTERN (insn), insn, insn_mode);
430
431 /* NB: the normal procedure is to first enliven any
432 registers set by insn, then deaden any registers that
433 had their last use at insn. This is incorrect now,
434 since multiple pseudos may have been mapped to the
435 same hard reg, and the death notes are ambiguous. So
436 it must be done in the other, safe, order. */
437
438 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
439 if (REG_NOTE_KIND (link) == REG_DEAD)
440 clear_reg_live (XEXP (link, 0));
441
442 /* When we reach a call, we need to save all registers that are
443 live, call-used, not fixed, and not already saved. We must
444 test at this point because registers that die in a CALL_INSN
445 are not live across the call and likewise for registers that
446 are born in the CALL_INSN. */
447
448 if (code == CALL_INSN)
f95361c8
JL
449 {
450 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
451 if (call_used_regs[regno] && ! call_fixed_regs[regno]
452 && TEST_HARD_REG_BIT (hard_regs_live, regno)
453 && ! TEST_HARD_REG_BIT (hard_regs_saved, regno))
454 regno += insert_save_restore (insn, 1, regno,
455 insn_mode, 0);
456#ifdef HARD_REG_SET
457 hard_regs_need_restore = hard_regs_saved;
458#else
459 COPY_HARD_REG_SET (hard_regs_need_restore,
460 hard_regs_saved);
461#endif
462
463 /* Must recompute n_regs_saved. */
464 n_regs_saved = 0;
465 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
466 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
467 n_regs_saved++;
468
469 }
c5986054
RS
470
471 note_stores (PATTERN (insn), set_reg_live);
472
473 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
474 if (REG_NOTE_KIND (link) == REG_UNUSED)
475 clear_reg_live (XEXP (link, 0));
476 }
477
478 if (insn == basic_block_end[b])
479 break;
480 }
481
482 /* At the end of the basic block, we must restore any registers that
483 remain saved. If the last insn in the block is a JUMP_INSN, put
484 the restore before the insn, otherwise, put it after the insn. */
485
486 if (n_regs_saved)
487 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
f95361c8
JL
488 if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno))
489 regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN
490 ? insn : NEXT_INSN (insn)), 0,
491 regno, insn_mode, MOVE_MAX / UNITS_PER_WORD);
492
c5986054
RS
493 }
494}
495
496/* Here from note_stores when an insn stores a value in a register.
497 Set the proper bit or bits in hard_regs_live. All pseudos that have
498 been assigned hard regs have had their register number changed already,
499 so we can ignore pseudos. */
500
501static void
502set_reg_live (reg, setter)
503 rtx reg, setter;
504{
505 register int regno, endregno, i;
e048626b 506 enum machine_mode mode = GET_MODE (reg);
c5986054
RS
507 int word = 0;
508
509 if (GET_CODE (reg) == SUBREG)
510 {
511 word = SUBREG_WORD (reg);
512 reg = SUBREG_REG (reg);
513 }
514
515 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
516 return;
517
518 regno = REGNO (reg) + word;
e048626b 519 endregno = regno + HARD_REGNO_NREGS (regno, mode);
c5986054
RS
520
521 for (i = regno; i < endregno; i++)
f95361c8
JL
522 {
523 SET_HARD_REG_BIT (hard_regs_live, i);
524 CLEAR_HARD_REG_BIT (hard_regs_saved, i);
525 CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
526 }
c5986054
RS
527}
528
529/* Here when a REG_DEAD note records the last use of a reg. Clear
530 the appropriate bit or bits in hard_regs_live. Again we can ignore
531 pseudos. */
532
533static void
534clear_reg_live (reg)
535 rtx reg;
536{
537 register int regno, endregno, i;
538
539 if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
540 return;
541
542 regno = REGNO (reg);
543 endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg));
544
545 for (i = regno; i < endregno; i++)
f95361c8
JL
546 {
547 CLEAR_HARD_REG_BIT (hard_regs_live, i);
548 CLEAR_HARD_REG_BIT (hard_regs_need_restore, i);
549 CLEAR_HARD_REG_BIT (hard_regs_saved, i);
550 }
c5986054
RS
551}
552\f
553/* If any register currently residing in the save area is referenced in X,
554 which is part of INSN, emit code to restore the register in front of INSN.
555 INSN_MODE is the mode to assign to any insns that we add. */
556
557static void
558restore_referenced_regs (x, insn, insn_mode)
559 rtx x;
560 rtx insn;
561 enum machine_mode insn_mode;
562{
563 enum rtx_code code = GET_CODE (x);
564 char *fmt;
565 int i, j;
566
f95361c8
JL
567 if (code == CLOBBER)
568 return;
569
c5986054
RS
570 if (code == REG)
571 {
572 int regno = REGNO (x);
573
574 /* If this is a pseudo, scan its memory location, since it might
575 involve the use of another register, which might be saved. */
576
577 if (regno >= FIRST_PSEUDO_REGISTER
578 && reg_equiv_mem[regno] != 0)
579 restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0),
580 insn, insn_mode);
581 else if (regno >= FIRST_PSEUDO_REGISTER
582 && reg_equiv_address[regno] != 0)
916f14f1 583 restore_referenced_regs (reg_equiv_address[regno],
c5986054
RS
584 insn, insn_mode);
585
586 /* Otherwise if this is a hard register, restore any piece of it that
587 is currently saved. */
588
589 else if (regno < FIRST_PSEUDO_REGISTER)
590 {
591 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
592
f95361c8
JL
593 for (i = regno; i < endregno; i++)
594 if (TEST_HARD_REG_BIT (hard_regs_need_restore, i))
595 i += insert_save_restore (insn, 0, i, insn_mode,
596 GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
c5986054
RS
597 }
598
599 return;
600 }
601
602 fmt = GET_RTX_FORMAT (code);
603 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
604 {
605 if (fmt[i] == 'e')
606 restore_referenced_regs (XEXP (x, i), insn, insn_mode);
607 else if (fmt[i] == 'E')
608 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
609 restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode);
610 }
611}
612\f
613/* Insert a sequence of insns to save or restore, SAVE_P says which,
614 REGNO. Place these insns in front of INSN. INSN_MODE is the mode
615 to assign to these insns.
616
617 Note that we have verified in init_caller_save that we can do this
618 with a simple SET, so use it. Set INSN_CODE to what we save there
619 since the address might not be valid so the insn might not be recognized.
620 These insns will be reloaded and have register elimination done by
f95361c8 621 find_reload, so we need not worry about that here.
c5986054 622
f95361c8
JL
623 Return the extra number of registers saved. */
624
625static int
626insert_save_restore (insn, save_p, regno, insn_mode, maxrestore)
c5986054
RS
627 rtx insn;
628 int save_p;
629 int regno;
630 enum machine_mode insn_mode;
f95361c8 631 int maxrestore;
c5986054
RS
632{
633 rtx pat;
634 enum insn_code code;
f95361c8 635 int i, numregs;
c5986054 636
09835ed2
RK
637 /* A common failure mode if register status is not correct in the RTL
638 is for this routine to be called with a REGNO we didn't expect to
639 save. That will cause us to write an insn with a (nil) SET_DEST
640 or SET_SRC. Instead of doing so and causing a crash later, check
641 for this common case and abort here instead. This will remove one
642 step in debugging such problems. */
643
f95361c8 644 if (regno_save_mem[regno][1] == 0)
09835ed2
RK
645 abort ();
646
c5986054
RS
647 /* If INSN is a CALL_INSN, we must insert our insns before any
648 USE insns in front of the CALL_INSN. */
649
650 if (GET_CODE (insn) == CALL_INSN)
651 while (GET_CODE (PREV_INSN (insn)) == INSN
652 && GET_CODE (PATTERN (PREV_INSN (insn))) == USE)
653 insn = PREV_INSN (insn);
654
655#ifdef HAVE_cc0
656 /* If INSN references CC0, put our insns in front of the insn that sets
657 CC0. This is always safe, since the only way we could be passed an
658 insn that references CC0 is for a restore, and doing a restore earlier
659 isn't a problem. We do, however, assume here that CALL_INSNs don't
660 reference CC0. Guard against non-INSN's like CODE_LABEL. */
661
662 if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
663 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
664 insn = prev_nonnote_insn (insn);
665#endif
666
667 /* Get the pattern to emit and update our status. */
668 if (save_p)
669 {
f95361c8
JL
670 int i, j, k;
671 int ok;
672
673 /* See if we can save several registers with a single instruction.
674 Work backwards to the single register case. */
675 for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--)
676 {
677 ok = 1;
678 if (regno_save_mem[regno][i] != 0)
679 for (j = 0; j < i; j++)
680 {
681 if (! call_used_regs[regno + j] && call_fixed_regs[regno + j]
682 && ! TEST_HARD_REG_BIT (hard_regs_live, regno + j)
683 && TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
684 ok = 0;
685 }
686 else
687 continue;
688
689 /* Must do this one save at a time */
690 if (! ok)
691 continue;
692
693 pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i],
694 gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno));
695 code = reg_save_code[regno][i];
696
697 /* Set hard_regs_saved for all the registers we saved. */
698 for (k = 0; k < i; k++)
699 {
700 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
701 SET_HARD_REG_BIT (hard_regs_need_restore, regno + k);
702 n_regs_saved++;
703 }
704
705 numregs = i;
706 break;
707 }
c5986054
RS
708 }
709 else
710 {
f95361c8
JL
711 int i, j, k;
712 int ok;
713
714 /* See if we can restore `maxrestore' registers at once. Work
715 backwards to the single register case. */
716 for (i = maxrestore; i > 0; i--)
717 {
718 ok = 1;
719 if (regno_save_mem[regno][i])
720 for (j = 0; j < i; j++)
721 {
722 if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j))
723 ok = 0;
724 }
725 else
726 continue;
727
728 /* Must do this one restore at a time */
729 if (! ok)
730 continue;
731
732 pat = gen_rtx (SET, VOIDmode,
733 gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]),
734 regno),
735 regno_save_mem[regno][i]);
736 code = reg_restore_code[regno][i];
c5986054 737
f95361c8
JL
738
739 /* Clear status for all registers we restored. */
740 for (k = 0; k < i; k++)
741 {
742 CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k);
743 n_regs_saved--;
744 }
745
746 numregs = i;
747 break;
748 }
749 }
c5986054
RS
750 /* Emit the insn and set the code and mode. */
751
752 insn = emit_insn_before (pat, insn);
753 PUT_MODE (insn, insn_mode);
754 INSN_CODE (insn) = code;
f95361c8
JL
755
756 /* Tell our callers how many extra registers we saved/restored */
757 return numregs - 1;
c5986054 758}
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