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c5986054 | 1 | /* Save and restore call-clobbered registers which are live across a call. |
ef0e53ce | 2 | Copyright (C) 1989, 1992, 1994, 1995 Free Software Foundation, Inc. |
c5986054 RS |
3 | |
4 | This file is part of GNU CC. | |
5 | ||
6 | GNU CC is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2, or (at your option) | |
9 | any later version. | |
10 | ||
11 | GNU CC is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with GNU CC; see the file COPYING. If not, write to | |
940d9d63 RK |
18 | the Free Software Foundation, 59 Temple Place - Suite 330, |
19 | Boston, MA 02111-1307, USA. */ | |
c5986054 RS |
20 | |
21 | #include "config.h" | |
22 | #include "rtl.h" | |
23 | #include "insn-config.h" | |
24 | #include "flags.h" | |
25 | #include "regs.h" | |
26 | #include "hard-reg-set.h" | |
27 | #include "recog.h" | |
28 | #include "basic-block.h" | |
29 | #include "reload.h" | |
30 | #include "expr.h" | |
31 | ||
dc17cfda DE |
32 | #ifndef MAX_MOVE_MAX |
33 | #define MAX_MOVE_MAX MOVE_MAX | |
34 | #endif | |
35 | ||
ef0e53ce RK |
36 | #ifndef MIN_UNITS_PER_WORD |
37 | #define MIN_UNITS_PER_WORD UNITS_PER_WORD | |
dc17cfda DE |
38 | #endif |
39 | ||
f95361c8 JL |
40 | /* Modes for each hard register that we can save. The smallest mode is wide |
41 | enough to save the entire contents of the register. When saving the | |
42 | register because it is live we first try to save in multi-register modes. | |
43 | If that is not possible the save is done one register at a time. */ | |
c5986054 | 44 | |
f95361c8 | 45 | static enum machine_mode |
ef0e53ce | 46 | regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
c5986054 RS |
47 | |
48 | /* For each hard register, a place on the stack where it can be saved, | |
49 | if needed. */ | |
50 | ||
f95361c8 | 51 | static rtx |
ef0e53ce | 52 | regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
c5986054 RS |
53 | |
54 | /* We will only make a register eligible for caller-save if it can be | |
55 | saved in its widest mode with a simple SET insn as long as the memory | |
56 | address is valid. We record the INSN_CODE is those insns here since | |
57 | when we emit them, the addresses might not be valid, so they might not | |
58 | be recognized. */ | |
59 | ||
f95361c8 | 60 | static enum insn_code |
ef0e53ce | 61 | reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
f95361c8 | 62 | static enum insn_code |
ef0e53ce | 63 | reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; |
c5986054 RS |
64 | |
65 | /* Set of hard regs currently live (during scan of all insns). */ | |
66 | ||
67 | static HARD_REG_SET hard_regs_live; | |
68 | ||
69 | /* Set of hard regs currently residing in save area (during insn scan). */ | |
70 | ||
71 | static HARD_REG_SET hard_regs_saved; | |
72 | ||
f95361c8 JL |
73 | /* Set of hard regs which need to be restored before referenced. */ |
74 | ||
75 | static HARD_REG_SET hard_regs_need_restore; | |
76 | ||
c5986054 RS |
77 | /* Number of registers currently in hard_regs_saved. */ |
78 | ||
79 | int n_regs_saved; | |
80 | ||
c1f04022 RK |
81 | static void set_reg_live PROTO((rtx, rtx)); |
82 | static void clear_reg_live PROTO((rtx)); | |
83 | static void restore_referenced_regs PROTO((rtx, rtx, enum machine_mode)); | |
84 | static int insert_save_restore PROTO((rtx, int, int, | |
85 | enum machine_mode, int)); | |
c5986054 | 86 | \f |
c5986054 RS |
87 | /* Initialize for caller-save. |
88 | ||
89 | Look at all the hard registers that are used by a call and for which | |
90 | regclass.c has not already excluded from being used across a call. | |
91 | ||
92 | Ensure that we can find a mode to save the register and that there is a | |
93 | simple insn to save and restore the register. This latter check avoids | |
94 | problems that would occur if we tried to save the MQ register of some | |
95 | machines directly into memory. */ | |
96 | ||
97 | void | |
98 | init_caller_save () | |
99 | { | |
100 | char *first_obj = (char *) oballoc (0); | |
101 | rtx addr_reg; | |
102 | int offset; | |
103 | rtx address; | |
f95361c8 | 104 | int i, j; |
c5986054 RS |
105 | |
106 | /* First find all the registers that we need to deal with and all | |
107 | the modes that they can have. If we can't find a mode to use, | |
108 | we can't have the register live over calls. */ | |
109 | ||
110 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
111 | { | |
112 | if (call_used_regs[i] && ! call_fixed_regs[i]) | |
113 | { | |
f95361c8 | 114 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
c5986054 | 115 | { |
f95361c8 JL |
116 | regno_save_mode[i][j] = choose_hard_reg_mode (i, j); |
117 | if (regno_save_mode[i][j] == VOIDmode && j == 1) | |
118 | { | |
119 | call_fixed_regs[i] = 1; | |
120 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
121 | } | |
c5986054 RS |
122 | } |
123 | } | |
124 | else | |
f95361c8 | 125 | regno_save_mode[i][1] = VOIDmode; |
c5986054 RS |
126 | } |
127 | ||
128 | /* The following code tries to approximate the conditions under which | |
129 | we can easily save and restore a register without scratch registers or | |
130 | other complexities. It will usually work, except under conditions where | |
131 | the validity of an insn operand is dependent on the address offset. | |
132 | No such cases are currently known. | |
133 | ||
134 | We first find a typical offset from some BASE_REG_CLASS register. | |
135 | This address is chosen by finding the first register in the class | |
136 | and by finding the smallest power of two that is a valid offset from | |
137 | that register in every mode we will use to save registers. */ | |
138 | ||
139 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
140 | if (TEST_HARD_REG_BIT (reg_class_contents[(int) BASE_REG_CLASS], i)) | |
141 | break; | |
142 | ||
143 | if (i == FIRST_PSEUDO_REGISTER) | |
144 | abort (); | |
145 | ||
146 | addr_reg = gen_rtx (REG, Pmode, i); | |
147 | ||
148 | for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) | |
149 | { | |
3245eea0 | 150 | address = gen_rtx (PLUS, Pmode, addr_reg, GEN_INT (offset)); |
c5986054 RS |
151 | |
152 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
153 | if (regno_save_mode[i][1] != VOIDmode |
154 | && ! strict_memory_address_p (regno_save_mode[i][1], address)) | |
c5986054 RS |
155 | break; |
156 | ||
157 | if (i == FIRST_PSEUDO_REGISTER) | |
158 | break; | |
159 | } | |
160 | ||
161 | /* If we didn't find a valid address, we must use register indirect. */ | |
162 | if (offset == 0) | |
163 | address = addr_reg; | |
164 | ||
165 | /* Next we try to form an insn to save and restore the register. We | |
166 | see if such an insn is recognized and meets its constraints. */ | |
167 | ||
168 | start_sequence (); | |
169 | ||
170 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
171 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
172 | if (regno_save_mode[i][j] != VOIDmode) | |
173 | { | |
174 | rtx mem = gen_rtx (MEM, regno_save_mode[i][j], address); | |
175 | rtx reg = gen_rtx (REG, regno_save_mode[i][j], i); | |
176 | rtx savepat = gen_rtx (SET, VOIDmode, mem, reg); | |
177 | rtx restpat = gen_rtx (SET, VOIDmode, reg, mem); | |
178 | rtx saveinsn = emit_insn (savepat); | |
179 | rtx restinsn = emit_insn (restpat); | |
180 | int ok; | |
181 | ||
182 | reg_save_code[i][j] = recog_memoized (saveinsn); | |
183 | reg_restore_code[i][j] = recog_memoized (restinsn); | |
184 | ||
185 | /* Now extract both insns and see if we can meet their constraints. */ | |
186 | ok = (reg_save_code[i][j] != -1 && reg_restore_code[i][j] != -1); | |
187 | if (ok) | |
188 | { | |
189 | insn_extract (saveinsn); | |
190 | ok = constrain_operands (reg_save_code[i][j], 1); | |
191 | insn_extract (restinsn); | |
192 | ok &= constrain_operands (reg_restore_code[i][j], 1); | |
193 | } | |
c5986054 | 194 | |
c515799c JL |
195 | if (! ok) |
196 | { | |
197 | regno_save_mode[i][j] = VOIDmode; | |
198 | if (j == 1) | |
199 | { | |
200 | call_fixed_regs[i] = 1; | |
201 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
202 | } | |
203 | } | |
c5986054 RS |
204 | } |
205 | ||
206 | end_sequence (); | |
207 | ||
208 | obfree (first_obj); | |
209 | } | |
210 | \f | |
211 | /* Initialize save areas by showing that we haven't allocated any yet. */ | |
212 | ||
213 | void | |
214 | init_save_areas () | |
215 | { | |
f95361c8 | 216 | int i, j; |
c5986054 RS |
217 | |
218 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
219 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
220 | regno_save_mem[i][j] = 0; | |
c5986054 RS |
221 | } |
222 | ||
223 | /* Allocate save areas for any hard registers that might need saving. | |
224 | We take a conservative approach here and look for call-clobbered hard | |
225 | registers that are assigned to pseudos that cross calls. This may | |
226 | overestimate slightly (especially if some of these registers are later | |
227 | used as spill registers), but it should not be significant. | |
228 | ||
229 | Then perform register elimination in the addresses of the save area | |
230 | locations; return 1 if all eliminated addresses are strictly valid. | |
231 | We assume that our caller has set up the elimination table to the | |
232 | worst (largest) possible offsets. | |
233 | ||
f95361c8 JL |
234 | Set *PCHANGED to 1 if we had to allocate some memory for the save area. |
235 | ||
236 | Future work: | |
237 | ||
238 | In the fallback case we should iterate backwards across all possible | |
239 | modes for the save, choosing the largest available one instead of | |
240 | falling back to the smallest mode immediately. (eg TF -> DF -> SF). | |
241 | ||
242 | We do not try to use "move multiple" instructions that exist | |
243 | on some machines (such as the 68k moveml). It could be a win to try | |
244 | and use them when possible. The hard part is doing it in a way that is | |
245 | machine independent since they might be saving non-consecutive | |
246 | registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ | |
c5986054 RS |
247 | |
248 | int | |
249 | setup_save_areas (pchanged) | |
250 | int *pchanged; | |
251 | { | |
f95361c8 JL |
252 | int i, j, k; |
253 | HARD_REG_SET hard_regs_used; | |
c5986054 | 254 | int ok = 1; |
c5986054 | 255 | |
f95361c8 JL |
256 | |
257 | /* Allocate space in the save area for the largest multi-register | |
258 | pseudos first, then work backwards to single register | |
259 | pseudos. */ | |
260 | ||
261 | /* Find and record all call-used hard-registers in this function. */ | |
262 | CLEAR_HARD_REG_SET (hard_regs_used); | |
c5986054 RS |
263 | for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++) |
264 | if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0) | |
265 | { | |
266 | int regno = reg_renumber[i]; | |
f95361c8 | 267 | int endregno |
c5986054 | 268 | = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); |
f95361c8 | 269 | int nregs = endregno - regno; |
c5986054 | 270 | |
f95361c8 JL |
271 | for (j = 0; j < nregs; j++) |
272 | { | |
273 | if (call_used_regs[regno+j]) | |
274 | SET_HARD_REG_BIT (hard_regs_used, regno+j); | |
275 | } | |
276 | } | |
277 | ||
278 | /* Now run through all the call-used hard-registers and allocate | |
279 | space for them in the caller-save area. Try to allocate space | |
280 | in a manner which allows multi-register saves/restores to be done. */ | |
281 | ||
282 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
283 | for (j = MOVE_MAX / UNITS_PER_WORD; j > 0; j--) | |
284 | { | |
285 | int ok = 1; | |
b5c2c9bc | 286 | int do_save; |
f95361c8 JL |
287 | |
288 | /* If no mode exists for this size, try another. Also break out | |
289 | if we have already saved this hard register. */ | |
290 | if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) | |
291 | continue; | |
292 | ||
b5c2c9bc RK |
293 | /* See if any register in this group has been saved. */ |
294 | do_save = 1; | |
295 | for (k = 0; k < j; k++) | |
296 | if (regno_save_mem[i + k][1]) | |
297 | { | |
298 | do_save = 0; | |
299 | break; | |
300 | } | |
301 | if (! do_save) | |
302 | continue; | |
303 | ||
f95361c8 | 304 | for (k = 0; k < j; k++) |
c5986054 | 305 | { |
f95361c8 JL |
306 | int regno = i + k; |
307 | ok &= (TEST_HARD_REG_BIT (hard_regs_used, regno) != 0); | |
c5986054 | 308 | } |
f95361c8 JL |
309 | |
310 | /* We have found an acceptable mode to store in. */ | |
311 | if (ok) | |
312 | { | |
313 | ||
314 | regno_save_mem[i][j] | |
315 | = assign_stack_local (regno_save_mode[i][j], | |
316 | GET_MODE_SIZE (regno_save_mode[i][j]), 0); | |
317 | ||
39fa3485 | 318 | /* Setup single word save area just in case... */ |
f95361c8 JL |
319 | for (k = 0; k < j; k++) |
320 | { | |
39fa3485 RS |
321 | /* This should not depend on WORDS_BIG_ENDIAN. |
322 | The order of words in regs is the same as in memory. */ | |
323 | rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1], | |
324 | XEXP (regno_save_mem[i][j], 0)); | |
f95361c8 | 325 | |
f95361c8 | 326 | regno_save_mem[i+k][1] |
39fa3485 | 327 | = adj_offsettable_operand (temp, k * UNITS_PER_WORD); |
f95361c8 JL |
328 | } |
329 | *pchanged = 1; | |
330 | } | |
c5986054 RS |
331 | } |
332 | ||
333 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
f95361c8 JL |
334 | for (j = 1; j <= MOVE_MAX / UNITS_PER_WORD; j++) |
335 | if (regno_save_mem[i][j] != 0) | |
336 | ok &= strict_memory_address_p (GET_MODE (regno_save_mem[i][j]), | |
337 | XEXP (eliminate_regs (regno_save_mem[i][j], 0, NULL_RTX), 0)); | |
c5986054 RS |
338 | |
339 | return ok; | |
340 | } | |
341 | \f | |
342 | /* Find the places where hard regs are live across calls and save them. | |
343 | ||
344 | INSN_MODE is the mode to assign to any insns that we add. This is used | |
345 | by reload to determine whether or not reloads or register eliminations | |
346 | need be done on these insns. */ | |
347 | ||
348 | void | |
349 | save_call_clobbered_regs (insn_mode) | |
350 | enum machine_mode insn_mode; | |
351 | { | |
352 | rtx insn; | |
353 | int b; | |
354 | ||
355 | for (b = 0; b < n_basic_blocks; b++) | |
356 | { | |
357 | regset regs_live = basic_block_live_at_start[b]; | |
34536f93 | 358 | rtx prev_block_last = PREV_INSN (basic_block_head[b]); |
3245eea0 CH |
359 | REGSET_ELT_TYPE bit; |
360 | int offset, i, j; | |
c5986054 RS |
361 | int regno; |
362 | ||
363 | /* Compute hard regs live at start of block -- this is the | |
364 | real hard regs marked live, plus live pseudo regs that | |
365 | have been renumbered to hard regs. No registers have yet been | |
366 | saved because we restore all of them before the end of the basic | |
367 | block. */ | |
368 | ||
69887ad9 RK |
369 | #ifdef HARD_REG_SET |
370 | hard_regs_live = *regs_live; | |
371 | #else | |
372 | COPY_HARD_REG_SET (hard_regs_live, regs_live); | |
373 | #endif | |
c5986054 RS |
374 | |
375 | CLEAR_HARD_REG_SET (hard_regs_saved); | |
f95361c8 | 376 | CLEAR_HARD_REG_SET (hard_regs_need_restore); |
c5986054 RS |
377 | n_regs_saved = 0; |
378 | ||
379 | for (offset = 0, i = 0; offset < regset_size; offset++) | |
380 | { | |
381 | if (regs_live[offset] == 0) | |
3245eea0 | 382 | i += REGSET_ELT_BITS; |
c5986054 RS |
383 | else |
384 | for (bit = 1; bit && i < max_regno; bit <<= 1, i++) | |
385 | if ((regs_live[offset] & bit) | |
386 | && (regno = reg_renumber[i]) >= 0) | |
387 | for (j = regno; | |
388 | j < regno + HARD_REGNO_NREGS (regno, | |
389 | PSEUDO_REGNO_MODE (i)); | |
390 | j++) | |
391 | SET_HARD_REG_BIT (hard_regs_live, j); | |
f95361c8 | 392 | |
c5986054 RS |
393 | } |
394 | ||
395 | /* Now scan the insns in the block, keeping track of what hard | |
396 | regs are live as we go. When we see a call, save the live | |
397 | call-clobbered hard regs. */ | |
398 | ||
399 | for (insn = basic_block_head[b]; ; insn = NEXT_INSN (insn)) | |
400 | { | |
401 | RTX_CODE code = GET_CODE (insn); | |
402 | ||
403 | if (GET_RTX_CLASS (code) == 'i') | |
404 | { | |
405 | rtx link; | |
406 | ||
407 | /* If some registers have been saved, see if INSN references | |
408 | any of them. We must restore them before the insn if so. */ | |
409 | ||
410 | if (n_regs_saved) | |
411 | restore_referenced_regs (PATTERN (insn), insn, insn_mode); | |
412 | ||
413 | /* NB: the normal procedure is to first enliven any | |
414 | registers set by insn, then deaden any registers that | |
415 | had their last use at insn. This is incorrect now, | |
416 | since multiple pseudos may have been mapped to the | |
417 | same hard reg, and the death notes are ambiguous. So | |
418 | it must be done in the other, safe, order. */ | |
419 | ||
420 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
421 | if (REG_NOTE_KIND (link) == REG_DEAD) | |
422 | clear_reg_live (XEXP (link, 0)); | |
423 | ||
424 | /* When we reach a call, we need to save all registers that are | |
425 | live, call-used, not fixed, and not already saved. We must | |
426 | test at this point because registers that die in a CALL_INSN | |
427 | are not live across the call and likewise for registers that | |
0e6362d9 RK |
428 | are born in the CALL_INSN. |
429 | ||
430 | If registers are filled with parameters for this function, | |
431 | and some of these are also being set by this function, then | |
432 | they will not appear to die (no REG_DEAD note for them), | |
433 | to check if in fact they do, collect the set registers in | |
434 | hard_regs_live first. */ | |
c5986054 RS |
435 | |
436 | if (code == CALL_INSN) | |
f95361c8 | 437 | { |
0e6362d9 RK |
438 | HARD_REG_SET this_call_sets; |
439 | { | |
440 | HARD_REG_SET old_hard_regs_live; | |
441 | ||
442 | /* Save the hard_regs_live information. */ | |
443 | COPY_HARD_REG_SET (old_hard_regs_live, hard_regs_live); | |
444 | ||
445 | /* Now calculate hard_regs_live for this CALL_INSN | |
446 | only. */ | |
447 | CLEAR_HARD_REG_SET (hard_regs_live); | |
448 | note_stores (PATTERN (insn), set_reg_live); | |
449 | COPY_HARD_REG_SET (this_call_sets, hard_regs_live); | |
450 | ||
451 | /* Restore the hard_regs_live information. */ | |
452 | COPY_HARD_REG_SET (hard_regs_live, old_hard_regs_live); | |
453 | } | |
454 | ||
f95361c8 JL |
455 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) |
456 | if (call_used_regs[regno] && ! call_fixed_regs[regno] | |
457 | && TEST_HARD_REG_BIT (hard_regs_live, regno) | |
0e6362d9 RK |
458 | /* It must not be set by this instruction. */ |
459 | && ! TEST_HARD_REG_BIT (this_call_sets, regno) | |
f95361c8 JL |
460 | && ! TEST_HARD_REG_BIT (hard_regs_saved, regno)) |
461 | regno += insert_save_restore (insn, 1, regno, | |
462 | insn_mode, 0); | |
0e6362d9 RK |
463 | |
464 | /* Put the information for this CALL_INSN on top of what | |
465 | we already had. */ | |
466 | IOR_HARD_REG_SET (hard_regs_live, this_call_sets); | |
467 | COPY_HARD_REG_SET (hard_regs_need_restore, hard_regs_saved); | |
f95361c8 JL |
468 | |
469 | /* Must recompute n_regs_saved. */ | |
470 | n_regs_saved = 0; | |
471 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
472 | if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) | |
473 | n_regs_saved++; | |
f95361c8 | 474 | } |
0e6362d9 | 475 | else |
0887bd4b RK |
476 | { |
477 | note_stores (PATTERN (insn), set_reg_live); | |
478 | #ifdef AUTO_INC_DEC | |
479 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
480 | if (REG_NOTE_KIND (link) == REG_INC) | |
481 | set_reg_live (XEXP (link, 0), NULL_RTX); | |
482 | #endif | |
483 | } | |
c5986054 RS |
484 | |
485 | for (link = REG_NOTES (insn); link; link = XEXP (link, 1)) | |
486 | if (REG_NOTE_KIND (link) == REG_UNUSED) | |
487 | clear_reg_live (XEXP (link, 0)); | |
488 | } | |
489 | ||
490 | if (insn == basic_block_end[b]) | |
491 | break; | |
492 | } | |
493 | ||
494 | /* At the end of the basic block, we must restore any registers that | |
495 | remain saved. If the last insn in the block is a JUMP_INSN, put | |
496 | the restore before the insn, otherwise, put it after the insn. */ | |
497 | ||
498 | if (n_regs_saved) | |
499 | for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) | |
f95361c8 JL |
500 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, regno)) |
501 | regno += insert_save_restore ((GET_CODE (insn) == JUMP_INSN | |
502 | ? insn : NEXT_INSN (insn)), 0, | |
503 | regno, insn_mode, MOVE_MAX / UNITS_PER_WORD); | |
504 | ||
34536f93 RS |
505 | /* If we added any insns at the start of the block, update the start |
506 | of the block to point at those insns. */ | |
507 | basic_block_head[b] = NEXT_INSN (prev_block_last); | |
c5986054 RS |
508 | } |
509 | } | |
510 | ||
511 | /* Here from note_stores when an insn stores a value in a register. | |
512 | Set the proper bit or bits in hard_regs_live. All pseudos that have | |
513 | been assigned hard regs have had their register number changed already, | |
514 | so we can ignore pseudos. */ | |
515 | ||
516 | static void | |
517 | set_reg_live (reg, setter) | |
518 | rtx reg, setter; | |
519 | { | |
520 | register int regno, endregno, i; | |
e048626b | 521 | enum machine_mode mode = GET_MODE (reg); |
c5986054 RS |
522 | int word = 0; |
523 | ||
524 | if (GET_CODE (reg) == SUBREG) | |
525 | { | |
526 | word = SUBREG_WORD (reg); | |
527 | reg = SUBREG_REG (reg); | |
528 | } | |
529 | ||
530 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
531 | return; | |
532 | ||
533 | regno = REGNO (reg) + word; | |
e048626b | 534 | endregno = regno + HARD_REGNO_NREGS (regno, mode); |
c5986054 RS |
535 | |
536 | for (i = regno; i < endregno; i++) | |
f95361c8 JL |
537 | { |
538 | SET_HARD_REG_BIT (hard_regs_live, i); | |
539 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); | |
540 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); | |
541 | } | |
c5986054 RS |
542 | } |
543 | ||
544 | /* Here when a REG_DEAD note records the last use of a reg. Clear | |
545 | the appropriate bit or bits in hard_regs_live. Again we can ignore | |
546 | pseudos. */ | |
547 | ||
548 | static void | |
549 | clear_reg_live (reg) | |
550 | rtx reg; | |
551 | { | |
552 | register int regno, endregno, i; | |
553 | ||
554 | if (GET_CODE (reg) != REG || REGNO (reg) >= FIRST_PSEUDO_REGISTER) | |
555 | return; | |
556 | ||
557 | regno = REGNO (reg); | |
558 | endregno= regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
559 | ||
560 | for (i = regno; i < endregno; i++) | |
f95361c8 JL |
561 | { |
562 | CLEAR_HARD_REG_BIT (hard_regs_live, i); | |
563 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); | |
564 | CLEAR_HARD_REG_BIT (hard_regs_saved, i); | |
565 | } | |
c5986054 RS |
566 | } |
567 | \f | |
568 | /* If any register currently residing in the save area is referenced in X, | |
569 | which is part of INSN, emit code to restore the register in front of INSN. | |
570 | INSN_MODE is the mode to assign to any insns that we add. */ | |
571 | ||
572 | static void | |
573 | restore_referenced_regs (x, insn, insn_mode) | |
574 | rtx x; | |
575 | rtx insn; | |
576 | enum machine_mode insn_mode; | |
577 | { | |
578 | enum rtx_code code = GET_CODE (x); | |
579 | char *fmt; | |
580 | int i, j; | |
581 | ||
f95361c8 JL |
582 | if (code == CLOBBER) |
583 | return; | |
584 | ||
c5986054 RS |
585 | if (code == REG) |
586 | { | |
587 | int regno = REGNO (x); | |
588 | ||
589 | /* If this is a pseudo, scan its memory location, since it might | |
590 | involve the use of another register, which might be saved. */ | |
591 | ||
592 | if (regno >= FIRST_PSEUDO_REGISTER | |
593 | && reg_equiv_mem[regno] != 0) | |
594 | restore_referenced_regs (XEXP (reg_equiv_mem[regno], 0), | |
595 | insn, insn_mode); | |
596 | else if (regno >= FIRST_PSEUDO_REGISTER | |
597 | && reg_equiv_address[regno] != 0) | |
916f14f1 | 598 | restore_referenced_regs (reg_equiv_address[regno], |
c5986054 RS |
599 | insn, insn_mode); |
600 | ||
601 | /* Otherwise if this is a hard register, restore any piece of it that | |
602 | is currently saved. */ | |
603 | ||
604 | else if (regno < FIRST_PSEUDO_REGISTER) | |
605 | { | |
73737e86 RS |
606 | int numregs = HARD_REGNO_NREGS (regno, GET_MODE (x)); |
607 | /* Save at most SAVEREGS at a time. This can not be larger than | |
608 | MOVE_MAX, because that causes insert_save_restore to fail. */ | |
609 | int saveregs = MIN (numregs, MOVE_MAX / UNITS_PER_WORD); | |
19301310 | 610 | int endregno = regno + numregs; |
c5986054 | 611 | |
f95361c8 JL |
612 | for (i = regno; i < endregno; i++) |
613 | if (TEST_HARD_REG_BIT (hard_regs_need_restore, i)) | |
73737e86 | 614 | i += insert_save_restore (insn, 0, i, insn_mode, saveregs); |
c5986054 RS |
615 | } |
616 | ||
617 | return; | |
618 | } | |
619 | ||
620 | fmt = GET_RTX_FORMAT (code); | |
621 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
622 | { | |
623 | if (fmt[i] == 'e') | |
624 | restore_referenced_regs (XEXP (x, i), insn, insn_mode); | |
625 | else if (fmt[i] == 'E') | |
626 | for (j = XVECLEN (x, i) - 1; j >= 0; j--) | |
627 | restore_referenced_regs (XVECEXP (x, i, j), insn, insn_mode); | |
628 | } | |
629 | } | |
630 | \f | |
631 | /* Insert a sequence of insns to save or restore, SAVE_P says which, | |
632 | REGNO. Place these insns in front of INSN. INSN_MODE is the mode | |
d8ed9afb JL |
633 | to assign to these insns. MAXRESTORE is the maximum number of registers |
634 | which should be restored during this call (when SAVE_P == 0). It should | |
635 | never be less than 1 since we only work with entire registers. | |
c5986054 RS |
636 | |
637 | Note that we have verified in init_caller_save that we can do this | |
638 | with a simple SET, so use it. Set INSN_CODE to what we save there | |
639 | since the address might not be valid so the insn might not be recognized. | |
640 | These insns will be reloaded and have register elimination done by | |
f95361c8 | 641 | find_reload, so we need not worry about that here. |
c5986054 | 642 | |
f95361c8 JL |
643 | Return the extra number of registers saved. */ |
644 | ||
645 | static int | |
646 | insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) | |
c5986054 RS |
647 | rtx insn; |
648 | int save_p; | |
649 | int regno; | |
650 | enum machine_mode insn_mode; | |
f95361c8 | 651 | int maxrestore; |
c5986054 RS |
652 | { |
653 | rtx pat; | |
654 | enum insn_code code; | |
f95361c8 | 655 | int i, numregs; |
c5986054 | 656 | |
09835ed2 RK |
657 | /* A common failure mode if register status is not correct in the RTL |
658 | is for this routine to be called with a REGNO we didn't expect to | |
659 | save. That will cause us to write an insn with a (nil) SET_DEST | |
660 | or SET_SRC. Instead of doing so and causing a crash later, check | |
661 | for this common case and abort here instead. This will remove one | |
662 | step in debugging such problems. */ | |
663 | ||
f95361c8 | 664 | if (regno_save_mem[regno][1] == 0) |
09835ed2 RK |
665 | abort (); |
666 | ||
c5986054 RS |
667 | #ifdef HAVE_cc0 |
668 | /* If INSN references CC0, put our insns in front of the insn that sets | |
669 | CC0. This is always safe, since the only way we could be passed an | |
670 | insn that references CC0 is for a restore, and doing a restore earlier | |
671 | isn't a problem. We do, however, assume here that CALL_INSNs don't | |
672 | reference CC0. Guard against non-INSN's like CODE_LABEL. */ | |
673 | ||
674 | if ((GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN) | |
675 | && reg_referenced_p (cc0_rtx, PATTERN (insn))) | |
676 | insn = prev_nonnote_insn (insn); | |
677 | #endif | |
678 | ||
679 | /* Get the pattern to emit and update our status. */ | |
680 | if (save_p) | |
681 | { | |
f95361c8 JL |
682 | int i, j, k; |
683 | int ok; | |
684 | ||
685 | /* See if we can save several registers with a single instruction. | |
686 | Work backwards to the single register case. */ | |
687 | for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--) | |
688 | { | |
689 | ok = 1; | |
690 | if (regno_save_mem[regno][i] != 0) | |
691 | for (j = 0; j < i; j++) | |
692 | { | |
9233f8ce RS |
693 | if (! call_used_regs[regno + j] || call_fixed_regs[regno + j] |
694 | || ! TEST_HARD_REG_BIT (hard_regs_live, regno + j) | |
695 | || TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) | |
f95361c8 JL |
696 | ok = 0; |
697 | } | |
698 | else | |
699 | continue; | |
700 | ||
701 | /* Must do this one save at a time */ | |
702 | if (! ok) | |
703 | continue; | |
704 | ||
705 | pat = gen_rtx (SET, VOIDmode, regno_save_mem[regno][i], | |
706 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), regno)); | |
707 | code = reg_save_code[regno][i]; | |
708 | ||
709 | /* Set hard_regs_saved for all the registers we saved. */ | |
710 | for (k = 0; k < i; k++) | |
711 | { | |
712 | SET_HARD_REG_BIT (hard_regs_saved, regno + k); | |
713 | SET_HARD_REG_BIT (hard_regs_need_restore, regno + k); | |
714 | n_regs_saved++; | |
715 | } | |
716 | ||
717 | numregs = i; | |
718 | break; | |
719 | } | |
c5986054 RS |
720 | } |
721 | else | |
722 | { | |
f95361c8 JL |
723 | int i, j, k; |
724 | int ok; | |
725 | ||
726 | /* See if we can restore `maxrestore' registers at once. Work | |
727 | backwards to the single register case. */ | |
728 | for (i = maxrestore; i > 0; i--) | |
729 | { | |
730 | ok = 1; | |
731 | if (regno_save_mem[regno][i]) | |
732 | for (j = 0; j < i; j++) | |
733 | { | |
734 | if (! TEST_HARD_REG_BIT (hard_regs_need_restore, regno + j)) | |
735 | ok = 0; | |
736 | } | |
737 | else | |
738 | continue; | |
739 | ||
740 | /* Must do this one restore at a time */ | |
741 | if (! ok) | |
742 | continue; | |
743 | ||
744 | pat = gen_rtx (SET, VOIDmode, | |
745 | gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), | |
746 | regno), | |
747 | regno_save_mem[regno][i]); | |
748 | code = reg_restore_code[regno][i]; | |
c5986054 | 749 | |
f95361c8 JL |
750 | |
751 | /* Clear status for all registers we restored. */ | |
752 | for (k = 0; k < i; k++) | |
753 | { | |
754 | CLEAR_HARD_REG_BIT (hard_regs_need_restore, regno + k); | |
755 | n_regs_saved--; | |
756 | } | |
757 | ||
758 | numregs = i; | |
759 | break; | |
760 | } | |
761 | } | |
c5986054 RS |
762 | /* Emit the insn and set the code and mode. */ |
763 | ||
764 | insn = emit_insn_before (pat, insn); | |
765 | PUT_MODE (insn, insn_mode); | |
766 | INSN_CODE (insn) = code; | |
f95361c8 JL |
767 | |
768 | /* Tell our callers how many extra registers we saved/restored */ | |
769 | return numregs - 1; | |
c5986054 | 770 | } |