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9ae8ffe7 1/* Alias analysis for GNU C
6e24b709 2 Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
9ae8ffe7
JL
3 Contributed by John Carr (jfc@mit.edu).
4
1322177d 5This file is part of GCC.
9ae8ffe7 6
1322177d
LB
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
9ae8ffe7 11
1322177d
LB
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
9ae8ffe7
JL
16
17You should have received a copy of the GNU General Public License
1322177d
LB
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
9ae8ffe7
JL
21
22#include "config.h"
670ee920 23#include "system.h"
9ae8ffe7 24#include "rtl.h"
7790df19 25#include "tree.h"
6baf1cc8 26#include "tm_p.h"
49ad7cfa 27#include "function.h"
9ae8ffe7
JL
28#include "expr.h"
29#include "regs.h"
30#include "hard-reg-set.h"
e004f2f7 31#include "basic-block.h"
9ae8ffe7 32#include "flags.h"
264fac34 33#include "output.h"
2e107e9e 34#include "toplev.h"
eab5c70a 35#include "cselib.h"
3932261a 36#include "splay-tree.h"
ac606739 37#include "ggc.h"
d23c55c2 38#include "langhooks.h"
3932261a
MM
39
40/* The alias sets assigned to MEMs assist the back-end in determining
41 which MEMs can alias which other MEMs. In general, two MEMs in
ac3d9668
RK
42 different alias sets cannot alias each other, with one important
43 exception. Consider something like:
3932261a
MM
44
45 struct S {int i; double d; };
46
47 a store to an `S' can alias something of either type `int' or type
48 `double'. (However, a store to an `int' cannot alias a `double'
49 and vice versa.) We indicate this via a tree structure that looks
50 like:
51 struct S
52 / \
53 / \
54 |/_ _\|
55 int double
56
ac3d9668
RK
57 (The arrows are directed and point downwards.)
58 In this situation we say the alias set for `struct S' is the
59 `superset' and that those for `int' and `double' are `subsets'.
60
3bdf5ad1
RK
61 To see whether two alias sets can point to the same memory, we must
62 see if either alias set is a subset of the other. We need not trace
e3aafbad 63 past immediate descendents, however, since we propagate all
3bdf5ad1 64 grandchildren up one level.
3932261a
MM
65
66 Alias set zero is implicitly a superset of all other alias sets.
67 However, this is no actual entry for alias set zero. It is an
68 error to attempt to explicitly construct a subset of zero. */
69
d4b60170
RK
70typedef struct alias_set_entry
71{
3932261a 72 /* The alias set number, as stored in MEM_ALIAS_SET. */
3bdf5ad1 73 HOST_WIDE_INT alias_set;
3932261a
MM
74
75 /* The children of the alias set. These are not just the immediate
e3aafbad 76 children, but, in fact, all descendents. So, if we have:
3932261a
MM
77
78 struct T { struct S s; float f; }
79
80 continuing our example above, the children here will be all of
81 `int', `double', `float', and `struct S'. */
82 splay_tree children;
2bf105ab
RK
83
84 /* Nonzero if would have a child of zero: this effectively makes this
85 alias set the same as alias set zero. */
86 int has_zero_child;
d4b60170 87} *alias_set_entry;
9ae8ffe7 88
3d994c6b
KG
89static int rtx_equal_for_memref_p PARAMS ((rtx, rtx));
90static rtx find_symbolic_term PARAMS ((rtx));
a13d4ebf 91rtx get_addr PARAMS ((rtx));
3d994c6b
KG
92static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx,
93 HOST_WIDE_INT));
94static void record_set PARAMS ((rtx, rtx, void *));
95static rtx find_base_term PARAMS ((rtx));
96static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode,
97 enum machine_mode));
98static rtx find_base_value PARAMS ((rtx));
99static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx));
100static int insert_subset_children PARAMS ((splay_tree_node, void*));
738cc472 101static tree find_base_decl PARAMS ((tree));
3bdf5ad1 102static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT));
eab5c70a 103static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx,
e38fe8e0 104 int (*) (rtx, int)));
3d994c6b 105static int aliases_everything_p PARAMS ((rtx));
998d7deb
RH
106static bool nonoverlapping_component_refs_p PARAMS ((tree, tree));
107static tree decl_for_component_ref PARAMS ((tree));
108static rtx adjust_offset_for_component_ref PARAMS ((tree, rtx));
a4311dfe 109static int nonoverlapping_memrefs_p PARAMS ((rtx, rtx));
3d994c6b 110static int write_dependence_p PARAMS ((rtx, rtx, int));
bf6d9fd7 111static int nonlocal_mentioned_p PARAMS ((rtx));
9ae8ffe7
JL
112
113/* Set up all info needed to perform alias analysis on memory references. */
114
d4b60170 115/* Returns the size in bytes of the mode of X. */
9ae8ffe7
JL
116#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
117
41472af8 118/* Returns nonzero if MEM1 and MEM2 do not alias because they are in
264fac34
MM
119 different alias sets. We ignore alias sets in functions making use
120 of variable arguments because the va_arg macros on some systems are
121 not legal ANSI C. */
122#define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
3932261a 123 mems_in_disjoint_alias_sets_p (MEM1, MEM2)
41472af8 124
ea64ef27 125/* Cap the number of passes we make over the insns propagating alias
ac3d9668 126 information through set chains. 10 is a completely arbitrary choice. */
ea64ef27
JL
127#define MAX_ALIAS_LOOP_PASSES 10
128
9ae8ffe7
JL
129/* reg_base_value[N] gives an address to which register N is related.
130 If all sets after the first add or subtract to the current value
131 or otherwise modify it so it does not point to a different top level
132 object, reg_base_value[N] is equal to the address part of the source
2a2c8203
JC
133 of the first set.
134
135 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
136 expressions represent certain special values: function arguments and
b3b5ad95
JL
137 the stack, frame, and argument pointers.
138
139 The contents of an ADDRESS is not normally used, the mode of the
140 ADDRESS determines whether the ADDRESS is a function argument or some
141 other special value. Pointer equality, not rtx_equal_p, determines whether
142 two ADDRESS expressions refer to the same base address.
143
144 The only use of the contents of an ADDRESS is for determining if the
145 current function performs nonlocal memory memory references for the
146 purposes of marking the function as a constant function. */
2a2c8203 147
ac606739
GS
148static rtx *reg_base_value;
149static rtx *new_reg_base_value;
d4b60170
RK
150static unsigned int reg_base_value_size; /* size of reg_base_value array */
151
9ae8ffe7 152#define REG_BASE_VALUE(X) \
fb6754f0
BS
153 (REGNO (X) < reg_base_value_size \
154 ? reg_base_value[REGNO (X)] : 0)
9ae8ffe7 155
de12be17
JC
156/* Vector of known invariant relationships between registers. Set in
157 loop unrolling. Indexed by register number, if nonzero the value
158 is an expression describing this register in terms of another.
159
160 The length of this array is REG_BASE_VALUE_SIZE.
161
162 Because this array contains only pseudo registers it has no effect
163 after reload. */
164static rtx *alias_invariant;
165
c13e8210
MM
166/* Vector indexed by N giving the initial (unchanging) value known for
167 pseudo-register N. This array is initialized in
168 init_alias_analysis, and does not change until end_alias_analysis
169 is called. */
9ae8ffe7
JL
170rtx *reg_known_value;
171
172/* Indicates number of valid entries in reg_known_value. */
770ae6cc 173static unsigned int reg_known_value_size;
9ae8ffe7
JL
174
175/* Vector recording for each reg_known_value whether it is due to a
176 REG_EQUIV note. Future passes (viz., reload) may replace the
177 pseudo with the equivalent expression and so we account for the
ac3d9668
RK
178 dependences that would be introduced if that happens.
179
180 The REG_EQUIV notes created in assign_parms may mention the arg
181 pointer, and there are explicit insns in the RTL that modify the
182 arg pointer. Thus we must ensure that such insns don't get
183 scheduled across each other because that would invalidate the
184 REG_EQUIV notes. One could argue that the REG_EQUIV notes are
185 wrong, but solving the problem in the scheduler will likely give
186 better code, so we do it here. */
9ae8ffe7
JL
187char *reg_known_equiv_p;
188
2a2c8203
JC
189/* True when scanning insns from the start of the rtl to the
190 NOTE_INSN_FUNCTION_BEG note. */
9ae8ffe7
JL
191static int copying_arguments;
192
3932261a 193/* The splay-tree used to store the various alias set entries. */
3932261a 194static splay_tree alias_sets;
ac3d9668 195\f
3932261a
MM
196/* Returns a pointer to the alias set entry for ALIAS_SET, if there is
197 such an entry, or NULL otherwise. */
198
199static alias_set_entry
200get_alias_set_entry (alias_set)
3bdf5ad1 201 HOST_WIDE_INT alias_set;
3932261a 202{
d4b60170
RK
203 splay_tree_node sn
204 = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set);
3932261a 205
d4b60170 206 return sn != 0 ? ((alias_set_entry) sn->value) : 0;
3932261a
MM
207}
208
ac3d9668
RK
209/* Returns nonzero if the alias sets for MEM1 and MEM2 are such that
210 the two MEMs cannot alias each other. */
3932261a
MM
211
212static int
213mems_in_disjoint_alias_sets_p (mem1, mem2)
214 rtx mem1;
215 rtx mem2;
216{
3932261a
MM
217#ifdef ENABLE_CHECKING
218/* Perform a basic sanity check. Namely, that there are no alias sets
219 if we're not using strict aliasing. This helps to catch bugs
220 whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or
221 where a MEM is allocated in some way other than by the use of
222 gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to
223 use alias sets to indicate that spilled registers cannot alias each
224 other, we might need to remove this check. */
d4b60170
RK
225 if (! flag_strict_aliasing
226 && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0))
3932261a
MM
227 abort ();
228#endif
229
1da68f56
RK
230 return ! alias_sets_conflict_p (MEM_ALIAS_SET (mem1), MEM_ALIAS_SET (mem2));
231}
3932261a 232
1da68f56
RK
233/* Insert the NODE into the splay tree given by DATA. Used by
234 record_alias_subset via splay_tree_foreach. */
235
236static int
237insert_subset_children (node, data)
238 splay_tree_node node;
239 void *data;
240{
241 splay_tree_insert ((splay_tree) data, node->key, node->value);
242
243 return 0;
244}
245
246/* Return 1 if the two specified alias sets may conflict. */
247
248int
249alias_sets_conflict_p (set1, set2)
250 HOST_WIDE_INT set1, set2;
251{
252 alias_set_entry ase;
253
254 /* If have no alias set information for one of the operands, we have
255 to assume it can alias anything. */
256 if (set1 == 0 || set2 == 0
257 /* If the two alias sets are the same, they may alias. */
258 || set1 == set2)
259 return 1;
3932261a 260
3bdf5ad1 261 /* See if the first alias set is a subset of the second. */
1da68f56 262 ase = get_alias_set_entry (set1);
2bf105ab
RK
263 if (ase != 0
264 && (ase->has_zero_child
265 || splay_tree_lookup (ase->children,
1da68f56
RK
266 (splay_tree_key) set2)))
267 return 1;
3932261a
MM
268
269 /* Now do the same, but with the alias sets reversed. */
1da68f56 270 ase = get_alias_set_entry (set2);
2bf105ab
RK
271 if (ase != 0
272 && (ase->has_zero_child
273 || splay_tree_lookup (ase->children,
1da68f56
RK
274 (splay_tree_key) set1)))
275 return 1;
3932261a 276
1da68f56 277 /* The two alias sets are distinct and neither one is the
3932261a 278 child of the other. Therefore, they cannot alias. */
1da68f56 279 return 0;
3932261a 280}
1da68f56
RK
281\f
282/* Return 1 if TYPE is a RECORD_TYPE, UNION_TYPE, or QUAL_UNION_TYPE and has
283 has any readonly fields. If any of the fields have types that
284 contain readonly fields, return true as well. */
3932261a 285
1da68f56
RK
286int
287readonly_fields_p (type)
288 tree type;
3932261a 289{
1da68f56
RK
290 tree field;
291
292 if (TREE_CODE (type) != RECORD_TYPE && TREE_CODE (type) != UNION_TYPE
293 && TREE_CODE (type) != QUAL_UNION_TYPE)
294 return 0;
295
296 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
297 if (TREE_CODE (field) == FIELD_DECL
298 && (TREE_READONLY (field)
299 || readonly_fields_p (TREE_TYPE (field))))
300 return 1;
3932261a
MM
301
302 return 0;
303}
3bdf5ad1 304\f
1da68f56
RK
305/* Return 1 if any MEM object of type T1 will always conflict (using the
306 dependency routines in this file) with any MEM object of type T2.
307 This is used when allocating temporary storage. If T1 and/or T2 are
308 NULL_TREE, it means we know nothing about the storage. */
309
310int
311objects_must_conflict_p (t1, t2)
312 tree t1, t2;
313{
e8ea2809
RK
314 /* If neither has a type specified, we don't know if they'll conflict
315 because we may be using them to store objects of various types, for
316 example the argument and local variables areas of inlined functions. */
981a4c34 317 if (t1 == 0 && t2 == 0)
e8ea2809
RK
318 return 0;
319
66cce54d
RH
320 /* If one or the other has readonly fields or is readonly,
321 then they may not conflict. */
322 if ((t1 != 0 && readonly_fields_p (t1))
323 || (t2 != 0 && readonly_fields_p (t2))
324 || (t1 != 0 && TYPE_READONLY (t1))
325 || (t2 != 0 && TYPE_READONLY (t2)))
326 return 0;
327
1da68f56
RK
328 /* If they are the same type, they must conflict. */
329 if (t1 == t2
330 /* Likewise if both are volatile. */
331 || (t1 != 0 && TYPE_VOLATILE (t1) && t2 != 0 && TYPE_VOLATILE (t2)))
332 return 1;
333
66cce54d
RH
334 /* If one is aggregate and the other is scalar then they may not
335 conflict. */
336 if ((t1 != 0 && AGGREGATE_TYPE_P (t1))
337 != (t2 != 0 && AGGREGATE_TYPE_P (t2)))
1da68f56
RK
338 return 0;
339
ec5c56db 340 /* Otherwise they conflict only if the alias sets conflict. */
1da68f56
RK
341 return alias_sets_conflict_p (t1 ? get_alias_set (t1) : 0,
342 t2 ? get_alias_set (t2) : 0);
343}
344\f
3bdf5ad1
RK
345/* T is an expression with pointer type. Find the DECL on which this
346 expression is based. (For example, in `a[i]' this would be `a'.)
347 If there is no such DECL, or a unique decl cannot be determined,
f5143c46 348 NULL_TREE is returned. */
3bdf5ad1
RK
349
350static tree
351find_base_decl (t)
352 tree t;
353{
354 tree d0, d1, d2;
355
356 if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t)))
357 return 0;
358
359 /* If this is a declaration, return it. */
360 if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd')
361 return t;
362
363 /* Handle general expressions. It would be nice to deal with
364 COMPONENT_REFs here. If we could tell that `a' and `b' were the
365 same, then `a->f' and `b->f' are also the same. */
366 switch (TREE_CODE_CLASS (TREE_CODE (t)))
367 {
368 case '1':
369 return find_base_decl (TREE_OPERAND (t, 0));
370
371 case '2':
372 /* Return 0 if found in neither or both are the same. */
373 d0 = find_base_decl (TREE_OPERAND (t, 0));
374 d1 = find_base_decl (TREE_OPERAND (t, 1));
375 if (d0 == d1)
376 return d0;
377 else if (d0 == 0)
378 return d1;
379 else if (d1 == 0)
380 return d0;
381 else
382 return 0;
383
384 case '3':
385 d0 = find_base_decl (TREE_OPERAND (t, 0));
386 d1 = find_base_decl (TREE_OPERAND (t, 1));
3bdf5ad1
RK
387 d2 = find_base_decl (TREE_OPERAND (t, 2));
388
389 /* Set any nonzero values from the last, then from the first. */
390 if (d1 == 0) d1 = d2;
391 if (d0 == 0) d0 = d1;
392 if (d1 == 0) d1 = d0;
393 if (d2 == 0) d2 = d1;
394
395 /* At this point all are nonzero or all are zero. If all three are the
396 same, return it. Otherwise, return zero. */
397 return (d0 == d1 && d1 == d2) ? d0 : 0;
398
399 default:
400 return 0;
401 }
402}
403
6e24b709
RK
404/* Return 1 if all the nested component references handled by
405 get_inner_reference in T are such that we can address the object in T. */
406
10b76d73 407int
6e24b709
RK
408can_address_p (t)
409 tree t;
410{
411 /* If we're at the end, it is vacuously addressable. */
412 if (! handled_component_p (t))
413 return 1;
414
415 /* Bitfields are never addressable. */
416 else if (TREE_CODE (t) == BIT_FIELD_REF)
417 return 0;
418
8ac61af7
RK
419 /* Fields are addressable unless they are marked as nonaddressable or
420 the containing type has alias set 0. */
6e24b709
RK
421 else if (TREE_CODE (t) == COMPONENT_REF
422 && ! DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1))
8ac61af7 423 && get_alias_set (TREE_TYPE (TREE_OPERAND (t, 0))) != 0
6e24b709
RK
424 && can_address_p (TREE_OPERAND (t, 0)))
425 return 1;
426
8ac61af7 427 /* Likewise for arrays. */
b4e3fabb 428 else if ((TREE_CODE (t) == ARRAY_REF || TREE_CODE (t) == ARRAY_RANGE_REF)
6e24b709 429 && ! TYPE_NONALIASED_COMPONENT (TREE_TYPE (TREE_OPERAND (t, 0)))
8ac61af7 430 && get_alias_set (TREE_TYPE (TREE_OPERAND (t, 0))) != 0
6e24b709
RK
431 && can_address_p (TREE_OPERAND (t, 0)))
432 return 1;
433
434 return 0;
435}
436
3bdf5ad1
RK
437/* Return the alias set for T, which may be either a type or an
438 expression. Call language-specific routine for help, if needed. */
439
440HOST_WIDE_INT
441get_alias_set (t)
442 tree t;
443{
444 HOST_WIDE_INT set;
3bdf5ad1
RK
445
446 /* If we're not doing any alias analysis, just assume everything
447 aliases everything else. Also return 0 if this or its type is
448 an error. */
449 if (! flag_strict_aliasing || t == error_mark_node
450 || (! TYPE_P (t)
451 && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node)))
452 return 0;
453
454 /* We can be passed either an expression or a type. This and the
f47e9b4e
RK
455 language-specific routine may make mutually-recursive calls to each other
456 to figure out what to do. At each juncture, we see if this is a tree
457 that the language may need to handle specially. First handle things that
738cc472 458 aren't types. */
f824e5c3 459 if (! TYPE_P (t))
3bdf5ad1 460 {
738cc472
RK
461 tree inner = t;
462 tree placeholder_ptr = 0;
463
8ac61af7
RK
464 /* Remove any nops, then give the language a chance to do
465 something with this tree before we look at it. */
466 STRIP_NOPS (t);
467 set = (*lang_hooks.get_alias_set) (t);
468 if (set != -1)
469 return set;
470
738cc472 471 /* First see if the actual object referenced is an INDIRECT_REF from a
8ac61af7 472 restrict-qualified pointer or a "void *". Replace
738cc472 473 PLACEHOLDER_EXPRs. */
8ac61af7 474 while (TREE_CODE (inner) == PLACEHOLDER_EXPR
738cc472
RK
475 || handled_component_p (inner))
476 {
477 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
478 inner = find_placeholder (inner, &placeholder_ptr);
479 else
480 inner = TREE_OPERAND (inner, 0);
8ac61af7
RK
481
482 STRIP_NOPS (inner);
738cc472
RK
483 }
484
485 /* Check for accesses through restrict-qualified pointers. */
486 if (TREE_CODE (inner) == INDIRECT_REF)
487 {
488 tree decl = find_base_decl (TREE_OPERAND (inner, 0));
489
490 if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl))
491 {
e5837c07 492 /* If we haven't computed the actual alias set, do it now. */
738cc472
RK
493 if (DECL_POINTER_ALIAS_SET (decl) == -2)
494 {
495 /* No two restricted pointers can point at the same thing.
496 However, a restricted pointer can point at the same thing
497 as an unrestricted pointer, if that unrestricted pointer
498 is based on the restricted pointer. So, we make the
499 alias set for the restricted pointer a subset of the
500 alias set for the type pointed to by the type of the
501 decl. */
502 HOST_WIDE_INT pointed_to_alias_set
503 = get_alias_set (TREE_TYPE (TREE_TYPE (decl)));
504
505 if (pointed_to_alias_set == 0)
506 /* It's not legal to make a subset of alias set zero. */
507 ;
508 else
509 {
510 DECL_POINTER_ALIAS_SET (decl) = new_alias_set ();
511 record_alias_subset (pointed_to_alias_set,
512 DECL_POINTER_ALIAS_SET (decl));
513 }
514 }
515
516 /* We use the alias set indicated in the declaration. */
517 return DECL_POINTER_ALIAS_SET (decl);
518 }
519
520 /* If we have an INDIRECT_REF via a void pointer, we don't
521 know anything about what that might alias. */
522 else if (TREE_CODE (TREE_TYPE (inner)) == VOID_TYPE)
523 return 0;
524 }
525
526 /* Otherwise, pick up the outermost object that we could have a pointer
527 to, processing conversion and PLACEHOLDER_EXPR as above. */
528 placeholder_ptr = 0;
8ac61af7 529 while (TREE_CODE (t) == PLACEHOLDER_EXPR
f47e9b4e
RK
530 || (handled_component_p (t) && ! can_address_p (t)))
531 {
f47e9b4e 532 if (TREE_CODE (t) == PLACEHOLDER_EXPR)
738cc472 533 t = find_placeholder (t, &placeholder_ptr);
f47e9b4e
RK
534 else
535 t = TREE_OPERAND (t, 0);
f824e5c3 536
8ac61af7
RK
537 STRIP_NOPS (t);
538 }
f824e5c3 539
738cc472
RK
540 /* If we've already determined the alias set for a decl, just return
541 it. This is necessary for C++ anonymous unions, whose component
542 variables don't look like union members (boo!). */
5755cd38
JM
543 if (TREE_CODE (t) == VAR_DECL
544 && DECL_RTL_SET_P (t) && GET_CODE (DECL_RTL (t)) == MEM)
545 return MEM_ALIAS_SET (DECL_RTL (t));
546
f824e5c3
RK
547 /* Now all we care about is the type. */
548 t = TREE_TYPE (t);
3bdf5ad1
RK
549 }
550
3bdf5ad1
RK
551 /* Variant qualifiers don't affect the alias set, so get the main
552 variant. If this is a type with a known alias set, return it. */
553 t = TYPE_MAIN_VARIANT (t);
738cc472 554 if (TYPE_ALIAS_SET_KNOWN_P (t))
3bdf5ad1
RK
555 return TYPE_ALIAS_SET (t);
556
557 /* See if the language has special handling for this type. */
8ac61af7
RK
558 set = (*lang_hooks.get_alias_set) (t);
559 if (set != -1)
738cc472 560 return set;
2bf105ab 561
3bdf5ad1
RK
562 /* There are no objects of FUNCTION_TYPE, so there's no point in
563 using up an alias set for them. (There are, of course, pointers
564 and references to functions, but that's different.) */
565 else if (TREE_CODE (t) == FUNCTION_TYPE)
566 set = 0;
567 else
568 /* Otherwise make a new alias set for this type. */
569 set = new_alias_set ();
570
571 TYPE_ALIAS_SET (t) = set;
2bf105ab
RK
572
573 /* If this is an aggregate type, we must record any component aliasing
574 information. */
1d79fd2c 575 if (AGGREGATE_TYPE_P (t) || TREE_CODE (t) == COMPLEX_TYPE)
2bf105ab
RK
576 record_component_aliases (t);
577
3bdf5ad1
RK
578 return set;
579}
580
581/* Return a brand-new alias set. */
582
583HOST_WIDE_INT
584new_alias_set ()
585{
586 static HOST_WIDE_INT last_alias_set;
587
588 if (flag_strict_aliasing)
589 return ++last_alias_set;
590 else
591 return 0;
592}
3932261a
MM
593
594/* Indicate that things in SUBSET can alias things in SUPERSET, but
595 not vice versa. For example, in C, a store to an `int' can alias a
596 structure containing an `int', but not vice versa. Here, the
597 structure would be the SUPERSET and `int' the SUBSET. This
a0c33338 598 function should be called only once per SUPERSET/SUBSET pair.
3932261a
MM
599
600 It is illegal for SUPERSET to be zero; everything is implicitly a
601 subset of alias set zero. */
602
603void
604record_alias_subset (superset, subset)
3bdf5ad1
RK
605 HOST_WIDE_INT superset;
606 HOST_WIDE_INT subset;
3932261a
MM
607{
608 alias_set_entry superset_entry;
609 alias_set_entry subset_entry;
610
f47e9b4e
RK
611 /* It is possible in complex type situations for both sets to be the same,
612 in which case we can ignore this operation. */
613 if (superset == subset)
614 return;
615
3932261a
MM
616 if (superset == 0)
617 abort ();
618
619 superset_entry = get_alias_set_entry (superset);
d4b60170 620 if (superset_entry == 0)
3932261a
MM
621 {
622 /* Create an entry for the SUPERSET, so that we have a place to
623 attach the SUBSET. */
d4b60170
RK
624 superset_entry
625 = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry));
3932261a
MM
626 superset_entry->alias_set = superset;
627 superset_entry->children
30f72379 628 = splay_tree_new (splay_tree_compare_ints, 0, 0);
570eb5c8 629 superset_entry->has_zero_child = 0;
d4b60170 630 splay_tree_insert (alias_sets, (splay_tree_key) superset,
3932261a 631 (splay_tree_value) superset_entry);
3932261a
MM
632 }
633
2bf105ab
RK
634 if (subset == 0)
635 superset_entry->has_zero_child = 1;
636 else
637 {
638 subset_entry = get_alias_set_entry (subset);
639 /* If there is an entry for the subset, enter all of its children
640 (if they are not already present) as children of the SUPERSET. */
641 if (subset_entry)
642 {
643 if (subset_entry->has_zero_child)
644 superset_entry->has_zero_child = 1;
d4b60170 645
2bf105ab
RK
646 splay_tree_foreach (subset_entry->children, insert_subset_children,
647 superset_entry->children);
648 }
3932261a 649
2bf105ab
RK
650 /* Enter the SUBSET itself as a child of the SUPERSET. */
651 splay_tree_insert (superset_entry->children,
652 (splay_tree_key) subset, 0);
653 }
3932261a
MM
654}
655
a0c33338
RK
656/* Record that component types of TYPE, if any, are part of that type for
657 aliasing purposes. For record types, we only record component types
658 for fields that are marked addressable. For array types, we always
659 record the component types, so the front end should not call this
660 function if the individual component aren't addressable. */
661
662void
663record_component_aliases (type)
664 tree type;
665{
3bdf5ad1 666 HOST_WIDE_INT superset = get_alias_set (type);
a0c33338
RK
667 tree field;
668
669 if (superset == 0)
670 return;
671
672 switch (TREE_CODE (type))
673 {
674 case ARRAY_TYPE:
2bf105ab
RK
675 if (! TYPE_NONALIASED_COMPONENT (type))
676 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
a0c33338
RK
677 break;
678
679 case RECORD_TYPE:
680 case UNION_TYPE:
681 case QUAL_UNION_TYPE:
682 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
b16a49a1 683 if (TREE_CODE (field) == FIELD_DECL && ! DECL_NONADDRESSABLE_P (field))
2bf105ab 684 record_alias_subset (superset, get_alias_set (TREE_TYPE (field)));
a0c33338
RK
685 break;
686
1d79fd2c
JW
687 case COMPLEX_TYPE:
688 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
689 break;
690
a0c33338
RK
691 default:
692 break;
693 }
694}
695
3bdf5ad1
RK
696/* Allocate an alias set for use in storing and reading from the varargs
697 spill area. */
698
699HOST_WIDE_INT
700get_varargs_alias_set ()
701{
702 static HOST_WIDE_INT set = -1;
703
704 if (set == -1)
705 set = new_alias_set ();
706
707 return set;
708}
709
710/* Likewise, but used for the fixed portions of the frame, e.g., register
711 save areas. */
712
713HOST_WIDE_INT
714get_frame_alias_set ()
715{
716 static HOST_WIDE_INT set = -1;
717
718 if (set == -1)
719 set = new_alias_set ();
720
721 return set;
722}
723
2a2c8203
JC
724/* Inside SRC, the source of a SET, find a base address. */
725
9ae8ffe7
JL
726static rtx
727find_base_value (src)
b3694847 728 rtx src;
9ae8ffe7 729{
713f41f9 730 unsigned int regno;
0aacc8ed 731
9ae8ffe7
JL
732 switch (GET_CODE (src))
733 {
734 case SYMBOL_REF:
735 case LABEL_REF:
736 return src;
737
738 case REG:
fb6754f0 739 regno = REGNO (src);
d4b60170 740 /* At the start of a function, argument registers have known base
2a2c8203
JC
741 values which may be lost later. Returning an ADDRESS
742 expression here allows optimization based on argument values
743 even when the argument registers are used for other purposes. */
713f41f9
BS
744 if (regno < FIRST_PSEUDO_REGISTER && copying_arguments)
745 return new_reg_base_value[regno];
73774bc7 746
eaf407a5 747 /* If a pseudo has a known base value, return it. Do not do this
9b462c42
RH
748 for non-fixed hard regs since it can result in a circular
749 dependency chain for registers which have values at function entry.
eaf407a5
JL
750
751 The test above is not sufficient because the scheduler may move
752 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
9b462c42 753 if ((regno >= FIRST_PSEUDO_REGISTER || fixed_regs[regno])
713f41f9
BS
754 && regno < reg_base_value_size
755 && reg_base_value[regno])
756 return reg_base_value[regno];
73774bc7 757
9ae8ffe7
JL
758 return src;
759
760 case MEM:
761 /* Check for an argument passed in memory. Only record in the
762 copying-arguments block; it is too hard to track changes
763 otherwise. */
764 if (copying_arguments
765 && (XEXP (src, 0) == arg_pointer_rtx
766 || (GET_CODE (XEXP (src, 0)) == PLUS
767 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
38a448ca 768 return gen_rtx_ADDRESS (VOIDmode, src);
9ae8ffe7
JL
769 return 0;
770
771 case CONST:
772 src = XEXP (src, 0);
773 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
774 break;
d4b60170 775
ec5c56db 776 /* ... fall through ... */
2a2c8203 777
9ae8ffe7
JL
778 case PLUS:
779 case MINUS:
2a2c8203 780 {
ec907dd8
JL
781 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
782
0134bf2d
DE
783 /* If either operand is a REG that is a known pointer, then it
784 is the base. */
785 if (REG_P (src_0) && REG_POINTER (src_0))
786 return find_base_value (src_0);
787 if (REG_P (src_1) && REG_POINTER (src_1))
788 return find_base_value (src_1);
789
ec907dd8
JL
790 /* If either operand is a REG, then see if we already have
791 a known value for it. */
0134bf2d 792 if (REG_P (src_0))
ec907dd8
JL
793 {
794 temp = find_base_value (src_0);
d4b60170 795 if (temp != 0)
ec907dd8
JL
796 src_0 = temp;
797 }
798
0134bf2d 799 if (REG_P (src_1))
ec907dd8
JL
800 {
801 temp = find_base_value (src_1);
d4b60170 802 if (temp!= 0)
ec907dd8
JL
803 src_1 = temp;
804 }
2a2c8203 805
0134bf2d
DE
806 /* If either base is named object or a special address
807 (like an argument or stack reference), then use it for the
808 base term. */
809 if (src_0 != 0
810 && (GET_CODE (src_0) == SYMBOL_REF
811 || GET_CODE (src_0) == LABEL_REF
812 || (GET_CODE (src_0) == ADDRESS
813 && GET_MODE (src_0) != VOIDmode)))
814 return src_0;
815
816 if (src_1 != 0
817 && (GET_CODE (src_1) == SYMBOL_REF
818 || GET_CODE (src_1) == LABEL_REF
819 || (GET_CODE (src_1) == ADDRESS
820 && GET_MODE (src_1) != VOIDmode)))
821 return src_1;
822
d4b60170 823 /* Guess which operand is the base address:
ec907dd8
JL
824 If either operand is a symbol, then it is the base. If
825 either operand is a CONST_INT, then the other is the base. */
d4b60170 826 if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0))
2a2c8203 827 return find_base_value (src_0);
d4b60170 828 else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1))
ec907dd8
JL
829 return find_base_value (src_1);
830
9ae8ffe7 831 return 0;
2a2c8203
JC
832 }
833
834 case LO_SUM:
835 /* The standard form is (lo_sum reg sym) so look only at the
836 second operand. */
837 return find_base_value (XEXP (src, 1));
9ae8ffe7
JL
838
839 case AND:
840 /* If the second operand is constant set the base
ec5c56db 841 address to the first operand. */
2a2c8203
JC
842 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
843 return find_base_value (XEXP (src, 0));
9ae8ffe7
JL
844 return 0;
845
61f0131c
R
846 case TRUNCATE:
847 if (GET_MODE_SIZE (GET_MODE (src)) < GET_MODE_SIZE (Pmode))
848 break;
849 /* Fall through. */
9ae8ffe7 850 case HIGH:
d288e53d
DE
851 case PRE_INC:
852 case PRE_DEC:
853 case POST_INC:
854 case POST_DEC:
855 case PRE_MODIFY:
856 case POST_MODIFY:
2a2c8203 857 return find_base_value (XEXP (src, 0));
1d300e19 858
0aacc8ed
RK
859 case ZERO_EXTEND:
860 case SIGN_EXTEND: /* used for NT/Alpha pointers */
861 {
862 rtx temp = find_base_value (XEXP (src, 0));
863
864#ifdef POINTERS_EXTEND_UNSIGNED
865 if (temp != 0 && CONSTANT_P (temp) && GET_MODE (temp) != Pmode)
866 temp = convert_memory_address (Pmode, temp);
867#endif
868
869 return temp;
870 }
871
1d300e19
KG
872 default:
873 break;
9ae8ffe7
JL
874 }
875
876 return 0;
877}
878
879/* Called from init_alias_analysis indirectly through note_stores. */
880
d4b60170 881/* While scanning insns to find base values, reg_seen[N] is nonzero if
9ae8ffe7
JL
882 register N has been set in this function. */
883static char *reg_seen;
884
13309a5f
JC
885/* Addresses which are known not to alias anything else are identified
886 by a unique integer. */
ec907dd8
JL
887static int unique_id;
888
2a2c8203 889static void
84832317 890record_set (dest, set, data)
9ae8ffe7 891 rtx dest, set;
84832317 892 void *data ATTRIBUTE_UNUSED;
9ae8ffe7 893{
b3694847 894 unsigned regno;
9ae8ffe7
JL
895 rtx src;
896
897 if (GET_CODE (dest) != REG)
898 return;
899
fb6754f0 900 regno = REGNO (dest);
9ae8ffe7 901
ac606739
GS
902 if (regno >= reg_base_value_size)
903 abort ();
904
9ae8ffe7
JL
905 if (set)
906 {
907 /* A CLOBBER wipes out any old value but does not prevent a previously
908 unset register from acquiring a base address (i.e. reg_seen is not
909 set). */
910 if (GET_CODE (set) == CLOBBER)
911 {
ec907dd8 912 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
913 return;
914 }
915 src = SET_SRC (set);
916 }
917 else
918 {
9ae8ffe7
JL
919 if (reg_seen[regno])
920 {
ec907dd8 921 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
922 return;
923 }
924 reg_seen[regno] = 1;
38a448ca
RH
925 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
926 GEN_INT (unique_id++));
9ae8ffe7
JL
927 return;
928 }
929
930 /* This is not the first set. If the new value is not related to the
931 old value, forget the base value. Note that the following code is
932 not detected:
933 extern int x, y; int *p = &x; p += (&y-&x);
934 ANSI C does not allow computing the difference of addresses
935 of distinct top level objects. */
ec907dd8 936 if (new_reg_base_value[regno])
9ae8ffe7
JL
937 switch (GET_CODE (src))
938 {
2a2c8203 939 case LO_SUM:
9ae8ffe7
JL
940 case MINUS:
941 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
ec907dd8 942 new_reg_base_value[regno] = 0;
9ae8ffe7 943 break;
61f0131c
R
944 case PLUS:
945 /* If the value we add in the PLUS is also a valid base value,
946 this might be the actual base value, and the original value
947 an index. */
948 {
949 rtx other = NULL_RTX;
950
951 if (XEXP (src, 0) == dest)
952 other = XEXP (src, 1);
953 else if (XEXP (src, 1) == dest)
954 other = XEXP (src, 0);
955
956 if (! other || find_base_value (other))
957 new_reg_base_value[regno] = 0;
958 break;
959 }
9ae8ffe7
JL
960 case AND:
961 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
ec907dd8 962 new_reg_base_value[regno] = 0;
9ae8ffe7 963 break;
9ae8ffe7 964 default:
ec907dd8 965 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
966 break;
967 }
968 /* If this is the first set of a register, record the value. */
969 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
ec907dd8
JL
970 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
971 new_reg_base_value[regno] = find_base_value (src);
9ae8ffe7
JL
972
973 reg_seen[regno] = 1;
974}
975
ac3d9668
RK
976/* Called from loop optimization when a new pseudo-register is
977 created. It indicates that REGNO is being set to VAL. f INVARIANT
978 is true then this value also describes an invariant relationship
979 which can be used to deduce that two registers with unknown values
980 are different. */
d4b60170 981
9ae8ffe7 982void
de12be17 983record_base_value (regno, val, invariant)
ac3d9668 984 unsigned int regno;
9ae8ffe7 985 rtx val;
de12be17 986 int invariant;
9ae8ffe7 987{
ac3d9668 988 if (regno >= reg_base_value_size)
9ae8ffe7 989 return;
de12be17 990
de12be17
JC
991 if (invariant && alias_invariant)
992 alias_invariant[regno] = val;
993
9ae8ffe7
JL
994 if (GET_CODE (val) == REG)
995 {
fb6754f0
BS
996 if (REGNO (val) < reg_base_value_size)
997 reg_base_value[regno] = reg_base_value[REGNO (val)];
d4b60170 998
9ae8ffe7
JL
999 return;
1000 }
d4b60170 1001
9ae8ffe7
JL
1002 reg_base_value[regno] = find_base_value (val);
1003}
1004
43fe47ca
JW
1005/* Clear alias info for a register. This is used if an RTL transformation
1006 changes the value of a register. This is used in flow by AUTO_INC_DEC
1007 optimizations. We don't need to clear reg_base_value, since flow only
1008 changes the offset. */
1009
1010void
5197bd50
RK
1011clear_reg_alias_info (reg)
1012 rtx reg;
43fe47ca 1013{
4e1a4144
JW
1014 unsigned int regno = REGNO (reg);
1015
1016 if (regno < reg_known_value_size && regno >= FIRST_PSEUDO_REGISTER)
1017 reg_known_value[regno] = reg;
43fe47ca
JW
1018}
1019
db048faf
MM
1020/* Returns a canonical version of X, from the point of view alias
1021 analysis. (For example, if X is a MEM whose address is a register,
1022 and the register has a known value (say a SYMBOL_REF), then a MEM
1023 whose address is the SYMBOL_REF is returned.) */
1024
1025rtx
9ae8ffe7
JL
1026canon_rtx (x)
1027 rtx x;
1028{
1029 /* Recursively look for equivalences. */
fb6754f0
BS
1030 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
1031 && REGNO (x) < reg_known_value_size)
1032 return reg_known_value[REGNO (x)] == x
1033 ? x : canon_rtx (reg_known_value[REGNO (x)]);
9ae8ffe7
JL
1034 else if (GET_CODE (x) == PLUS)
1035 {
1036 rtx x0 = canon_rtx (XEXP (x, 0));
1037 rtx x1 = canon_rtx (XEXP (x, 1));
1038
1039 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
1040 {
9ae8ffe7 1041 if (GET_CODE (x0) == CONST_INT)
ed8908e7 1042 return plus_constant (x1, INTVAL (x0));
9ae8ffe7 1043 else if (GET_CODE (x1) == CONST_INT)
ed8908e7 1044 return plus_constant (x0, INTVAL (x1));
38a448ca 1045 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
9ae8ffe7
JL
1046 }
1047 }
d4b60170 1048
9ae8ffe7
JL
1049 /* This gives us much better alias analysis when called from
1050 the loop optimizer. Note we want to leave the original
1051 MEM alone, but need to return the canonicalized MEM with
1052 all the flags with their original values. */
1053 else if (GET_CODE (x) == MEM)
f1ec5147 1054 x = replace_equiv_address_nv (x, canon_rtx (XEXP (x, 0)));
d4b60170 1055
9ae8ffe7
JL
1056 return x;
1057}
1058
1059/* Return 1 if X and Y are identical-looking rtx's.
1060
1061 We use the data in reg_known_value above to see if two registers with
1062 different numbers are, in fact, equivalent. */
1063
1064static int
1065rtx_equal_for_memref_p (x, y)
1066 rtx x, y;
1067{
b3694847
SS
1068 int i;
1069 int j;
1070 enum rtx_code code;
1071 const char *fmt;
9ae8ffe7
JL
1072
1073 if (x == 0 && y == 0)
1074 return 1;
1075 if (x == 0 || y == 0)
1076 return 0;
d4b60170 1077
9ae8ffe7
JL
1078 x = canon_rtx (x);
1079 y = canon_rtx (y);
1080
1081 if (x == y)
1082 return 1;
1083
1084 code = GET_CODE (x);
1085 /* Rtx's of different codes cannot be equal. */
1086 if (code != GET_CODE (y))
1087 return 0;
1088
1089 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1090 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1091
1092 if (GET_MODE (x) != GET_MODE (y))
1093 return 0;
1094
db048faf
MM
1095 /* Some RTL can be compared without a recursive examination. */
1096 switch (code)
1097 {
ab59db3c
BS
1098 case VALUE:
1099 return CSELIB_VAL_PTR (x) == CSELIB_VAL_PTR (y);
1100
db048faf
MM
1101 case REG:
1102 return REGNO (x) == REGNO (y);
1103
1104 case LABEL_REF:
1105 return XEXP (x, 0) == XEXP (y, 0);
1106
1107 case SYMBOL_REF:
1108 return XSTR (x, 0) == XSTR (y, 0);
1109
1110 case CONST_INT:
1111 case CONST_DOUBLE:
1112 /* There's no need to compare the contents of CONST_DOUBLEs or
1113 CONST_INTs because pointer equality is a good enough
1114 comparison for these nodes. */
1115 return 0;
1116
1117 case ADDRESSOF:
831ecbd4
RK
1118 return (XINT (x, 1) == XINT (y, 1)
1119 && rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)));
db048faf
MM
1120
1121 default:
1122 break;
1123 }
9ae8ffe7
JL
1124
1125 /* For commutative operations, the RTX match if the operand match in any
1126 order. Also handle the simple binary and unary cases without a loop. */
1127 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
1128 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
1129 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
1130 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
1131 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
1132 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
1133 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
1134 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
1135 else if (GET_RTX_CLASS (code) == '1')
1136 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
1137
1138 /* Compare the elements. If any pair of corresponding elements
de12be17
JC
1139 fail to match, return 0 for the whole things.
1140
1141 Limit cases to types which actually appear in addresses. */
9ae8ffe7
JL
1142
1143 fmt = GET_RTX_FORMAT (code);
1144 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1145 {
1146 switch (fmt[i])
1147 {
9ae8ffe7
JL
1148 case 'i':
1149 if (XINT (x, i) != XINT (y, i))
1150 return 0;
1151 break;
1152
9ae8ffe7
JL
1153 case 'E':
1154 /* Two vectors must have the same length. */
1155 if (XVECLEN (x, i) != XVECLEN (y, i))
1156 return 0;
1157
1158 /* And the corresponding elements must match. */
1159 for (j = 0; j < XVECLEN (x, i); j++)
d4b60170
RK
1160 if (rtx_equal_for_memref_p (XVECEXP (x, i, j),
1161 XVECEXP (y, i, j)) == 0)
9ae8ffe7
JL
1162 return 0;
1163 break;
1164
1165 case 'e':
1166 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
1167 return 0;
1168 break;
1169
3237ac18
AH
1170 /* This can happen for asm operands. */
1171 case 's':
1172 if (strcmp (XSTR (x, i), XSTR (y, i)))
1173 return 0;
1174 break;
1175
aee21ba9
JL
1176 /* This can happen for an asm which clobbers memory. */
1177 case '0':
1178 break;
1179
9ae8ffe7
JL
1180 /* It is believed that rtx's at this level will never
1181 contain anything but integers and other rtx's,
1182 except for within LABEL_REFs and SYMBOL_REFs. */
1183 default:
1184 abort ();
1185 }
1186 }
1187 return 1;
1188}
1189
1190/* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
1191 X and return it, or return 0 if none found. */
1192
1193static rtx
1194find_symbolic_term (x)
1195 rtx x;
1196{
b3694847
SS
1197 int i;
1198 enum rtx_code code;
1199 const char *fmt;
9ae8ffe7
JL
1200
1201 code = GET_CODE (x);
1202 if (code == SYMBOL_REF || code == LABEL_REF)
1203 return x;
1204 if (GET_RTX_CLASS (code) == 'o')
1205 return 0;
1206
1207 fmt = GET_RTX_FORMAT (code);
1208 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1209 {
1210 rtx t;
1211
1212 if (fmt[i] == 'e')
1213 {
1214 t = find_symbolic_term (XEXP (x, i));
1215 if (t != 0)
1216 return t;
1217 }
1218 else if (fmt[i] == 'E')
1219 break;
1220 }
1221 return 0;
1222}
1223
1224static rtx
1225find_base_term (x)
b3694847 1226 rtx x;
9ae8ffe7 1227{
eab5c70a
BS
1228 cselib_val *val;
1229 struct elt_loc_list *l;
1230
b949ea8b
JW
1231#if defined (FIND_BASE_TERM)
1232 /* Try machine-dependent ways to find the base term. */
1233 x = FIND_BASE_TERM (x);
1234#endif
1235
9ae8ffe7
JL
1236 switch (GET_CODE (x))
1237 {
1238 case REG:
1239 return REG_BASE_VALUE (x);
1240
d288e53d
DE
1241 case TRUNCATE:
1242 if (GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (Pmode))
1243 return 0;
1244 /* Fall through. */
9ae8ffe7 1245 case HIGH:
6d849a2a
JL
1246 case PRE_INC:
1247 case PRE_DEC:
1248 case POST_INC:
1249 case POST_DEC:
d288e53d
DE
1250 case PRE_MODIFY:
1251 case POST_MODIFY:
6d849a2a
JL
1252 return find_base_term (XEXP (x, 0));
1253
1abade85
RK
1254 case ZERO_EXTEND:
1255 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
1256 {
1257 rtx temp = find_base_term (XEXP (x, 0));
1258
1259#ifdef POINTERS_EXTEND_UNSIGNED
1260 if (temp != 0 && CONSTANT_P (temp) && GET_MODE (temp) != Pmode)
1261 temp = convert_memory_address (Pmode, temp);
1262#endif
1263
1264 return temp;
1265 }
1266
eab5c70a
BS
1267 case VALUE:
1268 val = CSELIB_VAL_PTR (x);
1269 for (l = val->locs; l; l = l->next)
1270 if ((x = find_base_term (l->loc)) != 0)
1271 return x;
1272 return 0;
1273
9ae8ffe7
JL
1274 case CONST:
1275 x = XEXP (x, 0);
1276 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
1277 return 0;
1278 /* fall through */
1279 case LO_SUM:
1280 case PLUS:
1281 case MINUS:
1282 {
3c567fae
JL
1283 rtx tmp1 = XEXP (x, 0);
1284 rtx tmp2 = XEXP (x, 1);
1285
f5143c46 1286 /* This is a little bit tricky since we have to determine which of
3c567fae
JL
1287 the two operands represents the real base address. Otherwise this
1288 routine may return the index register instead of the base register.
1289
1290 That may cause us to believe no aliasing was possible, when in
1291 fact aliasing is possible.
1292
1293 We use a few simple tests to guess the base register. Additional
1294 tests can certainly be added. For example, if one of the operands
1295 is a shift or multiply, then it must be the index register and the
1296 other operand is the base register. */
1297
b949ea8b
JW
1298 if (tmp1 == pic_offset_table_rtx && CONSTANT_P (tmp2))
1299 return find_base_term (tmp2);
1300
3c567fae
JL
1301 /* If either operand is known to be a pointer, then use it
1302 to determine the base term. */
3502dc9c 1303 if (REG_P (tmp1) && REG_POINTER (tmp1))
3c567fae
JL
1304 return find_base_term (tmp1);
1305
3502dc9c 1306 if (REG_P (tmp2) && REG_POINTER (tmp2))
3c567fae
JL
1307 return find_base_term (tmp2);
1308
1309 /* Neither operand was known to be a pointer. Go ahead and find the
1310 base term for both operands. */
1311 tmp1 = find_base_term (tmp1);
1312 tmp2 = find_base_term (tmp2);
1313
1314 /* If either base term is named object or a special address
1315 (like an argument or stack reference), then use it for the
1316 base term. */
d4b60170 1317 if (tmp1 != 0
3c567fae
JL
1318 && (GET_CODE (tmp1) == SYMBOL_REF
1319 || GET_CODE (tmp1) == LABEL_REF
1320 || (GET_CODE (tmp1) == ADDRESS
1321 && GET_MODE (tmp1) != VOIDmode)))
1322 return tmp1;
1323
d4b60170 1324 if (tmp2 != 0
3c567fae
JL
1325 && (GET_CODE (tmp2) == SYMBOL_REF
1326 || GET_CODE (tmp2) == LABEL_REF
1327 || (GET_CODE (tmp2) == ADDRESS
1328 && GET_MODE (tmp2) != VOIDmode)))
1329 return tmp2;
1330
1331 /* We could not determine which of the two operands was the
1332 base register and which was the index. So we can determine
1333 nothing from the base alias check. */
1334 return 0;
9ae8ffe7
JL
1335 }
1336
1337 case AND:
d288e53d
DE
1338 if (GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) != 0)
1339 return find_base_term (XEXP (x, 0));
9ae8ffe7
JL
1340 return 0;
1341
1342 case SYMBOL_REF:
1343 case LABEL_REF:
1344 return x;
1345
d982e46e 1346 case ADDRESSOF:
bb07060a 1347 return REG_BASE_VALUE (frame_pointer_rtx);
d982e46e 1348
9ae8ffe7
JL
1349 default:
1350 return 0;
1351 }
1352}
1353
1354/* Return 0 if the addresses X and Y are known to point to different
1355 objects, 1 if they might be pointers to the same object. */
1356
1357static int
56ee9281 1358base_alias_check (x, y, x_mode, y_mode)
9ae8ffe7 1359 rtx x, y;
56ee9281 1360 enum machine_mode x_mode, y_mode;
9ae8ffe7
JL
1361{
1362 rtx x_base = find_base_term (x);
1363 rtx y_base = find_base_term (y);
1364
1c72c7f6
JC
1365 /* If the address itself has no known base see if a known equivalent
1366 value has one. If either address still has no known base, nothing
1367 is known about aliasing. */
1368 if (x_base == 0)
1369 {
1370 rtx x_c;
d4b60170 1371
1c72c7f6
JC
1372 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
1373 return 1;
d4b60170 1374
1c72c7f6
JC
1375 x_base = find_base_term (x_c);
1376 if (x_base == 0)
1377 return 1;
1378 }
9ae8ffe7 1379
1c72c7f6
JC
1380 if (y_base == 0)
1381 {
1382 rtx y_c;
1383 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
1384 return 1;
d4b60170 1385
1c72c7f6
JC
1386 y_base = find_base_term (y_c);
1387 if (y_base == 0)
1388 return 1;
1389 }
1390
1391 /* If the base addresses are equal nothing is known about aliasing. */
1392 if (rtx_equal_p (x_base, y_base))
9ae8ffe7
JL
1393 return 1;
1394
56ee9281
RH
1395 /* The base addresses of the read and write are different expressions.
1396 If they are both symbols and they are not accessed via AND, there is
1397 no conflict. We can bring knowledge of object alignment into play
1398 here. For example, on alpha, "char a, b;" can alias one another,
1399 though "char a; long b;" cannot. */
9ae8ffe7 1400 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
c02f035f 1401 {
56ee9281
RH
1402 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
1403 return 1;
1404 if (GET_CODE (x) == AND
1405 && (GET_CODE (XEXP (x, 1)) != CONST_INT
8fa2140d 1406 || (int) GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
56ee9281
RH
1407 return 1;
1408 if (GET_CODE (y) == AND
1409 && (GET_CODE (XEXP (y, 1)) != CONST_INT
8fa2140d 1410 || (int) GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
56ee9281 1411 return 1;
b2972551
JL
1412 /* Differing symbols never alias. */
1413 return 0;
c02f035f 1414 }
9ae8ffe7
JL
1415
1416 /* If one address is a stack reference there can be no alias:
1417 stack references using different base registers do not alias,
1418 a stack reference can not alias a parameter, and a stack reference
1419 can not alias a global. */
1420 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
1421 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
1422 return 0;
1423
1424 if (! flag_argument_noalias)
1425 return 1;
1426
1427 if (flag_argument_noalias > 1)
1428 return 0;
1429
ec5c56db 1430 /* Weak noalias assertion (arguments are distinct, but may match globals). */
9ae8ffe7
JL
1431 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
1432}
1433
eab5c70a
BS
1434/* Convert the address X into something we can use. This is done by returning
1435 it unchanged unless it is a value; in the latter case we call cselib to get
1436 a more useful rtx. */
3bdf5ad1 1437
a13d4ebf 1438rtx
eab5c70a
BS
1439get_addr (x)
1440 rtx x;
1441{
1442 cselib_val *v;
1443 struct elt_loc_list *l;
1444
1445 if (GET_CODE (x) != VALUE)
1446 return x;
1447 v = CSELIB_VAL_PTR (x);
1448 for (l = v->locs; l; l = l->next)
1449 if (CONSTANT_P (l->loc))
1450 return l->loc;
1451 for (l = v->locs; l; l = l->next)
1452 if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM)
1453 return l->loc;
1454 if (v->locs)
1455 return v->locs->loc;
1456 return x;
1457}
1458
39cec1ac
MH
1459/* Return the address of the (N_REFS + 1)th memory reference to ADDR
1460 where SIZE is the size in bytes of the memory reference. If ADDR
1461 is not modified by the memory reference then ADDR is returned. */
1462
1463rtx
1464addr_side_effect_eval (addr, size, n_refs)
1465 rtx addr;
1466 int size;
1467 int n_refs;
1468{
1469 int offset = 0;
1470
1471 switch (GET_CODE (addr))
1472 {
1473 case PRE_INC:
1474 offset = (n_refs + 1) * size;
1475 break;
1476 case PRE_DEC:
1477 offset = -(n_refs + 1) * size;
1478 break;
1479 case POST_INC:
1480 offset = n_refs * size;
1481 break;
1482 case POST_DEC:
1483 offset = -n_refs * size;
1484 break;
1485
1486 default:
1487 return addr;
1488 }
1489
1490 if (offset)
1491 addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset));
1492 else
1493 addr = XEXP (addr, 0);
1494
1495 return addr;
1496}
1497
9ae8ffe7
JL
1498/* Return nonzero if X and Y (memory addresses) could reference the
1499 same location in memory. C is an offset accumulator. When
1500 C is nonzero, we are testing aliases between X and Y + C.
1501 XSIZE is the size in bytes of the X reference,
1502 similarly YSIZE is the size in bytes for Y.
1503
1504 If XSIZE or YSIZE is zero, we do not know the amount of memory being
1505 referenced (the reference was BLKmode), so make the most pessimistic
1506 assumptions.
1507
c02f035f
RH
1508 If XSIZE or YSIZE is negative, we may access memory outside the object
1509 being referenced as a side effect. This can happen when using AND to
1510 align memory references, as is done on the Alpha.
1511
9ae8ffe7 1512 Nice to notice that varying addresses cannot conflict with fp if no
0211b6ab 1513 local variables had their addresses taken, but that's too hard now. */
9ae8ffe7 1514
9ae8ffe7
JL
1515static int
1516memrefs_conflict_p (xsize, x, ysize, y, c)
b3694847 1517 rtx x, y;
9ae8ffe7
JL
1518 int xsize, ysize;
1519 HOST_WIDE_INT c;
1520{
eab5c70a
BS
1521 if (GET_CODE (x) == VALUE)
1522 x = get_addr (x);
1523 if (GET_CODE (y) == VALUE)
1524 y = get_addr (y);
9ae8ffe7
JL
1525 if (GET_CODE (x) == HIGH)
1526 x = XEXP (x, 0);
1527 else if (GET_CODE (x) == LO_SUM)
1528 x = XEXP (x, 1);
1529 else
39cec1ac 1530 x = canon_rtx (addr_side_effect_eval (x, xsize, 0));
9ae8ffe7
JL
1531 if (GET_CODE (y) == HIGH)
1532 y = XEXP (y, 0);
1533 else if (GET_CODE (y) == LO_SUM)
1534 y = XEXP (y, 1);
1535 else
39cec1ac 1536 y = canon_rtx (addr_side_effect_eval (y, ysize, 0));
9ae8ffe7
JL
1537
1538 if (rtx_equal_for_memref_p (x, y))
1539 {
c02f035f 1540 if (xsize <= 0 || ysize <= 0)
9ae8ffe7
JL
1541 return 1;
1542 if (c >= 0 && xsize > c)
1543 return 1;
1544 if (c < 0 && ysize+c > 0)
1545 return 1;
1546 return 0;
1547 }
1548
6e73e666
JC
1549 /* This code used to check for conflicts involving stack references and
1550 globals but the base address alias code now handles these cases. */
9ae8ffe7
JL
1551
1552 if (GET_CODE (x) == PLUS)
1553 {
1554 /* The fact that X is canonicalized means that this
1555 PLUS rtx is canonicalized. */
1556 rtx x0 = XEXP (x, 0);
1557 rtx x1 = XEXP (x, 1);
1558
1559 if (GET_CODE (y) == PLUS)
1560 {
1561 /* The fact that Y is canonicalized means that this
1562 PLUS rtx is canonicalized. */
1563 rtx y0 = XEXP (y, 0);
1564 rtx y1 = XEXP (y, 1);
1565
1566 if (rtx_equal_for_memref_p (x1, y1))
1567 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1568 if (rtx_equal_for_memref_p (x0, y0))
1569 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
1570 if (GET_CODE (x1) == CONST_INT)
63be02db
JM
1571 {
1572 if (GET_CODE (y1) == CONST_INT)
1573 return memrefs_conflict_p (xsize, x0, ysize, y0,
1574 c - INTVAL (x1) + INTVAL (y1));
1575 else
1576 return memrefs_conflict_p (xsize, x0, ysize, y,
1577 c - INTVAL (x1));
1578 }
9ae8ffe7
JL
1579 else if (GET_CODE (y1) == CONST_INT)
1580 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1581
6e73e666 1582 return 1;
9ae8ffe7
JL
1583 }
1584 else if (GET_CODE (x1) == CONST_INT)
1585 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
1586 }
1587 else if (GET_CODE (y) == PLUS)
1588 {
1589 /* The fact that Y is canonicalized means that this
1590 PLUS rtx is canonicalized. */
1591 rtx y0 = XEXP (y, 0);
1592 rtx y1 = XEXP (y, 1);
1593
1594 if (GET_CODE (y1) == CONST_INT)
1595 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1596 else
1597 return 1;
1598 }
1599
1600 if (GET_CODE (x) == GET_CODE (y))
1601 switch (GET_CODE (x))
1602 {
1603 case MULT:
1604 {
1605 /* Handle cases where we expect the second operands to be the
1606 same, and check only whether the first operand would conflict
1607 or not. */
1608 rtx x0, y0;
1609 rtx x1 = canon_rtx (XEXP (x, 1));
1610 rtx y1 = canon_rtx (XEXP (y, 1));
1611 if (! rtx_equal_for_memref_p (x1, y1))
1612 return 1;
1613 x0 = canon_rtx (XEXP (x, 0));
1614 y0 = canon_rtx (XEXP (y, 0));
1615 if (rtx_equal_for_memref_p (x0, y0))
1616 return (xsize == 0 || ysize == 0
1617 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1618
1619 /* Can't properly adjust our sizes. */
1620 if (GET_CODE (x1) != CONST_INT)
1621 return 1;
1622 xsize /= INTVAL (x1);
1623 ysize /= INTVAL (x1);
1624 c /= INTVAL (x1);
1625 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1626 }
1d300e19 1627
de12be17
JC
1628 case REG:
1629 /* Are these registers known not to be equal? */
1630 if (alias_invariant)
1631 {
e51712db 1632 unsigned int r_x = REGNO (x), r_y = REGNO (y);
de12be17
JC
1633 rtx i_x, i_y; /* invariant relationships of X and Y */
1634
1635 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
1636 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
1637
1638 if (i_x == 0 && i_y == 0)
1639 break;
1640
1641 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
1642 ysize, i_y ? i_y : y, c))
1643 return 0;
1644 }
1645 break;
1646
1d300e19
KG
1647 default:
1648 break;
9ae8ffe7
JL
1649 }
1650
1651 /* Treat an access through an AND (e.g. a subword access on an Alpha)
56ee9281
RH
1652 as an access with indeterminate size. Assume that references
1653 besides AND are aligned, so if the size of the other reference is
1654 at least as large as the alignment, assume no other overlap. */
9ae8ffe7 1655 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
56ee9281 1656 {
02e3377d 1657 if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1)))
56ee9281
RH
1658 xsize = -1;
1659 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
1660 }
9ae8ffe7 1661 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
c02f035f 1662 {
56ee9281 1663 /* ??? If we are indexing far enough into the array/structure, we
c02f035f
RH
1664 may yet be able to determine that we can not overlap. But we
1665 also need to that we are far enough from the end not to overlap
56ee9281 1666 a following reference, so we do nothing with that for now. */
02e3377d 1667 if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1)))
56ee9281
RH
1668 ysize = -1;
1669 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
c02f035f 1670 }
9ae8ffe7 1671
b24ea077
JW
1672 if (GET_CODE (x) == ADDRESSOF)
1673 {
1674 if (y == frame_pointer_rtx
1675 || GET_CODE (y) == ADDRESSOF)
1676 return xsize <= 0 || ysize <= 0;
1677 }
1678 if (GET_CODE (y) == ADDRESSOF)
1679 {
1680 if (x == frame_pointer_rtx)
1681 return xsize <= 0 || ysize <= 0;
1682 }
d982e46e 1683
9ae8ffe7
JL
1684 if (CONSTANT_P (x))
1685 {
1686 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
1687 {
1688 c += (INTVAL (y) - INTVAL (x));
c02f035f 1689 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
1690 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1691 }
1692
1693 if (GET_CODE (x) == CONST)
1694 {
1695 if (GET_CODE (y) == CONST)
1696 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1697 ysize, canon_rtx (XEXP (y, 0)), c);
1698 else
1699 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1700 ysize, y, c);
1701 }
1702 if (GET_CODE (y) == CONST)
1703 return memrefs_conflict_p (xsize, x, ysize,
1704 canon_rtx (XEXP (y, 0)), c);
1705
1706 if (CONSTANT_P (y))
b949ea8b 1707 return (xsize <= 0 || ysize <= 0
c02f035f 1708 || (rtx_equal_for_memref_p (x, y)
b949ea8b 1709 && ((c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
9ae8ffe7
JL
1710
1711 return 1;
1712 }
1713 return 1;
1714}
1715
1716/* Functions to compute memory dependencies.
1717
1718 Since we process the insns in execution order, we can build tables
1719 to keep track of what registers are fixed (and not aliased), what registers
1720 are varying in known ways, and what registers are varying in unknown
1721 ways.
1722
1723 If both memory references are volatile, then there must always be a
1724 dependence between the two references, since their order can not be
1725 changed. A volatile and non-volatile reference can be interchanged
1726 though.
1727
dc1618bc
RK
1728 A MEM_IN_STRUCT reference at a non-AND varying address can never
1729 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We
1730 also must allow AND addresses, because they may generate accesses
1731 outside the object being referenced. This is used to generate
1732 aligned addresses from unaligned addresses, for instance, the alpha
1733 storeqi_unaligned pattern. */
9ae8ffe7
JL
1734
1735/* Read dependence: X is read after read in MEM takes place. There can
1736 only be a dependence here if both reads are volatile. */
1737
1738int
1739read_dependence (mem, x)
1740 rtx mem;
1741 rtx x;
1742{
1743 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
1744}
1745
c6df88cb
MM
1746/* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and
1747 MEM2 is a reference to a structure at a varying address, or returns
1748 MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL
1749 value is returned MEM1 and MEM2 can never alias. VARIES_P is used
1750 to decide whether or not an address may vary; it should return
eab5c70a
BS
1751 nonzero whenever variation is possible.
1752 MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */
1753
2c72b78f 1754static rtx
eab5c70a
BS
1755fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p)
1756 rtx mem1, mem2;
1757 rtx mem1_addr, mem2_addr;
e38fe8e0 1758 int (*varies_p) PARAMS ((rtx, int));
eab5c70a 1759{
3e0abe15
GK
1760 if (! flag_strict_aliasing)
1761 return NULL_RTX;
1762
c6df88cb 1763 if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2)
e38fe8e0 1764 && !varies_p (mem1_addr, 1) && varies_p (mem2_addr, 1))
c6df88cb
MM
1765 /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a
1766 varying address. */
1767 return mem1;
1768
1769 if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2)
e38fe8e0 1770 && varies_p (mem1_addr, 1) && !varies_p (mem2_addr, 1))
c6df88cb
MM
1771 /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a
1772 varying address. */
1773 return mem2;
1774
1775 return NULL_RTX;
1776}
1777
1778/* Returns nonzero if something about the mode or address format MEM1
1779 indicates that it might well alias *anything*. */
1780
2c72b78f 1781static int
c6df88cb
MM
1782aliases_everything_p (mem)
1783 rtx mem;
1784{
c6df88cb
MM
1785 if (GET_CODE (XEXP (mem, 0)) == AND)
1786 /* If the address is an AND, its very hard to know at what it is
1787 actually pointing. */
1788 return 1;
1789
1790 return 0;
1791}
1792
998d7deb
RH
1793/* Return true if we can determine that the fields referenced cannot
1794 overlap for any pair of objects. */
1795
1796static bool
1797nonoverlapping_component_refs_p (x, y)
1798 tree x, y;
1799{
1800 tree fieldx, fieldy, typex, typey, orig_y;
1801
1802 do
1803 {
1804 /* The comparison has to be done at a common type, since we don't
d6a7951f 1805 know how the inheritance hierarchy works. */
998d7deb
RH
1806 orig_y = y;
1807 do
1808 {
1809 fieldx = TREE_OPERAND (x, 1);
1810 typex = DECL_FIELD_CONTEXT (fieldx);
1811
1812 y = orig_y;
1813 do
1814 {
1815 fieldy = TREE_OPERAND (y, 1);
1816 typey = DECL_FIELD_CONTEXT (fieldy);
1817
1818 if (typex == typey)
1819 goto found;
1820
1821 y = TREE_OPERAND (y, 0);
1822 }
1823 while (y && TREE_CODE (y) == COMPONENT_REF);
1824
1825 x = TREE_OPERAND (x, 0);
1826 }
1827 while (x && TREE_CODE (x) == COMPONENT_REF);
1828
1829 /* Never found a common type. */
1830 return false;
1831
1832 found:
1833 /* If we're left with accessing different fields of a structure,
1834 then no overlap. */
1835 if (TREE_CODE (typex) == RECORD_TYPE
1836 && fieldx != fieldy)
1837 return true;
1838
1839 /* The comparison on the current field failed. If we're accessing
1840 a very nested structure, look at the next outer level. */
1841 x = TREE_OPERAND (x, 0);
1842 y = TREE_OPERAND (y, 0);
1843 }
1844 while (x && y
1845 && TREE_CODE (x) == COMPONENT_REF
1846 && TREE_CODE (y) == COMPONENT_REF);
1847
1848 return false;
1849}
1850
1851/* Look at the bottom of the COMPONENT_REF list for a DECL, and return it. */
1852
1853static tree
1854decl_for_component_ref (x)
1855 tree x;
1856{
1857 do
1858 {
1859 x = TREE_OPERAND (x, 0);
1860 }
1861 while (x && TREE_CODE (x) == COMPONENT_REF);
1862
1863 return x && DECL_P (x) ? x : NULL_TREE;
1864}
1865
1866/* Walk up the COMPONENT_REF list and adjust OFFSET to compensate for the
1867 offset of the field reference. */
1868
1869static rtx
1870adjust_offset_for_component_ref (x, offset)
1871 tree x;
1872 rtx offset;
1873{
1874 HOST_WIDE_INT ioffset;
1875
1876 if (! offset)
1877 return NULL_RTX;
1878
1879 ioffset = INTVAL (offset);
1880 do
1881 {
1882 tree field = TREE_OPERAND (x, 1);
1883
1884 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
1885 return NULL_RTX;
1886 ioffset += (tree_low_cst (DECL_FIELD_OFFSET (field), 1)
1887 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
1888 / BITS_PER_UNIT));
1889
1890 x = TREE_OPERAND (x, 0);
1891 }
1892 while (x && TREE_CODE (x) == COMPONENT_REF);
1893
1894 return GEN_INT (ioffset);
1895}
1896
1897/* Return nonzero if we can deterimine the exprs corresponding to memrefs
a4311dfe
RK
1898 X and Y and they do not overlap. */
1899
1900static int
1901nonoverlapping_memrefs_p (x, y)
1902 rtx x, y;
1903{
998d7deb 1904 tree exprx = MEM_EXPR (x), expry = MEM_EXPR (y);
a4311dfe
RK
1905 rtx rtlx, rtly;
1906 rtx basex, basey;
998d7deb 1907 rtx moffsetx, moffsety;
a4311dfe
RK
1908 HOST_WIDE_INT offsetx = 0, offsety = 0, sizex, sizey, tem;
1909
998d7deb
RH
1910 /* Unless both have exprs, we can't tell anything. */
1911 if (exprx == 0 || expry == 0)
1912 return 0;
1913
1914 /* If both are field references, we may be able to determine something. */
1915 if (TREE_CODE (exprx) == COMPONENT_REF
1916 && TREE_CODE (expry) == COMPONENT_REF
1917 && nonoverlapping_component_refs_p (exprx, expry))
1918 return 1;
1919
1920 /* If the field reference test failed, look at the DECLs involved. */
1921 moffsetx = MEM_OFFSET (x);
1922 if (TREE_CODE (exprx) == COMPONENT_REF)
1923 {
1924 tree t = decl_for_component_ref (exprx);
1925 if (! t)
1926 return 0;
1927 moffsetx = adjust_offset_for_component_ref (exprx, moffsetx);
1928 exprx = t;
1929 }
1930 moffsety = MEM_OFFSET (y);
1931 if (TREE_CODE (expry) == COMPONENT_REF)
1932 {
1933 tree t = decl_for_component_ref (expry);
1934 if (! t)
1935 return 0;
1936 moffsety = adjust_offset_for_component_ref (expry, moffsety);
1937 expry = t;
1938 }
1939
1940 if (! DECL_P (exprx) || ! DECL_P (expry))
a4311dfe
RK
1941 return 0;
1942
998d7deb
RH
1943 rtlx = DECL_RTL (exprx);
1944 rtly = DECL_RTL (expry);
a4311dfe 1945
1edcd60b
RK
1946 /* If either RTL is not a MEM, it must be a REG or CONCAT, meaning they
1947 can't overlap unless they are the same because we never reuse that part
1948 of the stack frame used for locals for spilled pseudos. */
1949 if ((GET_CODE (rtlx) != MEM || GET_CODE (rtly) != MEM)
1950 && ! rtx_equal_p (rtlx, rtly))
a4311dfe
RK
1951 return 1;
1952
1953 /* Get the base and offsets of both decls. If either is a register, we
1954 know both are and are the same, so use that as the base. The only
1955 we can avoid overlap is if we can deduce that they are nonoverlapping
1956 pieces of that decl, which is very rare. */
1edcd60b 1957 basex = GET_CODE (rtlx) == MEM ? XEXP (rtlx, 0) : rtlx;
a4311dfe
RK
1958 if (GET_CODE (basex) == PLUS && GET_CODE (XEXP (basex, 1)) == CONST_INT)
1959 offsetx = INTVAL (XEXP (basex, 1)), basex = XEXP (basex, 0);
1960
1edcd60b 1961 basey = GET_CODE (rtly) == MEM ? XEXP (rtly, 0) : rtly;
a4311dfe
RK
1962 if (GET_CODE (basey) == PLUS && GET_CODE (XEXP (basey, 1)) == CONST_INT)
1963 offsety = INTVAL (XEXP (basey, 1)), basey = XEXP (basey, 0);
1964
d746694a
RK
1965 /* If the bases are different, we know they do not overlap if both
1966 are constants or if one is a constant and the other a pointer into the
1967 stack frame. Otherwise a different base means we can't tell if they
1968 overlap or not. */
1969 if (! rtx_equal_p (basex, basey))
1970 return ((CONSTANT_P (basex) && CONSTANT_P (basey))
1971 || (CONSTANT_P (basex) && REG_P (basey)
a06ef755 1972 && REGNO_PTR_FRAME_P (REGNO (basey)))
d746694a 1973 || (CONSTANT_P (basey) && REG_P (basex)
a06ef755 1974 && REGNO_PTR_FRAME_P (REGNO (basex))));
a4311dfe 1975
998d7deb 1976 sizex = (GET_CODE (rtlx) != MEM ? (int) GET_MODE_SIZE (GET_MODE (rtlx))
a4311dfe
RK
1977 : MEM_SIZE (rtlx) ? INTVAL (MEM_SIZE (rtlx))
1978 : -1);
998d7deb 1979 sizey = (GET_CODE (rtly) != MEM ? (int) GET_MODE_SIZE (GET_MODE (rtly))
a4311dfe
RK
1980 : MEM_SIZE (rtly) ? INTVAL (MEM_SIZE (rtly)) :
1981 -1);
1982
0af5bc3e
RK
1983 /* If we have an offset for either memref, it can update the values computed
1984 above. */
998d7deb
RH
1985 if (moffsetx)
1986 offsetx += INTVAL (moffsetx), sizex -= INTVAL (moffsetx);
1987 if (moffsety)
1988 offsety += INTVAL (moffsety), sizey -= INTVAL (moffsety);
a4311dfe 1989
0af5bc3e 1990 /* If a memref has both a size and an offset, we can use the smaller size.
efc981bb 1991 We can't do this if the offset isn't known because we must view this
0af5bc3e 1992 memref as being anywhere inside the DECL's MEM. */
998d7deb 1993 if (MEM_SIZE (x) && moffsetx)
a4311dfe 1994 sizex = INTVAL (MEM_SIZE (x));
998d7deb 1995 if (MEM_SIZE (y) && moffsety)
a4311dfe
RK
1996 sizey = INTVAL (MEM_SIZE (y));
1997
1998 /* Put the values of the memref with the lower offset in X's values. */
1999 if (offsetx > offsety)
2000 {
2001 tem = offsetx, offsetx = offsety, offsety = tem;
2002 tem = sizex, sizex = sizey, sizey = tem;
2003 }
2004
2005 /* If we don't know the size of the lower-offset value, we can't tell
2006 if they conflict. Otherwise, we do the test. */
2007 return sizex >= 0 && offsety > offsetx + sizex;
2008}
2009
9ae8ffe7
JL
2010/* True dependence: X is read after store in MEM takes place. */
2011
2012int
2013true_dependence (mem, mem_mode, x, varies)
2014 rtx mem;
2015 enum machine_mode mem_mode;
2016 rtx x;
e38fe8e0 2017 int (*varies) PARAMS ((rtx, int));
9ae8ffe7 2018{
b3694847 2019 rtx x_addr, mem_addr;
49982682 2020 rtx base;
9ae8ffe7
JL
2021
2022 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
2023 return 1;
2024
41472af8
MM
2025 if (DIFFERENT_ALIAS_SETS_P (x, mem))
2026 return 0;
2027
b949ea8b
JW
2028 /* Unchanging memory can't conflict with non-unchanging memory.
2029 A non-unchanging read can conflict with a non-unchanging write.
2030 An unchanging read can conflict with an unchanging write since
2031 there may be a single store to this address to initialize it.
ec569656
RK
2032 Note that an unchanging store can conflict with a non-unchanging read
2033 since we have to make conservative assumptions when we have a
2034 record with readonly fields and we are copying the whole thing.
b949ea8b
JW
2035 Just fall through to the code below to resolve potential conflicts.
2036 This won't handle all cases optimally, but the possible performance
2037 loss should be negligible. */
ec569656 2038 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
9ae8ffe7
JL
2039 return 0;
2040
a4311dfe
RK
2041 if (nonoverlapping_memrefs_p (mem, x))
2042 return 0;
2043
56ee9281
RH
2044 if (mem_mode == VOIDmode)
2045 mem_mode = GET_MODE (mem);
2046
eab5c70a
BS
2047 x_addr = get_addr (XEXP (x, 0));
2048 mem_addr = get_addr (XEXP (mem, 0));
2049
55efb413
JW
2050 base = find_base_term (x_addr);
2051 if (base && (GET_CODE (base) == LABEL_REF
2052 || (GET_CODE (base) == SYMBOL_REF
2053 && CONSTANT_POOL_ADDRESS_P (base))))
2054 return 0;
2055
eab5c70a 2056 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1c72c7f6
JC
2057 return 0;
2058
eab5c70a
BS
2059 x_addr = canon_rtx (x_addr);
2060 mem_addr = canon_rtx (mem_addr);
6e73e666 2061
0211b6ab
JW
2062 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
2063 SIZE_FOR_MODE (x), x_addr, 0))
2064 return 0;
2065
c6df88cb 2066 if (aliases_everything_p (x))
0211b6ab
JW
2067 return 1;
2068
f5143c46 2069 /* We cannot use aliases_everything_p to test MEM, since we must look
c6df88cb
MM
2070 at MEM_MODE, rather than GET_MODE (MEM). */
2071 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
a13d4ebf
AM
2072 return 1;
2073
2074 /* In true_dependence we also allow BLKmode to alias anything. Why
2075 don't we do this in anti_dependence and output_dependence? */
2076 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
2077 return 1;
2078
2079 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
2080 varies);
2081}
2082
2083/* Canonical true dependence: X is read after store in MEM takes place.
f5143c46 2084 Variant of true_dependence which assumes MEM has already been
a13d4ebf
AM
2085 canonicalized (hence we no longer do that here).
2086 The mem_addr argument has been added, since true_dependence computed
2087 this value prior to canonicalizing. */
2088
2089int
2090canon_true_dependence (mem, mem_mode, mem_addr, x, varies)
2091 rtx mem, mem_addr, x;
2092 enum machine_mode mem_mode;
2093 int (*varies) PARAMS ((rtx, int));
2094{
b3694847 2095 rtx x_addr;
a13d4ebf
AM
2096
2097 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
2098 return 1;
2099
2100 if (DIFFERENT_ALIAS_SETS_P (x, mem))
2101 return 0;
2102
2103 /* If X is an unchanging read, then it can't possibly conflict with any
2104 non-unchanging store. It may conflict with an unchanging write though,
2105 because there may be a single store to this address to initialize it.
2106 Just fall through to the code below to resolve the case where we have
2107 both an unchanging read and an unchanging write. This won't handle all
2108 cases optimally, but the possible performance loss should be
2109 negligible. */
2110 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
2111 return 0;
2112
a4311dfe
RK
2113 if (nonoverlapping_memrefs_p (x, mem))
2114 return 0;
2115
a13d4ebf
AM
2116 x_addr = get_addr (XEXP (x, 0));
2117
2118 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
2119 return 0;
2120
2121 x_addr = canon_rtx (x_addr);
2122 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
2123 SIZE_FOR_MODE (x), x_addr, 0))
2124 return 0;
2125
2126 if (aliases_everything_p (x))
2127 return 1;
2128
f5143c46 2129 /* We cannot use aliases_everything_p to test MEM, since we must look
a13d4ebf
AM
2130 at MEM_MODE, rather than GET_MODE (MEM). */
2131 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
c6df88cb 2132 return 1;
0211b6ab 2133
c6df88cb
MM
2134 /* In true_dependence we also allow BLKmode to alias anything. Why
2135 don't we do this in anti_dependence and output_dependence? */
2136 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
2137 return 1;
0211b6ab 2138
eab5c70a
BS
2139 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
2140 varies);
9ae8ffe7
JL
2141}
2142
c6df88cb
MM
2143/* Returns non-zero if a write to X might alias a previous read from
2144 (or, if WRITEP is non-zero, a write to) MEM. */
9ae8ffe7 2145
2c72b78f 2146static int
c6df88cb 2147write_dependence_p (mem, x, writep)
9ae8ffe7
JL
2148 rtx mem;
2149 rtx x;
c6df88cb 2150 int writep;
9ae8ffe7 2151{
6e73e666 2152 rtx x_addr, mem_addr;
c6df88cb 2153 rtx fixed_scalar;
49982682 2154 rtx base;
6e73e666 2155
9ae8ffe7
JL
2156 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
2157 return 1;
2158
eab5c70a
BS
2159 if (DIFFERENT_ALIAS_SETS_P (x, mem))
2160 return 0;
2161
b949ea8b
JW
2162 /* Unchanging memory can't conflict with non-unchanging memory. */
2163 if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem))
2164 return 0;
2165
9ae8ffe7
JL
2166 /* If MEM is an unchanging read, then it can't possibly conflict with
2167 the store to X, because there is at most one store to MEM, and it must
2168 have occurred somewhere before MEM. */
55efb413
JW
2169 if (! writep && RTX_UNCHANGING_P (mem))
2170 return 0;
2171
a4311dfe
RK
2172 if (nonoverlapping_memrefs_p (x, mem))
2173 return 0;
2174
55efb413
JW
2175 x_addr = get_addr (XEXP (x, 0));
2176 mem_addr = get_addr (XEXP (mem, 0));
2177
49982682
JW
2178 if (! writep)
2179 {
55efb413 2180 base = find_base_term (mem_addr);
49982682
JW
2181 if (base && (GET_CODE (base) == LABEL_REF
2182 || (GET_CODE (base) == SYMBOL_REF
2183 && CONSTANT_POOL_ADDRESS_P (base))))
2184 return 0;
2185 }
2186
eab5c70a
BS
2187 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x),
2188 GET_MODE (mem)))
41472af8
MM
2189 return 0;
2190
eab5c70a
BS
2191 x_addr = canon_rtx (x_addr);
2192 mem_addr = canon_rtx (mem_addr);
6e73e666 2193
c6df88cb
MM
2194 if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
2195 SIZE_FOR_MODE (x), x_addr, 0))
2196 return 0;
2197
2198 fixed_scalar
eab5c70a
BS
2199 = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
2200 rtx_addr_varies_p);
2201
c6df88cb
MM
2202 return (!(fixed_scalar == mem && !aliases_everything_p (x))
2203 && !(fixed_scalar == x && !aliases_everything_p (mem)));
2204}
2205
2206/* Anti dependence: X is written after read in MEM takes place. */
2207
2208int
2209anti_dependence (mem, x)
2210 rtx mem;
2211 rtx x;
2212{
2213 return write_dependence_p (mem, x, /*writep=*/0);
9ae8ffe7
JL
2214}
2215
2216/* Output dependence: X is written after store in MEM takes place. */
2217
2218int
2219output_dependence (mem, x)
b3694847
SS
2220 rtx mem;
2221 rtx x;
9ae8ffe7 2222{
c6df88cb 2223 return write_dependence_p (mem, x, /*writep=*/1);
9ae8ffe7
JL
2224}
2225
bf6d9fd7 2226/* Returns non-zero if X mentions something which is not
7790df19
JW
2227 local to the function and is not constant. */
2228
2229static int
bf6d9fd7 2230nonlocal_mentioned_p (x)
7790df19
JW
2231 rtx x;
2232{
2233 rtx base;
b3694847 2234 RTX_CODE code;
7790df19
JW
2235 int regno;
2236
2237 code = GET_CODE (x);
2238
2239 if (GET_RTX_CLASS (code) == 'i')
2240 {
2a8f6b90
JH
2241 /* Constant functions can be constant if they don't use
2242 scratch memory used to mark function w/o side effects. */
24a28584 2243 if (code == CALL_INSN && CONST_OR_PURE_CALL_P (x))
2a8f6b90
JH
2244 {
2245 x = CALL_INSN_FUNCTION_USAGE (x);
f8cd4126
RK
2246 if (x == 0)
2247 return 0;
2a8f6b90
JH
2248 }
2249 else
2250 x = PATTERN (x);
7790df19
JW
2251 code = GET_CODE (x);
2252 }
2253
2254 switch (code)
2255 {
2256 case SUBREG:
2257 if (GET_CODE (SUBREG_REG (x)) == REG)
2258 {
2259 /* Global registers are not local. */
2260 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
ddef6bc7 2261 && global_regs[subreg_regno (x)])
7790df19
JW
2262 return 1;
2263 return 0;
2264 }
2265 break;
2266
2267 case REG:
2268 regno = REGNO (x);
2269 /* Global registers are not local. */
2270 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2271 return 1;
2272 return 0;
2273
2274 case SCRATCH:
2275 case PC:
2276 case CC0:
2277 case CONST_INT:
2278 case CONST_DOUBLE:
69ef87e2 2279 case CONST_VECTOR:
7790df19
JW
2280 case CONST:
2281 case LABEL_REF:
2282 return 0;
2283
2284 case SYMBOL_REF:
2285 /* Constants in the function's constants pool are constant. */
2286 if (CONSTANT_POOL_ADDRESS_P (x))
2287 return 0;
2288 return 1;
2289
2290 case CALL:
bf6d9fd7 2291 /* Non-constant calls and recursion are not local. */
7790df19
JW
2292 return 1;
2293
2294 case MEM:
2295 /* Be overly conservative and consider any volatile memory
2296 reference as not local. */
2297 if (MEM_VOLATILE_P (x))
2298 return 1;
2299 base = find_base_term (XEXP (x, 0));
2300 if (base)
2301 {
b3b5ad95
JL
2302 /* A Pmode ADDRESS could be a reference via the structure value
2303 address or static chain. Such memory references are nonlocal.
2304
2305 Thus, we have to examine the contents of the ADDRESS to find
2306 out if this is a local reference or not. */
2307 if (GET_CODE (base) == ADDRESS
2308 && GET_MODE (base) == Pmode
2309 && (XEXP (base, 0) == stack_pointer_rtx
2310 || XEXP (base, 0) == arg_pointer_rtx
2311#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2312 || XEXP (base, 0) == hard_frame_pointer_rtx
2313#endif
2314 || XEXP (base, 0) == frame_pointer_rtx))
7790df19
JW
2315 return 0;
2316 /* Constants in the function's constant pool are constant. */
2317 if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base))
2318 return 0;
2319 }
2320 return 1;
2321
bf6d9fd7 2322 case UNSPEC_VOLATILE:
7790df19 2323 case ASM_INPUT:
7790df19
JW
2324 return 1;
2325
bf6d9fd7
JW
2326 case ASM_OPERANDS:
2327 if (MEM_VOLATILE_P (x))
2328 return 1;
2329
2330 /* FALLTHROUGH */
2331
7790df19
JW
2332 default:
2333 break;
2334 }
2335
2336 /* Recursively scan the operands of this expression. */
2337
2338 {
b3694847
SS
2339 const char *fmt = GET_RTX_FORMAT (code);
2340 int i;
7790df19
JW
2341
2342 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2343 {
2a8f6b90 2344 if (fmt[i] == 'e' && XEXP (x, i))
7790df19 2345 {
bf6d9fd7 2346 if (nonlocal_mentioned_p (XEXP (x, i)))
7790df19
JW
2347 return 1;
2348 }
d4757e6a 2349 else if (fmt[i] == 'E')
7790df19 2350 {
b3694847 2351 int j;
7790df19 2352 for (j = 0; j < XVECLEN (x, i); j++)
bf6d9fd7 2353 if (nonlocal_mentioned_p (XVECEXP (x, i, j)))
7790df19
JW
2354 return 1;
2355 }
2356 }
2357 }
2358
2359 return 0;
2360}
2361
2362/* Mark the function if it is constant. */
2363
2364void
2365mark_constant_function ()
2366{
2367 rtx insn;
bf6d9fd7 2368 int nonlocal_mentioned;
7790df19
JW
2369
2370 if (TREE_PUBLIC (current_function_decl)
2371 || TREE_READONLY (current_function_decl)
bf6d9fd7 2372 || DECL_IS_PURE (current_function_decl)
7790df19
JW
2373 || TREE_THIS_VOLATILE (current_function_decl)
2374 || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode)
2375 return;
2376
e004f2f7 2377 /* A loop might not return which counts as a side effect. */
0ecf09f9 2378 if (mark_dfs_back_edges ())
e004f2f7
JW
2379 return;
2380
bf6d9fd7
JW
2381 nonlocal_mentioned = 0;
2382
2383 init_alias_analysis ();
2384
7790df19
JW
2385 /* Determine if this is a constant function. */
2386
2387 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
bf6d9fd7
JW
2388 if (INSN_P (insn) && nonlocal_mentioned_p (insn))
2389 {
2390 nonlocal_mentioned = 1;
2391 break;
2392 }
2393
2394 end_alias_analysis ();
7790df19
JW
2395
2396 /* Mark the function. */
2397
bf6d9fd7
JW
2398 if (! nonlocal_mentioned)
2399 TREE_READONLY (current_function_decl) = 1;
7790df19
JW
2400}
2401
6e73e666
JC
2402
2403static HARD_REG_SET argument_registers;
2404
2405void
2406init_alias_once ()
2407{
b3694847 2408 int i;
6e73e666
JC
2409
2410#ifndef OUTGOING_REGNO
2411#define OUTGOING_REGNO(N) N
2412#endif
2413 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2414 /* Check whether this register can hold an incoming pointer
2415 argument. FUNCTION_ARG_REGNO_P tests outgoing register
ec5c56db 2416 numbers, so translate if necessary due to register windows. */
6e73e666
JC
2417 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
2418 && HARD_REGNO_MODE_OK (i, Pmode))
2419 SET_HARD_REG_BIT (argument_registers, i);
3932261a 2420
30f72379 2421 alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0);
6e73e666
JC
2422}
2423
c13e8210
MM
2424/* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE
2425 array. */
2426
9ae8ffe7
JL
2427void
2428init_alias_analysis ()
2429{
2430 int maxreg = max_reg_num ();
ea64ef27 2431 int changed, pass;
b3694847
SS
2432 int i;
2433 unsigned int ui;
2434 rtx insn;
9ae8ffe7
JL
2435
2436 reg_known_value_size = maxreg;
2437
e05e2395
MM
2438 reg_known_value
2439 = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx))
2440 - FIRST_PSEUDO_REGISTER;
2441 reg_known_equiv_p
2442 = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char))
9ae8ffe7 2443 - FIRST_PSEUDO_REGISTER;
9ae8ffe7 2444
6e73e666
JC
2445 /* Overallocate reg_base_value to allow some growth during loop
2446 optimization. Loop unrolling can create a large number of
2447 registers. */
2448 reg_base_value_size = maxreg * 2;
ac606739 2449 reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx));
1f8f4a0b 2450 ggc_add_rtx_root (reg_base_value, reg_base_value_size);
ac606739 2451
e05e2395
MM
2452 new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx));
2453 reg_seen = (char *) xmalloc (reg_base_value_size);
de12be17
JC
2454 if (! reload_completed && flag_unroll_loops)
2455 {
ac606739 2456 /* ??? Why are we realloc'ing if we're just going to zero it? */
de12be17
JC
2457 alias_invariant = (rtx *)xrealloc (alias_invariant,
2458 reg_base_value_size * sizeof (rtx));
961192e1 2459 memset ((char *)alias_invariant, 0, reg_base_value_size * sizeof (rtx));
de12be17 2460 }
ec907dd8
JL
2461
2462 /* The basic idea is that each pass through this loop will use the
2463 "constant" information from the previous pass to propagate alias
2464 information through another level of assignments.
2465
2466 This could get expensive if the assignment chains are long. Maybe
2467 we should throttle the number of iterations, possibly based on
6e73e666 2468 the optimization level or flag_expensive_optimizations.
ec907dd8
JL
2469
2470 We could propagate more information in the first pass by making use
2471 of REG_N_SETS to determine immediately that the alias information
ea64ef27
JL
2472 for a pseudo is "constant".
2473
2474 A program with an uninitialized variable can cause an infinite loop
2475 here. Instead of doing a full dataflow analysis to detect such problems
2476 we just cap the number of iterations for the loop.
2477
2478 The state of the arrays for the set chain in question does not matter
2479 since the program has undefined behavior. */
6e73e666 2480
ea64ef27 2481 pass = 0;
6e73e666 2482 do
ec907dd8
JL
2483 {
2484 /* Assume nothing will change this iteration of the loop. */
2485 changed = 0;
2486
ec907dd8
JL
2487 /* We want to assign the same IDs each iteration of this loop, so
2488 start counting from zero each iteration of the loop. */
2489 unique_id = 0;
2490
f5143c46 2491 /* We're at the start of the function each iteration through the
ec907dd8
JL
2492 loop, so we're copying arguments. */
2493 copying_arguments = 1;
9ae8ffe7 2494
6e73e666 2495 /* Wipe the potential alias information clean for this pass. */
961192e1 2496 memset ((char *) new_reg_base_value, 0, reg_base_value_size * sizeof (rtx));
8072f69c 2497
6e73e666 2498 /* Wipe the reg_seen array clean. */
961192e1 2499 memset ((char *) reg_seen, 0, reg_base_value_size);
9ae8ffe7 2500
6e73e666
JC
2501 /* Mark all hard registers which may contain an address.
2502 The stack, frame and argument pointers may contain an address.
2503 An argument register which can hold a Pmode value may contain
2504 an address even if it is not in BASE_REGS.
8072f69c 2505
6e73e666
JC
2506 The address expression is VOIDmode for an argument and
2507 Pmode for other registers. */
2508
2509 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2510 if (TEST_HARD_REG_BIT (argument_registers, i))
38a448ca
RH
2511 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
2512 gen_rtx_REG (Pmode, i));
6e73e666
JC
2513
2514 new_reg_base_value[STACK_POINTER_REGNUM]
38a448ca 2515 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
6e73e666 2516 new_reg_base_value[ARG_POINTER_REGNUM]
38a448ca 2517 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
6e73e666 2518 new_reg_base_value[FRAME_POINTER_REGNUM]
38a448ca 2519 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2a2c8203 2520#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6e73e666 2521 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
38a448ca 2522 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2a2c8203 2523#endif
ec907dd8
JL
2524
2525 /* Walk the insns adding values to the new_reg_base_value array. */
2526 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9ae8ffe7 2527 {
2c3c49de 2528 if (INSN_P (insn))
ec907dd8 2529 {
6e73e666 2530 rtx note, set;
efc9bd41
RK
2531
2532#if defined (HAVE_prologue) || defined (HAVE_epilogue)
f5143c46 2533 /* The prologue/epilogue insns are not threaded onto the
657959ca
JL
2534 insn chain until after reload has completed. Thus,
2535 there is no sense wasting time checking if INSN is in
2536 the prologue/epilogue until after reload has completed. */
2537 if (reload_completed
2538 && prologue_epilogue_contains (insn))
efc9bd41
RK
2539 continue;
2540#endif
2541
ec907dd8
JL
2542 /* If this insn has a noalias note, process it, Otherwise,
2543 scan for sets. A simple set will have no side effects
ec5c56db 2544 which could change the base value of any other register. */
6e73e666 2545
ec907dd8 2546 if (GET_CODE (PATTERN (insn)) == SET
efc9bd41
RK
2547 && REG_NOTES (insn) != 0
2548 && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
84832317 2549 record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
ec907dd8 2550 else
84832317 2551 note_stores (PATTERN (insn), record_set, NULL);
6e73e666
JC
2552
2553 set = single_set (insn);
2554
2555 if (set != 0
2556 && GET_CODE (SET_DEST (set)) == REG
fb6754f0 2557 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
6e73e666 2558 {
fb6754f0 2559 unsigned int regno = REGNO (SET_DEST (set));
713f41f9
BS
2560 rtx src = SET_SRC (set);
2561
2562 if (REG_NOTES (insn) != 0
2563 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
2564 && REG_N_SETS (regno) == 1)
2565 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
2566 && GET_CODE (XEXP (note, 0)) != EXPR_LIST
bb2cf916 2567 && ! rtx_varies_p (XEXP (note, 0), 1)
713f41f9
BS
2568 && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0)))
2569 {
2570 reg_known_value[regno] = XEXP (note, 0);
2571 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
2572 }
2573 else if (REG_N_SETS (regno) == 1
2574 && GET_CODE (src) == PLUS
2575 && GET_CODE (XEXP (src, 0)) == REG
fb6754f0
BS
2576 && REGNO (XEXP (src, 0)) >= FIRST_PSEUDO_REGISTER
2577 && (reg_known_value[REGNO (XEXP (src, 0))])
713f41f9
BS
2578 && GET_CODE (XEXP (src, 1)) == CONST_INT)
2579 {
2580 rtx op0 = XEXP (src, 0);
bb2cf916 2581 op0 = reg_known_value[REGNO (op0)];
713f41f9 2582 reg_known_value[regno]
ed8908e7 2583 = plus_constant (op0, INTVAL (XEXP (src, 1)));
713f41f9
BS
2584 reg_known_equiv_p[regno] = 0;
2585 }
2586 else if (REG_N_SETS (regno) == 1
2587 && ! rtx_varies_p (src, 1))
2588 {
2589 reg_known_value[regno] = src;
2590 reg_known_equiv_p[regno] = 0;
2591 }
6e73e666 2592 }
ec907dd8
JL
2593 }
2594 else if (GET_CODE (insn) == NOTE
2595 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2596 copying_arguments = 0;
6e73e666 2597 }
ec907dd8 2598
6e73e666 2599 /* Now propagate values from new_reg_base_value to reg_base_value. */
e51712db 2600 for (ui = 0; ui < reg_base_value_size; ui++)
6e73e666 2601 {
e51712db
KG
2602 if (new_reg_base_value[ui]
2603 && new_reg_base_value[ui] != reg_base_value[ui]
2604 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
ec907dd8 2605 {
e51712db 2606 reg_base_value[ui] = new_reg_base_value[ui];
6e73e666 2607 changed = 1;
ec907dd8 2608 }
9ae8ffe7 2609 }
9ae8ffe7 2610 }
6e73e666 2611 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7
JL
2612
2613 /* Fill in the remaining entries. */
2614 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
2615 if (reg_known_value[i] == 0)
2616 reg_known_value[i] = regno_reg_rtx[i];
2617
9ae8ffe7
JL
2618 /* Simplify the reg_base_value array so that no register refers to
2619 another register, except to special registers indirectly through
2620 ADDRESS expressions.
2621
2622 In theory this loop can take as long as O(registers^2), but unless
2623 there are very long dependency chains it will run in close to linear
ea64ef27
JL
2624 time.
2625
2626 This loop may not be needed any longer now that the main loop does
2627 a better job at propagating alias information. */
2628 pass = 0;
9ae8ffe7
JL
2629 do
2630 {
2631 changed = 0;
ea64ef27 2632 pass++;
e51712db 2633 for (ui = 0; ui < reg_base_value_size; ui++)
9ae8ffe7 2634 {
e51712db 2635 rtx base = reg_base_value[ui];
9ae8ffe7
JL
2636 if (base && GET_CODE (base) == REG)
2637 {
fb6754f0 2638 unsigned int base_regno = REGNO (base);
e51712db
KG
2639 if (base_regno == ui) /* register set from itself */
2640 reg_base_value[ui] = 0;
9ae8ffe7 2641 else
e51712db 2642 reg_base_value[ui] = reg_base_value[base_regno];
9ae8ffe7
JL
2643 changed = 1;
2644 }
2645 }
2646 }
ea64ef27 2647 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7 2648
e05e2395
MM
2649 /* Clean up. */
2650 free (new_reg_base_value);
ec907dd8 2651 new_reg_base_value = 0;
e05e2395 2652 free (reg_seen);
9ae8ffe7
JL
2653 reg_seen = 0;
2654}
2655
2656void
2657end_alias_analysis ()
2658{
e05e2395 2659 free (reg_known_value + FIRST_PSEUDO_REGISTER);
9ae8ffe7 2660 reg_known_value = 0;
ac606739 2661 reg_known_value_size = 0;
e05e2395
MM
2662 free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER);
2663 reg_known_equiv_p = 0;
ac606739
GS
2664 if (reg_base_value)
2665 {
1f8f4a0b 2666 ggc_del_root (reg_base_value);
ac606739
GS
2667 free (reg_base_value);
2668 reg_base_value = 0;
2669 }
9ae8ffe7 2670 reg_base_value_size = 0;
de12be17
JC
2671 if (alias_invariant)
2672 {
ac606739 2673 free (alias_invariant);
de12be17
JC
2674 alias_invariant = 0;
2675 }
9ae8ffe7 2676}
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