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9ae8ffe7 | 1 | /* Alias analysis for GNU C |
3d994c6b | 2 | Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc. |
9ae8ffe7 JL |
3 | Contributed by John Carr (jfc@mit.edu). |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "config.h" | |
670ee920 | 23 | #include "system.h" |
9ae8ffe7 | 24 | #include "rtl.h" |
7790df19 | 25 | #include "tree.h" |
6baf1cc8 | 26 | #include "tm_p.h" |
49ad7cfa | 27 | #include "function.h" |
ac606739 | 28 | #include "insn-flags.h" |
9ae8ffe7 JL |
29 | #include "expr.h" |
30 | #include "regs.h" | |
31 | #include "hard-reg-set.h" | |
32 | #include "flags.h" | |
264fac34 | 33 | #include "output.h" |
2e107e9e | 34 | #include "toplev.h" |
eab5c70a | 35 | #include "cselib.h" |
3932261a | 36 | #include "splay-tree.h" |
ac606739 | 37 | #include "ggc.h" |
3932261a MM |
38 | |
39 | /* The alias sets assigned to MEMs assist the back-end in determining | |
40 | which MEMs can alias which other MEMs. In general, two MEMs in | |
41 | different alias sets to not alias each other. There is one | |
42 | exception, however. Consider something like: | |
43 | ||
44 | struct S {int i; double d; }; | |
45 | ||
46 | a store to an `S' can alias something of either type `int' or type | |
47 | `double'. (However, a store to an `int' cannot alias a `double' | |
48 | and vice versa.) We indicate this via a tree structure that looks | |
49 | like: | |
50 | struct S | |
51 | / \ | |
52 | / \ | |
53 | |/_ _\| | |
54 | int double | |
55 | ||
56 | (The arrows are directed and point downwards.) If, when comparing | |
d4b60170 | 57 | two alias sets, we can hold one set fixed, trace the other set |
3932261a MM |
58 | downwards, and at some point find the first set, the two MEMs can |
59 | alias one another. In this situation we say the alias set for | |
60 | `struct S' is the `superset' and that those for `int' and `double' | |
61 | are `subsets'. | |
62 | ||
63 | Alias set zero is implicitly a superset of all other alias sets. | |
64 | However, this is no actual entry for alias set zero. It is an | |
65 | error to attempt to explicitly construct a subset of zero. */ | |
66 | ||
d4b60170 RK |
67 | typedef struct alias_set_entry |
68 | { | |
3932261a MM |
69 | /* The alias set number, as stored in MEM_ALIAS_SET. */ |
70 | int alias_set; | |
71 | ||
72 | /* The children of the alias set. These are not just the immediate | |
73 | children, but, in fact, all children. So, if we have: | |
74 | ||
75 | struct T { struct S s; float f; } | |
76 | ||
77 | continuing our example above, the children here will be all of | |
78 | `int', `double', `float', and `struct S'. */ | |
79 | splay_tree children; | |
d4b60170 | 80 | } *alias_set_entry; |
9ae8ffe7 | 81 | |
3d994c6b KG |
82 | static int rtx_equal_for_memref_p PARAMS ((rtx, rtx)); |
83 | static rtx find_symbolic_term PARAMS ((rtx)); | |
eab5c70a | 84 | static rtx get_addr PARAMS ((rtx)); |
3d994c6b KG |
85 | static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx, |
86 | HOST_WIDE_INT)); | |
87 | static void record_set PARAMS ((rtx, rtx, void *)); | |
88 | static rtx find_base_term PARAMS ((rtx)); | |
89 | static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode, | |
90 | enum machine_mode)); | |
91 | static rtx find_base_value PARAMS ((rtx)); | |
92 | static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx)); | |
93 | static int insert_subset_children PARAMS ((splay_tree_node, void*)); | |
94 | static alias_set_entry get_alias_set_entry PARAMS ((int)); | |
eab5c70a BS |
95 | static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx, |
96 | int (*)(rtx))); | |
3d994c6b KG |
97 | static int aliases_everything_p PARAMS ((rtx)); |
98 | static int write_dependence_p PARAMS ((rtx, rtx, int)); | |
99 | static int nonlocal_reference_p PARAMS ((rtx)); | |
9ae8ffe7 JL |
100 | |
101 | /* Set up all info needed to perform alias analysis on memory references. */ | |
102 | ||
d4b60170 | 103 | /* Returns the size in bytes of the mode of X. */ |
9ae8ffe7 JL |
104 | #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X))) |
105 | ||
41472af8 | 106 | /* Returns nonzero if MEM1 and MEM2 do not alias because they are in |
264fac34 MM |
107 | different alias sets. We ignore alias sets in functions making use |
108 | of variable arguments because the va_arg macros on some systems are | |
109 | not legal ANSI C. */ | |
110 | #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \ | |
3932261a | 111 | mems_in_disjoint_alias_sets_p (MEM1, MEM2) |
41472af8 | 112 | |
ea64ef27 JL |
113 | /* Cap the number of passes we make over the insns propagating alias |
114 | information through set chains. | |
115 | ||
116 | 10 is a completely arbitrary choice. */ | |
117 | #define MAX_ALIAS_LOOP_PASSES 10 | |
118 | ||
9ae8ffe7 JL |
119 | /* reg_base_value[N] gives an address to which register N is related. |
120 | If all sets after the first add or subtract to the current value | |
121 | or otherwise modify it so it does not point to a different top level | |
122 | object, reg_base_value[N] is equal to the address part of the source | |
2a2c8203 JC |
123 | of the first set. |
124 | ||
125 | A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS | |
126 | expressions represent certain special values: function arguments and | |
b3b5ad95 JL |
127 | the stack, frame, and argument pointers. |
128 | ||
129 | The contents of an ADDRESS is not normally used, the mode of the | |
130 | ADDRESS determines whether the ADDRESS is a function argument or some | |
131 | other special value. Pointer equality, not rtx_equal_p, determines whether | |
132 | two ADDRESS expressions refer to the same base address. | |
133 | ||
134 | The only use of the contents of an ADDRESS is for determining if the | |
135 | current function performs nonlocal memory memory references for the | |
136 | purposes of marking the function as a constant function. */ | |
2a2c8203 | 137 | |
ac606739 GS |
138 | static rtx *reg_base_value; |
139 | static rtx *new_reg_base_value; | |
d4b60170 RK |
140 | static unsigned int reg_base_value_size; /* size of reg_base_value array */ |
141 | ||
9ae8ffe7 | 142 | #define REG_BASE_VALUE(X) \ |
e51712db | 143 | ((unsigned) REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0) |
9ae8ffe7 | 144 | |
de12be17 JC |
145 | /* Vector of known invariant relationships between registers. Set in |
146 | loop unrolling. Indexed by register number, if nonzero the value | |
147 | is an expression describing this register in terms of another. | |
148 | ||
149 | The length of this array is REG_BASE_VALUE_SIZE. | |
150 | ||
151 | Because this array contains only pseudo registers it has no effect | |
152 | after reload. */ | |
153 | static rtx *alias_invariant; | |
154 | ||
c13e8210 MM |
155 | /* Vector indexed by N giving the initial (unchanging) value known for |
156 | pseudo-register N. This array is initialized in | |
157 | init_alias_analysis, and does not change until end_alias_analysis | |
158 | is called. */ | |
9ae8ffe7 JL |
159 | rtx *reg_known_value; |
160 | ||
161 | /* Indicates number of valid entries in reg_known_value. */ | |
770ae6cc | 162 | static unsigned int reg_known_value_size; |
9ae8ffe7 JL |
163 | |
164 | /* Vector recording for each reg_known_value whether it is due to a | |
165 | REG_EQUIV note. Future passes (viz., reload) may replace the | |
166 | pseudo with the equivalent expression and so we account for the | |
167 | dependences that would be introduced if that happens. */ | |
168 | /* ??? This is a problem only on the Convex. The REG_EQUIV notes created in | |
169 | assign_parms mention the arg pointer, and there are explicit insns in the | |
170 | RTL that modify the arg pointer. Thus we must ensure that such insns don't | |
171 | get scheduled across each other because that would invalidate the REG_EQUIV | |
172 | notes. One could argue that the REG_EQUIV notes are wrong, but solving | |
173 | the problem in the scheduler will likely give better code, so we do it | |
174 | here. */ | |
175 | char *reg_known_equiv_p; | |
176 | ||
2a2c8203 JC |
177 | /* True when scanning insns from the start of the rtl to the |
178 | NOTE_INSN_FUNCTION_BEG note. */ | |
9ae8ffe7 | 179 | |
9ae8ffe7 JL |
180 | static int copying_arguments; |
181 | ||
3932261a MM |
182 | /* The splay-tree used to store the various alias set entries. */ |
183 | ||
184 | static splay_tree alias_sets; | |
185 | ||
3932261a MM |
186 | /* Returns a pointer to the alias set entry for ALIAS_SET, if there is |
187 | such an entry, or NULL otherwise. */ | |
188 | ||
189 | static alias_set_entry | |
190 | get_alias_set_entry (alias_set) | |
191 | int alias_set; | |
192 | { | |
d4b60170 RK |
193 | splay_tree_node sn |
194 | = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set); | |
3932261a | 195 | |
d4b60170 | 196 | return sn != 0 ? ((alias_set_entry) sn->value) : 0; |
3932261a MM |
197 | } |
198 | ||
199 | /* Returns nonzero value if the alias sets for MEM1 and MEM2 are such | |
200 | that the two MEMs cannot alias each other. */ | |
201 | ||
202 | static int | |
203 | mems_in_disjoint_alias_sets_p (mem1, mem2) | |
204 | rtx mem1; | |
205 | rtx mem2; | |
206 | { | |
207 | alias_set_entry ase; | |
208 | ||
209 | #ifdef ENABLE_CHECKING | |
210 | /* Perform a basic sanity check. Namely, that there are no alias sets | |
211 | if we're not using strict aliasing. This helps to catch bugs | |
212 | whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or | |
213 | where a MEM is allocated in some way other than by the use of | |
214 | gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to | |
215 | use alias sets to indicate that spilled registers cannot alias each | |
216 | other, we might need to remove this check. */ | |
d4b60170 RK |
217 | if (! flag_strict_aliasing |
218 | && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0)) | |
3932261a MM |
219 | abort (); |
220 | #endif | |
221 | ||
222 | /* The code used in varargs macros are often not conforming ANSI C, | |
223 | which can trick the compiler into making incorrect aliasing | |
224 | assumptions in these functions. So, we don't use alias sets in | |
225 | such a function. FIXME: This should be moved into the front-end; | |
226 | it is a language-dependent notion, and there's no reason not to | |
227 | still use these checks to handle globals. */ | |
228 | if (current_function_stdarg || current_function_varargs) | |
229 | return 0; | |
230 | ||
d4b60170 RK |
231 | /* If have no alias set information for one of the MEMs, we have to assume |
232 | it can alias anything. */ | |
233 | if (MEM_ALIAS_SET (mem1) == 0 || MEM_ALIAS_SET (mem2) == 0) | |
3932261a MM |
234 | return 0; |
235 | ||
d4b60170 | 236 | /* If the two alias sets are the same, they may alias. */ |
3932261a | 237 | if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2)) |
3932261a MM |
238 | return 0; |
239 | ||
240 | /* Iterate through each of the children of the first alias set, | |
241 | comparing it with the second alias set. */ | |
242 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem1)); | |
d4b60170 RK |
243 | if (ase != 0 && splay_tree_lookup (ase->children, |
244 | (splay_tree_key) MEM_ALIAS_SET (mem2))) | |
3932261a MM |
245 | return 0; |
246 | ||
247 | /* Now do the same, but with the alias sets reversed. */ | |
248 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem2)); | |
d4b60170 RK |
249 | if (ase != 0 && splay_tree_lookup (ase->children, |
250 | (splay_tree_key) MEM_ALIAS_SET (mem1))) | |
3932261a MM |
251 | return 0; |
252 | ||
253 | /* The two MEMs are in distinct alias sets, and neither one is the | |
254 | child of the other. Therefore, they cannot alias. */ | |
255 | return 1; | |
256 | } | |
257 | ||
258 | /* Insert the NODE into the splay tree given by DATA. Used by | |
259 | record_alias_subset via splay_tree_foreach. */ | |
260 | ||
261 | static int | |
262 | insert_subset_children (node, data) | |
263 | splay_tree_node node; | |
264 | void *data; | |
265 | { | |
d4b60170 | 266 | splay_tree_insert ((splay_tree) data, node->key, node->value); |
3932261a MM |
267 | |
268 | return 0; | |
269 | } | |
270 | ||
271 | /* Indicate that things in SUBSET can alias things in SUPERSET, but | |
272 | not vice versa. For example, in C, a store to an `int' can alias a | |
273 | structure containing an `int', but not vice versa. Here, the | |
274 | structure would be the SUPERSET and `int' the SUBSET. This | |
275 | function should be called only once per SUPERSET/SUBSET pair. At | |
276 | present any given alias set may only be a subset of one superset. | |
277 | ||
278 | It is illegal for SUPERSET to be zero; everything is implicitly a | |
279 | subset of alias set zero. */ | |
280 | ||
281 | void | |
282 | record_alias_subset (superset, subset) | |
283 | int superset; | |
284 | int subset; | |
285 | { | |
286 | alias_set_entry superset_entry; | |
287 | alias_set_entry subset_entry; | |
288 | ||
289 | if (superset == 0) | |
290 | abort (); | |
291 | ||
292 | superset_entry = get_alias_set_entry (superset); | |
d4b60170 | 293 | if (superset_entry == 0) |
3932261a MM |
294 | { |
295 | /* Create an entry for the SUPERSET, so that we have a place to | |
296 | attach the SUBSET. */ | |
d4b60170 RK |
297 | superset_entry |
298 | = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry)); | |
3932261a MM |
299 | superset_entry->alias_set = superset; |
300 | superset_entry->children | |
30f72379 | 301 | = splay_tree_new (splay_tree_compare_ints, 0, 0); |
d4b60170 | 302 | splay_tree_insert (alias_sets, (splay_tree_key) superset, |
3932261a MM |
303 | (splay_tree_value) superset_entry); |
304 | ||
305 | } | |
306 | ||
307 | subset_entry = get_alias_set_entry (subset); | |
d4b60170 RK |
308 | |
309 | /* If there is an entry for the subset, enter all of its children | |
310 | (if they are not already present) as children of the SUPERSET. */ | |
3932261a | 311 | if (subset_entry) |
3932261a | 312 | splay_tree_foreach (subset_entry->children, |
973838fd | 313 | insert_subset_children, |
3932261a MM |
314 | superset_entry->children); |
315 | ||
316 | /* Enter the SUBSET itself as a child of the SUPERSET. */ | |
317 | splay_tree_insert (superset_entry->children, | |
d4b60170 | 318 | (splay_tree_key) subset, 0); |
3932261a MM |
319 | } |
320 | ||
2a2c8203 JC |
321 | /* Inside SRC, the source of a SET, find a base address. */ |
322 | ||
9ae8ffe7 JL |
323 | static rtx |
324 | find_base_value (src) | |
325 | register rtx src; | |
326 | { | |
327 | switch (GET_CODE (src)) | |
328 | { | |
329 | case SYMBOL_REF: | |
330 | case LABEL_REF: | |
331 | return src; | |
332 | ||
333 | case REG: | |
d4b60170 | 334 | /* At the start of a function, argument registers have known base |
2a2c8203 JC |
335 | values which may be lost later. Returning an ADDRESS |
336 | expression here allows optimization based on argument values | |
337 | even when the argument registers are used for other purposes. */ | |
338 | if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments) | |
ec907dd8 | 339 | return new_reg_base_value[REGNO (src)]; |
73774bc7 | 340 | |
eaf407a5 JL |
341 | /* If a pseudo has a known base value, return it. Do not do this |
342 | for hard regs since it can result in a circular dependency | |
343 | chain for registers which have values at function entry. | |
344 | ||
345 | The test above is not sufficient because the scheduler may move | |
346 | a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */ | |
347 | if (REGNO (src) >= FIRST_PSEUDO_REGISTER | |
e51712db | 348 | && (unsigned) REGNO (src) < reg_base_value_size |
eaf407a5 | 349 | && reg_base_value[REGNO (src)]) |
73774bc7 JL |
350 | return reg_base_value[REGNO (src)]; |
351 | ||
9ae8ffe7 JL |
352 | return src; |
353 | ||
354 | case MEM: | |
355 | /* Check for an argument passed in memory. Only record in the | |
356 | copying-arguments block; it is too hard to track changes | |
357 | otherwise. */ | |
358 | if (copying_arguments | |
359 | && (XEXP (src, 0) == arg_pointer_rtx | |
360 | || (GET_CODE (XEXP (src, 0)) == PLUS | |
361 | && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx))) | |
38a448ca | 362 | return gen_rtx_ADDRESS (VOIDmode, src); |
9ae8ffe7 JL |
363 | return 0; |
364 | ||
365 | case CONST: | |
366 | src = XEXP (src, 0); | |
367 | if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS) | |
368 | break; | |
d4b60170 RK |
369 | |
370 | /* ... fall through ... */ | |
2a2c8203 | 371 | |
9ae8ffe7 JL |
372 | case PLUS: |
373 | case MINUS: | |
2a2c8203 | 374 | { |
ec907dd8 JL |
375 | rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1); |
376 | ||
377 | /* If either operand is a REG, then see if we already have | |
378 | a known value for it. */ | |
379 | if (GET_CODE (src_0) == REG) | |
380 | { | |
381 | temp = find_base_value (src_0); | |
d4b60170 | 382 | if (temp != 0) |
ec907dd8 JL |
383 | src_0 = temp; |
384 | } | |
385 | ||
386 | if (GET_CODE (src_1) == REG) | |
387 | { | |
388 | temp = find_base_value (src_1); | |
d4b60170 | 389 | if (temp!= 0) |
ec907dd8 JL |
390 | src_1 = temp; |
391 | } | |
2a2c8203 | 392 | |
d4b60170 | 393 | /* Guess which operand is the base address: |
ec907dd8 JL |
394 | If either operand is a symbol, then it is the base. If |
395 | either operand is a CONST_INT, then the other is the base. */ | |
d4b60170 | 396 | if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0)) |
2a2c8203 | 397 | return find_base_value (src_0); |
d4b60170 | 398 | else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1)) |
ec907dd8 JL |
399 | return find_base_value (src_1); |
400 | ||
d4b60170 | 401 | /* This might not be necessary anymore: |
ec907dd8 JL |
402 | If either operand is a REG that is a known pointer, then it |
403 | is the base. */ | |
d4b60170 | 404 | else if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0))) |
2a2c8203 | 405 | return find_base_value (src_0); |
d4b60170 | 406 | else if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1))) |
2a2c8203 JC |
407 | return find_base_value (src_1); |
408 | ||
9ae8ffe7 | 409 | return 0; |
2a2c8203 JC |
410 | } |
411 | ||
412 | case LO_SUM: | |
413 | /* The standard form is (lo_sum reg sym) so look only at the | |
414 | second operand. */ | |
415 | return find_base_value (XEXP (src, 1)); | |
9ae8ffe7 JL |
416 | |
417 | case AND: | |
418 | /* If the second operand is constant set the base | |
419 | address to the first operand. */ | |
2a2c8203 JC |
420 | if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0) |
421 | return find_base_value (XEXP (src, 0)); | |
9ae8ffe7 JL |
422 | return 0; |
423 | ||
de12be17 JC |
424 | case ZERO_EXTEND: |
425 | case SIGN_EXTEND: /* used for NT/Alpha pointers */ | |
9ae8ffe7 | 426 | case HIGH: |
2a2c8203 | 427 | return find_base_value (XEXP (src, 0)); |
1d300e19 KG |
428 | |
429 | default: | |
430 | break; | |
9ae8ffe7 JL |
431 | } |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
436 | /* Called from init_alias_analysis indirectly through note_stores. */ | |
437 | ||
d4b60170 | 438 | /* While scanning insns to find base values, reg_seen[N] is nonzero if |
9ae8ffe7 JL |
439 | register N has been set in this function. */ |
440 | static char *reg_seen; | |
441 | ||
13309a5f JC |
442 | /* Addresses which are known not to alias anything else are identified |
443 | by a unique integer. */ | |
ec907dd8 JL |
444 | static int unique_id; |
445 | ||
2a2c8203 | 446 | static void |
84832317 | 447 | record_set (dest, set, data) |
9ae8ffe7 | 448 | rtx dest, set; |
84832317 | 449 | void *data ATTRIBUTE_UNUSED; |
9ae8ffe7 | 450 | { |
ac606739 | 451 | register unsigned regno; |
9ae8ffe7 JL |
452 | rtx src; |
453 | ||
454 | if (GET_CODE (dest) != REG) | |
455 | return; | |
456 | ||
457 | regno = REGNO (dest); | |
458 | ||
ac606739 GS |
459 | if (regno >= reg_base_value_size) |
460 | abort (); | |
461 | ||
9ae8ffe7 JL |
462 | if (set) |
463 | { | |
464 | /* A CLOBBER wipes out any old value but does not prevent a previously | |
465 | unset register from acquiring a base address (i.e. reg_seen is not | |
466 | set). */ | |
467 | if (GET_CODE (set) == CLOBBER) | |
468 | { | |
ec907dd8 | 469 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
470 | return; |
471 | } | |
472 | src = SET_SRC (set); | |
473 | } | |
474 | else | |
475 | { | |
9ae8ffe7 JL |
476 | if (reg_seen[regno]) |
477 | { | |
ec907dd8 | 478 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
479 | return; |
480 | } | |
481 | reg_seen[regno] = 1; | |
38a448ca RH |
482 | new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode, |
483 | GEN_INT (unique_id++)); | |
9ae8ffe7 JL |
484 | return; |
485 | } | |
486 | ||
487 | /* This is not the first set. If the new value is not related to the | |
488 | old value, forget the base value. Note that the following code is | |
489 | not detected: | |
490 | extern int x, y; int *p = &x; p += (&y-&x); | |
491 | ANSI C does not allow computing the difference of addresses | |
492 | of distinct top level objects. */ | |
ec907dd8 | 493 | if (new_reg_base_value[regno]) |
9ae8ffe7 JL |
494 | switch (GET_CODE (src)) |
495 | { | |
2a2c8203 | 496 | case LO_SUM: |
9ae8ffe7 JL |
497 | case PLUS: |
498 | case MINUS: | |
499 | if (XEXP (src, 0) != dest && XEXP (src, 1) != dest) | |
ec907dd8 | 500 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
501 | break; |
502 | case AND: | |
503 | if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT) | |
ec907dd8 | 504 | new_reg_base_value[regno] = 0; |
9ae8ffe7 | 505 | break; |
9ae8ffe7 | 506 | default: |
ec907dd8 | 507 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
508 | break; |
509 | } | |
510 | /* If this is the first set of a register, record the value. */ | |
511 | else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
ec907dd8 JL |
512 | && ! reg_seen[regno] && new_reg_base_value[regno] == 0) |
513 | new_reg_base_value[regno] = find_base_value (src); | |
9ae8ffe7 JL |
514 | |
515 | reg_seen[regno] = 1; | |
516 | } | |
517 | ||
518 | /* Called from loop optimization when a new pseudo-register is created. */ | |
d4b60170 | 519 | |
9ae8ffe7 | 520 | void |
de12be17 | 521 | record_base_value (regno, val, invariant) |
9ae8ffe7 JL |
522 | int regno; |
523 | rtx val; | |
de12be17 | 524 | int invariant; |
9ae8ffe7 | 525 | { |
e51712db | 526 | if ((unsigned) regno >= reg_base_value_size) |
9ae8ffe7 | 527 | return; |
de12be17 JC |
528 | |
529 | /* If INVARIANT is true then this value also describes an invariant | |
530 | relationship which can be used to deduce that two registers with | |
531 | unknown values are different. */ | |
532 | if (invariant && alias_invariant) | |
533 | alias_invariant[regno] = val; | |
534 | ||
9ae8ffe7 JL |
535 | if (GET_CODE (val) == REG) |
536 | { | |
e51712db | 537 | if ((unsigned) REGNO (val) < reg_base_value_size) |
d4b60170 RK |
538 | reg_base_value[regno] = reg_base_value[REGNO (val)]; |
539 | ||
9ae8ffe7 JL |
540 | return; |
541 | } | |
d4b60170 | 542 | |
9ae8ffe7 JL |
543 | reg_base_value[regno] = find_base_value (val); |
544 | } | |
545 | ||
db048faf MM |
546 | /* Returns a canonical version of X, from the point of view alias |
547 | analysis. (For example, if X is a MEM whose address is a register, | |
548 | and the register has a known value (say a SYMBOL_REF), then a MEM | |
549 | whose address is the SYMBOL_REF is returned.) */ | |
550 | ||
551 | rtx | |
9ae8ffe7 JL |
552 | canon_rtx (x) |
553 | rtx x; | |
554 | { | |
555 | /* Recursively look for equivalences. */ | |
556 | if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
557 | && REGNO (x) < reg_known_value_size) | |
558 | return reg_known_value[REGNO (x)] == x | |
559 | ? x : canon_rtx (reg_known_value[REGNO (x)]); | |
560 | else if (GET_CODE (x) == PLUS) | |
561 | { | |
562 | rtx x0 = canon_rtx (XEXP (x, 0)); | |
563 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
564 | ||
565 | if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1)) | |
566 | { | |
567 | /* We can tolerate LO_SUMs being offset here; these | |
568 | rtl are used for nothing other than comparisons. */ | |
569 | if (GET_CODE (x0) == CONST_INT) | |
570 | return plus_constant_for_output (x1, INTVAL (x0)); | |
571 | else if (GET_CODE (x1) == CONST_INT) | |
572 | return plus_constant_for_output (x0, INTVAL (x1)); | |
38a448ca | 573 | return gen_rtx_PLUS (GET_MODE (x), x0, x1); |
9ae8ffe7 JL |
574 | } |
575 | } | |
d4b60170 | 576 | |
9ae8ffe7 JL |
577 | /* This gives us much better alias analysis when called from |
578 | the loop optimizer. Note we want to leave the original | |
579 | MEM alone, but need to return the canonicalized MEM with | |
580 | all the flags with their original values. */ | |
581 | else if (GET_CODE (x) == MEM) | |
582 | { | |
583 | rtx addr = canon_rtx (XEXP (x, 0)); | |
d4b60170 | 584 | |
9ae8ffe7 JL |
585 | if (addr != XEXP (x, 0)) |
586 | { | |
38a448ca | 587 | rtx new = gen_rtx_MEM (GET_MODE (x), addr); |
d4b60170 | 588 | |
c6df88cb | 589 | MEM_COPY_ATTRIBUTES (new, x); |
9ae8ffe7 JL |
590 | x = new; |
591 | } | |
592 | } | |
593 | return x; | |
594 | } | |
595 | ||
596 | /* Return 1 if X and Y are identical-looking rtx's. | |
597 | ||
598 | We use the data in reg_known_value above to see if two registers with | |
599 | different numbers are, in fact, equivalent. */ | |
600 | ||
601 | static int | |
602 | rtx_equal_for_memref_p (x, y) | |
603 | rtx x, y; | |
604 | { | |
605 | register int i; | |
606 | register int j; | |
607 | register enum rtx_code code; | |
6f7d635c | 608 | register const char *fmt; |
9ae8ffe7 JL |
609 | |
610 | if (x == 0 && y == 0) | |
611 | return 1; | |
612 | if (x == 0 || y == 0) | |
613 | return 0; | |
d4b60170 | 614 | |
9ae8ffe7 JL |
615 | x = canon_rtx (x); |
616 | y = canon_rtx (y); | |
617 | ||
618 | if (x == y) | |
619 | return 1; | |
620 | ||
621 | code = GET_CODE (x); | |
622 | /* Rtx's of different codes cannot be equal. */ | |
623 | if (code != GET_CODE (y)) | |
624 | return 0; | |
625 | ||
626 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. | |
627 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ | |
628 | ||
629 | if (GET_MODE (x) != GET_MODE (y)) | |
630 | return 0; | |
631 | ||
db048faf MM |
632 | /* Some RTL can be compared without a recursive examination. */ |
633 | switch (code) | |
634 | { | |
635 | case REG: | |
636 | return REGNO (x) == REGNO (y); | |
637 | ||
638 | case LABEL_REF: | |
639 | return XEXP (x, 0) == XEXP (y, 0); | |
640 | ||
641 | case SYMBOL_REF: | |
642 | return XSTR (x, 0) == XSTR (y, 0); | |
643 | ||
644 | case CONST_INT: | |
645 | case CONST_DOUBLE: | |
646 | /* There's no need to compare the contents of CONST_DOUBLEs or | |
647 | CONST_INTs because pointer equality is a good enough | |
648 | comparison for these nodes. */ | |
649 | return 0; | |
650 | ||
651 | case ADDRESSOF: | |
652 | return (REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0)) | |
653 | && XINT (x, 1) == XINT (y, 1)); | |
654 | ||
655 | default: | |
656 | break; | |
657 | } | |
9ae8ffe7 JL |
658 | |
659 | /* For commutative operations, the RTX match if the operand match in any | |
660 | order. Also handle the simple binary and unary cases without a loop. */ | |
661 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
662 | return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
663 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))) | |
664 | || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1)) | |
665 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0)))); | |
666 | else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2') | |
667 | return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
668 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))); | |
669 | else if (GET_RTX_CLASS (code) == '1') | |
670 | return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)); | |
671 | ||
672 | /* Compare the elements. If any pair of corresponding elements | |
de12be17 JC |
673 | fail to match, return 0 for the whole things. |
674 | ||
675 | Limit cases to types which actually appear in addresses. */ | |
9ae8ffe7 JL |
676 | |
677 | fmt = GET_RTX_FORMAT (code); | |
678 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
679 | { | |
680 | switch (fmt[i]) | |
681 | { | |
9ae8ffe7 JL |
682 | case 'i': |
683 | if (XINT (x, i) != XINT (y, i)) | |
684 | return 0; | |
685 | break; | |
686 | ||
9ae8ffe7 JL |
687 | case 'E': |
688 | /* Two vectors must have the same length. */ | |
689 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
690 | return 0; | |
691 | ||
692 | /* And the corresponding elements must match. */ | |
693 | for (j = 0; j < XVECLEN (x, i); j++) | |
d4b60170 RK |
694 | if (rtx_equal_for_memref_p (XVECEXP (x, i, j), |
695 | XVECEXP (y, i, j)) == 0) | |
9ae8ffe7 JL |
696 | return 0; |
697 | break; | |
698 | ||
699 | case 'e': | |
700 | if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0) | |
701 | return 0; | |
702 | break; | |
703 | ||
aee21ba9 JL |
704 | /* This can happen for an asm which clobbers memory. */ |
705 | case '0': | |
706 | break; | |
707 | ||
9ae8ffe7 JL |
708 | /* It is believed that rtx's at this level will never |
709 | contain anything but integers and other rtx's, | |
710 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
711 | default: | |
712 | abort (); | |
713 | } | |
714 | } | |
715 | return 1; | |
716 | } | |
717 | ||
718 | /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within | |
719 | X and return it, or return 0 if none found. */ | |
720 | ||
721 | static rtx | |
722 | find_symbolic_term (x) | |
723 | rtx x; | |
724 | { | |
725 | register int i; | |
726 | register enum rtx_code code; | |
6f7d635c | 727 | register const char *fmt; |
9ae8ffe7 JL |
728 | |
729 | code = GET_CODE (x); | |
730 | if (code == SYMBOL_REF || code == LABEL_REF) | |
731 | return x; | |
732 | if (GET_RTX_CLASS (code) == 'o') | |
733 | return 0; | |
734 | ||
735 | fmt = GET_RTX_FORMAT (code); | |
736 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
737 | { | |
738 | rtx t; | |
739 | ||
740 | if (fmt[i] == 'e') | |
741 | { | |
742 | t = find_symbolic_term (XEXP (x, i)); | |
743 | if (t != 0) | |
744 | return t; | |
745 | } | |
746 | else if (fmt[i] == 'E') | |
747 | break; | |
748 | } | |
749 | return 0; | |
750 | } | |
751 | ||
752 | static rtx | |
753 | find_base_term (x) | |
754 | register rtx x; | |
755 | { | |
eab5c70a BS |
756 | cselib_val *val; |
757 | struct elt_loc_list *l; | |
758 | ||
9ae8ffe7 JL |
759 | switch (GET_CODE (x)) |
760 | { | |
761 | case REG: | |
762 | return REG_BASE_VALUE (x); | |
763 | ||
de12be17 JC |
764 | case ZERO_EXTEND: |
765 | case SIGN_EXTEND: /* Used for Alpha/NT pointers */ | |
9ae8ffe7 | 766 | case HIGH: |
6d849a2a JL |
767 | case PRE_INC: |
768 | case PRE_DEC: | |
769 | case POST_INC: | |
770 | case POST_DEC: | |
771 | return find_base_term (XEXP (x, 0)); | |
772 | ||
eab5c70a BS |
773 | case VALUE: |
774 | val = CSELIB_VAL_PTR (x); | |
775 | for (l = val->locs; l; l = l->next) | |
776 | if ((x = find_base_term (l->loc)) != 0) | |
777 | return x; | |
778 | return 0; | |
779 | ||
9ae8ffe7 JL |
780 | case CONST: |
781 | x = XEXP (x, 0); | |
782 | if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS) | |
783 | return 0; | |
784 | /* fall through */ | |
785 | case LO_SUM: | |
786 | case PLUS: | |
787 | case MINUS: | |
788 | { | |
3c567fae JL |
789 | rtx tmp1 = XEXP (x, 0); |
790 | rtx tmp2 = XEXP (x, 1); | |
791 | ||
792 | /* This is a litle bit tricky since we have to determine which of | |
793 | the two operands represents the real base address. Otherwise this | |
794 | routine may return the index register instead of the base register. | |
795 | ||
796 | That may cause us to believe no aliasing was possible, when in | |
797 | fact aliasing is possible. | |
798 | ||
799 | We use a few simple tests to guess the base register. Additional | |
800 | tests can certainly be added. For example, if one of the operands | |
801 | is a shift or multiply, then it must be the index register and the | |
802 | other operand is the base register. */ | |
803 | ||
804 | /* If either operand is known to be a pointer, then use it | |
805 | to determine the base term. */ | |
806 | if (REG_P (tmp1) && REGNO_POINTER_FLAG (REGNO (tmp1))) | |
807 | return find_base_term (tmp1); | |
808 | ||
809 | if (REG_P (tmp2) && REGNO_POINTER_FLAG (REGNO (tmp2))) | |
810 | return find_base_term (tmp2); | |
811 | ||
812 | /* Neither operand was known to be a pointer. Go ahead and find the | |
813 | base term for both operands. */ | |
814 | tmp1 = find_base_term (tmp1); | |
815 | tmp2 = find_base_term (tmp2); | |
816 | ||
817 | /* If either base term is named object or a special address | |
818 | (like an argument or stack reference), then use it for the | |
819 | base term. */ | |
d4b60170 | 820 | if (tmp1 != 0 |
3c567fae JL |
821 | && (GET_CODE (tmp1) == SYMBOL_REF |
822 | || GET_CODE (tmp1) == LABEL_REF | |
823 | || (GET_CODE (tmp1) == ADDRESS | |
824 | && GET_MODE (tmp1) != VOIDmode))) | |
825 | return tmp1; | |
826 | ||
d4b60170 | 827 | if (tmp2 != 0 |
3c567fae JL |
828 | && (GET_CODE (tmp2) == SYMBOL_REF |
829 | || GET_CODE (tmp2) == LABEL_REF | |
830 | || (GET_CODE (tmp2) == ADDRESS | |
831 | && GET_MODE (tmp2) != VOIDmode))) | |
832 | return tmp2; | |
833 | ||
834 | /* We could not determine which of the two operands was the | |
835 | base register and which was the index. So we can determine | |
836 | nothing from the base alias check. */ | |
837 | return 0; | |
9ae8ffe7 JL |
838 | } |
839 | ||
840 | case AND: | |
841 | if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
842 | return REG_BASE_VALUE (XEXP (x, 0)); | |
843 | return 0; | |
844 | ||
845 | case SYMBOL_REF: | |
846 | case LABEL_REF: | |
847 | return x; | |
848 | ||
849 | default: | |
850 | return 0; | |
851 | } | |
852 | } | |
853 | ||
854 | /* Return 0 if the addresses X and Y are known to point to different | |
855 | objects, 1 if they might be pointers to the same object. */ | |
856 | ||
857 | static int | |
56ee9281 | 858 | base_alias_check (x, y, x_mode, y_mode) |
9ae8ffe7 | 859 | rtx x, y; |
56ee9281 | 860 | enum machine_mode x_mode, y_mode; |
9ae8ffe7 JL |
861 | { |
862 | rtx x_base = find_base_term (x); | |
863 | rtx y_base = find_base_term (y); | |
864 | ||
1c72c7f6 JC |
865 | /* If the address itself has no known base see if a known equivalent |
866 | value has one. If either address still has no known base, nothing | |
867 | is known about aliasing. */ | |
868 | if (x_base == 0) | |
869 | { | |
870 | rtx x_c; | |
d4b60170 | 871 | |
1c72c7f6 JC |
872 | if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x) |
873 | return 1; | |
d4b60170 | 874 | |
1c72c7f6 JC |
875 | x_base = find_base_term (x_c); |
876 | if (x_base == 0) | |
877 | return 1; | |
878 | } | |
9ae8ffe7 | 879 | |
1c72c7f6 JC |
880 | if (y_base == 0) |
881 | { | |
882 | rtx y_c; | |
883 | if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y) | |
884 | return 1; | |
d4b60170 | 885 | |
1c72c7f6 JC |
886 | y_base = find_base_term (y_c); |
887 | if (y_base == 0) | |
888 | return 1; | |
889 | } | |
890 | ||
891 | /* If the base addresses are equal nothing is known about aliasing. */ | |
892 | if (rtx_equal_p (x_base, y_base)) | |
9ae8ffe7 JL |
893 | return 1; |
894 | ||
56ee9281 RH |
895 | /* The base addresses of the read and write are different expressions. |
896 | If they are both symbols and they are not accessed via AND, there is | |
897 | no conflict. We can bring knowledge of object alignment into play | |
898 | here. For example, on alpha, "char a, b;" can alias one another, | |
899 | though "char a; long b;" cannot. */ | |
9ae8ffe7 | 900 | if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS) |
c02f035f | 901 | { |
56ee9281 RH |
902 | if (GET_CODE (x) == AND && GET_CODE (y) == AND) |
903 | return 1; | |
904 | if (GET_CODE (x) == AND | |
905 | && (GET_CODE (XEXP (x, 1)) != CONST_INT | |
906 | || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1)))) | |
907 | return 1; | |
908 | if (GET_CODE (y) == AND | |
909 | && (GET_CODE (XEXP (y, 1)) != CONST_INT | |
910 | || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1)))) | |
911 | return 1; | |
b2972551 JL |
912 | /* Differing symbols never alias. */ |
913 | return 0; | |
c02f035f | 914 | } |
9ae8ffe7 JL |
915 | |
916 | /* If one address is a stack reference there can be no alias: | |
917 | stack references using different base registers do not alias, | |
918 | a stack reference can not alias a parameter, and a stack reference | |
919 | can not alias a global. */ | |
920 | if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode) | |
921 | || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode)) | |
922 | return 0; | |
923 | ||
924 | if (! flag_argument_noalias) | |
925 | return 1; | |
926 | ||
927 | if (flag_argument_noalias > 1) | |
928 | return 0; | |
929 | ||
930 | /* Weak noalias assertion (arguments are distinct, but may match globals). */ | |
931 | return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode); | |
932 | } | |
933 | ||
eab5c70a BS |
934 | /* Convert the address X into something we can use. This is done by returning |
935 | it unchanged unless it is a value; in the latter case we call cselib to get | |
936 | a more useful rtx. */ | |
937 | static rtx | |
938 | get_addr (x) | |
939 | rtx x; | |
940 | { | |
941 | cselib_val *v; | |
942 | struct elt_loc_list *l; | |
943 | ||
944 | if (GET_CODE (x) != VALUE) | |
945 | return x; | |
946 | v = CSELIB_VAL_PTR (x); | |
947 | for (l = v->locs; l; l = l->next) | |
948 | if (CONSTANT_P (l->loc)) | |
949 | return l->loc; | |
950 | for (l = v->locs; l; l = l->next) | |
951 | if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM) | |
952 | return l->loc; | |
953 | if (v->locs) | |
954 | return v->locs->loc; | |
955 | return x; | |
956 | } | |
957 | ||
39cec1ac MH |
958 | /* Return the address of the (N_REFS + 1)th memory reference to ADDR |
959 | where SIZE is the size in bytes of the memory reference. If ADDR | |
960 | is not modified by the memory reference then ADDR is returned. */ | |
961 | ||
962 | rtx | |
963 | addr_side_effect_eval (addr, size, n_refs) | |
964 | rtx addr; | |
965 | int size; | |
966 | int n_refs; | |
967 | { | |
968 | int offset = 0; | |
969 | ||
970 | switch (GET_CODE (addr)) | |
971 | { | |
972 | case PRE_INC: | |
973 | offset = (n_refs + 1) * size; | |
974 | break; | |
975 | case PRE_DEC: | |
976 | offset = -(n_refs + 1) * size; | |
977 | break; | |
978 | case POST_INC: | |
979 | offset = n_refs * size; | |
980 | break; | |
981 | case POST_DEC: | |
982 | offset = -n_refs * size; | |
983 | break; | |
984 | ||
985 | default: | |
986 | return addr; | |
987 | } | |
988 | ||
989 | if (offset) | |
990 | addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset)); | |
991 | else | |
992 | addr = XEXP (addr, 0); | |
993 | ||
994 | return addr; | |
995 | } | |
996 | ||
9ae8ffe7 JL |
997 | /* Return nonzero if X and Y (memory addresses) could reference the |
998 | same location in memory. C is an offset accumulator. When | |
999 | C is nonzero, we are testing aliases between X and Y + C. | |
1000 | XSIZE is the size in bytes of the X reference, | |
1001 | similarly YSIZE is the size in bytes for Y. | |
1002 | ||
1003 | If XSIZE or YSIZE is zero, we do not know the amount of memory being | |
1004 | referenced (the reference was BLKmode), so make the most pessimistic | |
1005 | assumptions. | |
1006 | ||
c02f035f RH |
1007 | If XSIZE or YSIZE is negative, we may access memory outside the object |
1008 | being referenced as a side effect. This can happen when using AND to | |
1009 | align memory references, as is done on the Alpha. | |
1010 | ||
9ae8ffe7 | 1011 | Nice to notice that varying addresses cannot conflict with fp if no |
0211b6ab | 1012 | local variables had their addresses taken, but that's too hard now. */ |
9ae8ffe7 | 1013 | |
9ae8ffe7 JL |
1014 | static int |
1015 | memrefs_conflict_p (xsize, x, ysize, y, c) | |
1016 | register rtx x, y; | |
1017 | int xsize, ysize; | |
1018 | HOST_WIDE_INT c; | |
1019 | { | |
eab5c70a BS |
1020 | if (GET_CODE (x) == VALUE) |
1021 | x = get_addr (x); | |
1022 | if (GET_CODE (y) == VALUE) | |
1023 | y = get_addr (y); | |
9ae8ffe7 JL |
1024 | if (GET_CODE (x) == HIGH) |
1025 | x = XEXP (x, 0); | |
1026 | else if (GET_CODE (x) == LO_SUM) | |
1027 | x = XEXP (x, 1); | |
1028 | else | |
39cec1ac | 1029 | x = canon_rtx (addr_side_effect_eval (x, xsize, 0)); |
9ae8ffe7 JL |
1030 | if (GET_CODE (y) == HIGH) |
1031 | y = XEXP (y, 0); | |
1032 | else if (GET_CODE (y) == LO_SUM) | |
1033 | y = XEXP (y, 1); | |
1034 | else | |
39cec1ac | 1035 | y = canon_rtx (addr_side_effect_eval (y, ysize, 0)); |
9ae8ffe7 JL |
1036 | |
1037 | if (rtx_equal_for_memref_p (x, y)) | |
1038 | { | |
c02f035f | 1039 | if (xsize <= 0 || ysize <= 0) |
9ae8ffe7 JL |
1040 | return 1; |
1041 | if (c >= 0 && xsize > c) | |
1042 | return 1; | |
1043 | if (c < 0 && ysize+c > 0) | |
1044 | return 1; | |
1045 | return 0; | |
1046 | } | |
1047 | ||
6e73e666 JC |
1048 | /* This code used to check for conflicts involving stack references and |
1049 | globals but the base address alias code now handles these cases. */ | |
9ae8ffe7 JL |
1050 | |
1051 | if (GET_CODE (x) == PLUS) | |
1052 | { | |
1053 | /* The fact that X is canonicalized means that this | |
1054 | PLUS rtx is canonicalized. */ | |
1055 | rtx x0 = XEXP (x, 0); | |
1056 | rtx x1 = XEXP (x, 1); | |
1057 | ||
1058 | if (GET_CODE (y) == PLUS) | |
1059 | { | |
1060 | /* The fact that Y is canonicalized means that this | |
1061 | PLUS rtx is canonicalized. */ | |
1062 | rtx y0 = XEXP (y, 0); | |
1063 | rtx y1 = XEXP (y, 1); | |
1064 | ||
1065 | if (rtx_equal_for_memref_p (x1, y1)) | |
1066 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1067 | if (rtx_equal_for_memref_p (x0, y0)) | |
1068 | return memrefs_conflict_p (xsize, x1, ysize, y1, c); | |
1069 | if (GET_CODE (x1) == CONST_INT) | |
63be02db JM |
1070 | { |
1071 | if (GET_CODE (y1) == CONST_INT) | |
1072 | return memrefs_conflict_p (xsize, x0, ysize, y0, | |
1073 | c - INTVAL (x1) + INTVAL (y1)); | |
1074 | else | |
1075 | return memrefs_conflict_p (xsize, x0, ysize, y, | |
1076 | c - INTVAL (x1)); | |
1077 | } | |
9ae8ffe7 JL |
1078 | else if (GET_CODE (y1) == CONST_INT) |
1079 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1080 | ||
6e73e666 | 1081 | return 1; |
9ae8ffe7 JL |
1082 | } |
1083 | else if (GET_CODE (x1) == CONST_INT) | |
1084 | return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1)); | |
1085 | } | |
1086 | else if (GET_CODE (y) == PLUS) | |
1087 | { | |
1088 | /* The fact that Y is canonicalized means that this | |
1089 | PLUS rtx is canonicalized. */ | |
1090 | rtx y0 = XEXP (y, 0); | |
1091 | rtx y1 = XEXP (y, 1); | |
1092 | ||
1093 | if (GET_CODE (y1) == CONST_INT) | |
1094 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1095 | else | |
1096 | return 1; | |
1097 | } | |
1098 | ||
1099 | if (GET_CODE (x) == GET_CODE (y)) | |
1100 | switch (GET_CODE (x)) | |
1101 | { | |
1102 | case MULT: | |
1103 | { | |
1104 | /* Handle cases where we expect the second operands to be the | |
1105 | same, and check only whether the first operand would conflict | |
1106 | or not. */ | |
1107 | rtx x0, y0; | |
1108 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
1109 | rtx y1 = canon_rtx (XEXP (y, 1)); | |
1110 | if (! rtx_equal_for_memref_p (x1, y1)) | |
1111 | return 1; | |
1112 | x0 = canon_rtx (XEXP (x, 0)); | |
1113 | y0 = canon_rtx (XEXP (y, 0)); | |
1114 | if (rtx_equal_for_memref_p (x0, y0)) | |
1115 | return (xsize == 0 || ysize == 0 | |
1116 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); | |
1117 | ||
1118 | /* Can't properly adjust our sizes. */ | |
1119 | if (GET_CODE (x1) != CONST_INT) | |
1120 | return 1; | |
1121 | xsize /= INTVAL (x1); | |
1122 | ysize /= INTVAL (x1); | |
1123 | c /= INTVAL (x1); | |
1124 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1125 | } | |
1d300e19 | 1126 | |
de12be17 JC |
1127 | case REG: |
1128 | /* Are these registers known not to be equal? */ | |
1129 | if (alias_invariant) | |
1130 | { | |
e51712db | 1131 | unsigned int r_x = REGNO (x), r_y = REGNO (y); |
de12be17 JC |
1132 | rtx i_x, i_y; /* invariant relationships of X and Y */ |
1133 | ||
1134 | i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x]; | |
1135 | i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y]; | |
1136 | ||
1137 | if (i_x == 0 && i_y == 0) | |
1138 | break; | |
1139 | ||
1140 | if (! memrefs_conflict_p (xsize, i_x ? i_x : x, | |
1141 | ysize, i_y ? i_y : y, c)) | |
1142 | return 0; | |
1143 | } | |
1144 | break; | |
1145 | ||
1d300e19 KG |
1146 | default: |
1147 | break; | |
9ae8ffe7 JL |
1148 | } |
1149 | ||
1150 | /* Treat an access through an AND (e.g. a subword access on an Alpha) | |
56ee9281 RH |
1151 | as an access with indeterminate size. Assume that references |
1152 | besides AND are aligned, so if the size of the other reference is | |
1153 | at least as large as the alignment, assume no other overlap. */ | |
9ae8ffe7 | 1154 | if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT) |
56ee9281 | 1155 | { |
02e3377d | 1156 | if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1))) |
56ee9281 RH |
1157 | xsize = -1; |
1158 | return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c); | |
1159 | } | |
9ae8ffe7 | 1160 | if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT) |
c02f035f | 1161 | { |
56ee9281 | 1162 | /* ??? If we are indexing far enough into the array/structure, we |
c02f035f RH |
1163 | may yet be able to determine that we can not overlap. But we |
1164 | also need to that we are far enough from the end not to overlap | |
56ee9281 | 1165 | a following reference, so we do nothing with that for now. */ |
02e3377d | 1166 | if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1))) |
56ee9281 RH |
1167 | ysize = -1; |
1168 | return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c); | |
c02f035f | 1169 | } |
9ae8ffe7 JL |
1170 | |
1171 | if (CONSTANT_P (x)) | |
1172 | { | |
1173 | if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT) | |
1174 | { | |
1175 | c += (INTVAL (y) - INTVAL (x)); | |
c02f035f | 1176 | return (xsize <= 0 || ysize <= 0 |
9ae8ffe7 JL |
1177 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); |
1178 | } | |
1179 | ||
1180 | if (GET_CODE (x) == CONST) | |
1181 | { | |
1182 | if (GET_CODE (y) == CONST) | |
1183 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1184 | ysize, canon_rtx (XEXP (y, 0)), c); | |
1185 | else | |
1186 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1187 | ysize, y, c); | |
1188 | } | |
1189 | if (GET_CODE (y) == CONST) | |
1190 | return memrefs_conflict_p (xsize, x, ysize, | |
1191 | canon_rtx (XEXP (y, 0)), c); | |
1192 | ||
1193 | if (CONSTANT_P (y)) | |
c02f035f RH |
1194 | return (xsize < 0 || ysize < 0 |
1195 | || (rtx_equal_for_memref_p (x, y) | |
1196 | && (xsize == 0 || ysize == 0 | |
1197 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)))); | |
9ae8ffe7 JL |
1198 | |
1199 | return 1; | |
1200 | } | |
1201 | return 1; | |
1202 | } | |
1203 | ||
1204 | /* Functions to compute memory dependencies. | |
1205 | ||
1206 | Since we process the insns in execution order, we can build tables | |
1207 | to keep track of what registers are fixed (and not aliased), what registers | |
1208 | are varying in known ways, and what registers are varying in unknown | |
1209 | ways. | |
1210 | ||
1211 | If both memory references are volatile, then there must always be a | |
1212 | dependence between the two references, since their order can not be | |
1213 | changed. A volatile and non-volatile reference can be interchanged | |
1214 | though. | |
1215 | ||
fa8b6024 | 1216 | A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never |
9ae8ffe7 JL |
1217 | conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must |
1218 | allow QImode aliasing because the ANSI C standard allows character | |
1219 | pointers to alias anything. We are assuming that characters are | |
fa8b6024 JW |
1220 | always QImode here. We also must allow AND addresses, because they may |
1221 | generate accesses outside the object being referenced. This is used to | |
1222 | generate aligned addresses from unaligned addresses, for instance, the | |
1223 | alpha storeqi_unaligned pattern. */ | |
9ae8ffe7 JL |
1224 | |
1225 | /* Read dependence: X is read after read in MEM takes place. There can | |
1226 | only be a dependence here if both reads are volatile. */ | |
1227 | ||
1228 | int | |
1229 | read_dependence (mem, x) | |
1230 | rtx mem; | |
1231 | rtx x; | |
1232 | { | |
1233 | return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem); | |
1234 | } | |
1235 | ||
c6df88cb MM |
1236 | /* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and |
1237 | MEM2 is a reference to a structure at a varying address, or returns | |
1238 | MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL | |
1239 | value is returned MEM1 and MEM2 can never alias. VARIES_P is used | |
1240 | to decide whether or not an address may vary; it should return | |
eab5c70a BS |
1241 | nonzero whenever variation is possible. |
1242 | MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */ | |
1243 | ||
2c72b78f | 1244 | static rtx |
eab5c70a BS |
1245 | fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p) |
1246 | rtx mem1, mem2; | |
1247 | rtx mem1_addr, mem2_addr; | |
3d994c6b | 1248 | int (*varies_p) PARAMS ((rtx)); |
eab5c70a | 1249 | { |
c6df88cb MM |
1250 | if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2) |
1251 | && !varies_p (mem1_addr) && varies_p (mem2_addr)) | |
1252 | /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a | |
1253 | varying address. */ | |
1254 | return mem1; | |
1255 | ||
1256 | if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2) | |
1257 | && varies_p (mem1_addr) && !varies_p (mem2_addr)) | |
1258 | /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a | |
1259 | varying address. */ | |
1260 | return mem2; | |
1261 | ||
1262 | return NULL_RTX; | |
1263 | } | |
1264 | ||
1265 | /* Returns nonzero if something about the mode or address format MEM1 | |
1266 | indicates that it might well alias *anything*. */ | |
1267 | ||
2c72b78f | 1268 | static int |
c6df88cb MM |
1269 | aliases_everything_p (mem) |
1270 | rtx mem; | |
1271 | { | |
1272 | if (GET_MODE (mem) == QImode) | |
1273 | /* ANSI C says that a `char*' can point to anything. */ | |
1274 | return 1; | |
1275 | ||
1276 | if (GET_CODE (XEXP (mem, 0)) == AND) | |
1277 | /* If the address is an AND, its very hard to know at what it is | |
1278 | actually pointing. */ | |
1279 | return 1; | |
1280 | ||
1281 | return 0; | |
1282 | } | |
1283 | ||
9ae8ffe7 JL |
1284 | /* True dependence: X is read after store in MEM takes place. */ |
1285 | ||
1286 | int | |
1287 | true_dependence (mem, mem_mode, x, varies) | |
1288 | rtx mem; | |
1289 | enum machine_mode mem_mode; | |
1290 | rtx x; | |
3d994c6b | 1291 | int (*varies) PARAMS ((rtx)); |
9ae8ffe7 | 1292 | { |
6e73e666 | 1293 | register rtx x_addr, mem_addr; |
9ae8ffe7 JL |
1294 | |
1295 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1296 | return 1; | |
1297 | ||
41472af8 MM |
1298 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1299 | return 0; | |
1300 | ||
9ae8ffe7 JL |
1301 | /* If X is an unchanging read, then it can't possibly conflict with any |
1302 | non-unchanging store. It may conflict with an unchanging write though, | |
1303 | because there may be a single store to this address to initialize it. | |
1304 | Just fall through to the code below to resolve the case where we have | |
1305 | both an unchanging read and an unchanging write. This won't handle all | |
1306 | cases optimally, but the possible performance loss should be | |
1307 | negligible. */ | |
1308 | if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem)) | |
1309 | return 0; | |
1310 | ||
56ee9281 RH |
1311 | if (mem_mode == VOIDmode) |
1312 | mem_mode = GET_MODE (mem); | |
1313 | ||
eab5c70a BS |
1314 | x_addr = get_addr (XEXP (x, 0)); |
1315 | mem_addr = get_addr (XEXP (mem, 0)); | |
1316 | ||
1317 | if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode)) | |
1c72c7f6 JC |
1318 | return 0; |
1319 | ||
eab5c70a BS |
1320 | x_addr = canon_rtx (x_addr); |
1321 | mem_addr = canon_rtx (mem_addr); | |
6e73e666 | 1322 | |
0211b6ab JW |
1323 | if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr, |
1324 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1325 | return 0; | |
1326 | ||
c6df88cb | 1327 | if (aliases_everything_p (x)) |
0211b6ab JW |
1328 | return 1; |
1329 | ||
c6df88cb MM |
1330 | /* We cannot use aliases_everyting_p to test MEM, since we must look |
1331 | at MEM_MODE, rather than GET_MODE (MEM). */ | |
1332 | if (mem_mode == QImode || GET_CODE (mem_addr) == AND) | |
1333 | return 1; | |
0211b6ab | 1334 | |
c6df88cb MM |
1335 | /* In true_dependence we also allow BLKmode to alias anything. Why |
1336 | don't we do this in anti_dependence and output_dependence? */ | |
1337 | if (mem_mode == BLKmode || GET_MODE (x) == BLKmode) | |
1338 | return 1; | |
0211b6ab | 1339 | |
eab5c70a BS |
1340 | return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr, |
1341 | varies); | |
9ae8ffe7 JL |
1342 | } |
1343 | ||
c6df88cb MM |
1344 | /* Returns non-zero if a write to X might alias a previous read from |
1345 | (or, if WRITEP is non-zero, a write to) MEM. */ | |
9ae8ffe7 | 1346 | |
2c72b78f | 1347 | static int |
c6df88cb | 1348 | write_dependence_p (mem, x, writep) |
9ae8ffe7 JL |
1349 | rtx mem; |
1350 | rtx x; | |
c6df88cb | 1351 | int writep; |
9ae8ffe7 | 1352 | { |
6e73e666 | 1353 | rtx x_addr, mem_addr; |
c6df88cb | 1354 | rtx fixed_scalar; |
6e73e666 | 1355 | |
9ae8ffe7 JL |
1356 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) |
1357 | return 1; | |
1358 | ||
eab5c70a BS |
1359 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1360 | return 0; | |
1361 | ||
9ae8ffe7 JL |
1362 | /* If MEM is an unchanging read, then it can't possibly conflict with |
1363 | the store to X, because there is at most one store to MEM, and it must | |
1364 | have occurred somewhere before MEM. */ | |
c6df88cb | 1365 | if (!writep && RTX_UNCHANGING_P (mem)) |
9ae8ffe7 JL |
1366 | return 0; |
1367 | ||
eab5c70a BS |
1368 | x_addr = get_addr (XEXP (x, 0)); |
1369 | mem_addr = get_addr (XEXP (mem, 0)); | |
1c72c7f6 | 1370 | |
eab5c70a BS |
1371 | if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), |
1372 | GET_MODE (mem))) | |
41472af8 MM |
1373 | return 0; |
1374 | ||
eab5c70a BS |
1375 | x_addr = canon_rtx (x_addr); |
1376 | mem_addr = canon_rtx (mem_addr); | |
6e73e666 | 1377 | |
c6df88cb MM |
1378 | if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr, |
1379 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1380 | return 0; | |
1381 | ||
1382 | fixed_scalar | |
eab5c70a BS |
1383 | = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr, |
1384 | rtx_addr_varies_p); | |
1385 | ||
c6df88cb MM |
1386 | return (!(fixed_scalar == mem && !aliases_everything_p (x)) |
1387 | && !(fixed_scalar == x && !aliases_everything_p (mem))); | |
1388 | } | |
1389 | ||
1390 | /* Anti dependence: X is written after read in MEM takes place. */ | |
1391 | ||
1392 | int | |
1393 | anti_dependence (mem, x) | |
1394 | rtx mem; | |
1395 | rtx x; | |
1396 | { | |
1397 | return write_dependence_p (mem, x, /*writep=*/0); | |
9ae8ffe7 JL |
1398 | } |
1399 | ||
1400 | /* Output dependence: X is written after store in MEM takes place. */ | |
1401 | ||
1402 | int | |
1403 | output_dependence (mem, x) | |
1404 | register rtx mem; | |
1405 | register rtx x; | |
1406 | { | |
c6df88cb | 1407 | return write_dependence_p (mem, x, /*writep=*/1); |
9ae8ffe7 JL |
1408 | } |
1409 | ||
7790df19 JW |
1410 | /* Returns non-zero if X might refer to something which is not |
1411 | local to the function and is not constant. */ | |
1412 | ||
1413 | static int | |
1414 | nonlocal_reference_p (x) | |
1415 | rtx x; | |
1416 | { | |
1417 | rtx base; | |
1418 | register RTX_CODE code; | |
1419 | int regno; | |
1420 | ||
1421 | code = GET_CODE (x); | |
1422 | ||
1423 | if (GET_RTX_CLASS (code) == 'i') | |
1424 | { | |
2a8f6b90 JH |
1425 | /* Constant functions can be constant if they don't use |
1426 | scratch memory used to mark function w/o side effects. */ | |
7790df19 | 1427 | if (code == CALL_INSN && CONST_CALL_P (x)) |
2a8f6b90 JH |
1428 | { |
1429 | x = CALL_INSN_FUNCTION_USAGE (x); | |
1430 | if (!x) return 0; | |
1431 | } | |
1432 | else | |
1433 | x = PATTERN (x); | |
7790df19 JW |
1434 | code = GET_CODE (x); |
1435 | } | |
1436 | ||
1437 | switch (code) | |
1438 | { | |
1439 | case SUBREG: | |
1440 | if (GET_CODE (SUBREG_REG (x)) == REG) | |
1441 | { | |
1442 | /* Global registers are not local. */ | |
1443 | if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER | |
1444 | && global_regs[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)]) | |
1445 | return 1; | |
1446 | return 0; | |
1447 | } | |
1448 | break; | |
1449 | ||
1450 | case REG: | |
1451 | regno = REGNO (x); | |
1452 | /* Global registers are not local. */ | |
1453 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
1454 | return 1; | |
1455 | return 0; | |
1456 | ||
1457 | case SCRATCH: | |
1458 | case PC: | |
1459 | case CC0: | |
1460 | case CONST_INT: | |
1461 | case CONST_DOUBLE: | |
1462 | case CONST: | |
1463 | case LABEL_REF: | |
1464 | return 0; | |
1465 | ||
1466 | case SYMBOL_REF: | |
1467 | /* Constants in the function's constants pool are constant. */ | |
1468 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1469 | return 0; | |
1470 | return 1; | |
1471 | ||
1472 | case CALL: | |
1473 | /* Recursion introduces no additional considerations. */ | |
1474 | if (GET_CODE (XEXP (x, 0)) == MEM | |
1475 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
1476 | && strcmp(XSTR (XEXP (XEXP (x, 0), 0), 0), | |
1477 | IDENTIFIER_POINTER ( | |
1478 | DECL_ASSEMBLER_NAME (current_function_decl))) == 0) | |
1479 | return 0; | |
1480 | return 1; | |
1481 | ||
1482 | case MEM: | |
1483 | /* Be overly conservative and consider any volatile memory | |
1484 | reference as not local. */ | |
1485 | if (MEM_VOLATILE_P (x)) | |
1486 | return 1; | |
1487 | base = find_base_term (XEXP (x, 0)); | |
1488 | if (base) | |
1489 | { | |
b3b5ad95 JL |
1490 | /* A Pmode ADDRESS could be a reference via the structure value |
1491 | address or static chain. Such memory references are nonlocal. | |
1492 | ||
1493 | Thus, we have to examine the contents of the ADDRESS to find | |
1494 | out if this is a local reference or not. */ | |
1495 | if (GET_CODE (base) == ADDRESS | |
1496 | && GET_MODE (base) == Pmode | |
1497 | && (XEXP (base, 0) == stack_pointer_rtx | |
1498 | || XEXP (base, 0) == arg_pointer_rtx | |
1499 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
1500 | || XEXP (base, 0) == hard_frame_pointer_rtx | |
1501 | #endif | |
1502 | || XEXP (base, 0) == frame_pointer_rtx)) | |
7790df19 JW |
1503 | return 0; |
1504 | /* Constants in the function's constant pool are constant. */ | |
1505 | if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base)) | |
1506 | return 0; | |
1507 | } | |
1508 | return 1; | |
1509 | ||
1510 | case ASM_INPUT: | |
1511 | case ASM_OPERANDS: | |
1512 | return 1; | |
1513 | ||
1514 | default: | |
1515 | break; | |
1516 | } | |
1517 | ||
1518 | /* Recursively scan the operands of this expression. */ | |
1519 | ||
1520 | { | |
499b1098 | 1521 | register const char *fmt = GET_RTX_FORMAT (code); |
7790df19 JW |
1522 | register int i; |
1523 | ||
1524 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1525 | { | |
2a8f6b90 | 1526 | if (fmt[i] == 'e' && XEXP (x, i)) |
7790df19 JW |
1527 | { |
1528 | if (nonlocal_reference_p (XEXP (x, i))) | |
1529 | return 1; | |
1530 | } | |
d4757e6a | 1531 | else if (fmt[i] == 'E') |
7790df19 JW |
1532 | { |
1533 | register int j; | |
1534 | for (j = 0; j < XVECLEN (x, i); j++) | |
1535 | if (nonlocal_reference_p (XVECEXP (x, i, j))) | |
1536 | return 1; | |
1537 | } | |
1538 | } | |
1539 | } | |
1540 | ||
1541 | return 0; | |
1542 | } | |
1543 | ||
1544 | /* Mark the function if it is constant. */ | |
1545 | ||
1546 | void | |
1547 | mark_constant_function () | |
1548 | { | |
1549 | rtx insn; | |
1550 | ||
1551 | if (TREE_PUBLIC (current_function_decl) | |
1552 | || TREE_READONLY (current_function_decl) | |
1553 | || TREE_THIS_VOLATILE (current_function_decl) | |
1554 | || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode) | |
1555 | return; | |
1556 | ||
1557 | /* Determine if this is a constant function. */ | |
1558 | ||
1559 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
1560 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
1561 | && nonlocal_reference_p (insn)) | |
1562 | return; | |
1563 | ||
1564 | /* Mark the function. */ | |
1565 | ||
1566 | TREE_READONLY (current_function_decl) = 1; | |
1567 | } | |
1568 | ||
6e73e666 JC |
1569 | |
1570 | static HARD_REG_SET argument_registers; | |
1571 | ||
1572 | void | |
1573 | init_alias_once () | |
1574 | { | |
1575 | register int i; | |
1576 | ||
1577 | #ifndef OUTGOING_REGNO | |
1578 | #define OUTGOING_REGNO(N) N | |
1579 | #endif | |
1580 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1581 | /* Check whether this register can hold an incoming pointer | |
1582 | argument. FUNCTION_ARG_REGNO_P tests outgoing register | |
1583 | numbers, so translate if necessary due to register windows. */ | |
1584 | if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i)) | |
1585 | && HARD_REGNO_MODE_OK (i, Pmode)) | |
1586 | SET_HARD_REG_BIT (argument_registers, i); | |
3932261a | 1587 | |
30f72379 | 1588 | alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0); |
6e73e666 JC |
1589 | } |
1590 | ||
c13e8210 MM |
1591 | /* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE |
1592 | array. */ | |
1593 | ||
9ae8ffe7 JL |
1594 | void |
1595 | init_alias_analysis () | |
1596 | { | |
1597 | int maxreg = max_reg_num (); | |
ea64ef27 | 1598 | int changed, pass; |
9ae8ffe7 | 1599 | register int i; |
e51712db | 1600 | register unsigned int ui; |
9ae8ffe7 | 1601 | register rtx insn; |
9ae8ffe7 JL |
1602 | |
1603 | reg_known_value_size = maxreg; | |
1604 | ||
e05e2395 MM |
1605 | reg_known_value |
1606 | = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx)) | |
1607 | - FIRST_PSEUDO_REGISTER; | |
1608 | reg_known_equiv_p | |
1609 | = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char)) | |
9ae8ffe7 | 1610 | - FIRST_PSEUDO_REGISTER; |
9ae8ffe7 | 1611 | |
6e73e666 JC |
1612 | /* Overallocate reg_base_value to allow some growth during loop |
1613 | optimization. Loop unrolling can create a large number of | |
1614 | registers. */ | |
1615 | reg_base_value_size = maxreg * 2; | |
ac606739 GS |
1616 | reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx)); |
1617 | if (ggc_p) | |
1618 | ggc_add_rtx_root (reg_base_value, reg_base_value_size); | |
1619 | ||
e05e2395 MM |
1620 | new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx)); |
1621 | reg_seen = (char *) xmalloc (reg_base_value_size); | |
de12be17 JC |
1622 | if (! reload_completed && flag_unroll_loops) |
1623 | { | |
ac606739 | 1624 | /* ??? Why are we realloc'ing if we're just going to zero it? */ |
de12be17 JC |
1625 | alias_invariant = (rtx *)xrealloc (alias_invariant, |
1626 | reg_base_value_size * sizeof (rtx)); | |
1627 | bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx)); | |
1628 | } | |
1629 | ||
ec907dd8 JL |
1630 | |
1631 | /* The basic idea is that each pass through this loop will use the | |
1632 | "constant" information from the previous pass to propagate alias | |
1633 | information through another level of assignments. | |
1634 | ||
1635 | This could get expensive if the assignment chains are long. Maybe | |
1636 | we should throttle the number of iterations, possibly based on | |
6e73e666 | 1637 | the optimization level or flag_expensive_optimizations. |
ec907dd8 JL |
1638 | |
1639 | We could propagate more information in the first pass by making use | |
1640 | of REG_N_SETS to determine immediately that the alias information | |
ea64ef27 JL |
1641 | for a pseudo is "constant". |
1642 | ||
1643 | A program with an uninitialized variable can cause an infinite loop | |
1644 | here. Instead of doing a full dataflow analysis to detect such problems | |
1645 | we just cap the number of iterations for the loop. | |
1646 | ||
1647 | The state of the arrays for the set chain in question does not matter | |
1648 | since the program has undefined behavior. */ | |
6e73e666 | 1649 | |
ea64ef27 | 1650 | pass = 0; |
6e73e666 | 1651 | do |
ec907dd8 JL |
1652 | { |
1653 | /* Assume nothing will change this iteration of the loop. */ | |
1654 | changed = 0; | |
1655 | ||
ec907dd8 JL |
1656 | /* We want to assign the same IDs each iteration of this loop, so |
1657 | start counting from zero each iteration of the loop. */ | |
1658 | unique_id = 0; | |
1659 | ||
1660 | /* We're at the start of the funtion each iteration through the | |
1661 | loop, so we're copying arguments. */ | |
1662 | copying_arguments = 1; | |
9ae8ffe7 | 1663 | |
6e73e666 JC |
1664 | /* Wipe the potential alias information clean for this pass. */ |
1665 | bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx)); | |
8072f69c | 1666 | |
6e73e666 JC |
1667 | /* Wipe the reg_seen array clean. */ |
1668 | bzero ((char *) reg_seen, reg_base_value_size); | |
9ae8ffe7 | 1669 | |
6e73e666 JC |
1670 | /* Mark all hard registers which may contain an address. |
1671 | The stack, frame and argument pointers may contain an address. | |
1672 | An argument register which can hold a Pmode value may contain | |
1673 | an address even if it is not in BASE_REGS. | |
8072f69c | 1674 | |
6e73e666 JC |
1675 | The address expression is VOIDmode for an argument and |
1676 | Pmode for other registers. */ | |
1677 | ||
1678 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1679 | if (TEST_HARD_REG_BIT (argument_registers, i)) | |
38a448ca RH |
1680 | new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode, |
1681 | gen_rtx_REG (Pmode, i)); | |
6e73e666 JC |
1682 | |
1683 | new_reg_base_value[STACK_POINTER_REGNUM] | |
38a448ca | 1684 | = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); |
6e73e666 | 1685 | new_reg_base_value[ARG_POINTER_REGNUM] |
38a448ca | 1686 | = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); |
6e73e666 | 1687 | new_reg_base_value[FRAME_POINTER_REGNUM] |
38a448ca | 1688 | = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); |
2a2c8203 | 1689 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6e73e666 | 1690 | new_reg_base_value[HARD_FRAME_POINTER_REGNUM] |
38a448ca | 1691 | = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); |
2a2c8203 | 1692 | #endif |
6e73e666 JC |
1693 | if (struct_value_incoming_rtx |
1694 | && GET_CODE (struct_value_incoming_rtx) == REG) | |
1695 | new_reg_base_value[REGNO (struct_value_incoming_rtx)] | |
38a448ca | 1696 | = gen_rtx_ADDRESS (Pmode, struct_value_incoming_rtx); |
6e73e666 JC |
1697 | |
1698 | if (static_chain_rtx | |
1699 | && GET_CODE (static_chain_rtx) == REG) | |
1700 | new_reg_base_value[REGNO (static_chain_rtx)] | |
38a448ca | 1701 | = gen_rtx_ADDRESS (Pmode, static_chain_rtx); |
ec907dd8 JL |
1702 | |
1703 | /* Walk the insns adding values to the new_reg_base_value array. */ | |
1704 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
9ae8ffe7 | 1705 | { |
950fe843 | 1706 | #if defined (HAVE_prologue) || defined (HAVE_epilogue) |
5c7675e9 RH |
1707 | if (prologue_epilogue_contains (insn)) |
1708 | continue; | |
950fe843 | 1709 | #endif |
6e73e666 | 1710 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
ec907dd8 | 1711 | { |
6e73e666 | 1712 | rtx note, set; |
ec907dd8 JL |
1713 | /* If this insn has a noalias note, process it, Otherwise, |
1714 | scan for sets. A simple set will have no side effects | |
1715 | which could change the base value of any other register. */ | |
6e73e666 | 1716 | |
ec907dd8 | 1717 | if (GET_CODE (PATTERN (insn)) == SET |
6e73e666 | 1718 | && (find_reg_note (insn, REG_NOALIAS, NULL_RTX))) |
84832317 | 1719 | record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL); |
ec907dd8 | 1720 | else |
84832317 | 1721 | note_stores (PATTERN (insn), record_set, NULL); |
6e73e666 JC |
1722 | |
1723 | set = single_set (insn); | |
1724 | ||
1725 | if (set != 0 | |
1726 | && GET_CODE (SET_DEST (set)) == REG | |
1727 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER | |
1728 | && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 | |
1729 | && REG_N_SETS (REGNO (SET_DEST (set))) == 1) | |
1730 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0) | |
6ba14f92 R |
1731 | && GET_CODE (XEXP (note, 0)) != EXPR_LIST |
1732 | && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0))) | |
6e73e666 JC |
1733 | { |
1734 | int regno = REGNO (SET_DEST (set)); | |
1735 | reg_known_value[regno] = XEXP (note, 0); | |
1736 | reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV; | |
1737 | } | |
ec907dd8 JL |
1738 | } |
1739 | else if (GET_CODE (insn) == NOTE | |
1740 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) | |
1741 | copying_arguments = 0; | |
6e73e666 | 1742 | } |
ec907dd8 | 1743 | |
6e73e666 | 1744 | /* Now propagate values from new_reg_base_value to reg_base_value. */ |
e51712db | 1745 | for (ui = 0; ui < reg_base_value_size; ui++) |
6e73e666 | 1746 | { |
e51712db KG |
1747 | if (new_reg_base_value[ui] |
1748 | && new_reg_base_value[ui] != reg_base_value[ui] | |
1749 | && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui])) | |
ec907dd8 | 1750 | { |
e51712db | 1751 | reg_base_value[ui] = new_reg_base_value[ui]; |
6e73e666 | 1752 | changed = 1; |
ec907dd8 | 1753 | } |
9ae8ffe7 | 1754 | } |
9ae8ffe7 | 1755 | } |
6e73e666 | 1756 | while (changed && ++pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 JL |
1757 | |
1758 | /* Fill in the remaining entries. */ | |
1759 | for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++) | |
1760 | if (reg_known_value[i] == 0) | |
1761 | reg_known_value[i] = regno_reg_rtx[i]; | |
1762 | ||
9ae8ffe7 JL |
1763 | /* Simplify the reg_base_value array so that no register refers to |
1764 | another register, except to special registers indirectly through | |
1765 | ADDRESS expressions. | |
1766 | ||
1767 | In theory this loop can take as long as O(registers^2), but unless | |
1768 | there are very long dependency chains it will run in close to linear | |
ea64ef27 JL |
1769 | time. |
1770 | ||
1771 | This loop may not be needed any longer now that the main loop does | |
1772 | a better job at propagating alias information. */ | |
1773 | pass = 0; | |
9ae8ffe7 JL |
1774 | do |
1775 | { | |
1776 | changed = 0; | |
ea64ef27 | 1777 | pass++; |
e51712db | 1778 | for (ui = 0; ui < reg_base_value_size; ui++) |
9ae8ffe7 | 1779 | { |
e51712db | 1780 | rtx base = reg_base_value[ui]; |
9ae8ffe7 JL |
1781 | if (base && GET_CODE (base) == REG) |
1782 | { | |
e51712db KG |
1783 | unsigned int base_regno = REGNO (base); |
1784 | if (base_regno == ui) /* register set from itself */ | |
1785 | reg_base_value[ui] = 0; | |
9ae8ffe7 | 1786 | else |
e51712db | 1787 | reg_base_value[ui] = reg_base_value[base_regno]; |
9ae8ffe7 JL |
1788 | changed = 1; |
1789 | } | |
1790 | } | |
1791 | } | |
ea64ef27 | 1792 | while (changed && pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 | 1793 | |
e05e2395 MM |
1794 | /* Clean up. */ |
1795 | free (new_reg_base_value); | |
ec907dd8 | 1796 | new_reg_base_value = 0; |
e05e2395 | 1797 | free (reg_seen); |
9ae8ffe7 JL |
1798 | reg_seen = 0; |
1799 | } | |
1800 | ||
1801 | void | |
1802 | end_alias_analysis () | |
1803 | { | |
e05e2395 | 1804 | free (reg_known_value + FIRST_PSEUDO_REGISTER); |
9ae8ffe7 | 1805 | reg_known_value = 0; |
ac606739 | 1806 | reg_known_value_size = 0; |
e05e2395 MM |
1807 | free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER); |
1808 | reg_known_equiv_p = 0; | |
ac606739 GS |
1809 | if (reg_base_value) |
1810 | { | |
1811 | if (ggc_p) | |
1812 | ggc_del_root (reg_base_value); | |
1813 | free (reg_base_value); | |
1814 | reg_base_value = 0; | |
1815 | } | |
9ae8ffe7 | 1816 | reg_base_value_size = 0; |
de12be17 JC |
1817 | if (alias_invariant) |
1818 | { | |
ac606739 | 1819 | free (alias_invariant); |
de12be17 JC |
1820 | alias_invariant = 0; |
1821 | } | |
9ae8ffe7 | 1822 | } |