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9ae8ffe7 1/* Alias analysis for GNU C
6e24b709 2 Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
9ae8ffe7
JL
3 Contributed by John Carr (jfc@mit.edu).
4
1322177d 5This file is part of GCC.
9ae8ffe7 6
1322177d
LB
7GCC is free software; you can redistribute it and/or modify it under
8the terms of the GNU General Public License as published by the Free
9Software Foundation; either version 2, or (at your option) any later
10version.
9ae8ffe7 11
1322177d
LB
12GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13WARRANTY; without even the implied warranty of MERCHANTABILITY or
14FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15for more details.
9ae8ffe7
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16
17You should have received a copy of the GNU General Public License
1322177d
LB
18along with GCC; see the file COPYING. If not, write to the Free
19Software Foundation, 59 Temple Place - Suite 330, Boston, MA
2002111-1307, USA. */
9ae8ffe7
JL
21
22#include "config.h"
670ee920 23#include "system.h"
9ae8ffe7 24#include "rtl.h"
7790df19 25#include "tree.h"
6baf1cc8 26#include "tm_p.h"
49ad7cfa 27#include "function.h"
9ae8ffe7
JL
28#include "expr.h"
29#include "regs.h"
30#include "hard-reg-set.h"
e004f2f7 31#include "basic-block.h"
9ae8ffe7 32#include "flags.h"
264fac34 33#include "output.h"
2e107e9e 34#include "toplev.h"
eab5c70a 35#include "cselib.h"
3932261a 36#include "splay-tree.h"
ac606739 37#include "ggc.h"
3932261a
MM
38
39/* The alias sets assigned to MEMs assist the back-end in determining
40 which MEMs can alias which other MEMs. In general, two MEMs in
ac3d9668
RK
41 different alias sets cannot alias each other, with one important
42 exception. Consider something like:
3932261a
MM
43
44 struct S {int i; double d; };
45
46 a store to an `S' can alias something of either type `int' or type
47 `double'. (However, a store to an `int' cannot alias a `double'
48 and vice versa.) We indicate this via a tree structure that looks
49 like:
50 struct S
51 / \
52 / \
53 |/_ _\|
54 int double
55
ac3d9668
RK
56 (The arrows are directed and point downwards.)
57 In this situation we say the alias set for `struct S' is the
58 `superset' and that those for `int' and `double' are `subsets'.
59
3bdf5ad1
RK
60 To see whether two alias sets can point to the same memory, we must
61 see if either alias set is a subset of the other. We need not trace
e3aafbad 62 past immediate descendents, however, since we propagate all
3bdf5ad1 63 grandchildren up one level.
3932261a
MM
64
65 Alias set zero is implicitly a superset of all other alias sets.
66 However, this is no actual entry for alias set zero. It is an
67 error to attempt to explicitly construct a subset of zero. */
68
d4b60170
RK
69typedef struct alias_set_entry
70{
3932261a 71 /* The alias set number, as stored in MEM_ALIAS_SET. */
3bdf5ad1 72 HOST_WIDE_INT alias_set;
3932261a
MM
73
74 /* The children of the alias set. These are not just the immediate
e3aafbad 75 children, but, in fact, all descendents. So, if we have:
3932261a
MM
76
77 struct T { struct S s; float f; }
78
79 continuing our example above, the children here will be all of
80 `int', `double', `float', and `struct S'. */
81 splay_tree children;
2bf105ab
RK
82
83 /* Nonzero if would have a child of zero: this effectively makes this
84 alias set the same as alias set zero. */
85 int has_zero_child;
d4b60170 86} *alias_set_entry;
9ae8ffe7 87
3d994c6b
KG
88static int rtx_equal_for_memref_p PARAMS ((rtx, rtx));
89static rtx find_symbolic_term PARAMS ((rtx));
a13d4ebf 90rtx get_addr PARAMS ((rtx));
3d994c6b
KG
91static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx,
92 HOST_WIDE_INT));
93static void record_set PARAMS ((rtx, rtx, void *));
94static rtx find_base_term PARAMS ((rtx));
95static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode,
96 enum machine_mode));
6e24b709
RK
97static int handled_component_p PARAMS ((tree));
98static int can_address_p PARAMS ((tree));
3d994c6b
KG
99static rtx find_base_value PARAMS ((rtx));
100static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx));
101static int insert_subset_children PARAMS ((splay_tree_node, void*));
738cc472 102static tree find_base_decl PARAMS ((tree));
3bdf5ad1 103static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT));
eab5c70a 104static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx,
e38fe8e0 105 int (*) (rtx, int)));
3d994c6b
KG
106static int aliases_everything_p PARAMS ((rtx));
107static int write_dependence_p PARAMS ((rtx, rtx, int));
bf6d9fd7 108static int nonlocal_mentioned_p PARAMS ((rtx));
9ae8ffe7
JL
109
110/* Set up all info needed to perform alias analysis on memory references. */
111
d4b60170 112/* Returns the size in bytes of the mode of X. */
9ae8ffe7
JL
113#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
114
41472af8 115/* Returns nonzero if MEM1 and MEM2 do not alias because they are in
264fac34
MM
116 different alias sets. We ignore alias sets in functions making use
117 of variable arguments because the va_arg macros on some systems are
118 not legal ANSI C. */
119#define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
3932261a 120 mems_in_disjoint_alias_sets_p (MEM1, MEM2)
41472af8 121
ea64ef27 122/* Cap the number of passes we make over the insns propagating alias
ac3d9668 123 information through set chains. 10 is a completely arbitrary choice. */
ea64ef27
JL
124#define MAX_ALIAS_LOOP_PASSES 10
125
9ae8ffe7
JL
126/* reg_base_value[N] gives an address to which register N is related.
127 If all sets after the first add or subtract to the current value
128 or otherwise modify it so it does not point to a different top level
129 object, reg_base_value[N] is equal to the address part of the source
2a2c8203
JC
130 of the first set.
131
132 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
133 expressions represent certain special values: function arguments and
b3b5ad95
JL
134 the stack, frame, and argument pointers.
135
136 The contents of an ADDRESS is not normally used, the mode of the
137 ADDRESS determines whether the ADDRESS is a function argument or some
138 other special value. Pointer equality, not rtx_equal_p, determines whether
139 two ADDRESS expressions refer to the same base address.
140
141 The only use of the contents of an ADDRESS is for determining if the
142 current function performs nonlocal memory memory references for the
143 purposes of marking the function as a constant function. */
2a2c8203 144
ac606739
GS
145static rtx *reg_base_value;
146static rtx *new_reg_base_value;
d4b60170
RK
147static unsigned int reg_base_value_size; /* size of reg_base_value array */
148
9ae8ffe7 149#define REG_BASE_VALUE(X) \
fb6754f0
BS
150 (REGNO (X) < reg_base_value_size \
151 ? reg_base_value[REGNO (X)] : 0)
9ae8ffe7 152
de12be17
JC
153/* Vector of known invariant relationships between registers. Set in
154 loop unrolling. Indexed by register number, if nonzero the value
155 is an expression describing this register in terms of another.
156
157 The length of this array is REG_BASE_VALUE_SIZE.
158
159 Because this array contains only pseudo registers it has no effect
160 after reload. */
161static rtx *alias_invariant;
162
c13e8210
MM
163/* Vector indexed by N giving the initial (unchanging) value known for
164 pseudo-register N. This array is initialized in
165 init_alias_analysis, and does not change until end_alias_analysis
166 is called. */
9ae8ffe7
JL
167rtx *reg_known_value;
168
169/* Indicates number of valid entries in reg_known_value. */
770ae6cc 170static unsigned int reg_known_value_size;
9ae8ffe7
JL
171
172/* Vector recording for each reg_known_value whether it is due to a
173 REG_EQUIV note. Future passes (viz., reload) may replace the
174 pseudo with the equivalent expression and so we account for the
ac3d9668
RK
175 dependences that would be introduced if that happens.
176
177 The REG_EQUIV notes created in assign_parms may mention the arg
178 pointer, and there are explicit insns in the RTL that modify the
179 arg pointer. Thus we must ensure that such insns don't get
180 scheduled across each other because that would invalidate the
181 REG_EQUIV notes. One could argue that the REG_EQUIV notes are
182 wrong, but solving the problem in the scheduler will likely give
183 better code, so we do it here. */
9ae8ffe7
JL
184char *reg_known_equiv_p;
185
2a2c8203
JC
186/* True when scanning insns from the start of the rtl to the
187 NOTE_INSN_FUNCTION_BEG note. */
9ae8ffe7
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188static int copying_arguments;
189
3932261a 190/* The splay-tree used to store the various alias set entries. */
3932261a 191static splay_tree alias_sets;
ac3d9668 192\f
3932261a
MM
193/* Returns a pointer to the alias set entry for ALIAS_SET, if there is
194 such an entry, or NULL otherwise. */
195
196static alias_set_entry
197get_alias_set_entry (alias_set)
3bdf5ad1 198 HOST_WIDE_INT alias_set;
3932261a 199{
d4b60170
RK
200 splay_tree_node sn
201 = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set);
3932261a 202
d4b60170 203 return sn != 0 ? ((alias_set_entry) sn->value) : 0;
3932261a
MM
204}
205
ac3d9668
RK
206/* Returns nonzero if the alias sets for MEM1 and MEM2 are such that
207 the two MEMs cannot alias each other. */
3932261a
MM
208
209static int
210mems_in_disjoint_alias_sets_p (mem1, mem2)
211 rtx mem1;
212 rtx mem2;
213{
3932261a
MM
214#ifdef ENABLE_CHECKING
215/* Perform a basic sanity check. Namely, that there are no alias sets
216 if we're not using strict aliasing. This helps to catch bugs
217 whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or
218 where a MEM is allocated in some way other than by the use of
219 gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to
220 use alias sets to indicate that spilled registers cannot alias each
221 other, we might need to remove this check. */
d4b60170
RK
222 if (! flag_strict_aliasing
223 && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0))
3932261a
MM
224 abort ();
225#endif
226
1da68f56
RK
227 return ! alias_sets_conflict_p (MEM_ALIAS_SET (mem1), MEM_ALIAS_SET (mem2));
228}
3932261a 229
1da68f56
RK
230/* Insert the NODE into the splay tree given by DATA. Used by
231 record_alias_subset via splay_tree_foreach. */
232
233static int
234insert_subset_children (node, data)
235 splay_tree_node node;
236 void *data;
237{
238 splay_tree_insert ((splay_tree) data, node->key, node->value);
239
240 return 0;
241}
242
243/* Return 1 if the two specified alias sets may conflict. */
244
245int
246alias_sets_conflict_p (set1, set2)
247 HOST_WIDE_INT set1, set2;
248{
249 alias_set_entry ase;
250
251 /* If have no alias set information for one of the operands, we have
252 to assume it can alias anything. */
253 if (set1 == 0 || set2 == 0
254 /* If the two alias sets are the same, they may alias. */
255 || set1 == set2)
256 return 1;
3932261a 257
3bdf5ad1 258 /* See if the first alias set is a subset of the second. */
1da68f56 259 ase = get_alias_set_entry (set1);
2bf105ab
RK
260 if (ase != 0
261 && (ase->has_zero_child
262 || splay_tree_lookup (ase->children,
1da68f56
RK
263 (splay_tree_key) set2)))
264 return 1;
3932261a
MM
265
266 /* Now do the same, but with the alias sets reversed. */
1da68f56 267 ase = get_alias_set_entry (set2);
2bf105ab
RK
268 if (ase != 0
269 && (ase->has_zero_child
270 || splay_tree_lookup (ase->children,
1da68f56
RK
271 (splay_tree_key) set1)))
272 return 1;
3932261a 273
1da68f56 274 /* The two alias sets are distinct and neither one is the
3932261a 275 child of the other. Therefore, they cannot alias. */
1da68f56 276 return 0;
3932261a 277}
1da68f56
RK
278\f
279/* Return 1 if TYPE is a RECORD_TYPE, UNION_TYPE, or QUAL_UNION_TYPE and has
280 has any readonly fields. If any of the fields have types that
281 contain readonly fields, return true as well. */
3932261a 282
1da68f56
RK
283int
284readonly_fields_p (type)
285 tree type;
3932261a 286{
1da68f56
RK
287 tree field;
288
289 if (TREE_CODE (type) != RECORD_TYPE && TREE_CODE (type) != UNION_TYPE
290 && TREE_CODE (type) != QUAL_UNION_TYPE)
291 return 0;
292
293 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
294 if (TREE_CODE (field) == FIELD_DECL
295 && (TREE_READONLY (field)
296 || readonly_fields_p (TREE_TYPE (field))))
297 return 1;
3932261a
MM
298
299 return 0;
300}
3bdf5ad1 301\f
1da68f56
RK
302/* Return 1 if any MEM object of type T1 will always conflict (using the
303 dependency routines in this file) with any MEM object of type T2.
304 This is used when allocating temporary storage. If T1 and/or T2 are
305 NULL_TREE, it means we know nothing about the storage. */
306
307int
308objects_must_conflict_p (t1, t2)
309 tree t1, t2;
310{
e8ea2809
RK
311 /* If neither has a type specified, we don't know if they'll conflict
312 because we may be using them to store objects of various types, for
313 example the argument and local variables areas of inlined functions. */
981a4c34 314 if (t1 == 0 && t2 == 0)
e8ea2809
RK
315 return 0;
316
66cce54d
RH
317 /* If one or the other has readonly fields or is readonly,
318 then they may not conflict. */
319 if ((t1 != 0 && readonly_fields_p (t1))
320 || (t2 != 0 && readonly_fields_p (t2))
321 || (t1 != 0 && TYPE_READONLY (t1))
322 || (t2 != 0 && TYPE_READONLY (t2)))
323 return 0;
324
1da68f56
RK
325 /* If they are the same type, they must conflict. */
326 if (t1 == t2
327 /* Likewise if both are volatile. */
328 || (t1 != 0 && TYPE_VOLATILE (t1) && t2 != 0 && TYPE_VOLATILE (t2)))
329 return 1;
330
66cce54d
RH
331 /* If one is aggregate and the other is scalar then they may not
332 conflict. */
333 if ((t1 != 0 && AGGREGATE_TYPE_P (t1))
334 != (t2 != 0 && AGGREGATE_TYPE_P (t2)))
1da68f56
RK
335 return 0;
336
ec5c56db 337 /* Otherwise they conflict only if the alias sets conflict. */
1da68f56
RK
338 return alias_sets_conflict_p (t1 ? get_alias_set (t1) : 0,
339 t2 ? get_alias_set (t2) : 0);
340}
341\f
3bdf5ad1
RK
342/* T is an expression with pointer type. Find the DECL on which this
343 expression is based. (For example, in `a[i]' this would be `a'.)
344 If there is no such DECL, or a unique decl cannot be determined,
345 NULL_TREE is retured. */
346
347static tree
348find_base_decl (t)
349 tree t;
350{
351 tree d0, d1, d2;
352
353 if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t)))
354 return 0;
355
356 /* If this is a declaration, return it. */
357 if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd')
358 return t;
359
360 /* Handle general expressions. It would be nice to deal with
361 COMPONENT_REFs here. If we could tell that `a' and `b' were the
362 same, then `a->f' and `b->f' are also the same. */
363 switch (TREE_CODE_CLASS (TREE_CODE (t)))
364 {
365 case '1':
366 return find_base_decl (TREE_OPERAND (t, 0));
367
368 case '2':
369 /* Return 0 if found in neither or both are the same. */
370 d0 = find_base_decl (TREE_OPERAND (t, 0));
371 d1 = find_base_decl (TREE_OPERAND (t, 1));
372 if (d0 == d1)
373 return d0;
374 else if (d0 == 0)
375 return d1;
376 else if (d1 == 0)
377 return d0;
378 else
379 return 0;
380
381 case '3':
382 d0 = find_base_decl (TREE_OPERAND (t, 0));
383 d1 = find_base_decl (TREE_OPERAND (t, 1));
3bdf5ad1
RK
384 d2 = find_base_decl (TREE_OPERAND (t, 2));
385
386 /* Set any nonzero values from the last, then from the first. */
387 if (d1 == 0) d1 = d2;
388 if (d0 == 0) d0 = d1;
389 if (d1 == 0) d1 = d0;
390 if (d2 == 0) d2 = d1;
391
392 /* At this point all are nonzero or all are zero. If all three are the
393 same, return it. Otherwise, return zero. */
394 return (d0 == d1 && d1 == d2) ? d0 : 0;
395
396 default:
397 return 0;
398 }
399}
400
6e24b709
RK
401/* Return 1 if T is an expression that get_inner_reference handles. */
402
403static int
404handled_component_p (t)
405 tree t;
406{
407 switch (TREE_CODE (t))
408 {
409 case BIT_FIELD_REF:
410 case COMPONENT_REF:
411 case ARRAY_REF:
b4e3fabb 412 case ARRAY_RANGE_REF:
6e24b709
RK
413 case NON_LVALUE_EXPR:
414 return 1;
415
416 case NOP_EXPR:
417 case CONVERT_EXPR:
418 return (TYPE_MODE (TREE_TYPE (t))
419 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (t, 0))));
420
421 default:
422 return 0;
423 }
424}
425
426/* Return 1 if all the nested component references handled by
427 get_inner_reference in T are such that we can address the object in T. */
428
429static int
430can_address_p (t)
431 tree t;
432{
433 /* If we're at the end, it is vacuously addressable. */
434 if (! handled_component_p (t))
435 return 1;
436
437 /* Bitfields are never addressable. */
438 else if (TREE_CODE (t) == BIT_FIELD_REF)
439 return 0;
440
8ac61af7
RK
441 /* Fields are addressable unless they are marked as nonaddressable or
442 the containing type has alias set 0. */
6e24b709
RK
443 else if (TREE_CODE (t) == COMPONENT_REF
444 && ! DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1))
8ac61af7 445 && get_alias_set (TREE_TYPE (TREE_OPERAND (t, 0))) != 0
6e24b709
RK
446 && can_address_p (TREE_OPERAND (t, 0)))
447 return 1;
448
8ac61af7 449 /* Likewise for arrays. */
b4e3fabb 450 else if ((TREE_CODE (t) == ARRAY_REF || TREE_CODE (t) == ARRAY_RANGE_REF)
6e24b709 451 && ! TYPE_NONALIASED_COMPONENT (TREE_TYPE (TREE_OPERAND (t, 0)))
8ac61af7 452 && get_alias_set (TREE_TYPE (TREE_OPERAND (t, 0))) != 0
6e24b709
RK
453 && can_address_p (TREE_OPERAND (t, 0)))
454 return 1;
455
456 return 0;
457}
458
3bdf5ad1
RK
459/* Return the alias set for T, which may be either a type or an
460 expression. Call language-specific routine for help, if needed. */
461
462HOST_WIDE_INT
463get_alias_set (t)
464 tree t;
465{
466 HOST_WIDE_INT set;
3bdf5ad1
RK
467
468 /* If we're not doing any alias analysis, just assume everything
469 aliases everything else. Also return 0 if this or its type is
470 an error. */
471 if (! flag_strict_aliasing || t == error_mark_node
472 || (! TYPE_P (t)
473 && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node)))
474 return 0;
475
476 /* We can be passed either an expression or a type. This and the
f47e9b4e
RK
477 language-specific routine may make mutually-recursive calls to each other
478 to figure out what to do. At each juncture, we see if this is a tree
479 that the language may need to handle specially. First handle things that
738cc472 480 aren't types. */
f824e5c3 481 if (! TYPE_P (t))
3bdf5ad1 482 {
738cc472
RK
483 tree inner = t;
484 tree placeholder_ptr = 0;
485
8ac61af7
RK
486 /* Remove any nops, then give the language a chance to do
487 something with this tree before we look at it. */
488 STRIP_NOPS (t);
489 set = (*lang_hooks.get_alias_set) (t);
490 if (set != -1)
491 return set;
492
738cc472 493 /* First see if the actual object referenced is an INDIRECT_REF from a
8ac61af7 494 restrict-qualified pointer or a "void *". Replace
738cc472 495 PLACEHOLDER_EXPRs. */
8ac61af7 496 while (TREE_CODE (inner) == PLACEHOLDER_EXPR
738cc472
RK
497 || handled_component_p (inner))
498 {
499 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
500 inner = find_placeholder (inner, &placeholder_ptr);
501 else
502 inner = TREE_OPERAND (inner, 0);
8ac61af7
RK
503
504 STRIP_NOPS (inner);
738cc472
RK
505 }
506
507 /* Check for accesses through restrict-qualified pointers. */
508 if (TREE_CODE (inner) == INDIRECT_REF)
509 {
510 tree decl = find_base_decl (TREE_OPERAND (inner, 0));
511
512 if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl))
513 {
514 /* If we haven't computed the actual alias set, do it now. */
515 if (DECL_POINTER_ALIAS_SET (decl) == -2)
516 {
517 /* No two restricted pointers can point at the same thing.
518 However, a restricted pointer can point at the same thing
519 as an unrestricted pointer, if that unrestricted pointer
520 is based on the restricted pointer. So, we make the
521 alias set for the restricted pointer a subset of the
522 alias set for the type pointed to by the type of the
523 decl. */
524 HOST_WIDE_INT pointed_to_alias_set
525 = get_alias_set (TREE_TYPE (TREE_TYPE (decl)));
526
527 if (pointed_to_alias_set == 0)
528 /* It's not legal to make a subset of alias set zero. */
529 ;
530 else
531 {
532 DECL_POINTER_ALIAS_SET (decl) = new_alias_set ();
533 record_alias_subset (pointed_to_alias_set,
534 DECL_POINTER_ALIAS_SET (decl));
535 }
536 }
537
538 /* We use the alias set indicated in the declaration. */
539 return DECL_POINTER_ALIAS_SET (decl);
540 }
541
542 /* If we have an INDIRECT_REF via a void pointer, we don't
543 know anything about what that might alias. */
544 else if (TREE_CODE (TREE_TYPE (inner)) == VOID_TYPE)
545 return 0;
546 }
547
548 /* Otherwise, pick up the outermost object that we could have a pointer
549 to, processing conversion and PLACEHOLDER_EXPR as above. */
550 placeholder_ptr = 0;
8ac61af7 551 while (TREE_CODE (t) == PLACEHOLDER_EXPR
f47e9b4e
RK
552 || (handled_component_p (t) && ! can_address_p (t)))
553 {
f47e9b4e 554 if (TREE_CODE (t) == PLACEHOLDER_EXPR)
738cc472 555 t = find_placeholder (t, &placeholder_ptr);
f47e9b4e
RK
556 else
557 t = TREE_OPERAND (t, 0);
f824e5c3 558
8ac61af7
RK
559 STRIP_NOPS (t);
560 }
f824e5c3 561
738cc472
RK
562 /* If we've already determined the alias set for a decl, just return
563 it. This is necessary for C++ anonymous unions, whose component
564 variables don't look like union members (boo!). */
5755cd38
JM
565 if (TREE_CODE (t) == VAR_DECL
566 && DECL_RTL_SET_P (t) && GET_CODE (DECL_RTL (t)) == MEM)
567 return MEM_ALIAS_SET (DECL_RTL (t));
568
f824e5c3
RK
569 /* Now all we care about is the type. */
570 t = TREE_TYPE (t);
3bdf5ad1
RK
571 }
572
3bdf5ad1
RK
573 /* Variant qualifiers don't affect the alias set, so get the main
574 variant. If this is a type with a known alias set, return it. */
575 t = TYPE_MAIN_VARIANT (t);
738cc472 576 if (TYPE_ALIAS_SET_KNOWN_P (t))
3bdf5ad1
RK
577 return TYPE_ALIAS_SET (t);
578
579 /* See if the language has special handling for this type. */
8ac61af7
RK
580 set = (*lang_hooks.get_alias_set) (t);
581 if (set != -1)
738cc472 582 return set;
2bf105ab 583
3bdf5ad1
RK
584 /* There are no objects of FUNCTION_TYPE, so there's no point in
585 using up an alias set for them. (There are, of course, pointers
586 and references to functions, but that's different.) */
587 else if (TREE_CODE (t) == FUNCTION_TYPE)
588 set = 0;
589 else
590 /* Otherwise make a new alias set for this type. */
591 set = new_alias_set ();
592
593 TYPE_ALIAS_SET (t) = set;
2bf105ab
RK
594
595 /* If this is an aggregate type, we must record any component aliasing
596 information. */
1d79fd2c 597 if (AGGREGATE_TYPE_P (t) || TREE_CODE (t) == COMPLEX_TYPE)
2bf105ab
RK
598 record_component_aliases (t);
599
3bdf5ad1
RK
600 return set;
601}
602
603/* Return a brand-new alias set. */
604
605HOST_WIDE_INT
606new_alias_set ()
607{
608 static HOST_WIDE_INT last_alias_set;
609
610 if (flag_strict_aliasing)
611 return ++last_alias_set;
612 else
613 return 0;
614}
3932261a
MM
615
616/* Indicate that things in SUBSET can alias things in SUPERSET, but
617 not vice versa. For example, in C, a store to an `int' can alias a
618 structure containing an `int', but not vice versa. Here, the
619 structure would be the SUPERSET and `int' the SUBSET. This
a0c33338 620 function should be called only once per SUPERSET/SUBSET pair.
3932261a
MM
621
622 It is illegal for SUPERSET to be zero; everything is implicitly a
623 subset of alias set zero. */
624
625void
626record_alias_subset (superset, subset)
3bdf5ad1
RK
627 HOST_WIDE_INT superset;
628 HOST_WIDE_INT subset;
3932261a
MM
629{
630 alias_set_entry superset_entry;
631 alias_set_entry subset_entry;
632
f47e9b4e
RK
633 /* It is possible in complex type situations for both sets to be the same,
634 in which case we can ignore this operation. */
635 if (superset == subset)
636 return;
637
3932261a
MM
638 if (superset == 0)
639 abort ();
640
641 superset_entry = get_alias_set_entry (superset);
d4b60170 642 if (superset_entry == 0)
3932261a
MM
643 {
644 /* Create an entry for the SUPERSET, so that we have a place to
645 attach the SUBSET. */
d4b60170
RK
646 superset_entry
647 = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry));
3932261a
MM
648 superset_entry->alias_set = superset;
649 superset_entry->children
30f72379 650 = splay_tree_new (splay_tree_compare_ints, 0, 0);
570eb5c8 651 superset_entry->has_zero_child = 0;
d4b60170 652 splay_tree_insert (alias_sets, (splay_tree_key) superset,
3932261a 653 (splay_tree_value) superset_entry);
3932261a
MM
654 }
655
2bf105ab
RK
656 if (subset == 0)
657 superset_entry->has_zero_child = 1;
658 else
659 {
660 subset_entry = get_alias_set_entry (subset);
661 /* If there is an entry for the subset, enter all of its children
662 (if they are not already present) as children of the SUPERSET. */
663 if (subset_entry)
664 {
665 if (subset_entry->has_zero_child)
666 superset_entry->has_zero_child = 1;
d4b60170 667
2bf105ab
RK
668 splay_tree_foreach (subset_entry->children, insert_subset_children,
669 superset_entry->children);
670 }
3932261a 671
2bf105ab
RK
672 /* Enter the SUBSET itself as a child of the SUPERSET. */
673 splay_tree_insert (superset_entry->children,
674 (splay_tree_key) subset, 0);
675 }
3932261a
MM
676}
677
a0c33338
RK
678/* Record that component types of TYPE, if any, are part of that type for
679 aliasing purposes. For record types, we only record component types
680 for fields that are marked addressable. For array types, we always
681 record the component types, so the front end should not call this
682 function if the individual component aren't addressable. */
683
684void
685record_component_aliases (type)
686 tree type;
687{
3bdf5ad1 688 HOST_WIDE_INT superset = get_alias_set (type);
a0c33338
RK
689 tree field;
690
691 if (superset == 0)
692 return;
693
694 switch (TREE_CODE (type))
695 {
696 case ARRAY_TYPE:
2bf105ab
RK
697 if (! TYPE_NONALIASED_COMPONENT (type))
698 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
a0c33338
RK
699 break;
700
701 case RECORD_TYPE:
702 case UNION_TYPE:
703 case QUAL_UNION_TYPE:
704 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
b16a49a1 705 if (TREE_CODE (field) == FIELD_DECL && ! DECL_NONADDRESSABLE_P (field))
2bf105ab 706 record_alias_subset (superset, get_alias_set (TREE_TYPE (field)));
a0c33338
RK
707 break;
708
1d79fd2c
JW
709 case COMPLEX_TYPE:
710 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
711 break;
712
a0c33338
RK
713 default:
714 break;
715 }
716}
717
3bdf5ad1
RK
718/* Allocate an alias set for use in storing and reading from the varargs
719 spill area. */
720
721HOST_WIDE_INT
722get_varargs_alias_set ()
723{
724 static HOST_WIDE_INT set = -1;
725
726 if (set == -1)
727 set = new_alias_set ();
728
729 return set;
730}
731
732/* Likewise, but used for the fixed portions of the frame, e.g., register
733 save areas. */
734
735HOST_WIDE_INT
736get_frame_alias_set ()
737{
738 static HOST_WIDE_INT set = -1;
739
740 if (set == -1)
741 set = new_alias_set ();
742
743 return set;
744}
745
2a2c8203
JC
746/* Inside SRC, the source of a SET, find a base address. */
747
9ae8ffe7
JL
748static rtx
749find_base_value (src)
b3694847 750 rtx src;
9ae8ffe7 751{
713f41f9 752 unsigned int regno;
9ae8ffe7
JL
753 switch (GET_CODE (src))
754 {
755 case SYMBOL_REF:
756 case LABEL_REF:
757 return src;
758
759 case REG:
fb6754f0 760 regno = REGNO (src);
d4b60170 761 /* At the start of a function, argument registers have known base
2a2c8203
JC
762 values which may be lost later. Returning an ADDRESS
763 expression here allows optimization based on argument values
764 even when the argument registers are used for other purposes. */
713f41f9
BS
765 if (regno < FIRST_PSEUDO_REGISTER && copying_arguments)
766 return new_reg_base_value[regno];
73774bc7 767
eaf407a5
JL
768 /* If a pseudo has a known base value, return it. Do not do this
769 for hard regs since it can result in a circular dependency
770 chain for registers which have values at function entry.
771
772 The test above is not sufficient because the scheduler may move
773 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
713f41f9
BS
774 if (regno >= FIRST_PSEUDO_REGISTER
775 && regno < reg_base_value_size
776 && reg_base_value[regno])
777 return reg_base_value[regno];
73774bc7 778
9ae8ffe7
JL
779 return src;
780
781 case MEM:
782 /* Check for an argument passed in memory. Only record in the
783 copying-arguments block; it is too hard to track changes
784 otherwise. */
785 if (copying_arguments
786 && (XEXP (src, 0) == arg_pointer_rtx
787 || (GET_CODE (XEXP (src, 0)) == PLUS
788 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
38a448ca 789 return gen_rtx_ADDRESS (VOIDmode, src);
9ae8ffe7
JL
790 return 0;
791
792 case CONST:
793 src = XEXP (src, 0);
794 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
795 break;
d4b60170 796
ec5c56db 797 /* ... fall through ... */
2a2c8203 798
9ae8ffe7
JL
799 case PLUS:
800 case MINUS:
2a2c8203 801 {
ec907dd8
JL
802 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
803
804 /* If either operand is a REG, then see if we already have
805 a known value for it. */
806 if (GET_CODE (src_0) == REG)
807 {
808 temp = find_base_value (src_0);
d4b60170 809 if (temp != 0)
ec907dd8
JL
810 src_0 = temp;
811 }
812
813 if (GET_CODE (src_1) == REG)
814 {
815 temp = find_base_value (src_1);
d4b60170 816 if (temp!= 0)
ec907dd8
JL
817 src_1 = temp;
818 }
2a2c8203 819
d4b60170 820 /* Guess which operand is the base address:
ec907dd8
JL
821 If either operand is a symbol, then it is the base. If
822 either operand is a CONST_INT, then the other is the base. */
d4b60170 823 if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0))
2a2c8203 824 return find_base_value (src_0);
d4b60170 825 else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1))
ec907dd8
JL
826 return find_base_value (src_1);
827
d4b60170 828 /* This might not be necessary anymore:
ec907dd8
JL
829 If either operand is a REG that is a known pointer, then it
830 is the base. */
3502dc9c 831 else if (GET_CODE (src_0) == REG && REG_POINTER (src_0))
2a2c8203 832 return find_base_value (src_0);
3502dc9c 833 else if (GET_CODE (src_1) == REG && REG_POINTER (src_1))
2a2c8203
JC
834 return find_base_value (src_1);
835
9ae8ffe7 836 return 0;
2a2c8203
JC
837 }
838
839 case LO_SUM:
840 /* The standard form is (lo_sum reg sym) so look only at the
841 second operand. */
842 return find_base_value (XEXP (src, 1));
9ae8ffe7
JL
843
844 case AND:
845 /* If the second operand is constant set the base
ec5c56db 846 address to the first operand. */
2a2c8203
JC
847 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
848 return find_base_value (XEXP (src, 0));
9ae8ffe7
JL
849 return 0;
850
61f0131c
R
851 case TRUNCATE:
852 if (GET_MODE_SIZE (GET_MODE (src)) < GET_MODE_SIZE (Pmode))
853 break;
854 /* Fall through. */
de12be17
JC
855 case ZERO_EXTEND:
856 case SIGN_EXTEND: /* used for NT/Alpha pointers */
9ae8ffe7 857 case HIGH:
2a2c8203 858 return find_base_value (XEXP (src, 0));
1d300e19
KG
859
860 default:
861 break;
9ae8ffe7
JL
862 }
863
864 return 0;
865}
866
867/* Called from init_alias_analysis indirectly through note_stores. */
868
d4b60170 869/* While scanning insns to find base values, reg_seen[N] is nonzero if
9ae8ffe7
JL
870 register N has been set in this function. */
871static char *reg_seen;
872
13309a5f
JC
873/* Addresses which are known not to alias anything else are identified
874 by a unique integer. */
ec907dd8
JL
875static int unique_id;
876
2a2c8203 877static void
84832317 878record_set (dest, set, data)
9ae8ffe7 879 rtx dest, set;
84832317 880 void *data ATTRIBUTE_UNUSED;
9ae8ffe7 881{
b3694847 882 unsigned regno;
9ae8ffe7
JL
883 rtx src;
884
885 if (GET_CODE (dest) != REG)
886 return;
887
fb6754f0 888 regno = REGNO (dest);
9ae8ffe7 889
ac606739
GS
890 if (regno >= reg_base_value_size)
891 abort ();
892
9ae8ffe7
JL
893 if (set)
894 {
895 /* A CLOBBER wipes out any old value but does not prevent a previously
896 unset register from acquiring a base address (i.e. reg_seen is not
897 set). */
898 if (GET_CODE (set) == CLOBBER)
899 {
ec907dd8 900 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
901 return;
902 }
903 src = SET_SRC (set);
904 }
905 else
906 {
9ae8ffe7
JL
907 if (reg_seen[regno])
908 {
ec907dd8 909 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
910 return;
911 }
912 reg_seen[regno] = 1;
38a448ca
RH
913 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
914 GEN_INT (unique_id++));
9ae8ffe7
JL
915 return;
916 }
917
918 /* This is not the first set. If the new value is not related to the
919 old value, forget the base value. Note that the following code is
920 not detected:
921 extern int x, y; int *p = &x; p += (&y-&x);
922 ANSI C does not allow computing the difference of addresses
923 of distinct top level objects. */
ec907dd8 924 if (new_reg_base_value[regno])
9ae8ffe7
JL
925 switch (GET_CODE (src))
926 {
2a2c8203 927 case LO_SUM:
9ae8ffe7
JL
928 case MINUS:
929 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
ec907dd8 930 new_reg_base_value[regno] = 0;
9ae8ffe7 931 break;
61f0131c
R
932 case PLUS:
933 /* If the value we add in the PLUS is also a valid base value,
934 this might be the actual base value, and the original value
935 an index. */
936 {
937 rtx other = NULL_RTX;
938
939 if (XEXP (src, 0) == dest)
940 other = XEXP (src, 1);
941 else if (XEXP (src, 1) == dest)
942 other = XEXP (src, 0);
943
944 if (! other || find_base_value (other))
945 new_reg_base_value[regno] = 0;
946 break;
947 }
9ae8ffe7
JL
948 case AND:
949 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
ec907dd8 950 new_reg_base_value[regno] = 0;
9ae8ffe7 951 break;
9ae8ffe7 952 default:
ec907dd8 953 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
954 break;
955 }
956 /* If this is the first set of a register, record the value. */
957 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
ec907dd8
JL
958 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
959 new_reg_base_value[regno] = find_base_value (src);
9ae8ffe7
JL
960
961 reg_seen[regno] = 1;
962}
963
ac3d9668
RK
964/* Called from loop optimization when a new pseudo-register is
965 created. It indicates that REGNO is being set to VAL. f INVARIANT
966 is true then this value also describes an invariant relationship
967 which can be used to deduce that two registers with unknown values
968 are different. */
d4b60170 969
9ae8ffe7 970void
de12be17 971record_base_value (regno, val, invariant)
ac3d9668 972 unsigned int regno;
9ae8ffe7 973 rtx val;
de12be17 974 int invariant;
9ae8ffe7 975{
ac3d9668 976 if (regno >= reg_base_value_size)
9ae8ffe7 977 return;
de12be17 978
de12be17
JC
979 if (invariant && alias_invariant)
980 alias_invariant[regno] = val;
981
9ae8ffe7
JL
982 if (GET_CODE (val) == REG)
983 {
fb6754f0
BS
984 if (REGNO (val) < reg_base_value_size)
985 reg_base_value[regno] = reg_base_value[REGNO (val)];
d4b60170 986
9ae8ffe7
JL
987 return;
988 }
d4b60170 989
9ae8ffe7
JL
990 reg_base_value[regno] = find_base_value (val);
991}
992
43fe47ca
JW
993/* Clear alias info for a register. This is used if an RTL transformation
994 changes the value of a register. This is used in flow by AUTO_INC_DEC
995 optimizations. We don't need to clear reg_base_value, since flow only
996 changes the offset. */
997
998void
5197bd50
RK
999clear_reg_alias_info (reg)
1000 rtx reg;
43fe47ca 1001{
4e1a4144
JW
1002 unsigned int regno = REGNO (reg);
1003
1004 if (regno < reg_known_value_size && regno >= FIRST_PSEUDO_REGISTER)
1005 reg_known_value[regno] = reg;
43fe47ca
JW
1006}
1007
db048faf
MM
1008/* Returns a canonical version of X, from the point of view alias
1009 analysis. (For example, if X is a MEM whose address is a register,
1010 and the register has a known value (say a SYMBOL_REF), then a MEM
1011 whose address is the SYMBOL_REF is returned.) */
1012
1013rtx
9ae8ffe7
JL
1014canon_rtx (x)
1015 rtx x;
1016{
1017 /* Recursively look for equivalences. */
fb6754f0
BS
1018 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
1019 && REGNO (x) < reg_known_value_size)
1020 return reg_known_value[REGNO (x)] == x
1021 ? x : canon_rtx (reg_known_value[REGNO (x)]);
9ae8ffe7
JL
1022 else if (GET_CODE (x) == PLUS)
1023 {
1024 rtx x0 = canon_rtx (XEXP (x, 0));
1025 rtx x1 = canon_rtx (XEXP (x, 1));
1026
1027 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
1028 {
9ae8ffe7 1029 if (GET_CODE (x0) == CONST_INT)
ed8908e7 1030 return plus_constant (x1, INTVAL (x0));
9ae8ffe7 1031 else if (GET_CODE (x1) == CONST_INT)
ed8908e7 1032 return plus_constant (x0, INTVAL (x1));
38a448ca 1033 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
9ae8ffe7
JL
1034 }
1035 }
d4b60170 1036
9ae8ffe7
JL
1037 /* This gives us much better alias analysis when called from
1038 the loop optimizer. Note we want to leave the original
1039 MEM alone, but need to return the canonicalized MEM with
1040 all the flags with their original values. */
1041 else if (GET_CODE (x) == MEM)
f1ec5147 1042 x = replace_equiv_address_nv (x, canon_rtx (XEXP (x, 0)));
d4b60170 1043
9ae8ffe7
JL
1044 return x;
1045}
1046
1047/* Return 1 if X and Y are identical-looking rtx's.
1048
1049 We use the data in reg_known_value above to see if two registers with
1050 different numbers are, in fact, equivalent. */
1051
1052static int
1053rtx_equal_for_memref_p (x, y)
1054 rtx x, y;
1055{
b3694847
SS
1056 int i;
1057 int j;
1058 enum rtx_code code;
1059 const char *fmt;
9ae8ffe7
JL
1060
1061 if (x == 0 && y == 0)
1062 return 1;
1063 if (x == 0 || y == 0)
1064 return 0;
d4b60170 1065
9ae8ffe7
JL
1066 x = canon_rtx (x);
1067 y = canon_rtx (y);
1068
1069 if (x == y)
1070 return 1;
1071
1072 code = GET_CODE (x);
1073 /* Rtx's of different codes cannot be equal. */
1074 if (code != GET_CODE (y))
1075 return 0;
1076
1077 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1078 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1079
1080 if (GET_MODE (x) != GET_MODE (y))
1081 return 0;
1082
db048faf
MM
1083 /* Some RTL can be compared without a recursive examination. */
1084 switch (code)
1085 {
ab59db3c
BS
1086 case VALUE:
1087 return CSELIB_VAL_PTR (x) == CSELIB_VAL_PTR (y);
1088
db048faf
MM
1089 case REG:
1090 return REGNO (x) == REGNO (y);
1091
1092 case LABEL_REF:
1093 return XEXP (x, 0) == XEXP (y, 0);
1094
1095 case SYMBOL_REF:
1096 return XSTR (x, 0) == XSTR (y, 0);
1097
1098 case CONST_INT:
1099 case CONST_DOUBLE:
1100 /* There's no need to compare the contents of CONST_DOUBLEs or
1101 CONST_INTs because pointer equality is a good enough
1102 comparison for these nodes. */
1103 return 0;
1104
1105 case ADDRESSOF:
831ecbd4
RK
1106 return (XINT (x, 1) == XINT (y, 1)
1107 && rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)));
db048faf
MM
1108
1109 default:
1110 break;
1111 }
9ae8ffe7
JL
1112
1113 /* For commutative operations, the RTX match if the operand match in any
1114 order. Also handle the simple binary and unary cases without a loop. */
1115 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
1116 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
1117 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
1118 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
1119 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
1120 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
1121 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
1122 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
1123 else if (GET_RTX_CLASS (code) == '1')
1124 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
1125
1126 /* Compare the elements. If any pair of corresponding elements
de12be17
JC
1127 fail to match, return 0 for the whole things.
1128
1129 Limit cases to types which actually appear in addresses. */
9ae8ffe7
JL
1130
1131 fmt = GET_RTX_FORMAT (code);
1132 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1133 {
1134 switch (fmt[i])
1135 {
9ae8ffe7
JL
1136 case 'i':
1137 if (XINT (x, i) != XINT (y, i))
1138 return 0;
1139 break;
1140
9ae8ffe7
JL
1141 case 'E':
1142 /* Two vectors must have the same length. */
1143 if (XVECLEN (x, i) != XVECLEN (y, i))
1144 return 0;
1145
1146 /* And the corresponding elements must match. */
1147 for (j = 0; j < XVECLEN (x, i); j++)
d4b60170
RK
1148 if (rtx_equal_for_memref_p (XVECEXP (x, i, j),
1149 XVECEXP (y, i, j)) == 0)
9ae8ffe7
JL
1150 return 0;
1151 break;
1152
1153 case 'e':
1154 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
1155 return 0;
1156 break;
1157
3237ac18
AH
1158 /* This can happen for asm operands. */
1159 case 's':
1160 if (strcmp (XSTR (x, i), XSTR (y, i)))
1161 return 0;
1162 break;
1163
aee21ba9
JL
1164 /* This can happen for an asm which clobbers memory. */
1165 case '0':
1166 break;
1167
9ae8ffe7
JL
1168 /* It is believed that rtx's at this level will never
1169 contain anything but integers and other rtx's,
1170 except for within LABEL_REFs and SYMBOL_REFs. */
1171 default:
1172 abort ();
1173 }
1174 }
1175 return 1;
1176}
1177
1178/* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
1179 X and return it, or return 0 if none found. */
1180
1181static rtx
1182find_symbolic_term (x)
1183 rtx x;
1184{
b3694847
SS
1185 int i;
1186 enum rtx_code code;
1187 const char *fmt;
9ae8ffe7
JL
1188
1189 code = GET_CODE (x);
1190 if (code == SYMBOL_REF || code == LABEL_REF)
1191 return x;
1192 if (GET_RTX_CLASS (code) == 'o')
1193 return 0;
1194
1195 fmt = GET_RTX_FORMAT (code);
1196 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1197 {
1198 rtx t;
1199
1200 if (fmt[i] == 'e')
1201 {
1202 t = find_symbolic_term (XEXP (x, i));
1203 if (t != 0)
1204 return t;
1205 }
1206 else if (fmt[i] == 'E')
1207 break;
1208 }
1209 return 0;
1210}
1211
1212static rtx
1213find_base_term (x)
b3694847 1214 rtx x;
9ae8ffe7 1215{
eab5c70a
BS
1216 cselib_val *val;
1217 struct elt_loc_list *l;
1218
b949ea8b
JW
1219#if defined (FIND_BASE_TERM)
1220 /* Try machine-dependent ways to find the base term. */
1221 x = FIND_BASE_TERM (x);
1222#endif
1223
9ae8ffe7
JL
1224 switch (GET_CODE (x))
1225 {
1226 case REG:
1227 return REG_BASE_VALUE (x);
1228
de12be17
JC
1229 case ZERO_EXTEND:
1230 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
9ae8ffe7 1231 case HIGH:
6d849a2a
JL
1232 case PRE_INC:
1233 case PRE_DEC:
1234 case POST_INC:
1235 case POST_DEC:
1236 return find_base_term (XEXP (x, 0));
1237
eab5c70a
BS
1238 case VALUE:
1239 val = CSELIB_VAL_PTR (x);
1240 for (l = val->locs; l; l = l->next)
1241 if ((x = find_base_term (l->loc)) != 0)
1242 return x;
1243 return 0;
1244
9ae8ffe7
JL
1245 case CONST:
1246 x = XEXP (x, 0);
1247 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
1248 return 0;
1249 /* fall through */
1250 case LO_SUM:
1251 case PLUS:
1252 case MINUS:
1253 {
3c567fae
JL
1254 rtx tmp1 = XEXP (x, 0);
1255 rtx tmp2 = XEXP (x, 1);
1256
1257 /* This is a litle bit tricky since we have to determine which of
1258 the two operands represents the real base address. Otherwise this
1259 routine may return the index register instead of the base register.
1260
1261 That may cause us to believe no aliasing was possible, when in
1262 fact aliasing is possible.
1263
1264 We use a few simple tests to guess the base register. Additional
1265 tests can certainly be added. For example, if one of the operands
1266 is a shift or multiply, then it must be the index register and the
1267 other operand is the base register. */
1268
b949ea8b
JW
1269 if (tmp1 == pic_offset_table_rtx && CONSTANT_P (tmp2))
1270 return find_base_term (tmp2);
1271
3c567fae
JL
1272 /* If either operand is known to be a pointer, then use it
1273 to determine the base term. */
3502dc9c 1274 if (REG_P (tmp1) && REG_POINTER (tmp1))
3c567fae
JL
1275 return find_base_term (tmp1);
1276
3502dc9c 1277 if (REG_P (tmp2) && REG_POINTER (tmp2))
3c567fae
JL
1278 return find_base_term (tmp2);
1279
1280 /* Neither operand was known to be a pointer. Go ahead and find the
1281 base term for both operands. */
1282 tmp1 = find_base_term (tmp1);
1283 tmp2 = find_base_term (tmp2);
1284
1285 /* If either base term is named object or a special address
1286 (like an argument or stack reference), then use it for the
1287 base term. */
d4b60170 1288 if (tmp1 != 0
3c567fae
JL
1289 && (GET_CODE (tmp1) == SYMBOL_REF
1290 || GET_CODE (tmp1) == LABEL_REF
1291 || (GET_CODE (tmp1) == ADDRESS
1292 && GET_MODE (tmp1) != VOIDmode)))
1293 return tmp1;
1294
d4b60170 1295 if (tmp2 != 0
3c567fae
JL
1296 && (GET_CODE (tmp2) == SYMBOL_REF
1297 || GET_CODE (tmp2) == LABEL_REF
1298 || (GET_CODE (tmp2) == ADDRESS
1299 && GET_MODE (tmp2) != VOIDmode)))
1300 return tmp2;
1301
1302 /* We could not determine which of the two operands was the
1303 base register and which was the index. So we can determine
1304 nothing from the base alias check. */
1305 return 0;
9ae8ffe7
JL
1306 }
1307
1308 case AND:
1309 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
1310 return REG_BASE_VALUE (XEXP (x, 0));
1311 return 0;
1312
1313 case SYMBOL_REF:
1314 case LABEL_REF:
1315 return x;
1316
d982e46e 1317 case ADDRESSOF:
bb07060a 1318 return REG_BASE_VALUE (frame_pointer_rtx);
d982e46e 1319
9ae8ffe7
JL
1320 default:
1321 return 0;
1322 }
1323}
1324
1325/* Return 0 if the addresses X and Y are known to point to different
1326 objects, 1 if they might be pointers to the same object. */
1327
1328static int
56ee9281 1329base_alias_check (x, y, x_mode, y_mode)
9ae8ffe7 1330 rtx x, y;
56ee9281 1331 enum machine_mode x_mode, y_mode;
9ae8ffe7
JL
1332{
1333 rtx x_base = find_base_term (x);
1334 rtx y_base = find_base_term (y);
1335
1c72c7f6
JC
1336 /* If the address itself has no known base see if a known equivalent
1337 value has one. If either address still has no known base, nothing
1338 is known about aliasing. */
1339 if (x_base == 0)
1340 {
1341 rtx x_c;
d4b60170 1342
1c72c7f6
JC
1343 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
1344 return 1;
d4b60170 1345
1c72c7f6
JC
1346 x_base = find_base_term (x_c);
1347 if (x_base == 0)
1348 return 1;
1349 }
9ae8ffe7 1350
1c72c7f6
JC
1351 if (y_base == 0)
1352 {
1353 rtx y_c;
1354 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
1355 return 1;
d4b60170 1356
1c72c7f6
JC
1357 y_base = find_base_term (y_c);
1358 if (y_base == 0)
1359 return 1;
1360 }
1361
1362 /* If the base addresses are equal nothing is known about aliasing. */
1363 if (rtx_equal_p (x_base, y_base))
9ae8ffe7
JL
1364 return 1;
1365
56ee9281
RH
1366 /* The base addresses of the read and write are different expressions.
1367 If they are both symbols and they are not accessed via AND, there is
1368 no conflict. We can bring knowledge of object alignment into play
1369 here. For example, on alpha, "char a, b;" can alias one another,
1370 though "char a; long b;" cannot. */
9ae8ffe7 1371 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
c02f035f 1372 {
56ee9281
RH
1373 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
1374 return 1;
1375 if (GET_CODE (x) == AND
1376 && (GET_CODE (XEXP (x, 1)) != CONST_INT
8fa2140d 1377 || (int) GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
56ee9281
RH
1378 return 1;
1379 if (GET_CODE (y) == AND
1380 && (GET_CODE (XEXP (y, 1)) != CONST_INT
8fa2140d 1381 || (int) GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
56ee9281 1382 return 1;
b2972551
JL
1383 /* Differing symbols never alias. */
1384 return 0;
c02f035f 1385 }
9ae8ffe7
JL
1386
1387 /* If one address is a stack reference there can be no alias:
1388 stack references using different base registers do not alias,
1389 a stack reference can not alias a parameter, and a stack reference
1390 can not alias a global. */
1391 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
1392 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
1393 return 0;
1394
1395 if (! flag_argument_noalias)
1396 return 1;
1397
1398 if (flag_argument_noalias > 1)
1399 return 0;
1400
ec5c56db 1401 /* Weak noalias assertion (arguments are distinct, but may match globals). */
9ae8ffe7
JL
1402 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
1403}
1404
eab5c70a
BS
1405/* Convert the address X into something we can use. This is done by returning
1406 it unchanged unless it is a value; in the latter case we call cselib to get
1407 a more useful rtx. */
3bdf5ad1 1408
a13d4ebf 1409rtx
eab5c70a
BS
1410get_addr (x)
1411 rtx x;
1412{
1413 cselib_val *v;
1414 struct elt_loc_list *l;
1415
1416 if (GET_CODE (x) != VALUE)
1417 return x;
1418 v = CSELIB_VAL_PTR (x);
1419 for (l = v->locs; l; l = l->next)
1420 if (CONSTANT_P (l->loc))
1421 return l->loc;
1422 for (l = v->locs; l; l = l->next)
1423 if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM)
1424 return l->loc;
1425 if (v->locs)
1426 return v->locs->loc;
1427 return x;
1428}
1429
39cec1ac
MH
1430/* Return the address of the (N_REFS + 1)th memory reference to ADDR
1431 where SIZE is the size in bytes of the memory reference. If ADDR
1432 is not modified by the memory reference then ADDR is returned. */
1433
1434rtx
1435addr_side_effect_eval (addr, size, n_refs)
1436 rtx addr;
1437 int size;
1438 int n_refs;
1439{
1440 int offset = 0;
1441
1442 switch (GET_CODE (addr))
1443 {
1444 case PRE_INC:
1445 offset = (n_refs + 1) * size;
1446 break;
1447 case PRE_DEC:
1448 offset = -(n_refs + 1) * size;
1449 break;
1450 case POST_INC:
1451 offset = n_refs * size;
1452 break;
1453 case POST_DEC:
1454 offset = -n_refs * size;
1455 break;
1456
1457 default:
1458 return addr;
1459 }
1460
1461 if (offset)
1462 addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset));
1463 else
1464 addr = XEXP (addr, 0);
1465
1466 return addr;
1467}
1468
9ae8ffe7
JL
1469/* Return nonzero if X and Y (memory addresses) could reference the
1470 same location in memory. C is an offset accumulator. When
1471 C is nonzero, we are testing aliases between X and Y + C.
1472 XSIZE is the size in bytes of the X reference,
1473 similarly YSIZE is the size in bytes for Y.
1474
1475 If XSIZE or YSIZE is zero, we do not know the amount of memory being
1476 referenced (the reference was BLKmode), so make the most pessimistic
1477 assumptions.
1478
c02f035f
RH
1479 If XSIZE or YSIZE is negative, we may access memory outside the object
1480 being referenced as a side effect. This can happen when using AND to
1481 align memory references, as is done on the Alpha.
1482
9ae8ffe7 1483 Nice to notice that varying addresses cannot conflict with fp if no
0211b6ab 1484 local variables had their addresses taken, but that's too hard now. */
9ae8ffe7 1485
9ae8ffe7
JL
1486static int
1487memrefs_conflict_p (xsize, x, ysize, y, c)
b3694847 1488 rtx x, y;
9ae8ffe7
JL
1489 int xsize, ysize;
1490 HOST_WIDE_INT c;
1491{
eab5c70a
BS
1492 if (GET_CODE (x) == VALUE)
1493 x = get_addr (x);
1494 if (GET_CODE (y) == VALUE)
1495 y = get_addr (y);
9ae8ffe7
JL
1496 if (GET_CODE (x) == HIGH)
1497 x = XEXP (x, 0);
1498 else if (GET_CODE (x) == LO_SUM)
1499 x = XEXP (x, 1);
1500 else
39cec1ac 1501 x = canon_rtx (addr_side_effect_eval (x, xsize, 0));
9ae8ffe7
JL
1502 if (GET_CODE (y) == HIGH)
1503 y = XEXP (y, 0);
1504 else if (GET_CODE (y) == LO_SUM)
1505 y = XEXP (y, 1);
1506 else
39cec1ac 1507 y = canon_rtx (addr_side_effect_eval (y, ysize, 0));
9ae8ffe7
JL
1508
1509 if (rtx_equal_for_memref_p (x, y))
1510 {
c02f035f 1511 if (xsize <= 0 || ysize <= 0)
9ae8ffe7
JL
1512 return 1;
1513 if (c >= 0 && xsize > c)
1514 return 1;
1515 if (c < 0 && ysize+c > 0)
1516 return 1;
1517 return 0;
1518 }
1519
6e73e666
JC
1520 /* This code used to check for conflicts involving stack references and
1521 globals but the base address alias code now handles these cases. */
9ae8ffe7
JL
1522
1523 if (GET_CODE (x) == PLUS)
1524 {
1525 /* The fact that X is canonicalized means that this
1526 PLUS rtx is canonicalized. */
1527 rtx x0 = XEXP (x, 0);
1528 rtx x1 = XEXP (x, 1);
1529
1530 if (GET_CODE (y) == PLUS)
1531 {
1532 /* The fact that Y is canonicalized means that this
1533 PLUS rtx is canonicalized. */
1534 rtx y0 = XEXP (y, 0);
1535 rtx y1 = XEXP (y, 1);
1536
1537 if (rtx_equal_for_memref_p (x1, y1))
1538 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1539 if (rtx_equal_for_memref_p (x0, y0))
1540 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
1541 if (GET_CODE (x1) == CONST_INT)
63be02db
JM
1542 {
1543 if (GET_CODE (y1) == CONST_INT)
1544 return memrefs_conflict_p (xsize, x0, ysize, y0,
1545 c - INTVAL (x1) + INTVAL (y1));
1546 else
1547 return memrefs_conflict_p (xsize, x0, ysize, y,
1548 c - INTVAL (x1));
1549 }
9ae8ffe7
JL
1550 else if (GET_CODE (y1) == CONST_INT)
1551 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1552
6e73e666 1553 return 1;
9ae8ffe7
JL
1554 }
1555 else if (GET_CODE (x1) == CONST_INT)
1556 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
1557 }
1558 else if (GET_CODE (y) == PLUS)
1559 {
1560 /* The fact that Y is canonicalized means that this
1561 PLUS rtx is canonicalized. */
1562 rtx y0 = XEXP (y, 0);
1563 rtx y1 = XEXP (y, 1);
1564
1565 if (GET_CODE (y1) == CONST_INT)
1566 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1567 else
1568 return 1;
1569 }
1570
1571 if (GET_CODE (x) == GET_CODE (y))
1572 switch (GET_CODE (x))
1573 {
1574 case MULT:
1575 {
1576 /* Handle cases where we expect the second operands to be the
1577 same, and check only whether the first operand would conflict
1578 or not. */
1579 rtx x0, y0;
1580 rtx x1 = canon_rtx (XEXP (x, 1));
1581 rtx y1 = canon_rtx (XEXP (y, 1));
1582 if (! rtx_equal_for_memref_p (x1, y1))
1583 return 1;
1584 x0 = canon_rtx (XEXP (x, 0));
1585 y0 = canon_rtx (XEXP (y, 0));
1586 if (rtx_equal_for_memref_p (x0, y0))
1587 return (xsize == 0 || ysize == 0
1588 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1589
1590 /* Can't properly adjust our sizes. */
1591 if (GET_CODE (x1) != CONST_INT)
1592 return 1;
1593 xsize /= INTVAL (x1);
1594 ysize /= INTVAL (x1);
1595 c /= INTVAL (x1);
1596 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1597 }
1d300e19 1598
de12be17
JC
1599 case REG:
1600 /* Are these registers known not to be equal? */
1601 if (alias_invariant)
1602 {
e51712db 1603 unsigned int r_x = REGNO (x), r_y = REGNO (y);
de12be17
JC
1604 rtx i_x, i_y; /* invariant relationships of X and Y */
1605
1606 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
1607 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
1608
1609 if (i_x == 0 && i_y == 0)
1610 break;
1611
1612 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
1613 ysize, i_y ? i_y : y, c))
1614 return 0;
1615 }
1616 break;
1617
1d300e19
KG
1618 default:
1619 break;
9ae8ffe7
JL
1620 }
1621
1622 /* Treat an access through an AND (e.g. a subword access on an Alpha)
56ee9281
RH
1623 as an access with indeterminate size. Assume that references
1624 besides AND are aligned, so if the size of the other reference is
1625 at least as large as the alignment, assume no other overlap. */
9ae8ffe7 1626 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
56ee9281 1627 {
02e3377d 1628 if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1)))
56ee9281
RH
1629 xsize = -1;
1630 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
1631 }
9ae8ffe7 1632 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
c02f035f 1633 {
56ee9281 1634 /* ??? If we are indexing far enough into the array/structure, we
c02f035f
RH
1635 may yet be able to determine that we can not overlap. But we
1636 also need to that we are far enough from the end not to overlap
56ee9281 1637 a following reference, so we do nothing with that for now. */
02e3377d 1638 if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1)))
56ee9281
RH
1639 ysize = -1;
1640 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
c02f035f 1641 }
9ae8ffe7 1642
b24ea077
JW
1643 if (GET_CODE (x) == ADDRESSOF)
1644 {
1645 if (y == frame_pointer_rtx
1646 || GET_CODE (y) == ADDRESSOF)
1647 return xsize <= 0 || ysize <= 0;
1648 }
1649 if (GET_CODE (y) == ADDRESSOF)
1650 {
1651 if (x == frame_pointer_rtx)
1652 return xsize <= 0 || ysize <= 0;
1653 }
d982e46e 1654
9ae8ffe7
JL
1655 if (CONSTANT_P (x))
1656 {
1657 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
1658 {
1659 c += (INTVAL (y) - INTVAL (x));
c02f035f 1660 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
1661 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1662 }
1663
1664 if (GET_CODE (x) == CONST)
1665 {
1666 if (GET_CODE (y) == CONST)
1667 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1668 ysize, canon_rtx (XEXP (y, 0)), c);
1669 else
1670 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1671 ysize, y, c);
1672 }
1673 if (GET_CODE (y) == CONST)
1674 return memrefs_conflict_p (xsize, x, ysize,
1675 canon_rtx (XEXP (y, 0)), c);
1676
1677 if (CONSTANT_P (y))
b949ea8b 1678 return (xsize <= 0 || ysize <= 0
c02f035f 1679 || (rtx_equal_for_memref_p (x, y)
b949ea8b 1680 && ((c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
9ae8ffe7
JL
1681
1682 return 1;
1683 }
1684 return 1;
1685}
1686
1687/* Functions to compute memory dependencies.
1688
1689 Since we process the insns in execution order, we can build tables
1690 to keep track of what registers are fixed (and not aliased), what registers
1691 are varying in known ways, and what registers are varying in unknown
1692 ways.
1693
1694 If both memory references are volatile, then there must always be a
1695 dependence between the two references, since their order can not be
1696 changed. A volatile and non-volatile reference can be interchanged
1697 though.
1698
dc1618bc
RK
1699 A MEM_IN_STRUCT reference at a non-AND varying address can never
1700 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We
1701 also must allow AND addresses, because they may generate accesses
1702 outside the object being referenced. This is used to generate
1703 aligned addresses from unaligned addresses, for instance, the alpha
1704 storeqi_unaligned pattern. */
9ae8ffe7
JL
1705
1706/* Read dependence: X is read after read in MEM takes place. There can
1707 only be a dependence here if both reads are volatile. */
1708
1709int
1710read_dependence (mem, x)
1711 rtx mem;
1712 rtx x;
1713{
1714 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
1715}
1716
c6df88cb
MM
1717/* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and
1718 MEM2 is a reference to a structure at a varying address, or returns
1719 MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL
1720 value is returned MEM1 and MEM2 can never alias. VARIES_P is used
1721 to decide whether or not an address may vary; it should return
eab5c70a
BS
1722 nonzero whenever variation is possible.
1723 MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */
1724
2c72b78f 1725static rtx
eab5c70a
BS
1726fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p)
1727 rtx mem1, mem2;
1728 rtx mem1_addr, mem2_addr;
e38fe8e0 1729 int (*varies_p) PARAMS ((rtx, int));
eab5c70a 1730{
3e0abe15
GK
1731 if (! flag_strict_aliasing)
1732 return NULL_RTX;
1733
c6df88cb 1734 if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2)
e38fe8e0 1735 && !varies_p (mem1_addr, 1) && varies_p (mem2_addr, 1))
c6df88cb
MM
1736 /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a
1737 varying address. */
1738 return mem1;
1739
1740 if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2)
e38fe8e0 1741 && varies_p (mem1_addr, 1) && !varies_p (mem2_addr, 1))
c6df88cb
MM
1742 /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a
1743 varying address. */
1744 return mem2;
1745
1746 return NULL_RTX;
1747}
1748
1749/* Returns nonzero if something about the mode or address format MEM1
1750 indicates that it might well alias *anything*. */
1751
2c72b78f 1752static int
c6df88cb
MM
1753aliases_everything_p (mem)
1754 rtx mem;
1755{
c6df88cb
MM
1756 if (GET_CODE (XEXP (mem, 0)) == AND)
1757 /* If the address is an AND, its very hard to know at what it is
1758 actually pointing. */
1759 return 1;
1760
1761 return 0;
1762}
1763
9ae8ffe7
JL
1764/* True dependence: X is read after store in MEM takes place. */
1765
1766int
1767true_dependence (mem, mem_mode, x, varies)
1768 rtx mem;
1769 enum machine_mode mem_mode;
1770 rtx x;
e38fe8e0 1771 int (*varies) PARAMS ((rtx, int));
9ae8ffe7 1772{
b3694847 1773 rtx x_addr, mem_addr;
49982682 1774 rtx base;
9ae8ffe7
JL
1775
1776 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1777 return 1;
1778
41472af8
MM
1779 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1780 return 0;
1781
b949ea8b
JW
1782 /* Unchanging memory can't conflict with non-unchanging memory.
1783 A non-unchanging read can conflict with a non-unchanging write.
1784 An unchanging read can conflict with an unchanging write since
1785 there may be a single store to this address to initialize it.
ec569656
RK
1786 Note that an unchanging store can conflict with a non-unchanging read
1787 since we have to make conservative assumptions when we have a
1788 record with readonly fields and we are copying the whole thing.
b949ea8b
JW
1789 Just fall through to the code below to resolve potential conflicts.
1790 This won't handle all cases optimally, but the possible performance
1791 loss should be negligible. */
ec569656 1792 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
9ae8ffe7
JL
1793 return 0;
1794
56ee9281
RH
1795 if (mem_mode == VOIDmode)
1796 mem_mode = GET_MODE (mem);
1797
eab5c70a
BS
1798 x_addr = get_addr (XEXP (x, 0));
1799 mem_addr = get_addr (XEXP (mem, 0));
1800
55efb413
JW
1801 base = find_base_term (x_addr);
1802 if (base && (GET_CODE (base) == LABEL_REF
1803 || (GET_CODE (base) == SYMBOL_REF
1804 && CONSTANT_POOL_ADDRESS_P (base))))
1805 return 0;
1806
eab5c70a 1807 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1c72c7f6
JC
1808 return 0;
1809
eab5c70a
BS
1810 x_addr = canon_rtx (x_addr);
1811 mem_addr = canon_rtx (mem_addr);
6e73e666 1812
0211b6ab
JW
1813 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1814 SIZE_FOR_MODE (x), x_addr, 0))
1815 return 0;
1816
c6df88cb 1817 if (aliases_everything_p (x))
0211b6ab
JW
1818 return 1;
1819
c6df88cb
MM
1820 /* We cannot use aliases_everyting_p to test MEM, since we must look
1821 at MEM_MODE, rather than GET_MODE (MEM). */
1822 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
a13d4ebf
AM
1823 return 1;
1824
1825 /* In true_dependence we also allow BLKmode to alias anything. Why
1826 don't we do this in anti_dependence and output_dependence? */
1827 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1828 return 1;
1829
1830 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1831 varies);
1832}
1833
1834/* Canonical true dependence: X is read after store in MEM takes place.
1835 Variant of true_dependece which assumes MEM has already been
1836 canonicalized (hence we no longer do that here).
1837 The mem_addr argument has been added, since true_dependence computed
1838 this value prior to canonicalizing. */
1839
1840int
1841canon_true_dependence (mem, mem_mode, mem_addr, x, varies)
1842 rtx mem, mem_addr, x;
1843 enum machine_mode mem_mode;
1844 int (*varies) PARAMS ((rtx, int));
1845{
b3694847 1846 rtx x_addr;
a13d4ebf
AM
1847
1848 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1849 return 1;
1850
1851 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1852 return 0;
1853
1854 /* If X is an unchanging read, then it can't possibly conflict with any
1855 non-unchanging store. It may conflict with an unchanging write though,
1856 because there may be a single store to this address to initialize it.
1857 Just fall through to the code below to resolve the case where we have
1858 both an unchanging read and an unchanging write. This won't handle all
1859 cases optimally, but the possible performance loss should be
1860 negligible. */
1861 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
1862 return 0;
1863
1864 x_addr = get_addr (XEXP (x, 0));
1865
1866 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1867 return 0;
1868
1869 x_addr = canon_rtx (x_addr);
1870 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1871 SIZE_FOR_MODE (x), x_addr, 0))
1872 return 0;
1873
1874 if (aliases_everything_p (x))
1875 return 1;
1876
1877 /* We cannot use aliases_everyting_p to test MEM, since we must look
1878 at MEM_MODE, rather than GET_MODE (MEM). */
1879 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
c6df88cb 1880 return 1;
0211b6ab 1881
c6df88cb
MM
1882 /* In true_dependence we also allow BLKmode to alias anything. Why
1883 don't we do this in anti_dependence and output_dependence? */
1884 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1885 return 1;
0211b6ab 1886
eab5c70a
BS
1887 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1888 varies);
9ae8ffe7
JL
1889}
1890
c6df88cb
MM
1891/* Returns non-zero if a write to X might alias a previous read from
1892 (or, if WRITEP is non-zero, a write to) MEM. */
9ae8ffe7 1893
2c72b78f 1894static int
c6df88cb 1895write_dependence_p (mem, x, writep)
9ae8ffe7
JL
1896 rtx mem;
1897 rtx x;
c6df88cb 1898 int writep;
9ae8ffe7 1899{
6e73e666 1900 rtx x_addr, mem_addr;
c6df88cb 1901 rtx fixed_scalar;
49982682 1902 rtx base;
6e73e666 1903
9ae8ffe7
JL
1904 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1905 return 1;
1906
eab5c70a
BS
1907 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1908 return 0;
1909
b949ea8b
JW
1910 /* Unchanging memory can't conflict with non-unchanging memory. */
1911 if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem))
1912 return 0;
1913
9ae8ffe7
JL
1914 /* If MEM is an unchanging read, then it can't possibly conflict with
1915 the store to X, because there is at most one store to MEM, and it must
1916 have occurred somewhere before MEM. */
55efb413
JW
1917 if (! writep && RTX_UNCHANGING_P (mem))
1918 return 0;
1919
1920 x_addr = get_addr (XEXP (x, 0));
1921 mem_addr = get_addr (XEXP (mem, 0));
1922
49982682
JW
1923 if (! writep)
1924 {
55efb413 1925 base = find_base_term (mem_addr);
49982682
JW
1926 if (base && (GET_CODE (base) == LABEL_REF
1927 || (GET_CODE (base) == SYMBOL_REF
1928 && CONSTANT_POOL_ADDRESS_P (base))))
1929 return 0;
1930 }
1931
eab5c70a
BS
1932 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x),
1933 GET_MODE (mem)))
41472af8
MM
1934 return 0;
1935
eab5c70a
BS
1936 x_addr = canon_rtx (x_addr);
1937 mem_addr = canon_rtx (mem_addr);
6e73e666 1938
c6df88cb
MM
1939 if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
1940 SIZE_FOR_MODE (x), x_addr, 0))
1941 return 0;
1942
1943 fixed_scalar
eab5c70a
BS
1944 = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1945 rtx_addr_varies_p);
1946
c6df88cb
MM
1947 return (!(fixed_scalar == mem && !aliases_everything_p (x))
1948 && !(fixed_scalar == x && !aliases_everything_p (mem)));
1949}
1950
1951/* Anti dependence: X is written after read in MEM takes place. */
1952
1953int
1954anti_dependence (mem, x)
1955 rtx mem;
1956 rtx x;
1957{
1958 return write_dependence_p (mem, x, /*writep=*/0);
9ae8ffe7
JL
1959}
1960
1961/* Output dependence: X is written after store in MEM takes place. */
1962
1963int
1964output_dependence (mem, x)
b3694847
SS
1965 rtx mem;
1966 rtx x;
9ae8ffe7 1967{
c6df88cb 1968 return write_dependence_p (mem, x, /*writep=*/1);
9ae8ffe7
JL
1969}
1970
bf6d9fd7 1971/* Returns non-zero if X mentions something which is not
7790df19
JW
1972 local to the function and is not constant. */
1973
1974static int
bf6d9fd7 1975nonlocal_mentioned_p (x)
7790df19
JW
1976 rtx x;
1977{
1978 rtx base;
b3694847 1979 RTX_CODE code;
7790df19
JW
1980 int regno;
1981
1982 code = GET_CODE (x);
1983
1984 if (GET_RTX_CLASS (code) == 'i')
1985 {
2a8f6b90
JH
1986 /* Constant functions can be constant if they don't use
1987 scratch memory used to mark function w/o side effects. */
24a28584 1988 if (code == CALL_INSN && CONST_OR_PURE_CALL_P (x))
2a8f6b90
JH
1989 {
1990 x = CALL_INSN_FUNCTION_USAGE (x);
f8cd4126
RK
1991 if (x == 0)
1992 return 0;
2a8f6b90
JH
1993 }
1994 else
1995 x = PATTERN (x);
7790df19
JW
1996 code = GET_CODE (x);
1997 }
1998
1999 switch (code)
2000 {
2001 case SUBREG:
2002 if (GET_CODE (SUBREG_REG (x)) == REG)
2003 {
2004 /* Global registers are not local. */
2005 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
ddef6bc7 2006 && global_regs[subreg_regno (x)])
7790df19
JW
2007 return 1;
2008 return 0;
2009 }
2010 break;
2011
2012 case REG:
2013 regno = REGNO (x);
2014 /* Global registers are not local. */
2015 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
2016 return 1;
2017 return 0;
2018
2019 case SCRATCH:
2020 case PC:
2021 case CC0:
2022 case CONST_INT:
2023 case CONST_DOUBLE:
2024 case CONST:
2025 case LABEL_REF:
2026 return 0;
2027
2028 case SYMBOL_REF:
2029 /* Constants in the function's constants pool are constant. */
2030 if (CONSTANT_POOL_ADDRESS_P (x))
2031 return 0;
2032 return 1;
2033
2034 case CALL:
bf6d9fd7 2035 /* Non-constant calls and recursion are not local. */
7790df19
JW
2036 return 1;
2037
2038 case MEM:
2039 /* Be overly conservative and consider any volatile memory
2040 reference as not local. */
2041 if (MEM_VOLATILE_P (x))
2042 return 1;
2043 base = find_base_term (XEXP (x, 0));
2044 if (base)
2045 {
b3b5ad95
JL
2046 /* A Pmode ADDRESS could be a reference via the structure value
2047 address or static chain. Such memory references are nonlocal.
2048
2049 Thus, we have to examine the contents of the ADDRESS to find
2050 out if this is a local reference or not. */
2051 if (GET_CODE (base) == ADDRESS
2052 && GET_MODE (base) == Pmode
2053 && (XEXP (base, 0) == stack_pointer_rtx
2054 || XEXP (base, 0) == arg_pointer_rtx
2055#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2056 || XEXP (base, 0) == hard_frame_pointer_rtx
2057#endif
2058 || XEXP (base, 0) == frame_pointer_rtx))
7790df19
JW
2059 return 0;
2060 /* Constants in the function's constant pool are constant. */
2061 if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base))
2062 return 0;
2063 }
2064 return 1;
2065
bf6d9fd7 2066 case UNSPEC_VOLATILE:
7790df19 2067 case ASM_INPUT:
7790df19
JW
2068 return 1;
2069
bf6d9fd7
JW
2070 case ASM_OPERANDS:
2071 if (MEM_VOLATILE_P (x))
2072 return 1;
2073
2074 /* FALLTHROUGH */
2075
7790df19
JW
2076 default:
2077 break;
2078 }
2079
2080 /* Recursively scan the operands of this expression. */
2081
2082 {
b3694847
SS
2083 const char *fmt = GET_RTX_FORMAT (code);
2084 int i;
7790df19
JW
2085
2086 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2087 {
2a8f6b90 2088 if (fmt[i] == 'e' && XEXP (x, i))
7790df19 2089 {
bf6d9fd7 2090 if (nonlocal_mentioned_p (XEXP (x, i)))
7790df19
JW
2091 return 1;
2092 }
d4757e6a 2093 else if (fmt[i] == 'E')
7790df19 2094 {
b3694847 2095 int j;
7790df19 2096 for (j = 0; j < XVECLEN (x, i); j++)
bf6d9fd7 2097 if (nonlocal_mentioned_p (XVECEXP (x, i, j)))
7790df19
JW
2098 return 1;
2099 }
2100 }
2101 }
2102
2103 return 0;
2104}
2105
2106/* Mark the function if it is constant. */
2107
2108void
2109mark_constant_function ()
2110{
2111 rtx insn;
bf6d9fd7 2112 int nonlocal_mentioned;
7790df19
JW
2113
2114 if (TREE_PUBLIC (current_function_decl)
2115 || TREE_READONLY (current_function_decl)
bf6d9fd7 2116 || DECL_IS_PURE (current_function_decl)
7790df19
JW
2117 || TREE_THIS_VOLATILE (current_function_decl)
2118 || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode)
2119 return;
2120
e004f2f7 2121 /* A loop might not return which counts as a side effect. */
0ecf09f9 2122 if (mark_dfs_back_edges ())
e004f2f7
JW
2123 return;
2124
bf6d9fd7
JW
2125 nonlocal_mentioned = 0;
2126
2127 init_alias_analysis ();
2128
7790df19
JW
2129 /* Determine if this is a constant function. */
2130
2131 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
bf6d9fd7
JW
2132 if (INSN_P (insn) && nonlocal_mentioned_p (insn))
2133 {
2134 nonlocal_mentioned = 1;
2135 break;
2136 }
2137
2138 end_alias_analysis ();
7790df19
JW
2139
2140 /* Mark the function. */
2141
bf6d9fd7
JW
2142 if (! nonlocal_mentioned)
2143 TREE_READONLY (current_function_decl) = 1;
7790df19
JW
2144}
2145
6e73e666
JC
2146
2147static HARD_REG_SET argument_registers;
2148
2149void
2150init_alias_once ()
2151{
b3694847 2152 int i;
6e73e666
JC
2153
2154#ifndef OUTGOING_REGNO
2155#define OUTGOING_REGNO(N) N
2156#endif
2157 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2158 /* Check whether this register can hold an incoming pointer
2159 argument. FUNCTION_ARG_REGNO_P tests outgoing register
ec5c56db 2160 numbers, so translate if necessary due to register windows. */
6e73e666
JC
2161 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
2162 && HARD_REGNO_MODE_OK (i, Pmode))
2163 SET_HARD_REG_BIT (argument_registers, i);
3932261a 2164
30f72379 2165 alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0);
6e73e666
JC
2166}
2167
c13e8210
MM
2168/* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE
2169 array. */
2170
9ae8ffe7
JL
2171void
2172init_alias_analysis ()
2173{
2174 int maxreg = max_reg_num ();
ea64ef27 2175 int changed, pass;
b3694847
SS
2176 int i;
2177 unsigned int ui;
2178 rtx insn;
9ae8ffe7
JL
2179
2180 reg_known_value_size = maxreg;
2181
e05e2395
MM
2182 reg_known_value
2183 = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx))
2184 - FIRST_PSEUDO_REGISTER;
2185 reg_known_equiv_p
2186 = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char))
9ae8ffe7 2187 - FIRST_PSEUDO_REGISTER;
9ae8ffe7 2188
6e73e666
JC
2189 /* Overallocate reg_base_value to allow some growth during loop
2190 optimization. Loop unrolling can create a large number of
2191 registers. */
2192 reg_base_value_size = maxreg * 2;
ac606739 2193 reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx));
1f8f4a0b 2194 ggc_add_rtx_root (reg_base_value, reg_base_value_size);
ac606739 2195
e05e2395
MM
2196 new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx));
2197 reg_seen = (char *) xmalloc (reg_base_value_size);
de12be17
JC
2198 if (! reload_completed && flag_unroll_loops)
2199 {
ac606739 2200 /* ??? Why are we realloc'ing if we're just going to zero it? */
de12be17
JC
2201 alias_invariant = (rtx *)xrealloc (alias_invariant,
2202 reg_base_value_size * sizeof (rtx));
961192e1 2203 memset ((char *)alias_invariant, 0, reg_base_value_size * sizeof (rtx));
de12be17 2204 }
ec907dd8
JL
2205
2206 /* The basic idea is that each pass through this loop will use the
2207 "constant" information from the previous pass to propagate alias
2208 information through another level of assignments.
2209
2210 This could get expensive if the assignment chains are long. Maybe
2211 we should throttle the number of iterations, possibly based on
6e73e666 2212 the optimization level or flag_expensive_optimizations.
ec907dd8
JL
2213
2214 We could propagate more information in the first pass by making use
2215 of REG_N_SETS to determine immediately that the alias information
ea64ef27
JL
2216 for a pseudo is "constant".
2217
2218 A program with an uninitialized variable can cause an infinite loop
2219 here. Instead of doing a full dataflow analysis to detect such problems
2220 we just cap the number of iterations for the loop.
2221
2222 The state of the arrays for the set chain in question does not matter
2223 since the program has undefined behavior. */
6e73e666 2224
ea64ef27 2225 pass = 0;
6e73e666 2226 do
ec907dd8
JL
2227 {
2228 /* Assume nothing will change this iteration of the loop. */
2229 changed = 0;
2230
ec907dd8
JL
2231 /* We want to assign the same IDs each iteration of this loop, so
2232 start counting from zero each iteration of the loop. */
2233 unique_id = 0;
2234
2235 /* We're at the start of the funtion each iteration through the
2236 loop, so we're copying arguments. */
2237 copying_arguments = 1;
9ae8ffe7 2238
6e73e666 2239 /* Wipe the potential alias information clean for this pass. */
961192e1 2240 memset ((char *) new_reg_base_value, 0, reg_base_value_size * sizeof (rtx));
8072f69c 2241
6e73e666 2242 /* Wipe the reg_seen array clean. */
961192e1 2243 memset ((char *) reg_seen, 0, reg_base_value_size);
9ae8ffe7 2244
6e73e666
JC
2245 /* Mark all hard registers which may contain an address.
2246 The stack, frame and argument pointers may contain an address.
2247 An argument register which can hold a Pmode value may contain
2248 an address even if it is not in BASE_REGS.
8072f69c 2249
6e73e666
JC
2250 The address expression is VOIDmode for an argument and
2251 Pmode for other registers. */
2252
2253 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2254 if (TEST_HARD_REG_BIT (argument_registers, i))
38a448ca
RH
2255 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
2256 gen_rtx_REG (Pmode, i));
6e73e666
JC
2257
2258 new_reg_base_value[STACK_POINTER_REGNUM]
38a448ca 2259 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
6e73e666 2260 new_reg_base_value[ARG_POINTER_REGNUM]
38a448ca 2261 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
6e73e666 2262 new_reg_base_value[FRAME_POINTER_REGNUM]
38a448ca 2263 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2a2c8203 2264#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6e73e666 2265 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
38a448ca 2266 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2a2c8203 2267#endif
ec907dd8
JL
2268
2269 /* Walk the insns adding values to the new_reg_base_value array. */
2270 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9ae8ffe7 2271 {
2c3c49de 2272 if (INSN_P (insn))
ec907dd8 2273 {
6e73e666 2274 rtx note, set;
efc9bd41
RK
2275
2276#if defined (HAVE_prologue) || defined (HAVE_epilogue)
657959ca
JL
2277 /* The prologue/epilouge insns are not threaded onto the
2278 insn chain until after reload has completed. Thus,
2279 there is no sense wasting time checking if INSN is in
2280 the prologue/epilogue until after reload has completed. */
2281 if (reload_completed
2282 && prologue_epilogue_contains (insn))
efc9bd41
RK
2283 continue;
2284#endif
2285
ec907dd8
JL
2286 /* If this insn has a noalias note, process it, Otherwise,
2287 scan for sets. A simple set will have no side effects
ec5c56db 2288 which could change the base value of any other register. */
6e73e666 2289
ec907dd8 2290 if (GET_CODE (PATTERN (insn)) == SET
efc9bd41
RK
2291 && REG_NOTES (insn) != 0
2292 && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
84832317 2293 record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
ec907dd8 2294 else
84832317 2295 note_stores (PATTERN (insn), record_set, NULL);
6e73e666
JC
2296
2297 set = single_set (insn);
2298
2299 if (set != 0
2300 && GET_CODE (SET_DEST (set)) == REG
fb6754f0 2301 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
6e73e666 2302 {
fb6754f0 2303 unsigned int regno = REGNO (SET_DEST (set));
713f41f9
BS
2304 rtx src = SET_SRC (set);
2305
2306 if (REG_NOTES (insn) != 0
2307 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
2308 && REG_N_SETS (regno) == 1)
2309 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
2310 && GET_CODE (XEXP (note, 0)) != EXPR_LIST
bb2cf916 2311 && ! rtx_varies_p (XEXP (note, 0), 1)
713f41f9
BS
2312 && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0)))
2313 {
2314 reg_known_value[regno] = XEXP (note, 0);
2315 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
2316 }
2317 else if (REG_N_SETS (regno) == 1
2318 && GET_CODE (src) == PLUS
2319 && GET_CODE (XEXP (src, 0)) == REG
fb6754f0
BS
2320 && REGNO (XEXP (src, 0)) >= FIRST_PSEUDO_REGISTER
2321 && (reg_known_value[REGNO (XEXP (src, 0))])
713f41f9
BS
2322 && GET_CODE (XEXP (src, 1)) == CONST_INT)
2323 {
2324 rtx op0 = XEXP (src, 0);
bb2cf916 2325 op0 = reg_known_value[REGNO (op0)];
713f41f9 2326 reg_known_value[regno]
ed8908e7 2327 = plus_constant (op0, INTVAL (XEXP (src, 1)));
713f41f9
BS
2328 reg_known_equiv_p[regno] = 0;
2329 }
2330 else if (REG_N_SETS (regno) == 1
2331 && ! rtx_varies_p (src, 1))
2332 {
2333 reg_known_value[regno] = src;
2334 reg_known_equiv_p[regno] = 0;
2335 }
6e73e666 2336 }
ec907dd8
JL
2337 }
2338 else if (GET_CODE (insn) == NOTE
2339 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2340 copying_arguments = 0;
6e73e666 2341 }
ec907dd8 2342
6e73e666 2343 /* Now propagate values from new_reg_base_value to reg_base_value. */
e51712db 2344 for (ui = 0; ui < reg_base_value_size; ui++)
6e73e666 2345 {
e51712db
KG
2346 if (new_reg_base_value[ui]
2347 && new_reg_base_value[ui] != reg_base_value[ui]
2348 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
ec907dd8 2349 {
e51712db 2350 reg_base_value[ui] = new_reg_base_value[ui];
6e73e666 2351 changed = 1;
ec907dd8 2352 }
9ae8ffe7 2353 }
9ae8ffe7 2354 }
6e73e666 2355 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7
JL
2356
2357 /* Fill in the remaining entries. */
2358 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
2359 if (reg_known_value[i] == 0)
2360 reg_known_value[i] = regno_reg_rtx[i];
2361
9ae8ffe7
JL
2362 /* Simplify the reg_base_value array so that no register refers to
2363 another register, except to special registers indirectly through
2364 ADDRESS expressions.
2365
2366 In theory this loop can take as long as O(registers^2), but unless
2367 there are very long dependency chains it will run in close to linear
ea64ef27
JL
2368 time.
2369
2370 This loop may not be needed any longer now that the main loop does
2371 a better job at propagating alias information. */
2372 pass = 0;
9ae8ffe7
JL
2373 do
2374 {
2375 changed = 0;
ea64ef27 2376 pass++;
e51712db 2377 for (ui = 0; ui < reg_base_value_size; ui++)
9ae8ffe7 2378 {
e51712db 2379 rtx base = reg_base_value[ui];
9ae8ffe7
JL
2380 if (base && GET_CODE (base) == REG)
2381 {
fb6754f0 2382 unsigned int base_regno = REGNO (base);
e51712db
KG
2383 if (base_regno == ui) /* register set from itself */
2384 reg_base_value[ui] = 0;
9ae8ffe7 2385 else
e51712db 2386 reg_base_value[ui] = reg_base_value[base_regno];
9ae8ffe7
JL
2387 changed = 1;
2388 }
2389 }
2390 }
ea64ef27 2391 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7 2392
e05e2395
MM
2393 /* Clean up. */
2394 free (new_reg_base_value);
ec907dd8 2395 new_reg_base_value = 0;
e05e2395 2396 free (reg_seen);
9ae8ffe7
JL
2397 reg_seen = 0;
2398}
2399
2400void
2401end_alias_analysis ()
2402{
e05e2395 2403 free (reg_known_value + FIRST_PSEUDO_REGISTER);
9ae8ffe7 2404 reg_known_value = 0;
ac606739 2405 reg_known_value_size = 0;
e05e2395
MM
2406 free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER);
2407 reg_known_equiv_p = 0;
ac606739
GS
2408 if (reg_base_value)
2409 {
1f8f4a0b 2410 ggc_del_root (reg_base_value);
ac606739
GS
2411 free (reg_base_value);
2412 reg_base_value = 0;
2413 }
9ae8ffe7 2414 reg_base_value_size = 0;
de12be17
JC
2415 if (alias_invariant)
2416 {
ac606739 2417 free (alias_invariant);
de12be17
JC
2418 alias_invariant = 0;
2419 }
9ae8ffe7 2420}
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