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9ae8ffe7 | 1 | /* Alias analysis for GNU C |
41af4023 | 2 | Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc. |
9ae8ffe7 JL |
3 | Contributed by John Carr (jfc@mit.edu). |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "config.h" | |
670ee920 | 23 | #include "system.h" |
9ae8ffe7 | 24 | #include "rtl.h" |
7790df19 | 25 | #include "tree.h" |
6baf1cc8 | 26 | #include "tm_p.h" |
49ad7cfa | 27 | #include "function.h" |
9ae8ffe7 JL |
28 | #include "expr.h" |
29 | #include "regs.h" | |
30 | #include "hard-reg-set.h" | |
31 | #include "flags.h" | |
264fac34 | 32 | #include "output.h" |
2e107e9e | 33 | #include "toplev.h" |
3932261a MM |
34 | #include "splay-tree.h" |
35 | ||
36 | /* The alias sets assigned to MEMs assist the back-end in determining | |
37 | which MEMs can alias which other MEMs. In general, two MEMs in | |
38 | different alias sets to not alias each other. There is one | |
39 | exception, however. Consider something like: | |
40 | ||
41 | struct S {int i; double d; }; | |
42 | ||
43 | a store to an `S' can alias something of either type `int' or type | |
44 | `double'. (However, a store to an `int' cannot alias a `double' | |
45 | and vice versa.) We indicate this via a tree structure that looks | |
46 | like: | |
47 | struct S | |
48 | / \ | |
49 | / \ | |
50 | |/_ _\| | |
51 | int double | |
52 | ||
53 | (The arrows are directed and point downwards.) If, when comparing | |
54 | two alias sets, we can hold one set fixed, and trace the other set | |
55 | downwards, and at some point find the first set, the two MEMs can | |
56 | alias one another. In this situation we say the alias set for | |
57 | `struct S' is the `superset' and that those for `int' and `double' | |
58 | are `subsets'. | |
59 | ||
60 | Alias set zero is implicitly a superset of all other alias sets. | |
61 | However, this is no actual entry for alias set zero. It is an | |
62 | error to attempt to explicitly construct a subset of zero. */ | |
63 | ||
64 | typedef struct alias_set_entry { | |
65 | /* The alias set number, as stored in MEM_ALIAS_SET. */ | |
66 | int alias_set; | |
67 | ||
68 | /* The children of the alias set. These are not just the immediate | |
69 | children, but, in fact, all children. So, if we have: | |
70 | ||
71 | struct T { struct S s; float f; } | |
72 | ||
73 | continuing our example above, the children here will be all of | |
74 | `int', `double', `float', and `struct S'. */ | |
75 | splay_tree children; | |
76 | }* alias_set_entry; | |
9ae8ffe7 JL |
77 | |
78 | static rtx canon_rtx PROTO((rtx)); | |
79 | static int rtx_equal_for_memref_p PROTO((rtx, rtx)); | |
80 | static rtx find_symbolic_term PROTO((rtx)); | |
81 | static int memrefs_conflict_p PROTO((int, rtx, int, rtx, | |
82 | HOST_WIDE_INT)); | |
70fec650 JL |
83 | static void record_set PROTO((rtx, rtx)); |
84 | static rtx find_base_term PROTO((rtx)); | |
56ee9281 RH |
85 | static int base_alias_check PROTO((rtx, rtx, enum machine_mode, |
86 | enum machine_mode)); | |
960b4ee6 | 87 | static rtx find_base_value PROTO((rtx)); |
3932261a | 88 | static int mems_in_disjoint_alias_sets_p PROTO((rtx, rtx)); |
3932261a MM |
89 | static int insert_subset_children PROTO((splay_tree_node, |
90 | void*)); | |
91 | static alias_set_entry get_alias_set_entry PROTO((int)); | |
c6df88cb MM |
92 | static rtx fixed_scalar_and_varying_struct_p PROTO((rtx, rtx, int (*)(rtx))); |
93 | static int aliases_everything_p PROTO((rtx)); | |
94 | static int write_dependence_p PROTO((rtx, rtx, int)); | |
9ae8ffe7 JL |
95 | |
96 | /* Set up all info needed to perform alias analysis on memory references. */ | |
97 | ||
98 | #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X))) | |
99 | ||
41472af8 | 100 | /* Returns nonzero if MEM1 and MEM2 do not alias because they are in |
264fac34 MM |
101 | different alias sets. We ignore alias sets in functions making use |
102 | of variable arguments because the va_arg macros on some systems are | |
103 | not legal ANSI C. */ | |
104 | #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \ | |
3932261a | 105 | mems_in_disjoint_alias_sets_p (MEM1, MEM2) |
41472af8 | 106 | |
ea64ef27 JL |
107 | /* Cap the number of passes we make over the insns propagating alias |
108 | information through set chains. | |
109 | ||
110 | 10 is a completely arbitrary choice. */ | |
111 | #define MAX_ALIAS_LOOP_PASSES 10 | |
112 | ||
9ae8ffe7 JL |
113 | /* reg_base_value[N] gives an address to which register N is related. |
114 | If all sets after the first add or subtract to the current value | |
115 | or otherwise modify it so it does not point to a different top level | |
116 | object, reg_base_value[N] is equal to the address part of the source | |
2a2c8203 JC |
117 | of the first set. |
118 | ||
119 | A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS | |
120 | expressions represent certain special values: function arguments and | |
121 | the stack, frame, and argument pointers. The contents of an address | |
122 | expression are not used (but they are descriptive for debugging); | |
123 | only the address and mode matter. Pointer equality, not rtx_equal_p, | |
124 | determines whether two ADDRESS expressions refer to the same base | |
125 | address. The mode determines whether it is a function argument or | |
126 | other special value. */ | |
127 | ||
9ae8ffe7 | 128 | rtx *reg_base_value; |
ec907dd8 | 129 | rtx *new_reg_base_value; |
9ae8ffe7 JL |
130 | unsigned int reg_base_value_size; /* size of reg_base_value array */ |
131 | #define REG_BASE_VALUE(X) \ | |
e51712db | 132 | ((unsigned) REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0) |
9ae8ffe7 | 133 | |
de12be17 JC |
134 | /* Vector of known invariant relationships between registers. Set in |
135 | loop unrolling. Indexed by register number, if nonzero the value | |
136 | is an expression describing this register in terms of another. | |
137 | ||
138 | The length of this array is REG_BASE_VALUE_SIZE. | |
139 | ||
140 | Because this array contains only pseudo registers it has no effect | |
141 | after reload. */ | |
142 | static rtx *alias_invariant; | |
143 | ||
9ae8ffe7 JL |
144 | /* Vector indexed by N giving the initial (unchanging) value known |
145 | for pseudo-register N. */ | |
146 | rtx *reg_known_value; | |
147 | ||
148 | /* Indicates number of valid entries in reg_known_value. */ | |
149 | static int reg_known_value_size; | |
150 | ||
151 | /* Vector recording for each reg_known_value whether it is due to a | |
152 | REG_EQUIV note. Future passes (viz., reload) may replace the | |
153 | pseudo with the equivalent expression and so we account for the | |
154 | dependences that would be introduced if that happens. */ | |
155 | /* ??? This is a problem only on the Convex. The REG_EQUIV notes created in | |
156 | assign_parms mention the arg pointer, and there are explicit insns in the | |
157 | RTL that modify the arg pointer. Thus we must ensure that such insns don't | |
158 | get scheduled across each other because that would invalidate the REG_EQUIV | |
159 | notes. One could argue that the REG_EQUIV notes are wrong, but solving | |
160 | the problem in the scheduler will likely give better code, so we do it | |
161 | here. */ | |
162 | char *reg_known_equiv_p; | |
163 | ||
2a2c8203 JC |
164 | /* True when scanning insns from the start of the rtl to the |
165 | NOTE_INSN_FUNCTION_BEG note. */ | |
9ae8ffe7 | 166 | |
9ae8ffe7 JL |
167 | static int copying_arguments; |
168 | ||
3932261a MM |
169 | /* The splay-tree used to store the various alias set entries. */ |
170 | ||
171 | static splay_tree alias_sets; | |
172 | ||
3932261a MM |
173 | /* Returns a pointer to the alias set entry for ALIAS_SET, if there is |
174 | such an entry, or NULL otherwise. */ | |
175 | ||
176 | static alias_set_entry | |
177 | get_alias_set_entry (alias_set) | |
178 | int alias_set; | |
179 | { | |
180 | splay_tree_node sn = | |
181 | splay_tree_lookup (alias_sets, (splay_tree_key) alias_set); | |
182 | ||
183 | return sn ? ((alias_set_entry) sn->value) : ((alias_set_entry) 0); | |
184 | } | |
185 | ||
186 | /* Returns nonzero value if the alias sets for MEM1 and MEM2 are such | |
187 | that the two MEMs cannot alias each other. */ | |
188 | ||
189 | static int | |
190 | mems_in_disjoint_alias_sets_p (mem1, mem2) | |
191 | rtx mem1; | |
192 | rtx mem2; | |
193 | { | |
194 | alias_set_entry ase; | |
195 | ||
196 | #ifdef ENABLE_CHECKING | |
197 | /* Perform a basic sanity check. Namely, that there are no alias sets | |
198 | if we're not using strict aliasing. This helps to catch bugs | |
199 | whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or | |
200 | where a MEM is allocated in some way other than by the use of | |
201 | gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to | |
202 | use alias sets to indicate that spilled registers cannot alias each | |
203 | other, we might need to remove this check. */ | |
204 | if (!flag_strict_aliasing && | |
205 | (MEM_ALIAS_SET (mem1) || MEM_ALIAS_SET (mem2))) | |
206 | abort (); | |
207 | #endif | |
208 | ||
209 | /* The code used in varargs macros are often not conforming ANSI C, | |
210 | which can trick the compiler into making incorrect aliasing | |
211 | assumptions in these functions. So, we don't use alias sets in | |
212 | such a function. FIXME: This should be moved into the front-end; | |
213 | it is a language-dependent notion, and there's no reason not to | |
214 | still use these checks to handle globals. */ | |
215 | if (current_function_stdarg || current_function_varargs) | |
216 | return 0; | |
217 | ||
218 | if (!MEM_ALIAS_SET (mem1) || !MEM_ALIAS_SET (mem2)) | |
219 | /* We have no alias set information for one of the MEMs, so we | |
220 | have to assume it can alias anything. */ | |
221 | return 0; | |
222 | ||
223 | if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2)) | |
224 | /* The two alias sets are the same, so they may alias. */ | |
225 | return 0; | |
226 | ||
227 | /* Iterate through each of the children of the first alias set, | |
228 | comparing it with the second alias set. */ | |
229 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem1)); | |
230 | if (ase && splay_tree_lookup (ase->children, | |
231 | (splay_tree_key) MEM_ALIAS_SET (mem2))) | |
232 | return 0; | |
233 | ||
234 | /* Now do the same, but with the alias sets reversed. */ | |
235 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem2)); | |
236 | if (ase && splay_tree_lookup (ase->children, | |
237 | (splay_tree_key) MEM_ALIAS_SET (mem1))) | |
238 | return 0; | |
239 | ||
240 | /* The two MEMs are in distinct alias sets, and neither one is the | |
241 | child of the other. Therefore, they cannot alias. */ | |
242 | return 1; | |
243 | } | |
244 | ||
245 | /* Insert the NODE into the splay tree given by DATA. Used by | |
246 | record_alias_subset via splay_tree_foreach. */ | |
247 | ||
248 | static int | |
249 | insert_subset_children (node, data) | |
250 | splay_tree_node node; | |
251 | void *data; | |
252 | { | |
253 | splay_tree_insert ((splay_tree) data, | |
254 | node->key, | |
255 | node->value); | |
256 | ||
257 | return 0; | |
258 | } | |
259 | ||
260 | /* Indicate that things in SUBSET can alias things in SUPERSET, but | |
261 | not vice versa. For example, in C, a store to an `int' can alias a | |
262 | structure containing an `int', but not vice versa. Here, the | |
263 | structure would be the SUPERSET and `int' the SUBSET. This | |
264 | function should be called only once per SUPERSET/SUBSET pair. At | |
265 | present any given alias set may only be a subset of one superset. | |
266 | ||
267 | It is illegal for SUPERSET to be zero; everything is implicitly a | |
268 | subset of alias set zero. */ | |
269 | ||
270 | void | |
271 | record_alias_subset (superset, subset) | |
272 | int superset; | |
273 | int subset; | |
274 | { | |
275 | alias_set_entry superset_entry; | |
276 | alias_set_entry subset_entry; | |
277 | ||
278 | if (superset == 0) | |
279 | abort (); | |
280 | ||
281 | superset_entry = get_alias_set_entry (superset); | |
282 | if (!superset_entry) | |
283 | { | |
284 | /* Create an entry for the SUPERSET, so that we have a place to | |
285 | attach the SUBSET. */ | |
286 | superset_entry = | |
287 | (alias_set_entry) xmalloc (sizeof (struct alias_set_entry)); | |
288 | superset_entry->alias_set = superset; | |
289 | superset_entry->children | |
30f72379 | 290 | = splay_tree_new (splay_tree_compare_ints, 0, 0); |
3932261a MM |
291 | splay_tree_insert (alias_sets, |
292 | (splay_tree_key) superset, | |
293 | (splay_tree_value) superset_entry); | |
294 | ||
295 | } | |
296 | ||
297 | subset_entry = get_alias_set_entry (subset); | |
298 | if (subset_entry) | |
299 | /* There is an entry for the subset. Enter all of its children | |
300 | (if they are not already present) as children of the SUPERSET. */ | |
301 | splay_tree_foreach (subset_entry->children, | |
973838fd | 302 | insert_subset_children, |
3932261a MM |
303 | superset_entry->children); |
304 | ||
305 | /* Enter the SUBSET itself as a child of the SUPERSET. */ | |
306 | splay_tree_insert (superset_entry->children, | |
307 | (splay_tree_key) subset, | |
308 | /*value=*/0); | |
309 | } | |
310 | ||
2a2c8203 JC |
311 | /* Inside SRC, the source of a SET, find a base address. */ |
312 | ||
9ae8ffe7 JL |
313 | static rtx |
314 | find_base_value (src) | |
315 | register rtx src; | |
316 | { | |
317 | switch (GET_CODE (src)) | |
318 | { | |
319 | case SYMBOL_REF: | |
320 | case LABEL_REF: | |
321 | return src; | |
322 | ||
323 | case REG: | |
2a2c8203 JC |
324 | /* At the start of a function argument registers have known base |
325 | values which may be lost later. Returning an ADDRESS | |
326 | expression here allows optimization based on argument values | |
327 | even when the argument registers are used for other purposes. */ | |
328 | if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments) | |
ec907dd8 | 329 | return new_reg_base_value[REGNO (src)]; |
73774bc7 | 330 | |
eaf407a5 JL |
331 | /* If a pseudo has a known base value, return it. Do not do this |
332 | for hard regs since it can result in a circular dependency | |
333 | chain for registers which have values at function entry. | |
334 | ||
335 | The test above is not sufficient because the scheduler may move | |
336 | a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */ | |
337 | if (REGNO (src) >= FIRST_PSEUDO_REGISTER | |
e51712db | 338 | && (unsigned) REGNO (src) < reg_base_value_size |
eaf407a5 | 339 | && reg_base_value[REGNO (src)]) |
73774bc7 JL |
340 | return reg_base_value[REGNO (src)]; |
341 | ||
9ae8ffe7 JL |
342 | return src; |
343 | ||
344 | case MEM: | |
345 | /* Check for an argument passed in memory. Only record in the | |
346 | copying-arguments block; it is too hard to track changes | |
347 | otherwise. */ | |
348 | if (copying_arguments | |
349 | && (XEXP (src, 0) == arg_pointer_rtx | |
350 | || (GET_CODE (XEXP (src, 0)) == PLUS | |
351 | && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx))) | |
38a448ca | 352 | return gen_rtx_ADDRESS (VOIDmode, src); |
9ae8ffe7 JL |
353 | return 0; |
354 | ||
355 | case CONST: | |
356 | src = XEXP (src, 0); | |
357 | if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS) | |
358 | break; | |
359 | /* fall through */ | |
2a2c8203 | 360 | |
9ae8ffe7 JL |
361 | case PLUS: |
362 | case MINUS: | |
2a2c8203 | 363 | { |
ec907dd8 JL |
364 | rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1); |
365 | ||
366 | /* If either operand is a REG, then see if we already have | |
367 | a known value for it. */ | |
368 | if (GET_CODE (src_0) == REG) | |
369 | { | |
370 | temp = find_base_value (src_0); | |
371 | if (temp) | |
372 | src_0 = temp; | |
373 | } | |
374 | ||
375 | if (GET_CODE (src_1) == REG) | |
376 | { | |
377 | temp = find_base_value (src_1); | |
378 | if (temp) | |
379 | src_1 = temp; | |
380 | } | |
2a2c8203 JC |
381 | |
382 | /* Guess which operand is the base address. | |
383 | ||
ec907dd8 JL |
384 | If either operand is a symbol, then it is the base. If |
385 | either operand is a CONST_INT, then the other is the base. */ | |
2a2c8203 JC |
386 | |
387 | if (GET_CODE (src_1) == CONST_INT | |
388 | || GET_CODE (src_0) == SYMBOL_REF | |
389 | || GET_CODE (src_0) == LABEL_REF | |
390 | || GET_CODE (src_0) == CONST) | |
391 | return find_base_value (src_0); | |
392 | ||
ec907dd8 JL |
393 | if (GET_CODE (src_0) == CONST_INT |
394 | || GET_CODE (src_1) == SYMBOL_REF | |
395 | || GET_CODE (src_1) == LABEL_REF | |
396 | || GET_CODE (src_1) == CONST) | |
397 | return find_base_value (src_1); | |
398 | ||
399 | /* This might not be necessary anymore. | |
400 | ||
401 | If either operand is a REG that is a known pointer, then it | |
402 | is the base. */ | |
2a2c8203 JC |
403 | if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0))) |
404 | return find_base_value (src_0); | |
405 | ||
406 | if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1))) | |
407 | return find_base_value (src_1); | |
408 | ||
9ae8ffe7 | 409 | return 0; |
2a2c8203 JC |
410 | } |
411 | ||
412 | case LO_SUM: | |
413 | /* The standard form is (lo_sum reg sym) so look only at the | |
414 | second operand. */ | |
415 | return find_base_value (XEXP (src, 1)); | |
9ae8ffe7 JL |
416 | |
417 | case AND: | |
418 | /* If the second operand is constant set the base | |
419 | address to the first operand. */ | |
2a2c8203 JC |
420 | if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0) |
421 | return find_base_value (XEXP (src, 0)); | |
9ae8ffe7 JL |
422 | return 0; |
423 | ||
de12be17 JC |
424 | case ZERO_EXTEND: |
425 | case SIGN_EXTEND: /* used for NT/Alpha pointers */ | |
9ae8ffe7 | 426 | case HIGH: |
2a2c8203 | 427 | return find_base_value (XEXP (src, 0)); |
1d300e19 KG |
428 | |
429 | default: | |
430 | break; | |
9ae8ffe7 JL |
431 | } |
432 | ||
433 | return 0; | |
434 | } | |
435 | ||
436 | /* Called from init_alias_analysis indirectly through note_stores. */ | |
437 | ||
438 | /* while scanning insns to find base values, reg_seen[N] is nonzero if | |
439 | register N has been set in this function. */ | |
440 | static char *reg_seen; | |
441 | ||
13309a5f JC |
442 | /* Addresses which are known not to alias anything else are identified |
443 | by a unique integer. */ | |
ec907dd8 JL |
444 | static int unique_id; |
445 | ||
2a2c8203 JC |
446 | static void |
447 | record_set (dest, set) | |
9ae8ffe7 JL |
448 | rtx dest, set; |
449 | { | |
450 | register int regno; | |
451 | rtx src; | |
452 | ||
453 | if (GET_CODE (dest) != REG) | |
454 | return; | |
455 | ||
456 | regno = REGNO (dest); | |
457 | ||
458 | if (set) | |
459 | { | |
460 | /* A CLOBBER wipes out any old value but does not prevent a previously | |
461 | unset register from acquiring a base address (i.e. reg_seen is not | |
462 | set). */ | |
463 | if (GET_CODE (set) == CLOBBER) | |
464 | { | |
ec907dd8 | 465 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
466 | return; |
467 | } | |
468 | src = SET_SRC (set); | |
469 | } | |
470 | else | |
471 | { | |
9ae8ffe7 JL |
472 | if (reg_seen[regno]) |
473 | { | |
ec907dd8 | 474 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
475 | return; |
476 | } | |
477 | reg_seen[regno] = 1; | |
38a448ca RH |
478 | new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode, |
479 | GEN_INT (unique_id++)); | |
9ae8ffe7 JL |
480 | return; |
481 | } | |
482 | ||
483 | /* This is not the first set. If the new value is not related to the | |
484 | old value, forget the base value. Note that the following code is | |
485 | not detected: | |
486 | extern int x, y; int *p = &x; p += (&y-&x); | |
487 | ANSI C does not allow computing the difference of addresses | |
488 | of distinct top level objects. */ | |
ec907dd8 | 489 | if (new_reg_base_value[regno]) |
9ae8ffe7 JL |
490 | switch (GET_CODE (src)) |
491 | { | |
2a2c8203 | 492 | case LO_SUM: |
9ae8ffe7 JL |
493 | case PLUS: |
494 | case MINUS: | |
495 | if (XEXP (src, 0) != dest && XEXP (src, 1) != dest) | |
ec907dd8 | 496 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
497 | break; |
498 | case AND: | |
499 | if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT) | |
ec907dd8 | 500 | new_reg_base_value[regno] = 0; |
9ae8ffe7 | 501 | break; |
9ae8ffe7 | 502 | default: |
ec907dd8 | 503 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
504 | break; |
505 | } | |
506 | /* If this is the first set of a register, record the value. */ | |
507 | else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
ec907dd8 JL |
508 | && ! reg_seen[regno] && new_reg_base_value[regno] == 0) |
509 | new_reg_base_value[regno] = find_base_value (src); | |
9ae8ffe7 JL |
510 | |
511 | reg_seen[regno] = 1; | |
512 | } | |
513 | ||
514 | /* Called from loop optimization when a new pseudo-register is created. */ | |
515 | void | |
de12be17 | 516 | record_base_value (regno, val, invariant) |
9ae8ffe7 JL |
517 | int regno; |
518 | rtx val; | |
de12be17 | 519 | int invariant; |
9ae8ffe7 | 520 | { |
e51712db | 521 | if ((unsigned) regno >= reg_base_value_size) |
9ae8ffe7 | 522 | return; |
de12be17 JC |
523 | |
524 | /* If INVARIANT is true then this value also describes an invariant | |
525 | relationship which can be used to deduce that two registers with | |
526 | unknown values are different. */ | |
527 | if (invariant && alias_invariant) | |
528 | alias_invariant[regno] = val; | |
529 | ||
9ae8ffe7 JL |
530 | if (GET_CODE (val) == REG) |
531 | { | |
e51712db | 532 | if ((unsigned) REGNO (val) < reg_base_value_size) |
de12be17 JC |
533 | { |
534 | reg_base_value[regno] = reg_base_value[REGNO (val)]; | |
535 | } | |
9ae8ffe7 JL |
536 | return; |
537 | } | |
538 | reg_base_value[regno] = find_base_value (val); | |
539 | } | |
540 | ||
541 | static rtx | |
542 | canon_rtx (x) | |
543 | rtx x; | |
544 | { | |
545 | /* Recursively look for equivalences. */ | |
546 | if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
547 | && REGNO (x) < reg_known_value_size) | |
548 | return reg_known_value[REGNO (x)] == x | |
549 | ? x : canon_rtx (reg_known_value[REGNO (x)]); | |
550 | else if (GET_CODE (x) == PLUS) | |
551 | { | |
552 | rtx x0 = canon_rtx (XEXP (x, 0)); | |
553 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
554 | ||
555 | if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1)) | |
556 | { | |
557 | /* We can tolerate LO_SUMs being offset here; these | |
558 | rtl are used for nothing other than comparisons. */ | |
559 | if (GET_CODE (x0) == CONST_INT) | |
560 | return plus_constant_for_output (x1, INTVAL (x0)); | |
561 | else if (GET_CODE (x1) == CONST_INT) | |
562 | return plus_constant_for_output (x0, INTVAL (x1)); | |
38a448ca | 563 | return gen_rtx_PLUS (GET_MODE (x), x0, x1); |
9ae8ffe7 JL |
564 | } |
565 | } | |
566 | /* This gives us much better alias analysis when called from | |
567 | the loop optimizer. Note we want to leave the original | |
568 | MEM alone, but need to return the canonicalized MEM with | |
569 | all the flags with their original values. */ | |
570 | else if (GET_CODE (x) == MEM) | |
571 | { | |
572 | rtx addr = canon_rtx (XEXP (x, 0)); | |
573 | if (addr != XEXP (x, 0)) | |
574 | { | |
38a448ca | 575 | rtx new = gen_rtx_MEM (GET_MODE (x), addr); |
9ae8ffe7 | 576 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); |
c6df88cb | 577 | MEM_COPY_ATTRIBUTES (new, x); |
41472af8 | 578 | MEM_ALIAS_SET (new) = MEM_ALIAS_SET (x); |
9ae8ffe7 JL |
579 | x = new; |
580 | } | |
581 | } | |
582 | return x; | |
583 | } | |
584 | ||
585 | /* Return 1 if X and Y are identical-looking rtx's. | |
586 | ||
587 | We use the data in reg_known_value above to see if two registers with | |
588 | different numbers are, in fact, equivalent. */ | |
589 | ||
590 | static int | |
591 | rtx_equal_for_memref_p (x, y) | |
592 | rtx x, y; | |
593 | { | |
594 | register int i; | |
595 | register int j; | |
596 | register enum rtx_code code; | |
6f7d635c | 597 | register const char *fmt; |
9ae8ffe7 JL |
598 | |
599 | if (x == 0 && y == 0) | |
600 | return 1; | |
601 | if (x == 0 || y == 0) | |
602 | return 0; | |
603 | x = canon_rtx (x); | |
604 | y = canon_rtx (y); | |
605 | ||
606 | if (x == y) | |
607 | return 1; | |
608 | ||
609 | code = GET_CODE (x); | |
610 | /* Rtx's of different codes cannot be equal. */ | |
611 | if (code != GET_CODE (y)) | |
612 | return 0; | |
613 | ||
614 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. | |
615 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ | |
616 | ||
617 | if (GET_MODE (x) != GET_MODE (y)) | |
618 | return 0; | |
619 | ||
620 | /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */ | |
621 | ||
622 | if (code == REG) | |
623 | return REGNO (x) == REGNO (y); | |
624 | if (code == LABEL_REF) | |
625 | return XEXP (x, 0) == XEXP (y, 0); | |
626 | if (code == SYMBOL_REF) | |
627 | return XSTR (x, 0) == XSTR (y, 0); | |
de12be17 JC |
628 | if (code == CONST_INT) |
629 | return INTVAL (x) == INTVAL (y); | |
a0d8bee9 AH |
630 | /* There's no need to compare the contents of CONST_DOUBLEs because |
631 | they're unique. */ | |
632 | if (code == CONST_DOUBLE) | |
633 | return 0; | |
de12be17 JC |
634 | if (code == ADDRESSOF) |
635 | return REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0)) && XINT (x, 1) == XINT (y, 1); | |
9ae8ffe7 JL |
636 | |
637 | /* For commutative operations, the RTX match if the operand match in any | |
638 | order. Also handle the simple binary and unary cases without a loop. */ | |
639 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
640 | return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
641 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))) | |
642 | || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1)) | |
643 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0)))); | |
644 | else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2') | |
645 | return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
646 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))); | |
647 | else if (GET_RTX_CLASS (code) == '1') | |
648 | return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)); | |
649 | ||
650 | /* Compare the elements. If any pair of corresponding elements | |
de12be17 JC |
651 | fail to match, return 0 for the whole things. |
652 | ||
653 | Limit cases to types which actually appear in addresses. */ | |
9ae8ffe7 JL |
654 | |
655 | fmt = GET_RTX_FORMAT (code); | |
656 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
657 | { | |
658 | switch (fmt[i]) | |
659 | { | |
9ae8ffe7 JL |
660 | case 'i': |
661 | if (XINT (x, i) != XINT (y, i)) | |
662 | return 0; | |
663 | break; | |
664 | ||
9ae8ffe7 JL |
665 | case 'E': |
666 | /* Two vectors must have the same length. */ | |
667 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
668 | return 0; | |
669 | ||
670 | /* And the corresponding elements must match. */ | |
671 | for (j = 0; j < XVECLEN (x, i); j++) | |
672 | if (rtx_equal_for_memref_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0) | |
673 | return 0; | |
674 | break; | |
675 | ||
676 | case 'e': | |
677 | if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0) | |
678 | return 0; | |
679 | break; | |
680 | ||
aee21ba9 JL |
681 | /* This can happen for an asm which clobbers memory. */ |
682 | case '0': | |
683 | break; | |
684 | ||
9ae8ffe7 JL |
685 | /* It is believed that rtx's at this level will never |
686 | contain anything but integers and other rtx's, | |
687 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
688 | default: | |
689 | abort (); | |
690 | } | |
691 | } | |
692 | return 1; | |
693 | } | |
694 | ||
695 | /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within | |
696 | X and return it, or return 0 if none found. */ | |
697 | ||
698 | static rtx | |
699 | find_symbolic_term (x) | |
700 | rtx x; | |
701 | { | |
702 | register int i; | |
703 | register enum rtx_code code; | |
6f7d635c | 704 | register const char *fmt; |
9ae8ffe7 JL |
705 | |
706 | code = GET_CODE (x); | |
707 | if (code == SYMBOL_REF || code == LABEL_REF) | |
708 | return x; | |
709 | if (GET_RTX_CLASS (code) == 'o') | |
710 | return 0; | |
711 | ||
712 | fmt = GET_RTX_FORMAT (code); | |
713 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
714 | { | |
715 | rtx t; | |
716 | ||
717 | if (fmt[i] == 'e') | |
718 | { | |
719 | t = find_symbolic_term (XEXP (x, i)); | |
720 | if (t != 0) | |
721 | return t; | |
722 | } | |
723 | else if (fmt[i] == 'E') | |
724 | break; | |
725 | } | |
726 | return 0; | |
727 | } | |
728 | ||
729 | static rtx | |
730 | find_base_term (x) | |
731 | register rtx x; | |
732 | { | |
733 | switch (GET_CODE (x)) | |
734 | { | |
735 | case REG: | |
736 | return REG_BASE_VALUE (x); | |
737 | ||
de12be17 JC |
738 | case ZERO_EXTEND: |
739 | case SIGN_EXTEND: /* Used for Alpha/NT pointers */ | |
9ae8ffe7 | 740 | case HIGH: |
6d849a2a JL |
741 | case PRE_INC: |
742 | case PRE_DEC: | |
743 | case POST_INC: | |
744 | case POST_DEC: | |
745 | return find_base_term (XEXP (x, 0)); | |
746 | ||
9ae8ffe7 JL |
747 | case CONST: |
748 | x = XEXP (x, 0); | |
749 | if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS) | |
750 | return 0; | |
751 | /* fall through */ | |
752 | case LO_SUM: | |
753 | case PLUS: | |
754 | case MINUS: | |
755 | { | |
3c567fae JL |
756 | rtx tmp1 = XEXP (x, 0); |
757 | rtx tmp2 = XEXP (x, 1); | |
758 | ||
759 | /* This is a litle bit tricky since we have to determine which of | |
760 | the two operands represents the real base address. Otherwise this | |
761 | routine may return the index register instead of the base register. | |
762 | ||
763 | That may cause us to believe no aliasing was possible, when in | |
764 | fact aliasing is possible. | |
765 | ||
766 | We use a few simple tests to guess the base register. Additional | |
767 | tests can certainly be added. For example, if one of the operands | |
768 | is a shift or multiply, then it must be the index register and the | |
769 | other operand is the base register. */ | |
770 | ||
771 | /* If either operand is known to be a pointer, then use it | |
772 | to determine the base term. */ | |
773 | if (REG_P (tmp1) && REGNO_POINTER_FLAG (REGNO (tmp1))) | |
774 | return find_base_term (tmp1); | |
775 | ||
776 | if (REG_P (tmp2) && REGNO_POINTER_FLAG (REGNO (tmp2))) | |
777 | return find_base_term (tmp2); | |
778 | ||
779 | /* Neither operand was known to be a pointer. Go ahead and find the | |
780 | base term for both operands. */ | |
781 | tmp1 = find_base_term (tmp1); | |
782 | tmp2 = find_base_term (tmp2); | |
783 | ||
784 | /* If either base term is named object or a special address | |
785 | (like an argument or stack reference), then use it for the | |
786 | base term. */ | |
787 | if (tmp1 | |
788 | && (GET_CODE (tmp1) == SYMBOL_REF | |
789 | || GET_CODE (tmp1) == LABEL_REF | |
790 | || (GET_CODE (tmp1) == ADDRESS | |
791 | && GET_MODE (tmp1) != VOIDmode))) | |
792 | return tmp1; | |
793 | ||
794 | if (tmp2 | |
795 | && (GET_CODE (tmp2) == SYMBOL_REF | |
796 | || GET_CODE (tmp2) == LABEL_REF | |
797 | || (GET_CODE (tmp2) == ADDRESS | |
798 | && GET_MODE (tmp2) != VOIDmode))) | |
799 | return tmp2; | |
800 | ||
801 | /* We could not determine which of the two operands was the | |
802 | base register and which was the index. So we can determine | |
803 | nothing from the base alias check. */ | |
804 | return 0; | |
9ae8ffe7 JL |
805 | } |
806 | ||
807 | case AND: | |
808 | if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
809 | return REG_BASE_VALUE (XEXP (x, 0)); | |
810 | return 0; | |
811 | ||
812 | case SYMBOL_REF: | |
813 | case LABEL_REF: | |
814 | return x; | |
815 | ||
816 | default: | |
817 | return 0; | |
818 | } | |
819 | } | |
820 | ||
821 | /* Return 0 if the addresses X and Y are known to point to different | |
822 | objects, 1 if they might be pointers to the same object. */ | |
823 | ||
824 | static int | |
56ee9281 | 825 | base_alias_check (x, y, x_mode, y_mode) |
9ae8ffe7 | 826 | rtx x, y; |
56ee9281 | 827 | enum machine_mode x_mode, y_mode; |
9ae8ffe7 JL |
828 | { |
829 | rtx x_base = find_base_term (x); | |
830 | rtx y_base = find_base_term (y); | |
831 | ||
1c72c7f6 JC |
832 | /* If the address itself has no known base see if a known equivalent |
833 | value has one. If either address still has no known base, nothing | |
834 | is known about aliasing. */ | |
835 | if (x_base == 0) | |
836 | { | |
837 | rtx x_c; | |
838 | if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x) | |
839 | return 1; | |
840 | x_base = find_base_term (x_c); | |
841 | if (x_base == 0) | |
842 | return 1; | |
843 | } | |
9ae8ffe7 | 844 | |
1c72c7f6 JC |
845 | if (y_base == 0) |
846 | { | |
847 | rtx y_c; | |
848 | if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y) | |
849 | return 1; | |
850 | y_base = find_base_term (y_c); | |
851 | if (y_base == 0) | |
852 | return 1; | |
853 | } | |
854 | ||
855 | /* If the base addresses are equal nothing is known about aliasing. */ | |
856 | if (rtx_equal_p (x_base, y_base)) | |
9ae8ffe7 JL |
857 | return 1; |
858 | ||
56ee9281 RH |
859 | /* The base addresses of the read and write are different expressions. |
860 | If they are both symbols and they are not accessed via AND, there is | |
861 | no conflict. We can bring knowledge of object alignment into play | |
862 | here. For example, on alpha, "char a, b;" can alias one another, | |
863 | though "char a; long b;" cannot. */ | |
9ae8ffe7 | 864 | if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS) |
c02f035f | 865 | { |
56ee9281 RH |
866 | if (GET_CODE (x) == AND && GET_CODE (y) == AND) |
867 | return 1; | |
868 | if (GET_CODE (x) == AND | |
869 | && (GET_CODE (XEXP (x, 1)) != CONST_INT | |
870 | || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1)))) | |
871 | return 1; | |
872 | if (GET_CODE (y) == AND | |
873 | && (GET_CODE (XEXP (y, 1)) != CONST_INT | |
874 | || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1)))) | |
875 | return 1; | |
b2972551 JL |
876 | /* Differing symbols never alias. */ |
877 | return 0; | |
c02f035f | 878 | } |
9ae8ffe7 JL |
879 | |
880 | /* If one address is a stack reference there can be no alias: | |
881 | stack references using different base registers do not alias, | |
882 | a stack reference can not alias a parameter, and a stack reference | |
883 | can not alias a global. */ | |
884 | if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode) | |
885 | || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode)) | |
886 | return 0; | |
887 | ||
888 | if (! flag_argument_noalias) | |
889 | return 1; | |
890 | ||
891 | if (flag_argument_noalias > 1) | |
892 | return 0; | |
893 | ||
894 | /* Weak noalias assertion (arguments are distinct, but may match globals). */ | |
895 | return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode); | |
896 | } | |
897 | ||
39cec1ac MH |
898 | /* Return the address of the (N_REFS + 1)th memory reference to ADDR |
899 | where SIZE is the size in bytes of the memory reference. If ADDR | |
900 | is not modified by the memory reference then ADDR is returned. */ | |
901 | ||
902 | rtx | |
903 | addr_side_effect_eval (addr, size, n_refs) | |
904 | rtx addr; | |
905 | int size; | |
906 | int n_refs; | |
907 | { | |
908 | int offset = 0; | |
909 | ||
910 | switch (GET_CODE (addr)) | |
911 | { | |
912 | case PRE_INC: | |
913 | offset = (n_refs + 1) * size; | |
914 | break; | |
915 | case PRE_DEC: | |
916 | offset = -(n_refs + 1) * size; | |
917 | break; | |
918 | case POST_INC: | |
919 | offset = n_refs * size; | |
920 | break; | |
921 | case POST_DEC: | |
922 | offset = -n_refs * size; | |
923 | break; | |
924 | ||
925 | default: | |
926 | return addr; | |
927 | } | |
928 | ||
929 | if (offset) | |
930 | addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset)); | |
931 | else | |
932 | addr = XEXP (addr, 0); | |
933 | ||
934 | return addr; | |
935 | } | |
936 | ||
9ae8ffe7 JL |
937 | /* Return nonzero if X and Y (memory addresses) could reference the |
938 | same location in memory. C is an offset accumulator. When | |
939 | C is nonzero, we are testing aliases between X and Y + C. | |
940 | XSIZE is the size in bytes of the X reference, | |
941 | similarly YSIZE is the size in bytes for Y. | |
942 | ||
943 | If XSIZE or YSIZE is zero, we do not know the amount of memory being | |
944 | referenced (the reference was BLKmode), so make the most pessimistic | |
945 | assumptions. | |
946 | ||
c02f035f RH |
947 | If XSIZE or YSIZE is negative, we may access memory outside the object |
948 | being referenced as a side effect. This can happen when using AND to | |
949 | align memory references, as is done on the Alpha. | |
950 | ||
9ae8ffe7 | 951 | Nice to notice that varying addresses cannot conflict with fp if no |
0211b6ab | 952 | local variables had their addresses taken, but that's too hard now. */ |
9ae8ffe7 JL |
953 | |
954 | ||
955 | static int | |
956 | memrefs_conflict_p (xsize, x, ysize, y, c) | |
957 | register rtx x, y; | |
958 | int xsize, ysize; | |
959 | HOST_WIDE_INT c; | |
960 | { | |
961 | if (GET_CODE (x) == HIGH) | |
962 | x = XEXP (x, 0); | |
963 | else if (GET_CODE (x) == LO_SUM) | |
964 | x = XEXP (x, 1); | |
965 | else | |
39cec1ac | 966 | x = canon_rtx (addr_side_effect_eval (x, xsize, 0)); |
9ae8ffe7 JL |
967 | if (GET_CODE (y) == HIGH) |
968 | y = XEXP (y, 0); | |
969 | else if (GET_CODE (y) == LO_SUM) | |
970 | y = XEXP (y, 1); | |
971 | else | |
39cec1ac | 972 | y = canon_rtx (addr_side_effect_eval (y, ysize, 0)); |
9ae8ffe7 JL |
973 | |
974 | if (rtx_equal_for_memref_p (x, y)) | |
975 | { | |
c02f035f | 976 | if (xsize <= 0 || ysize <= 0) |
9ae8ffe7 JL |
977 | return 1; |
978 | if (c >= 0 && xsize > c) | |
979 | return 1; | |
980 | if (c < 0 && ysize+c > 0) | |
981 | return 1; | |
982 | return 0; | |
983 | } | |
984 | ||
6e73e666 JC |
985 | /* This code used to check for conflicts involving stack references and |
986 | globals but the base address alias code now handles these cases. */ | |
9ae8ffe7 JL |
987 | |
988 | if (GET_CODE (x) == PLUS) | |
989 | { | |
990 | /* The fact that X is canonicalized means that this | |
991 | PLUS rtx is canonicalized. */ | |
992 | rtx x0 = XEXP (x, 0); | |
993 | rtx x1 = XEXP (x, 1); | |
994 | ||
995 | if (GET_CODE (y) == PLUS) | |
996 | { | |
997 | /* The fact that Y is canonicalized means that this | |
998 | PLUS rtx is canonicalized. */ | |
999 | rtx y0 = XEXP (y, 0); | |
1000 | rtx y1 = XEXP (y, 1); | |
1001 | ||
1002 | if (rtx_equal_for_memref_p (x1, y1)) | |
1003 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1004 | if (rtx_equal_for_memref_p (x0, y0)) | |
1005 | return memrefs_conflict_p (xsize, x1, ysize, y1, c); | |
1006 | if (GET_CODE (x1) == CONST_INT) | |
63be02db JM |
1007 | { |
1008 | if (GET_CODE (y1) == CONST_INT) | |
1009 | return memrefs_conflict_p (xsize, x0, ysize, y0, | |
1010 | c - INTVAL (x1) + INTVAL (y1)); | |
1011 | else | |
1012 | return memrefs_conflict_p (xsize, x0, ysize, y, | |
1013 | c - INTVAL (x1)); | |
1014 | } | |
9ae8ffe7 JL |
1015 | else if (GET_CODE (y1) == CONST_INT) |
1016 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1017 | ||
6e73e666 | 1018 | return 1; |
9ae8ffe7 JL |
1019 | } |
1020 | else if (GET_CODE (x1) == CONST_INT) | |
1021 | return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1)); | |
1022 | } | |
1023 | else if (GET_CODE (y) == PLUS) | |
1024 | { | |
1025 | /* The fact that Y is canonicalized means that this | |
1026 | PLUS rtx is canonicalized. */ | |
1027 | rtx y0 = XEXP (y, 0); | |
1028 | rtx y1 = XEXP (y, 1); | |
1029 | ||
1030 | if (GET_CODE (y1) == CONST_INT) | |
1031 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1032 | else | |
1033 | return 1; | |
1034 | } | |
1035 | ||
1036 | if (GET_CODE (x) == GET_CODE (y)) | |
1037 | switch (GET_CODE (x)) | |
1038 | { | |
1039 | case MULT: | |
1040 | { | |
1041 | /* Handle cases where we expect the second operands to be the | |
1042 | same, and check only whether the first operand would conflict | |
1043 | or not. */ | |
1044 | rtx x0, y0; | |
1045 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
1046 | rtx y1 = canon_rtx (XEXP (y, 1)); | |
1047 | if (! rtx_equal_for_memref_p (x1, y1)) | |
1048 | return 1; | |
1049 | x0 = canon_rtx (XEXP (x, 0)); | |
1050 | y0 = canon_rtx (XEXP (y, 0)); | |
1051 | if (rtx_equal_for_memref_p (x0, y0)) | |
1052 | return (xsize == 0 || ysize == 0 | |
1053 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); | |
1054 | ||
1055 | /* Can't properly adjust our sizes. */ | |
1056 | if (GET_CODE (x1) != CONST_INT) | |
1057 | return 1; | |
1058 | xsize /= INTVAL (x1); | |
1059 | ysize /= INTVAL (x1); | |
1060 | c /= INTVAL (x1); | |
1061 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1062 | } | |
1d300e19 | 1063 | |
de12be17 JC |
1064 | case REG: |
1065 | /* Are these registers known not to be equal? */ | |
1066 | if (alias_invariant) | |
1067 | { | |
e51712db | 1068 | unsigned int r_x = REGNO (x), r_y = REGNO (y); |
de12be17 JC |
1069 | rtx i_x, i_y; /* invariant relationships of X and Y */ |
1070 | ||
1071 | i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x]; | |
1072 | i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y]; | |
1073 | ||
1074 | if (i_x == 0 && i_y == 0) | |
1075 | break; | |
1076 | ||
1077 | if (! memrefs_conflict_p (xsize, i_x ? i_x : x, | |
1078 | ysize, i_y ? i_y : y, c)) | |
1079 | return 0; | |
1080 | } | |
1081 | break; | |
1082 | ||
1d300e19 KG |
1083 | default: |
1084 | break; | |
9ae8ffe7 JL |
1085 | } |
1086 | ||
1087 | /* Treat an access through an AND (e.g. a subword access on an Alpha) | |
56ee9281 RH |
1088 | as an access with indeterminate size. Assume that references |
1089 | besides AND are aligned, so if the size of the other reference is | |
1090 | at least as large as the alignment, assume no other overlap. */ | |
9ae8ffe7 | 1091 | if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT) |
56ee9281 | 1092 | { |
02e3377d | 1093 | if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1))) |
56ee9281 RH |
1094 | xsize = -1; |
1095 | return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c); | |
1096 | } | |
9ae8ffe7 | 1097 | if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT) |
c02f035f | 1098 | { |
56ee9281 | 1099 | /* ??? If we are indexing far enough into the array/structure, we |
c02f035f RH |
1100 | may yet be able to determine that we can not overlap. But we |
1101 | also need to that we are far enough from the end not to overlap | |
56ee9281 | 1102 | a following reference, so we do nothing with that for now. */ |
02e3377d | 1103 | if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1))) |
56ee9281 RH |
1104 | ysize = -1; |
1105 | return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c); | |
c02f035f | 1106 | } |
9ae8ffe7 JL |
1107 | |
1108 | if (CONSTANT_P (x)) | |
1109 | { | |
1110 | if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT) | |
1111 | { | |
1112 | c += (INTVAL (y) - INTVAL (x)); | |
c02f035f | 1113 | return (xsize <= 0 || ysize <= 0 |
9ae8ffe7 JL |
1114 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); |
1115 | } | |
1116 | ||
1117 | if (GET_CODE (x) == CONST) | |
1118 | { | |
1119 | if (GET_CODE (y) == CONST) | |
1120 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1121 | ysize, canon_rtx (XEXP (y, 0)), c); | |
1122 | else | |
1123 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1124 | ysize, y, c); | |
1125 | } | |
1126 | if (GET_CODE (y) == CONST) | |
1127 | return memrefs_conflict_p (xsize, x, ysize, | |
1128 | canon_rtx (XEXP (y, 0)), c); | |
1129 | ||
1130 | if (CONSTANT_P (y)) | |
c02f035f RH |
1131 | return (xsize < 0 || ysize < 0 |
1132 | || (rtx_equal_for_memref_p (x, y) | |
1133 | && (xsize == 0 || ysize == 0 | |
1134 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)))); | |
9ae8ffe7 JL |
1135 | |
1136 | return 1; | |
1137 | } | |
1138 | return 1; | |
1139 | } | |
1140 | ||
1141 | /* Functions to compute memory dependencies. | |
1142 | ||
1143 | Since we process the insns in execution order, we can build tables | |
1144 | to keep track of what registers are fixed (and not aliased), what registers | |
1145 | are varying in known ways, and what registers are varying in unknown | |
1146 | ways. | |
1147 | ||
1148 | If both memory references are volatile, then there must always be a | |
1149 | dependence between the two references, since their order can not be | |
1150 | changed. A volatile and non-volatile reference can be interchanged | |
1151 | though. | |
1152 | ||
fa8b6024 | 1153 | A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never |
9ae8ffe7 JL |
1154 | conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must |
1155 | allow QImode aliasing because the ANSI C standard allows character | |
1156 | pointers to alias anything. We are assuming that characters are | |
fa8b6024 JW |
1157 | always QImode here. We also must allow AND addresses, because they may |
1158 | generate accesses outside the object being referenced. This is used to | |
1159 | generate aligned addresses from unaligned addresses, for instance, the | |
1160 | alpha storeqi_unaligned pattern. */ | |
9ae8ffe7 JL |
1161 | |
1162 | /* Read dependence: X is read after read in MEM takes place. There can | |
1163 | only be a dependence here if both reads are volatile. */ | |
1164 | ||
1165 | int | |
1166 | read_dependence (mem, x) | |
1167 | rtx mem; | |
1168 | rtx x; | |
1169 | { | |
1170 | return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem); | |
1171 | } | |
1172 | ||
c6df88cb MM |
1173 | /* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and |
1174 | MEM2 is a reference to a structure at a varying address, or returns | |
1175 | MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL | |
1176 | value is returned MEM1 and MEM2 can never alias. VARIES_P is used | |
1177 | to decide whether or not an address may vary; it should return | |
1178 | nozero whenever variation is possible. */ | |
1179 | ||
2c72b78f | 1180 | static rtx |
c6df88cb MM |
1181 | fixed_scalar_and_varying_struct_p (mem1, mem2, varies_p) |
1182 | rtx mem1; | |
1183 | rtx mem2; | |
1184 | int (*varies_p) PROTO((rtx)); | |
1185 | { | |
1186 | rtx mem1_addr = XEXP (mem1, 0); | |
1187 | rtx mem2_addr = XEXP (mem2, 0); | |
1188 | ||
1189 | if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2) | |
1190 | && !varies_p (mem1_addr) && varies_p (mem2_addr)) | |
1191 | /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a | |
1192 | varying address. */ | |
1193 | return mem1; | |
1194 | ||
1195 | if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2) | |
1196 | && varies_p (mem1_addr) && !varies_p (mem2_addr)) | |
1197 | /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a | |
1198 | varying address. */ | |
1199 | return mem2; | |
1200 | ||
1201 | return NULL_RTX; | |
1202 | } | |
1203 | ||
1204 | /* Returns nonzero if something about the mode or address format MEM1 | |
1205 | indicates that it might well alias *anything*. */ | |
1206 | ||
2c72b78f | 1207 | static int |
c6df88cb MM |
1208 | aliases_everything_p (mem) |
1209 | rtx mem; | |
1210 | { | |
1211 | if (GET_MODE (mem) == QImode) | |
1212 | /* ANSI C says that a `char*' can point to anything. */ | |
1213 | return 1; | |
1214 | ||
1215 | if (GET_CODE (XEXP (mem, 0)) == AND) | |
1216 | /* If the address is an AND, its very hard to know at what it is | |
1217 | actually pointing. */ | |
1218 | return 1; | |
1219 | ||
1220 | return 0; | |
1221 | } | |
1222 | ||
9ae8ffe7 JL |
1223 | /* True dependence: X is read after store in MEM takes place. */ |
1224 | ||
1225 | int | |
1226 | true_dependence (mem, mem_mode, x, varies) | |
1227 | rtx mem; | |
1228 | enum machine_mode mem_mode; | |
1229 | rtx x; | |
960b4ee6 | 1230 | int (*varies) PROTO((rtx)); |
9ae8ffe7 | 1231 | { |
6e73e666 | 1232 | register rtx x_addr, mem_addr; |
9ae8ffe7 JL |
1233 | |
1234 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1235 | return 1; | |
1236 | ||
41472af8 MM |
1237 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1238 | return 0; | |
1239 | ||
9ae8ffe7 JL |
1240 | /* If X is an unchanging read, then it can't possibly conflict with any |
1241 | non-unchanging store. It may conflict with an unchanging write though, | |
1242 | because there may be a single store to this address to initialize it. | |
1243 | Just fall through to the code below to resolve the case where we have | |
1244 | both an unchanging read and an unchanging write. This won't handle all | |
1245 | cases optimally, but the possible performance loss should be | |
1246 | negligible. */ | |
1247 | if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem)) | |
1248 | return 0; | |
1249 | ||
56ee9281 RH |
1250 | if (mem_mode == VOIDmode) |
1251 | mem_mode = GET_MODE (mem); | |
1252 | ||
1253 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x), mem_mode)) | |
1c72c7f6 JC |
1254 | return 0; |
1255 | ||
6e73e666 JC |
1256 | x_addr = canon_rtx (XEXP (x, 0)); |
1257 | mem_addr = canon_rtx (XEXP (mem, 0)); | |
1258 | ||
0211b6ab JW |
1259 | if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr, |
1260 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1261 | return 0; | |
1262 | ||
c6df88cb | 1263 | if (aliases_everything_p (x)) |
0211b6ab JW |
1264 | return 1; |
1265 | ||
c6df88cb MM |
1266 | /* We cannot use aliases_everyting_p to test MEM, since we must look |
1267 | at MEM_MODE, rather than GET_MODE (MEM). */ | |
1268 | if (mem_mode == QImode || GET_CODE (mem_addr) == AND) | |
1269 | return 1; | |
0211b6ab | 1270 | |
c6df88cb MM |
1271 | /* In true_dependence we also allow BLKmode to alias anything. Why |
1272 | don't we do this in anti_dependence and output_dependence? */ | |
1273 | if (mem_mode == BLKmode || GET_MODE (x) == BLKmode) | |
1274 | return 1; | |
0211b6ab | 1275 | |
c6df88cb | 1276 | return !fixed_scalar_and_varying_struct_p (mem, x, varies); |
9ae8ffe7 JL |
1277 | } |
1278 | ||
c6df88cb MM |
1279 | /* Returns non-zero if a write to X might alias a previous read from |
1280 | (or, if WRITEP is non-zero, a write to) MEM. */ | |
9ae8ffe7 | 1281 | |
2c72b78f | 1282 | static int |
c6df88cb | 1283 | write_dependence_p (mem, x, writep) |
9ae8ffe7 JL |
1284 | rtx mem; |
1285 | rtx x; | |
c6df88cb | 1286 | int writep; |
9ae8ffe7 | 1287 | { |
6e73e666 | 1288 | rtx x_addr, mem_addr; |
c6df88cb | 1289 | rtx fixed_scalar; |
6e73e666 | 1290 | |
9ae8ffe7 JL |
1291 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) |
1292 | return 1; | |
1293 | ||
9ae8ffe7 JL |
1294 | /* If MEM is an unchanging read, then it can't possibly conflict with |
1295 | the store to X, because there is at most one store to MEM, and it must | |
1296 | have occurred somewhere before MEM. */ | |
c6df88cb | 1297 | if (!writep && RTX_UNCHANGING_P (mem)) |
9ae8ffe7 JL |
1298 | return 0; |
1299 | ||
56ee9281 RH |
1300 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x), |
1301 | GET_MODE (mem))) | |
1c72c7f6 JC |
1302 | return 0; |
1303 | ||
1304 | x = canon_rtx (x); | |
1305 | mem = canon_rtx (mem); | |
1306 | ||
41472af8 MM |
1307 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1308 | return 0; | |
1309 | ||
6e73e666 JC |
1310 | x_addr = XEXP (x, 0); |
1311 | mem_addr = XEXP (mem, 0); | |
1312 | ||
c6df88cb MM |
1313 | if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr, |
1314 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1315 | return 0; | |
1316 | ||
1317 | fixed_scalar | |
1318 | = fixed_scalar_and_varying_struct_p (mem, x, rtx_addr_varies_p); | |
1319 | ||
1320 | return (!(fixed_scalar == mem && !aliases_everything_p (x)) | |
1321 | && !(fixed_scalar == x && !aliases_everything_p (mem))); | |
1322 | } | |
1323 | ||
1324 | /* Anti dependence: X is written after read in MEM takes place. */ | |
1325 | ||
1326 | int | |
1327 | anti_dependence (mem, x) | |
1328 | rtx mem; | |
1329 | rtx x; | |
1330 | { | |
1331 | return write_dependence_p (mem, x, /*writep=*/0); | |
9ae8ffe7 JL |
1332 | } |
1333 | ||
1334 | /* Output dependence: X is written after store in MEM takes place. */ | |
1335 | ||
1336 | int | |
1337 | output_dependence (mem, x) | |
1338 | register rtx mem; | |
1339 | register rtx x; | |
1340 | { | |
c6df88cb | 1341 | return write_dependence_p (mem, x, /*writep=*/1); |
9ae8ffe7 JL |
1342 | } |
1343 | ||
7790df19 JW |
1344 | /* Returns non-zero if X might refer to something which is not |
1345 | local to the function and is not constant. */ | |
1346 | ||
1347 | static int | |
1348 | nonlocal_reference_p (x) | |
1349 | rtx x; | |
1350 | { | |
1351 | rtx base; | |
1352 | register RTX_CODE code; | |
1353 | int regno; | |
1354 | ||
1355 | code = GET_CODE (x); | |
1356 | ||
1357 | if (GET_RTX_CLASS (code) == 'i') | |
1358 | { | |
1359 | /* Constant functions are constant. */ | |
1360 | if (code == CALL_INSN && CONST_CALL_P (x)) | |
1361 | return 0; | |
1362 | x = PATTERN (x); | |
1363 | code = GET_CODE (x); | |
1364 | } | |
1365 | ||
1366 | switch (code) | |
1367 | { | |
1368 | case SUBREG: | |
1369 | if (GET_CODE (SUBREG_REG (x)) == REG) | |
1370 | { | |
1371 | /* Global registers are not local. */ | |
1372 | if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER | |
1373 | && global_regs[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)]) | |
1374 | return 1; | |
1375 | return 0; | |
1376 | } | |
1377 | break; | |
1378 | ||
1379 | case REG: | |
1380 | regno = REGNO (x); | |
1381 | /* Global registers are not local. */ | |
1382 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
1383 | return 1; | |
1384 | return 0; | |
1385 | ||
1386 | case SCRATCH: | |
1387 | case PC: | |
1388 | case CC0: | |
1389 | case CONST_INT: | |
1390 | case CONST_DOUBLE: | |
1391 | case CONST: | |
1392 | case LABEL_REF: | |
1393 | return 0; | |
1394 | ||
1395 | case SYMBOL_REF: | |
1396 | /* Constants in the function's constants pool are constant. */ | |
1397 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1398 | return 0; | |
1399 | return 1; | |
1400 | ||
1401 | case CALL: | |
1402 | /* Recursion introduces no additional considerations. */ | |
1403 | if (GET_CODE (XEXP (x, 0)) == MEM | |
1404 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
1405 | && strcmp(XSTR (XEXP (XEXP (x, 0), 0), 0), | |
1406 | IDENTIFIER_POINTER ( | |
1407 | DECL_ASSEMBLER_NAME (current_function_decl))) == 0) | |
1408 | return 0; | |
1409 | return 1; | |
1410 | ||
1411 | case MEM: | |
1412 | /* Be overly conservative and consider any volatile memory | |
1413 | reference as not local. */ | |
1414 | if (MEM_VOLATILE_P (x)) | |
1415 | return 1; | |
1416 | base = find_base_term (XEXP (x, 0)); | |
1417 | if (base) | |
1418 | { | |
1419 | /* Stack references are local. */ | |
1420 | if (GET_CODE (base) == ADDRESS && GET_MODE (base) == Pmode) | |
1421 | return 0; | |
1422 | /* Constants in the function's constant pool are constant. */ | |
1423 | if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base)) | |
1424 | return 0; | |
1425 | } | |
1426 | return 1; | |
1427 | ||
1428 | case ASM_INPUT: | |
1429 | case ASM_OPERANDS: | |
1430 | return 1; | |
1431 | ||
1432 | default: | |
1433 | break; | |
1434 | } | |
1435 | ||
1436 | /* Recursively scan the operands of this expression. */ | |
1437 | ||
1438 | { | |
499b1098 | 1439 | register const char *fmt = GET_RTX_FORMAT (code); |
7790df19 JW |
1440 | register int i; |
1441 | ||
1442 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1443 | { | |
1444 | if (fmt[i] == 'e') | |
1445 | { | |
1446 | if (nonlocal_reference_p (XEXP (x, i))) | |
1447 | return 1; | |
1448 | } | |
1449 | if (fmt[i] == 'E') | |
1450 | { | |
1451 | register int j; | |
1452 | for (j = 0; j < XVECLEN (x, i); j++) | |
1453 | if (nonlocal_reference_p (XVECEXP (x, i, j))) | |
1454 | return 1; | |
1455 | } | |
1456 | } | |
1457 | } | |
1458 | ||
1459 | return 0; | |
1460 | } | |
1461 | ||
1462 | /* Mark the function if it is constant. */ | |
1463 | ||
1464 | void | |
1465 | mark_constant_function () | |
1466 | { | |
1467 | rtx insn; | |
1468 | ||
1469 | if (TREE_PUBLIC (current_function_decl) | |
1470 | || TREE_READONLY (current_function_decl) | |
1471 | || TREE_THIS_VOLATILE (current_function_decl) | |
1472 | || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode) | |
1473 | return; | |
1474 | ||
1475 | /* Determine if this is a constant function. */ | |
1476 | ||
1477 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
1478 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' | |
1479 | && nonlocal_reference_p (insn)) | |
1480 | return; | |
1481 | ||
1482 | /* Mark the function. */ | |
1483 | ||
1484 | TREE_READONLY (current_function_decl) = 1; | |
1485 | } | |
1486 | ||
6e73e666 JC |
1487 | |
1488 | static HARD_REG_SET argument_registers; | |
1489 | ||
1490 | void | |
1491 | init_alias_once () | |
1492 | { | |
1493 | register int i; | |
1494 | ||
1495 | #ifndef OUTGOING_REGNO | |
1496 | #define OUTGOING_REGNO(N) N | |
1497 | #endif | |
1498 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1499 | /* Check whether this register can hold an incoming pointer | |
1500 | argument. FUNCTION_ARG_REGNO_P tests outgoing register | |
1501 | numbers, so translate if necessary due to register windows. */ | |
1502 | if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i)) | |
1503 | && HARD_REGNO_MODE_OK (i, Pmode)) | |
1504 | SET_HARD_REG_BIT (argument_registers, i); | |
3932261a | 1505 | |
30f72379 | 1506 | alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0); |
6e73e666 JC |
1507 | } |
1508 | ||
9ae8ffe7 JL |
1509 | void |
1510 | init_alias_analysis () | |
1511 | { | |
1512 | int maxreg = max_reg_num (); | |
ea64ef27 | 1513 | int changed, pass; |
9ae8ffe7 | 1514 | register int i; |
e51712db | 1515 | register unsigned int ui; |
9ae8ffe7 | 1516 | register rtx insn; |
9ae8ffe7 JL |
1517 | |
1518 | reg_known_value_size = maxreg; | |
1519 | ||
1520 | reg_known_value | |
1521 | = (rtx *) oballoc ((maxreg - FIRST_PSEUDO_REGISTER) * sizeof (rtx)) | |
1522 | - FIRST_PSEUDO_REGISTER; | |
1523 | reg_known_equiv_p = | |
1524 | oballoc (maxreg - FIRST_PSEUDO_REGISTER) - FIRST_PSEUDO_REGISTER; | |
1525 | bzero ((char *) (reg_known_value + FIRST_PSEUDO_REGISTER), | |
1526 | (maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx)); | |
1527 | bzero (reg_known_equiv_p + FIRST_PSEUDO_REGISTER, | |
1528 | (maxreg - FIRST_PSEUDO_REGISTER) * sizeof (char)); | |
1529 | ||
6e73e666 JC |
1530 | /* Overallocate reg_base_value to allow some growth during loop |
1531 | optimization. Loop unrolling can create a large number of | |
1532 | registers. */ | |
1533 | reg_base_value_size = maxreg * 2; | |
1534 | reg_base_value = (rtx *)oballoc (reg_base_value_size * sizeof (rtx)); | |
1535 | new_reg_base_value = (rtx *)alloca (reg_base_value_size * sizeof (rtx)); | |
1536 | reg_seen = (char *)alloca (reg_base_value_size); | |
1537 | bzero ((char *) reg_base_value, reg_base_value_size * sizeof (rtx)); | |
de12be17 JC |
1538 | if (! reload_completed && flag_unroll_loops) |
1539 | { | |
1540 | alias_invariant = (rtx *)xrealloc (alias_invariant, | |
1541 | reg_base_value_size * sizeof (rtx)); | |
1542 | bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx)); | |
1543 | } | |
1544 | ||
ec907dd8 JL |
1545 | |
1546 | /* The basic idea is that each pass through this loop will use the | |
1547 | "constant" information from the previous pass to propagate alias | |
1548 | information through another level of assignments. | |
1549 | ||
1550 | This could get expensive if the assignment chains are long. Maybe | |
1551 | we should throttle the number of iterations, possibly based on | |
6e73e666 | 1552 | the optimization level or flag_expensive_optimizations. |
ec907dd8 JL |
1553 | |
1554 | We could propagate more information in the first pass by making use | |
1555 | of REG_N_SETS to determine immediately that the alias information | |
ea64ef27 JL |
1556 | for a pseudo is "constant". |
1557 | ||
1558 | A program with an uninitialized variable can cause an infinite loop | |
1559 | here. Instead of doing a full dataflow analysis to detect such problems | |
1560 | we just cap the number of iterations for the loop. | |
1561 | ||
1562 | The state of the arrays for the set chain in question does not matter | |
1563 | since the program has undefined behavior. */ | |
6e73e666 | 1564 | |
ea64ef27 | 1565 | pass = 0; |
6e73e666 | 1566 | do |
ec907dd8 JL |
1567 | { |
1568 | /* Assume nothing will change this iteration of the loop. */ | |
1569 | changed = 0; | |
1570 | ||
ec907dd8 JL |
1571 | /* We want to assign the same IDs each iteration of this loop, so |
1572 | start counting from zero each iteration of the loop. */ | |
1573 | unique_id = 0; | |
1574 | ||
1575 | /* We're at the start of the funtion each iteration through the | |
1576 | loop, so we're copying arguments. */ | |
1577 | copying_arguments = 1; | |
9ae8ffe7 | 1578 | |
6e73e666 JC |
1579 | /* Wipe the potential alias information clean for this pass. */ |
1580 | bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx)); | |
8072f69c | 1581 | |
6e73e666 JC |
1582 | /* Wipe the reg_seen array clean. */ |
1583 | bzero ((char *) reg_seen, reg_base_value_size); | |
9ae8ffe7 | 1584 | |
6e73e666 JC |
1585 | /* Mark all hard registers which may contain an address. |
1586 | The stack, frame and argument pointers may contain an address. | |
1587 | An argument register which can hold a Pmode value may contain | |
1588 | an address even if it is not in BASE_REGS. | |
8072f69c | 1589 | |
6e73e666 JC |
1590 | The address expression is VOIDmode for an argument and |
1591 | Pmode for other registers. */ | |
1592 | ||
1593 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1594 | if (TEST_HARD_REG_BIT (argument_registers, i)) | |
38a448ca RH |
1595 | new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode, |
1596 | gen_rtx_REG (Pmode, i)); | |
6e73e666 JC |
1597 | |
1598 | new_reg_base_value[STACK_POINTER_REGNUM] | |
38a448ca | 1599 | = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); |
6e73e666 | 1600 | new_reg_base_value[ARG_POINTER_REGNUM] |
38a448ca | 1601 | = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); |
6e73e666 | 1602 | new_reg_base_value[FRAME_POINTER_REGNUM] |
38a448ca | 1603 | = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); |
2a2c8203 | 1604 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6e73e666 | 1605 | new_reg_base_value[HARD_FRAME_POINTER_REGNUM] |
38a448ca | 1606 | = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); |
2a2c8203 | 1607 | #endif |
6e73e666 JC |
1608 | if (struct_value_incoming_rtx |
1609 | && GET_CODE (struct_value_incoming_rtx) == REG) | |
1610 | new_reg_base_value[REGNO (struct_value_incoming_rtx)] | |
38a448ca | 1611 | = gen_rtx_ADDRESS (Pmode, struct_value_incoming_rtx); |
6e73e666 JC |
1612 | |
1613 | if (static_chain_rtx | |
1614 | && GET_CODE (static_chain_rtx) == REG) | |
1615 | new_reg_base_value[REGNO (static_chain_rtx)] | |
38a448ca | 1616 | = gen_rtx_ADDRESS (Pmode, static_chain_rtx); |
ec907dd8 JL |
1617 | |
1618 | /* Walk the insns adding values to the new_reg_base_value array. */ | |
1619 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
9ae8ffe7 | 1620 | { |
950fe843 | 1621 | #if defined (HAVE_prologue) || defined (HAVE_epilogue) |
5c7675e9 RH |
1622 | if (prologue_epilogue_contains (insn)) |
1623 | continue; | |
950fe843 | 1624 | #endif |
6e73e666 | 1625 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
ec907dd8 | 1626 | { |
6e73e666 | 1627 | rtx note, set; |
ec907dd8 JL |
1628 | /* If this insn has a noalias note, process it, Otherwise, |
1629 | scan for sets. A simple set will have no side effects | |
1630 | which could change the base value of any other register. */ | |
6e73e666 | 1631 | |
ec907dd8 | 1632 | if (GET_CODE (PATTERN (insn)) == SET |
6e73e666 | 1633 | && (find_reg_note (insn, REG_NOALIAS, NULL_RTX))) |
9f8f10de | 1634 | record_set (SET_DEST (PATTERN (insn)), NULL_RTX); |
ec907dd8 JL |
1635 | else |
1636 | note_stores (PATTERN (insn), record_set); | |
6e73e666 JC |
1637 | |
1638 | set = single_set (insn); | |
1639 | ||
1640 | if (set != 0 | |
1641 | && GET_CODE (SET_DEST (set)) == REG | |
1642 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER | |
1643 | && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 | |
1644 | && REG_N_SETS (REGNO (SET_DEST (set))) == 1) | |
1645 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0) | |
6ba14f92 R |
1646 | && GET_CODE (XEXP (note, 0)) != EXPR_LIST |
1647 | && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0))) | |
6e73e666 JC |
1648 | { |
1649 | int regno = REGNO (SET_DEST (set)); | |
1650 | reg_known_value[regno] = XEXP (note, 0); | |
1651 | reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV; | |
1652 | } | |
ec907dd8 JL |
1653 | } |
1654 | else if (GET_CODE (insn) == NOTE | |
1655 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) | |
1656 | copying_arguments = 0; | |
6e73e666 | 1657 | } |
ec907dd8 | 1658 | |
6e73e666 | 1659 | /* Now propagate values from new_reg_base_value to reg_base_value. */ |
e51712db | 1660 | for (ui = 0; ui < reg_base_value_size; ui++) |
6e73e666 | 1661 | { |
e51712db KG |
1662 | if (new_reg_base_value[ui] |
1663 | && new_reg_base_value[ui] != reg_base_value[ui] | |
1664 | && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui])) | |
ec907dd8 | 1665 | { |
e51712db | 1666 | reg_base_value[ui] = new_reg_base_value[ui]; |
6e73e666 | 1667 | changed = 1; |
ec907dd8 | 1668 | } |
9ae8ffe7 | 1669 | } |
9ae8ffe7 | 1670 | } |
6e73e666 | 1671 | while (changed && ++pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 JL |
1672 | |
1673 | /* Fill in the remaining entries. */ | |
1674 | for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++) | |
1675 | if (reg_known_value[i] == 0) | |
1676 | reg_known_value[i] = regno_reg_rtx[i]; | |
1677 | ||
9ae8ffe7 JL |
1678 | /* Simplify the reg_base_value array so that no register refers to |
1679 | another register, except to special registers indirectly through | |
1680 | ADDRESS expressions. | |
1681 | ||
1682 | In theory this loop can take as long as O(registers^2), but unless | |
1683 | there are very long dependency chains it will run in close to linear | |
ea64ef27 JL |
1684 | time. |
1685 | ||
1686 | This loop may not be needed any longer now that the main loop does | |
1687 | a better job at propagating alias information. */ | |
1688 | pass = 0; | |
9ae8ffe7 JL |
1689 | do |
1690 | { | |
1691 | changed = 0; | |
ea64ef27 | 1692 | pass++; |
e51712db | 1693 | for (ui = 0; ui < reg_base_value_size; ui++) |
9ae8ffe7 | 1694 | { |
e51712db | 1695 | rtx base = reg_base_value[ui]; |
9ae8ffe7 JL |
1696 | if (base && GET_CODE (base) == REG) |
1697 | { | |
e51712db KG |
1698 | unsigned int base_regno = REGNO (base); |
1699 | if (base_regno == ui) /* register set from itself */ | |
1700 | reg_base_value[ui] = 0; | |
9ae8ffe7 | 1701 | else |
e51712db | 1702 | reg_base_value[ui] = reg_base_value[base_regno]; |
9ae8ffe7 JL |
1703 | changed = 1; |
1704 | } | |
1705 | } | |
1706 | } | |
ea64ef27 | 1707 | while (changed && pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 | 1708 | |
ec907dd8 | 1709 | new_reg_base_value = 0; |
9ae8ffe7 JL |
1710 | reg_seen = 0; |
1711 | } | |
1712 | ||
1713 | void | |
1714 | end_alias_analysis () | |
1715 | { | |
1716 | reg_known_value = 0; | |
1717 | reg_base_value = 0; | |
1718 | reg_base_value_size = 0; | |
de12be17 JC |
1719 | if (alias_invariant) |
1720 | { | |
1721 | free ((char *)alias_invariant); | |
1722 | alias_invariant = 0; | |
1723 | } | |
9ae8ffe7 | 1724 | } |