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9ae8ffe7 | 1 | /* Alias analysis for GNU C |
1c72c7f6 | 2 | Copyright (C) 1997, 1998 Free Software Foundation, Inc. |
9ae8ffe7 JL |
3 | Contributed by John Carr (jfc@mit.edu). |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "config.h" | |
670ee920 | 23 | #include "system.h" |
9ae8ffe7 JL |
24 | #include "rtl.h" |
25 | #include "expr.h" | |
26 | #include "regs.h" | |
27 | #include "hard-reg-set.h" | |
28 | #include "flags.h" | |
264fac34 | 29 | #include "output.h" |
2e107e9e | 30 | #include "toplev.h" |
3932261a MM |
31 | #include "splay-tree.h" |
32 | ||
33 | /* The alias sets assigned to MEMs assist the back-end in determining | |
34 | which MEMs can alias which other MEMs. In general, two MEMs in | |
35 | different alias sets to not alias each other. There is one | |
36 | exception, however. Consider something like: | |
37 | ||
38 | struct S {int i; double d; }; | |
39 | ||
40 | a store to an `S' can alias something of either type `int' or type | |
41 | `double'. (However, a store to an `int' cannot alias a `double' | |
42 | and vice versa.) We indicate this via a tree structure that looks | |
43 | like: | |
44 | struct S | |
45 | / \ | |
46 | / \ | |
47 | |/_ _\| | |
48 | int double | |
49 | ||
50 | (The arrows are directed and point downwards.) If, when comparing | |
51 | two alias sets, we can hold one set fixed, and trace the other set | |
52 | downwards, and at some point find the first set, the two MEMs can | |
53 | alias one another. In this situation we say the alias set for | |
54 | `struct S' is the `superset' and that those for `int' and `double' | |
55 | are `subsets'. | |
56 | ||
57 | Alias set zero is implicitly a superset of all other alias sets. | |
58 | However, this is no actual entry for alias set zero. It is an | |
59 | error to attempt to explicitly construct a subset of zero. */ | |
60 | ||
61 | typedef struct alias_set_entry { | |
62 | /* The alias set number, as stored in MEM_ALIAS_SET. */ | |
63 | int alias_set; | |
64 | ||
65 | /* The children of the alias set. These are not just the immediate | |
66 | children, but, in fact, all children. So, if we have: | |
67 | ||
68 | struct T { struct S s; float f; } | |
69 | ||
70 | continuing our example above, the children here will be all of | |
71 | `int', `double', `float', and `struct S'. */ | |
72 | splay_tree children; | |
73 | }* alias_set_entry; | |
9ae8ffe7 JL |
74 | |
75 | static rtx canon_rtx PROTO((rtx)); | |
76 | static int rtx_equal_for_memref_p PROTO((rtx, rtx)); | |
77 | static rtx find_symbolic_term PROTO((rtx)); | |
78 | static int memrefs_conflict_p PROTO((int, rtx, int, rtx, | |
79 | HOST_WIDE_INT)); | |
70fec650 JL |
80 | static void record_set PROTO((rtx, rtx)); |
81 | static rtx find_base_term PROTO((rtx)); | |
56ee9281 RH |
82 | static int base_alias_check PROTO((rtx, rtx, enum machine_mode, |
83 | enum machine_mode)); | |
960b4ee6 | 84 | static rtx find_base_value PROTO((rtx)); |
3932261a MM |
85 | static int mems_in_disjoint_alias_sets_p PROTO((rtx, rtx)); |
86 | static int alias_set_compare PROTO((splay_tree_key, | |
87 | splay_tree_key)); | |
88 | static int insert_subset_children PROTO((splay_tree_node, | |
89 | void*)); | |
90 | static alias_set_entry get_alias_set_entry PROTO((int)); | |
9ae8ffe7 JL |
91 | |
92 | /* Set up all info needed to perform alias analysis on memory references. */ | |
93 | ||
94 | #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X))) | |
95 | ||
41472af8 | 96 | /* Returns nonzero if MEM1 and MEM2 do not alias because they are in |
264fac34 MM |
97 | different alias sets. We ignore alias sets in functions making use |
98 | of variable arguments because the va_arg macros on some systems are | |
99 | not legal ANSI C. */ | |
100 | #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \ | |
3932261a | 101 | mems_in_disjoint_alias_sets_p (MEM1, MEM2) |
41472af8 | 102 | |
ea64ef27 JL |
103 | /* Cap the number of passes we make over the insns propagating alias |
104 | information through set chains. | |
105 | ||
106 | 10 is a completely arbitrary choice. */ | |
107 | #define MAX_ALIAS_LOOP_PASSES 10 | |
108 | ||
9ae8ffe7 JL |
109 | /* reg_base_value[N] gives an address to which register N is related. |
110 | If all sets after the first add or subtract to the current value | |
111 | or otherwise modify it so it does not point to a different top level | |
112 | object, reg_base_value[N] is equal to the address part of the source | |
2a2c8203 JC |
113 | of the first set. |
114 | ||
115 | A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS | |
116 | expressions represent certain special values: function arguments and | |
117 | the stack, frame, and argument pointers. The contents of an address | |
118 | expression are not used (but they are descriptive for debugging); | |
119 | only the address and mode matter. Pointer equality, not rtx_equal_p, | |
120 | determines whether two ADDRESS expressions refer to the same base | |
121 | address. The mode determines whether it is a function argument or | |
122 | other special value. */ | |
123 | ||
9ae8ffe7 | 124 | rtx *reg_base_value; |
ec907dd8 | 125 | rtx *new_reg_base_value; |
9ae8ffe7 JL |
126 | unsigned int reg_base_value_size; /* size of reg_base_value array */ |
127 | #define REG_BASE_VALUE(X) \ | |
e51712db | 128 | ((unsigned) REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0) |
9ae8ffe7 | 129 | |
de12be17 JC |
130 | /* Vector of known invariant relationships between registers. Set in |
131 | loop unrolling. Indexed by register number, if nonzero the value | |
132 | is an expression describing this register in terms of another. | |
133 | ||
134 | The length of this array is REG_BASE_VALUE_SIZE. | |
135 | ||
136 | Because this array contains only pseudo registers it has no effect | |
137 | after reload. */ | |
138 | static rtx *alias_invariant; | |
139 | ||
9ae8ffe7 JL |
140 | /* Vector indexed by N giving the initial (unchanging) value known |
141 | for pseudo-register N. */ | |
142 | rtx *reg_known_value; | |
143 | ||
144 | /* Indicates number of valid entries in reg_known_value. */ | |
145 | static int reg_known_value_size; | |
146 | ||
147 | /* Vector recording for each reg_known_value whether it is due to a | |
148 | REG_EQUIV note. Future passes (viz., reload) may replace the | |
149 | pseudo with the equivalent expression and so we account for the | |
150 | dependences that would be introduced if that happens. */ | |
151 | /* ??? This is a problem only on the Convex. The REG_EQUIV notes created in | |
152 | assign_parms mention the arg pointer, and there are explicit insns in the | |
153 | RTL that modify the arg pointer. Thus we must ensure that such insns don't | |
154 | get scheduled across each other because that would invalidate the REG_EQUIV | |
155 | notes. One could argue that the REG_EQUIV notes are wrong, but solving | |
156 | the problem in the scheduler will likely give better code, so we do it | |
157 | here. */ | |
158 | char *reg_known_equiv_p; | |
159 | ||
2a2c8203 JC |
160 | /* True when scanning insns from the start of the rtl to the |
161 | NOTE_INSN_FUNCTION_BEG note. */ | |
9ae8ffe7 | 162 | |
9ae8ffe7 JL |
163 | static int copying_arguments; |
164 | ||
3932261a MM |
165 | /* The splay-tree used to store the various alias set entries. */ |
166 | ||
167 | static splay_tree alias_sets; | |
168 | ||
169 | /* Returns -1, 0, 1 according to whether SET1 is less than, equal to, | |
170 | or greater than SET2. */ | |
171 | ||
172 | static int | |
173 | alias_set_compare (set1, set2) | |
174 | splay_tree_key set1; | |
175 | splay_tree_key set2; | |
176 | { | |
177 | int s1 = (int) set1; | |
178 | int s2 = (int) set2; | |
179 | ||
180 | if (s1 < s2) | |
181 | return -1; | |
182 | else if (s1 > s2) | |
183 | return 1; | |
184 | else | |
185 | return 0; | |
186 | } | |
187 | ||
188 | /* Returns a pointer to the alias set entry for ALIAS_SET, if there is | |
189 | such an entry, or NULL otherwise. */ | |
190 | ||
191 | static alias_set_entry | |
192 | get_alias_set_entry (alias_set) | |
193 | int alias_set; | |
194 | { | |
195 | splay_tree_node sn = | |
196 | splay_tree_lookup (alias_sets, (splay_tree_key) alias_set); | |
197 | ||
198 | return sn ? ((alias_set_entry) sn->value) : ((alias_set_entry) 0); | |
199 | } | |
200 | ||
201 | /* Returns nonzero value if the alias sets for MEM1 and MEM2 are such | |
202 | that the two MEMs cannot alias each other. */ | |
203 | ||
204 | static int | |
205 | mems_in_disjoint_alias_sets_p (mem1, mem2) | |
206 | rtx mem1; | |
207 | rtx mem2; | |
208 | { | |
209 | alias_set_entry ase; | |
210 | ||
211 | #ifdef ENABLE_CHECKING | |
212 | /* Perform a basic sanity check. Namely, that there are no alias sets | |
213 | if we're not using strict aliasing. This helps to catch bugs | |
214 | whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or | |
215 | where a MEM is allocated in some way other than by the use of | |
216 | gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to | |
217 | use alias sets to indicate that spilled registers cannot alias each | |
218 | other, we might need to remove this check. */ | |
219 | if (!flag_strict_aliasing && | |
220 | (MEM_ALIAS_SET (mem1) || MEM_ALIAS_SET (mem2))) | |
221 | abort (); | |
222 | #endif | |
223 | ||
224 | /* The code used in varargs macros are often not conforming ANSI C, | |
225 | which can trick the compiler into making incorrect aliasing | |
226 | assumptions in these functions. So, we don't use alias sets in | |
227 | such a function. FIXME: This should be moved into the front-end; | |
228 | it is a language-dependent notion, and there's no reason not to | |
229 | still use these checks to handle globals. */ | |
230 | if (current_function_stdarg || current_function_varargs) | |
231 | return 0; | |
232 | ||
233 | if (!MEM_ALIAS_SET (mem1) || !MEM_ALIAS_SET (mem2)) | |
234 | /* We have no alias set information for one of the MEMs, so we | |
235 | have to assume it can alias anything. */ | |
236 | return 0; | |
237 | ||
238 | if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2)) | |
239 | /* The two alias sets are the same, so they may alias. */ | |
240 | return 0; | |
241 | ||
242 | /* Iterate through each of the children of the first alias set, | |
243 | comparing it with the second alias set. */ | |
244 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem1)); | |
245 | if (ase && splay_tree_lookup (ase->children, | |
246 | (splay_tree_key) MEM_ALIAS_SET (mem2))) | |
247 | return 0; | |
248 | ||
249 | /* Now do the same, but with the alias sets reversed. */ | |
250 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem2)); | |
251 | if (ase && splay_tree_lookup (ase->children, | |
252 | (splay_tree_key) MEM_ALIAS_SET (mem1))) | |
253 | return 0; | |
254 | ||
255 | /* The two MEMs are in distinct alias sets, and neither one is the | |
256 | child of the other. Therefore, they cannot alias. */ | |
257 | return 1; | |
258 | } | |
259 | ||
260 | /* Insert the NODE into the splay tree given by DATA. Used by | |
261 | record_alias_subset via splay_tree_foreach. */ | |
262 | ||
263 | static int | |
264 | insert_subset_children (node, data) | |
265 | splay_tree_node node; | |
266 | void *data; | |
267 | { | |
268 | splay_tree_insert ((splay_tree) data, | |
269 | node->key, | |
270 | node->value); | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
275 | /* Indicate that things in SUBSET can alias things in SUPERSET, but | |
276 | not vice versa. For example, in C, a store to an `int' can alias a | |
277 | structure containing an `int', but not vice versa. Here, the | |
278 | structure would be the SUPERSET and `int' the SUBSET. This | |
279 | function should be called only once per SUPERSET/SUBSET pair. At | |
280 | present any given alias set may only be a subset of one superset. | |
281 | ||
282 | It is illegal for SUPERSET to be zero; everything is implicitly a | |
283 | subset of alias set zero. */ | |
284 | ||
285 | void | |
286 | record_alias_subset (superset, subset) | |
287 | int superset; | |
288 | int subset; | |
289 | { | |
290 | alias_set_entry superset_entry; | |
291 | alias_set_entry subset_entry; | |
292 | ||
293 | if (superset == 0) | |
294 | abort (); | |
295 | ||
296 | superset_entry = get_alias_set_entry (superset); | |
297 | if (!superset_entry) | |
298 | { | |
299 | /* Create an entry for the SUPERSET, so that we have a place to | |
300 | attach the SUBSET. */ | |
301 | superset_entry = | |
302 | (alias_set_entry) xmalloc (sizeof (struct alias_set_entry)); | |
303 | superset_entry->alias_set = superset; | |
304 | superset_entry->children | |
305 | = splay_tree_new (&alias_set_compare, 0, 0); | |
306 | splay_tree_insert (alias_sets, | |
307 | (splay_tree_key) superset, | |
308 | (splay_tree_value) superset_entry); | |
309 | ||
310 | } | |
311 | ||
312 | subset_entry = get_alias_set_entry (subset); | |
313 | if (subset_entry) | |
314 | /* There is an entry for the subset. Enter all of its children | |
315 | (if they are not already present) as children of the SUPERSET. */ | |
316 | splay_tree_foreach (subset_entry->children, | |
317 | &insert_subset_children, | |
318 | superset_entry->children); | |
319 | ||
320 | /* Enter the SUBSET itself as a child of the SUPERSET. */ | |
321 | splay_tree_insert (superset_entry->children, | |
322 | (splay_tree_key) subset, | |
323 | /*value=*/0); | |
324 | } | |
325 | ||
2a2c8203 JC |
326 | /* Inside SRC, the source of a SET, find a base address. */ |
327 | ||
9ae8ffe7 JL |
328 | static rtx |
329 | find_base_value (src) | |
330 | register rtx src; | |
331 | { | |
332 | switch (GET_CODE (src)) | |
333 | { | |
334 | case SYMBOL_REF: | |
335 | case LABEL_REF: | |
336 | return src; | |
337 | ||
338 | case REG: | |
2a2c8203 JC |
339 | /* At the start of a function argument registers have known base |
340 | values which may be lost later. Returning an ADDRESS | |
341 | expression here allows optimization based on argument values | |
342 | even when the argument registers are used for other purposes. */ | |
343 | if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments) | |
ec907dd8 | 344 | return new_reg_base_value[REGNO (src)]; |
73774bc7 | 345 | |
eaf407a5 JL |
346 | /* If a pseudo has a known base value, return it. Do not do this |
347 | for hard regs since it can result in a circular dependency | |
348 | chain for registers which have values at function entry. | |
349 | ||
350 | The test above is not sufficient because the scheduler may move | |
351 | a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */ | |
352 | if (REGNO (src) >= FIRST_PSEUDO_REGISTER | |
e51712db | 353 | && (unsigned) REGNO (src) < reg_base_value_size |
eaf407a5 | 354 | && reg_base_value[REGNO (src)]) |
73774bc7 JL |
355 | return reg_base_value[REGNO (src)]; |
356 | ||
9ae8ffe7 JL |
357 | return src; |
358 | ||
359 | case MEM: | |
360 | /* Check for an argument passed in memory. Only record in the | |
361 | copying-arguments block; it is too hard to track changes | |
362 | otherwise. */ | |
363 | if (copying_arguments | |
364 | && (XEXP (src, 0) == arg_pointer_rtx | |
365 | || (GET_CODE (XEXP (src, 0)) == PLUS | |
366 | && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx))) | |
38a448ca | 367 | return gen_rtx_ADDRESS (VOIDmode, src); |
9ae8ffe7 JL |
368 | return 0; |
369 | ||
370 | case CONST: | |
371 | src = XEXP (src, 0); | |
372 | if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS) | |
373 | break; | |
374 | /* fall through */ | |
2a2c8203 | 375 | |
9ae8ffe7 JL |
376 | case PLUS: |
377 | case MINUS: | |
2a2c8203 | 378 | { |
ec907dd8 JL |
379 | rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1); |
380 | ||
381 | /* If either operand is a REG, then see if we already have | |
382 | a known value for it. */ | |
383 | if (GET_CODE (src_0) == REG) | |
384 | { | |
385 | temp = find_base_value (src_0); | |
386 | if (temp) | |
387 | src_0 = temp; | |
388 | } | |
389 | ||
390 | if (GET_CODE (src_1) == REG) | |
391 | { | |
392 | temp = find_base_value (src_1); | |
393 | if (temp) | |
394 | src_1 = temp; | |
395 | } | |
2a2c8203 JC |
396 | |
397 | /* Guess which operand is the base address. | |
398 | ||
ec907dd8 JL |
399 | If either operand is a symbol, then it is the base. If |
400 | either operand is a CONST_INT, then the other is the base. */ | |
2a2c8203 JC |
401 | |
402 | if (GET_CODE (src_1) == CONST_INT | |
403 | || GET_CODE (src_0) == SYMBOL_REF | |
404 | || GET_CODE (src_0) == LABEL_REF | |
405 | || GET_CODE (src_0) == CONST) | |
406 | return find_base_value (src_0); | |
407 | ||
ec907dd8 JL |
408 | if (GET_CODE (src_0) == CONST_INT |
409 | || GET_CODE (src_1) == SYMBOL_REF | |
410 | || GET_CODE (src_1) == LABEL_REF | |
411 | || GET_CODE (src_1) == CONST) | |
412 | return find_base_value (src_1); | |
413 | ||
414 | /* This might not be necessary anymore. | |
415 | ||
416 | If either operand is a REG that is a known pointer, then it | |
417 | is the base. */ | |
2a2c8203 JC |
418 | if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0))) |
419 | return find_base_value (src_0); | |
420 | ||
421 | if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1))) | |
422 | return find_base_value (src_1); | |
423 | ||
9ae8ffe7 | 424 | return 0; |
2a2c8203 JC |
425 | } |
426 | ||
427 | case LO_SUM: | |
428 | /* The standard form is (lo_sum reg sym) so look only at the | |
429 | second operand. */ | |
430 | return find_base_value (XEXP (src, 1)); | |
9ae8ffe7 JL |
431 | |
432 | case AND: | |
433 | /* If the second operand is constant set the base | |
434 | address to the first operand. */ | |
2a2c8203 JC |
435 | if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0) |
436 | return find_base_value (XEXP (src, 0)); | |
9ae8ffe7 JL |
437 | return 0; |
438 | ||
de12be17 JC |
439 | case ZERO_EXTEND: |
440 | case SIGN_EXTEND: /* used for NT/Alpha pointers */ | |
9ae8ffe7 | 441 | case HIGH: |
2a2c8203 | 442 | return find_base_value (XEXP (src, 0)); |
1d300e19 KG |
443 | |
444 | default: | |
445 | break; | |
9ae8ffe7 JL |
446 | } |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
451 | /* Called from init_alias_analysis indirectly through note_stores. */ | |
452 | ||
453 | /* while scanning insns to find base values, reg_seen[N] is nonzero if | |
454 | register N has been set in this function. */ | |
455 | static char *reg_seen; | |
456 | ||
13309a5f JC |
457 | /* Addresses which are known not to alias anything else are identified |
458 | by a unique integer. */ | |
ec907dd8 JL |
459 | static int unique_id; |
460 | ||
2a2c8203 JC |
461 | static void |
462 | record_set (dest, set) | |
9ae8ffe7 JL |
463 | rtx dest, set; |
464 | { | |
465 | register int regno; | |
466 | rtx src; | |
467 | ||
468 | if (GET_CODE (dest) != REG) | |
469 | return; | |
470 | ||
471 | regno = REGNO (dest); | |
472 | ||
473 | if (set) | |
474 | { | |
475 | /* A CLOBBER wipes out any old value but does not prevent a previously | |
476 | unset register from acquiring a base address (i.e. reg_seen is not | |
477 | set). */ | |
478 | if (GET_CODE (set) == CLOBBER) | |
479 | { | |
ec907dd8 | 480 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
481 | return; |
482 | } | |
483 | src = SET_SRC (set); | |
484 | } | |
485 | else | |
486 | { | |
9ae8ffe7 JL |
487 | if (reg_seen[regno]) |
488 | { | |
ec907dd8 | 489 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
490 | return; |
491 | } | |
492 | reg_seen[regno] = 1; | |
38a448ca RH |
493 | new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode, |
494 | GEN_INT (unique_id++)); | |
9ae8ffe7 JL |
495 | return; |
496 | } | |
497 | ||
498 | /* This is not the first set. If the new value is not related to the | |
499 | old value, forget the base value. Note that the following code is | |
500 | not detected: | |
501 | extern int x, y; int *p = &x; p += (&y-&x); | |
502 | ANSI C does not allow computing the difference of addresses | |
503 | of distinct top level objects. */ | |
ec907dd8 | 504 | if (new_reg_base_value[regno]) |
9ae8ffe7 JL |
505 | switch (GET_CODE (src)) |
506 | { | |
2a2c8203 | 507 | case LO_SUM: |
9ae8ffe7 JL |
508 | case PLUS: |
509 | case MINUS: | |
510 | if (XEXP (src, 0) != dest && XEXP (src, 1) != dest) | |
ec907dd8 | 511 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
512 | break; |
513 | case AND: | |
514 | if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT) | |
ec907dd8 | 515 | new_reg_base_value[regno] = 0; |
9ae8ffe7 | 516 | break; |
9ae8ffe7 | 517 | default: |
ec907dd8 | 518 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
519 | break; |
520 | } | |
521 | /* If this is the first set of a register, record the value. */ | |
522 | else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
ec907dd8 JL |
523 | && ! reg_seen[regno] && new_reg_base_value[regno] == 0) |
524 | new_reg_base_value[regno] = find_base_value (src); | |
9ae8ffe7 JL |
525 | |
526 | reg_seen[regno] = 1; | |
527 | } | |
528 | ||
529 | /* Called from loop optimization when a new pseudo-register is created. */ | |
530 | void | |
de12be17 | 531 | record_base_value (regno, val, invariant) |
9ae8ffe7 JL |
532 | int regno; |
533 | rtx val; | |
de12be17 | 534 | int invariant; |
9ae8ffe7 | 535 | { |
e51712db | 536 | if ((unsigned) regno >= reg_base_value_size) |
9ae8ffe7 | 537 | return; |
de12be17 JC |
538 | |
539 | /* If INVARIANT is true then this value also describes an invariant | |
540 | relationship which can be used to deduce that two registers with | |
541 | unknown values are different. */ | |
542 | if (invariant && alias_invariant) | |
543 | alias_invariant[regno] = val; | |
544 | ||
9ae8ffe7 JL |
545 | if (GET_CODE (val) == REG) |
546 | { | |
e51712db | 547 | if ((unsigned) REGNO (val) < reg_base_value_size) |
de12be17 JC |
548 | { |
549 | reg_base_value[regno] = reg_base_value[REGNO (val)]; | |
550 | } | |
9ae8ffe7 JL |
551 | return; |
552 | } | |
553 | reg_base_value[regno] = find_base_value (val); | |
554 | } | |
555 | ||
556 | static rtx | |
557 | canon_rtx (x) | |
558 | rtx x; | |
559 | { | |
560 | /* Recursively look for equivalences. */ | |
561 | if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
562 | && REGNO (x) < reg_known_value_size) | |
563 | return reg_known_value[REGNO (x)] == x | |
564 | ? x : canon_rtx (reg_known_value[REGNO (x)]); | |
565 | else if (GET_CODE (x) == PLUS) | |
566 | { | |
567 | rtx x0 = canon_rtx (XEXP (x, 0)); | |
568 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
569 | ||
570 | if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1)) | |
571 | { | |
572 | /* We can tolerate LO_SUMs being offset here; these | |
573 | rtl are used for nothing other than comparisons. */ | |
574 | if (GET_CODE (x0) == CONST_INT) | |
575 | return plus_constant_for_output (x1, INTVAL (x0)); | |
576 | else if (GET_CODE (x1) == CONST_INT) | |
577 | return plus_constant_for_output (x0, INTVAL (x1)); | |
38a448ca | 578 | return gen_rtx_PLUS (GET_MODE (x), x0, x1); |
9ae8ffe7 JL |
579 | } |
580 | } | |
581 | /* This gives us much better alias analysis when called from | |
582 | the loop optimizer. Note we want to leave the original | |
583 | MEM alone, but need to return the canonicalized MEM with | |
584 | all the flags with their original values. */ | |
585 | else if (GET_CODE (x) == MEM) | |
586 | { | |
587 | rtx addr = canon_rtx (XEXP (x, 0)); | |
588 | if (addr != XEXP (x, 0)) | |
589 | { | |
38a448ca | 590 | rtx new = gen_rtx_MEM (GET_MODE (x), addr); |
9ae8ffe7 JL |
591 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x); |
592 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); | |
593 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x); | |
41472af8 | 594 | MEM_ALIAS_SET (new) = MEM_ALIAS_SET (x); |
9ae8ffe7 JL |
595 | x = new; |
596 | } | |
597 | } | |
598 | return x; | |
599 | } | |
600 | ||
601 | /* Return 1 if X and Y are identical-looking rtx's. | |
602 | ||
603 | We use the data in reg_known_value above to see if two registers with | |
604 | different numbers are, in fact, equivalent. */ | |
605 | ||
606 | static int | |
607 | rtx_equal_for_memref_p (x, y) | |
608 | rtx x, y; | |
609 | { | |
610 | register int i; | |
611 | register int j; | |
612 | register enum rtx_code code; | |
613 | register char *fmt; | |
614 | ||
615 | if (x == 0 && y == 0) | |
616 | return 1; | |
617 | if (x == 0 || y == 0) | |
618 | return 0; | |
619 | x = canon_rtx (x); | |
620 | y = canon_rtx (y); | |
621 | ||
622 | if (x == y) | |
623 | return 1; | |
624 | ||
625 | code = GET_CODE (x); | |
626 | /* Rtx's of different codes cannot be equal. */ | |
627 | if (code != GET_CODE (y)) | |
628 | return 0; | |
629 | ||
630 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. | |
631 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ | |
632 | ||
633 | if (GET_MODE (x) != GET_MODE (y)) | |
634 | return 0; | |
635 | ||
636 | /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */ | |
637 | ||
638 | if (code == REG) | |
639 | return REGNO (x) == REGNO (y); | |
640 | if (code == LABEL_REF) | |
641 | return XEXP (x, 0) == XEXP (y, 0); | |
642 | if (code == SYMBOL_REF) | |
643 | return XSTR (x, 0) == XSTR (y, 0); | |
de12be17 JC |
644 | if (code == CONST_INT) |
645 | return INTVAL (x) == INTVAL (y); | |
646 | if (code == ADDRESSOF) | |
647 | return REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0)) && XINT (x, 1) == XINT (y, 1); | |
9ae8ffe7 JL |
648 | |
649 | /* For commutative operations, the RTX match if the operand match in any | |
650 | order. Also handle the simple binary and unary cases without a loop. */ | |
651 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
652 | return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
653 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))) | |
654 | || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1)) | |
655 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0)))); | |
656 | else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2') | |
657 | return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
658 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))); | |
659 | else if (GET_RTX_CLASS (code) == '1') | |
660 | return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)); | |
661 | ||
662 | /* Compare the elements. If any pair of corresponding elements | |
de12be17 JC |
663 | fail to match, return 0 for the whole things. |
664 | ||
665 | Limit cases to types which actually appear in addresses. */ | |
9ae8ffe7 JL |
666 | |
667 | fmt = GET_RTX_FORMAT (code); | |
668 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
669 | { | |
670 | switch (fmt[i]) | |
671 | { | |
9ae8ffe7 JL |
672 | case 'i': |
673 | if (XINT (x, i) != XINT (y, i)) | |
674 | return 0; | |
675 | break; | |
676 | ||
9ae8ffe7 JL |
677 | case 'E': |
678 | /* Two vectors must have the same length. */ | |
679 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
680 | return 0; | |
681 | ||
682 | /* And the corresponding elements must match. */ | |
683 | for (j = 0; j < XVECLEN (x, i); j++) | |
684 | if (rtx_equal_for_memref_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0) | |
685 | return 0; | |
686 | break; | |
687 | ||
688 | case 'e': | |
689 | if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0) | |
690 | return 0; | |
691 | break; | |
692 | ||
aee21ba9 JL |
693 | /* This can happen for an asm which clobbers memory. */ |
694 | case '0': | |
695 | break; | |
696 | ||
9ae8ffe7 JL |
697 | /* It is believed that rtx's at this level will never |
698 | contain anything but integers and other rtx's, | |
699 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
700 | default: | |
701 | abort (); | |
702 | } | |
703 | } | |
704 | return 1; | |
705 | } | |
706 | ||
707 | /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within | |
708 | X and return it, or return 0 if none found. */ | |
709 | ||
710 | static rtx | |
711 | find_symbolic_term (x) | |
712 | rtx x; | |
713 | { | |
714 | register int i; | |
715 | register enum rtx_code code; | |
716 | register char *fmt; | |
717 | ||
718 | code = GET_CODE (x); | |
719 | if (code == SYMBOL_REF || code == LABEL_REF) | |
720 | return x; | |
721 | if (GET_RTX_CLASS (code) == 'o') | |
722 | return 0; | |
723 | ||
724 | fmt = GET_RTX_FORMAT (code); | |
725 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
726 | { | |
727 | rtx t; | |
728 | ||
729 | if (fmt[i] == 'e') | |
730 | { | |
731 | t = find_symbolic_term (XEXP (x, i)); | |
732 | if (t != 0) | |
733 | return t; | |
734 | } | |
735 | else if (fmt[i] == 'E') | |
736 | break; | |
737 | } | |
738 | return 0; | |
739 | } | |
740 | ||
741 | static rtx | |
742 | find_base_term (x) | |
743 | register rtx x; | |
744 | { | |
745 | switch (GET_CODE (x)) | |
746 | { | |
747 | case REG: | |
748 | return REG_BASE_VALUE (x); | |
749 | ||
de12be17 JC |
750 | case ZERO_EXTEND: |
751 | case SIGN_EXTEND: /* Used for Alpha/NT pointers */ | |
9ae8ffe7 | 752 | case HIGH: |
6d849a2a JL |
753 | case PRE_INC: |
754 | case PRE_DEC: | |
755 | case POST_INC: | |
756 | case POST_DEC: | |
757 | return find_base_term (XEXP (x, 0)); | |
758 | ||
9ae8ffe7 JL |
759 | case CONST: |
760 | x = XEXP (x, 0); | |
761 | if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS) | |
762 | return 0; | |
763 | /* fall through */ | |
764 | case LO_SUM: | |
765 | case PLUS: | |
766 | case MINUS: | |
767 | { | |
768 | rtx tmp = find_base_term (XEXP (x, 0)); | |
769 | if (tmp) | |
770 | return tmp; | |
771 | return find_base_term (XEXP (x, 1)); | |
772 | } | |
773 | ||
774 | case AND: | |
775 | if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
776 | return REG_BASE_VALUE (XEXP (x, 0)); | |
777 | return 0; | |
778 | ||
779 | case SYMBOL_REF: | |
780 | case LABEL_REF: | |
781 | return x; | |
782 | ||
783 | default: | |
784 | return 0; | |
785 | } | |
786 | } | |
787 | ||
788 | /* Return 0 if the addresses X and Y are known to point to different | |
789 | objects, 1 if they might be pointers to the same object. */ | |
790 | ||
791 | static int | |
56ee9281 | 792 | base_alias_check (x, y, x_mode, y_mode) |
9ae8ffe7 | 793 | rtx x, y; |
56ee9281 | 794 | enum machine_mode x_mode, y_mode; |
9ae8ffe7 JL |
795 | { |
796 | rtx x_base = find_base_term (x); | |
797 | rtx y_base = find_base_term (y); | |
798 | ||
1c72c7f6 JC |
799 | /* If the address itself has no known base see if a known equivalent |
800 | value has one. If either address still has no known base, nothing | |
801 | is known about aliasing. */ | |
802 | if (x_base == 0) | |
803 | { | |
804 | rtx x_c; | |
805 | if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x) | |
806 | return 1; | |
807 | x_base = find_base_term (x_c); | |
808 | if (x_base == 0) | |
809 | return 1; | |
810 | } | |
9ae8ffe7 | 811 | |
1c72c7f6 JC |
812 | if (y_base == 0) |
813 | { | |
814 | rtx y_c; | |
815 | if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y) | |
816 | return 1; | |
817 | y_base = find_base_term (y_c); | |
818 | if (y_base == 0) | |
819 | return 1; | |
820 | } | |
821 | ||
822 | /* If the base addresses are equal nothing is known about aliasing. */ | |
823 | if (rtx_equal_p (x_base, y_base)) | |
9ae8ffe7 JL |
824 | return 1; |
825 | ||
56ee9281 RH |
826 | /* The base addresses of the read and write are different expressions. |
827 | If they are both symbols and they are not accessed via AND, there is | |
828 | no conflict. We can bring knowledge of object alignment into play | |
829 | here. For example, on alpha, "char a, b;" can alias one another, | |
830 | though "char a; long b;" cannot. */ | |
9ae8ffe7 | 831 | if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS) |
c02f035f | 832 | { |
56ee9281 RH |
833 | if (GET_CODE (x) == AND && GET_CODE (y) == AND) |
834 | return 1; | |
835 | if (GET_CODE (x) == AND | |
836 | && (GET_CODE (XEXP (x, 1)) != CONST_INT | |
837 | || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1)))) | |
838 | return 1; | |
839 | if (GET_CODE (y) == AND | |
840 | && (GET_CODE (XEXP (y, 1)) != CONST_INT | |
841 | || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1)))) | |
842 | return 1; | |
c02f035f | 843 | } |
9ae8ffe7 JL |
844 | |
845 | /* If one address is a stack reference there can be no alias: | |
846 | stack references using different base registers do not alias, | |
847 | a stack reference can not alias a parameter, and a stack reference | |
848 | can not alias a global. */ | |
849 | if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode) | |
850 | || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode)) | |
851 | return 0; | |
852 | ||
853 | if (! flag_argument_noalias) | |
854 | return 1; | |
855 | ||
856 | if (flag_argument_noalias > 1) | |
857 | return 0; | |
858 | ||
859 | /* Weak noalias assertion (arguments are distinct, but may match globals). */ | |
860 | return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode); | |
861 | } | |
862 | ||
863 | /* Return nonzero if X and Y (memory addresses) could reference the | |
864 | same location in memory. C is an offset accumulator. When | |
865 | C is nonzero, we are testing aliases between X and Y + C. | |
866 | XSIZE is the size in bytes of the X reference, | |
867 | similarly YSIZE is the size in bytes for Y. | |
868 | ||
869 | If XSIZE or YSIZE is zero, we do not know the amount of memory being | |
870 | referenced (the reference was BLKmode), so make the most pessimistic | |
871 | assumptions. | |
872 | ||
c02f035f RH |
873 | If XSIZE or YSIZE is negative, we may access memory outside the object |
874 | being referenced as a side effect. This can happen when using AND to | |
875 | align memory references, as is done on the Alpha. | |
876 | ||
9ae8ffe7 | 877 | Nice to notice that varying addresses cannot conflict with fp if no |
0211b6ab | 878 | local variables had their addresses taken, but that's too hard now. */ |
9ae8ffe7 JL |
879 | |
880 | ||
881 | static int | |
882 | memrefs_conflict_p (xsize, x, ysize, y, c) | |
883 | register rtx x, y; | |
884 | int xsize, ysize; | |
885 | HOST_WIDE_INT c; | |
886 | { | |
887 | if (GET_CODE (x) == HIGH) | |
888 | x = XEXP (x, 0); | |
889 | else if (GET_CODE (x) == LO_SUM) | |
890 | x = XEXP (x, 1); | |
891 | else | |
892 | x = canon_rtx (x); | |
893 | if (GET_CODE (y) == HIGH) | |
894 | y = XEXP (y, 0); | |
895 | else if (GET_CODE (y) == LO_SUM) | |
896 | y = XEXP (y, 1); | |
897 | else | |
898 | y = canon_rtx (y); | |
899 | ||
900 | if (rtx_equal_for_memref_p (x, y)) | |
901 | { | |
c02f035f | 902 | if (xsize <= 0 || ysize <= 0) |
9ae8ffe7 JL |
903 | return 1; |
904 | if (c >= 0 && xsize > c) | |
905 | return 1; | |
906 | if (c < 0 && ysize+c > 0) | |
907 | return 1; | |
908 | return 0; | |
909 | } | |
910 | ||
6e73e666 JC |
911 | /* This code used to check for conflicts involving stack references and |
912 | globals but the base address alias code now handles these cases. */ | |
9ae8ffe7 JL |
913 | |
914 | if (GET_CODE (x) == PLUS) | |
915 | { | |
916 | /* The fact that X is canonicalized means that this | |
917 | PLUS rtx is canonicalized. */ | |
918 | rtx x0 = XEXP (x, 0); | |
919 | rtx x1 = XEXP (x, 1); | |
920 | ||
921 | if (GET_CODE (y) == PLUS) | |
922 | { | |
923 | /* The fact that Y is canonicalized means that this | |
924 | PLUS rtx is canonicalized. */ | |
925 | rtx y0 = XEXP (y, 0); | |
926 | rtx y1 = XEXP (y, 1); | |
927 | ||
928 | if (rtx_equal_for_memref_p (x1, y1)) | |
929 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
930 | if (rtx_equal_for_memref_p (x0, y0)) | |
931 | return memrefs_conflict_p (xsize, x1, ysize, y1, c); | |
932 | if (GET_CODE (x1) == CONST_INT) | |
63be02db JM |
933 | { |
934 | if (GET_CODE (y1) == CONST_INT) | |
935 | return memrefs_conflict_p (xsize, x0, ysize, y0, | |
936 | c - INTVAL (x1) + INTVAL (y1)); | |
937 | else | |
938 | return memrefs_conflict_p (xsize, x0, ysize, y, | |
939 | c - INTVAL (x1)); | |
940 | } | |
9ae8ffe7 JL |
941 | else if (GET_CODE (y1) == CONST_INT) |
942 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
943 | ||
6e73e666 | 944 | return 1; |
9ae8ffe7 JL |
945 | } |
946 | else if (GET_CODE (x1) == CONST_INT) | |
947 | return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1)); | |
948 | } | |
949 | else if (GET_CODE (y) == PLUS) | |
950 | { | |
951 | /* The fact that Y is canonicalized means that this | |
952 | PLUS rtx is canonicalized. */ | |
953 | rtx y0 = XEXP (y, 0); | |
954 | rtx y1 = XEXP (y, 1); | |
955 | ||
956 | if (GET_CODE (y1) == CONST_INT) | |
957 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
958 | else | |
959 | return 1; | |
960 | } | |
961 | ||
962 | if (GET_CODE (x) == GET_CODE (y)) | |
963 | switch (GET_CODE (x)) | |
964 | { | |
965 | case MULT: | |
966 | { | |
967 | /* Handle cases where we expect the second operands to be the | |
968 | same, and check only whether the first operand would conflict | |
969 | or not. */ | |
970 | rtx x0, y0; | |
971 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
972 | rtx y1 = canon_rtx (XEXP (y, 1)); | |
973 | if (! rtx_equal_for_memref_p (x1, y1)) | |
974 | return 1; | |
975 | x0 = canon_rtx (XEXP (x, 0)); | |
976 | y0 = canon_rtx (XEXP (y, 0)); | |
977 | if (rtx_equal_for_memref_p (x0, y0)) | |
978 | return (xsize == 0 || ysize == 0 | |
979 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); | |
980 | ||
981 | /* Can't properly adjust our sizes. */ | |
982 | if (GET_CODE (x1) != CONST_INT) | |
983 | return 1; | |
984 | xsize /= INTVAL (x1); | |
985 | ysize /= INTVAL (x1); | |
986 | c /= INTVAL (x1); | |
987 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
988 | } | |
1d300e19 | 989 | |
de12be17 JC |
990 | case REG: |
991 | /* Are these registers known not to be equal? */ | |
992 | if (alias_invariant) | |
993 | { | |
e51712db | 994 | unsigned int r_x = REGNO (x), r_y = REGNO (y); |
de12be17 JC |
995 | rtx i_x, i_y; /* invariant relationships of X and Y */ |
996 | ||
997 | i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x]; | |
998 | i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y]; | |
999 | ||
1000 | if (i_x == 0 && i_y == 0) | |
1001 | break; | |
1002 | ||
1003 | if (! memrefs_conflict_p (xsize, i_x ? i_x : x, | |
1004 | ysize, i_y ? i_y : y, c)) | |
1005 | return 0; | |
1006 | } | |
1007 | break; | |
1008 | ||
1d300e19 KG |
1009 | default: |
1010 | break; | |
9ae8ffe7 JL |
1011 | } |
1012 | ||
1013 | /* Treat an access through an AND (e.g. a subword access on an Alpha) | |
56ee9281 RH |
1014 | as an access with indeterminate size. Assume that references |
1015 | besides AND are aligned, so if the size of the other reference is | |
1016 | at least as large as the alignment, assume no other overlap. */ | |
9ae8ffe7 | 1017 | if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT) |
56ee9281 RH |
1018 | { |
1019 | if (ysize < -INTVAL (XEXP (x, 1))) | |
1020 | xsize = -1; | |
1021 | return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c); | |
1022 | } | |
9ae8ffe7 | 1023 | if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT) |
c02f035f | 1024 | { |
56ee9281 | 1025 | /* ??? If we are indexing far enough into the array/structure, we |
c02f035f RH |
1026 | may yet be able to determine that we can not overlap. But we |
1027 | also need to that we are far enough from the end not to overlap | |
56ee9281 RH |
1028 | a following reference, so we do nothing with that for now. */ |
1029 | if (xsize < -INTVAL (XEXP (y, 1))) | |
1030 | ysize = -1; | |
1031 | return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c); | |
c02f035f | 1032 | } |
9ae8ffe7 JL |
1033 | |
1034 | if (CONSTANT_P (x)) | |
1035 | { | |
1036 | if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT) | |
1037 | { | |
1038 | c += (INTVAL (y) - INTVAL (x)); | |
c02f035f | 1039 | return (xsize <= 0 || ysize <= 0 |
9ae8ffe7 JL |
1040 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); |
1041 | } | |
1042 | ||
1043 | if (GET_CODE (x) == CONST) | |
1044 | { | |
1045 | if (GET_CODE (y) == CONST) | |
1046 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1047 | ysize, canon_rtx (XEXP (y, 0)), c); | |
1048 | else | |
1049 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1050 | ysize, y, c); | |
1051 | } | |
1052 | if (GET_CODE (y) == CONST) | |
1053 | return memrefs_conflict_p (xsize, x, ysize, | |
1054 | canon_rtx (XEXP (y, 0)), c); | |
1055 | ||
1056 | if (CONSTANT_P (y)) | |
c02f035f RH |
1057 | return (xsize < 0 || ysize < 0 |
1058 | || (rtx_equal_for_memref_p (x, y) | |
1059 | && (xsize == 0 || ysize == 0 | |
1060 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)))); | |
9ae8ffe7 JL |
1061 | |
1062 | return 1; | |
1063 | } | |
1064 | return 1; | |
1065 | } | |
1066 | ||
1067 | /* Functions to compute memory dependencies. | |
1068 | ||
1069 | Since we process the insns in execution order, we can build tables | |
1070 | to keep track of what registers are fixed (and not aliased), what registers | |
1071 | are varying in known ways, and what registers are varying in unknown | |
1072 | ways. | |
1073 | ||
1074 | If both memory references are volatile, then there must always be a | |
1075 | dependence between the two references, since their order can not be | |
1076 | changed. A volatile and non-volatile reference can be interchanged | |
1077 | though. | |
1078 | ||
fa8b6024 | 1079 | A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never |
9ae8ffe7 JL |
1080 | conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must |
1081 | allow QImode aliasing because the ANSI C standard allows character | |
1082 | pointers to alias anything. We are assuming that characters are | |
fa8b6024 JW |
1083 | always QImode here. We also must allow AND addresses, because they may |
1084 | generate accesses outside the object being referenced. This is used to | |
1085 | generate aligned addresses from unaligned addresses, for instance, the | |
1086 | alpha storeqi_unaligned pattern. */ | |
9ae8ffe7 JL |
1087 | |
1088 | /* Read dependence: X is read after read in MEM takes place. There can | |
1089 | only be a dependence here if both reads are volatile. */ | |
1090 | ||
1091 | int | |
1092 | read_dependence (mem, x) | |
1093 | rtx mem; | |
1094 | rtx x; | |
1095 | { | |
1096 | return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem); | |
1097 | } | |
1098 | ||
1099 | /* True dependence: X is read after store in MEM takes place. */ | |
1100 | ||
1101 | int | |
1102 | true_dependence (mem, mem_mode, x, varies) | |
1103 | rtx mem; | |
1104 | enum machine_mode mem_mode; | |
1105 | rtx x; | |
960b4ee6 | 1106 | int (*varies) PROTO((rtx)); |
9ae8ffe7 | 1107 | { |
6e73e666 | 1108 | register rtx x_addr, mem_addr; |
9ae8ffe7 JL |
1109 | |
1110 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1111 | return 1; | |
1112 | ||
41472af8 MM |
1113 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1114 | return 0; | |
1115 | ||
9ae8ffe7 JL |
1116 | /* If X is an unchanging read, then it can't possibly conflict with any |
1117 | non-unchanging store. It may conflict with an unchanging write though, | |
1118 | because there may be a single store to this address to initialize it. | |
1119 | Just fall through to the code below to resolve the case where we have | |
1120 | both an unchanging read and an unchanging write. This won't handle all | |
1121 | cases optimally, but the possible performance loss should be | |
1122 | negligible. */ | |
1123 | if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem)) | |
1124 | return 0; | |
1125 | ||
56ee9281 RH |
1126 | if (mem_mode == VOIDmode) |
1127 | mem_mode = GET_MODE (mem); | |
1128 | ||
1129 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x), mem_mode)) | |
1c72c7f6 JC |
1130 | return 0; |
1131 | ||
6e73e666 JC |
1132 | x_addr = canon_rtx (XEXP (x, 0)); |
1133 | mem_addr = canon_rtx (XEXP (mem, 0)); | |
1134 | ||
0211b6ab JW |
1135 | if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr, |
1136 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1137 | return 0; | |
1138 | ||
1139 | /* If both references are struct references, or both are not, nothing | |
1140 | is known about aliasing. | |
1141 | ||
1142 | If either reference is QImode or BLKmode, ANSI C permits aliasing. | |
1143 | ||
1144 | If both addresses are constant, or both are not, nothing is known | |
1145 | about aliasing. */ | |
1146 | if (MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (mem) | |
1147 | || mem_mode == QImode || mem_mode == BLKmode | |
1148 | || GET_MODE (x) == QImode || GET_MODE (x) == BLKmode | |
1149 | || GET_CODE (x_addr) == AND || GET_CODE (mem_addr) == AND | |
1150 | || varies (x_addr) == varies (mem_addr)) | |
1151 | return 1; | |
1152 | ||
1153 | /* One memory reference is to a constant address, one is not. | |
1154 | One is to a structure, the other is not. | |
1155 | ||
1156 | If either memory reference is a variable structure the other is a | |
1157 | fixed scalar and there is no aliasing. */ | |
1158 | if ((MEM_IN_STRUCT_P (mem) && varies (mem_addr)) | |
1159 | || (MEM_IN_STRUCT_P (x) && varies (x_addr))) | |
1160 | return 0; | |
1161 | ||
1162 | return 1; | |
9ae8ffe7 JL |
1163 | } |
1164 | ||
1165 | /* Anti dependence: X is written after read in MEM takes place. */ | |
1166 | ||
1167 | int | |
1168 | anti_dependence (mem, x) | |
1169 | rtx mem; | |
1170 | rtx x; | |
1171 | { | |
6e73e666 JC |
1172 | rtx x_addr, mem_addr; |
1173 | ||
9ae8ffe7 JL |
1174 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) |
1175 | return 1; | |
1176 | ||
9ae8ffe7 JL |
1177 | /* If MEM is an unchanging read, then it can't possibly conflict with |
1178 | the store to X, because there is at most one store to MEM, and it must | |
1179 | have occurred somewhere before MEM. */ | |
9ae8ffe7 JL |
1180 | if (RTX_UNCHANGING_P (mem)) |
1181 | return 0; | |
1182 | ||
56ee9281 RH |
1183 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x), |
1184 | GET_MODE (mem))) | |
1c72c7f6 JC |
1185 | return 0; |
1186 | ||
1187 | x = canon_rtx (x); | |
1188 | mem = canon_rtx (mem); | |
1189 | ||
41472af8 MM |
1190 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1191 | return 0; | |
1192 | ||
6e73e666 JC |
1193 | x_addr = XEXP (x, 0); |
1194 | mem_addr = XEXP (mem, 0); | |
1195 | ||
0211b6ab JW |
1196 | return (memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr, |
1197 | SIZE_FOR_MODE (x), x_addr, 0) | |
1198 | && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem) | |
1199 | && GET_MODE (mem) != QImode | |
1200 | && GET_CODE (mem_addr) != AND | |
1201 | && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x)) | |
1202 | && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x) | |
1203 | && GET_MODE (x) != QImode | |
1204 | && GET_CODE (x_addr) != AND | |
1205 | && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem))); | |
9ae8ffe7 JL |
1206 | } |
1207 | ||
1208 | /* Output dependence: X is written after store in MEM takes place. */ | |
1209 | ||
1210 | int | |
1211 | output_dependence (mem, x) | |
1212 | register rtx mem; | |
1213 | register rtx x; | |
1214 | { | |
1215 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1216 | return 1; | |
1217 | ||
56ee9281 RH |
1218 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x), |
1219 | GET_MODE (mem))) | |
6e73e666 JC |
1220 | return 0; |
1221 | ||
1c72c7f6 JC |
1222 | x = canon_rtx (x); |
1223 | mem = canon_rtx (mem); | |
1224 | ||
41472af8 MM |
1225 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1226 | return 0; | |
1227 | ||
0211b6ab JW |
1228 | return (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0), |
1229 | SIZE_FOR_MODE (x), XEXP (x, 0), 0) | |
1230 | && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem) | |
1231 | && GET_MODE (mem) != QImode | |
1232 | && GET_CODE (XEXP (mem, 0)) != AND | |
1233 | && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x)) | |
1234 | && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x) | |
1235 | && GET_MODE (x) != QImode | |
1236 | && GET_CODE (XEXP (x, 0)) != AND | |
1237 | && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem))); | |
9ae8ffe7 JL |
1238 | } |
1239 | ||
6e73e666 JC |
1240 | |
1241 | static HARD_REG_SET argument_registers; | |
1242 | ||
1243 | void | |
1244 | init_alias_once () | |
1245 | { | |
1246 | register int i; | |
1247 | ||
1248 | #ifndef OUTGOING_REGNO | |
1249 | #define OUTGOING_REGNO(N) N | |
1250 | #endif | |
1251 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1252 | /* Check whether this register can hold an incoming pointer | |
1253 | argument. FUNCTION_ARG_REGNO_P tests outgoing register | |
1254 | numbers, so translate if necessary due to register windows. */ | |
1255 | if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i)) | |
1256 | && HARD_REGNO_MODE_OK (i, Pmode)) | |
1257 | SET_HARD_REG_BIT (argument_registers, i); | |
3932261a MM |
1258 | |
1259 | alias_sets = splay_tree_new (&alias_set_compare, 0, 0); | |
6e73e666 JC |
1260 | } |
1261 | ||
9ae8ffe7 JL |
1262 | void |
1263 | init_alias_analysis () | |
1264 | { | |
1265 | int maxreg = max_reg_num (); | |
ea64ef27 | 1266 | int changed, pass; |
9ae8ffe7 | 1267 | register int i; |
e51712db | 1268 | register unsigned int ui; |
9ae8ffe7 | 1269 | register rtx insn; |
9ae8ffe7 JL |
1270 | |
1271 | reg_known_value_size = maxreg; | |
1272 | ||
1273 | reg_known_value | |
1274 | = (rtx *) oballoc ((maxreg - FIRST_PSEUDO_REGISTER) * sizeof (rtx)) | |
1275 | - FIRST_PSEUDO_REGISTER; | |
1276 | reg_known_equiv_p = | |
1277 | oballoc (maxreg - FIRST_PSEUDO_REGISTER) - FIRST_PSEUDO_REGISTER; | |
1278 | bzero ((char *) (reg_known_value + FIRST_PSEUDO_REGISTER), | |
1279 | (maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx)); | |
1280 | bzero (reg_known_equiv_p + FIRST_PSEUDO_REGISTER, | |
1281 | (maxreg - FIRST_PSEUDO_REGISTER) * sizeof (char)); | |
1282 | ||
6e73e666 JC |
1283 | /* Overallocate reg_base_value to allow some growth during loop |
1284 | optimization. Loop unrolling can create a large number of | |
1285 | registers. */ | |
1286 | reg_base_value_size = maxreg * 2; | |
1287 | reg_base_value = (rtx *)oballoc (reg_base_value_size * sizeof (rtx)); | |
1288 | new_reg_base_value = (rtx *)alloca (reg_base_value_size * sizeof (rtx)); | |
1289 | reg_seen = (char *)alloca (reg_base_value_size); | |
1290 | bzero ((char *) reg_base_value, reg_base_value_size * sizeof (rtx)); | |
de12be17 JC |
1291 | if (! reload_completed && flag_unroll_loops) |
1292 | { | |
1293 | alias_invariant = (rtx *)xrealloc (alias_invariant, | |
1294 | reg_base_value_size * sizeof (rtx)); | |
1295 | bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx)); | |
1296 | } | |
1297 | ||
ec907dd8 JL |
1298 | |
1299 | /* The basic idea is that each pass through this loop will use the | |
1300 | "constant" information from the previous pass to propagate alias | |
1301 | information through another level of assignments. | |
1302 | ||
1303 | This could get expensive if the assignment chains are long. Maybe | |
1304 | we should throttle the number of iterations, possibly based on | |
6e73e666 | 1305 | the optimization level or flag_expensive_optimizations. |
ec907dd8 JL |
1306 | |
1307 | We could propagate more information in the first pass by making use | |
1308 | of REG_N_SETS to determine immediately that the alias information | |
ea64ef27 JL |
1309 | for a pseudo is "constant". |
1310 | ||
1311 | A program with an uninitialized variable can cause an infinite loop | |
1312 | here. Instead of doing a full dataflow analysis to detect such problems | |
1313 | we just cap the number of iterations for the loop. | |
1314 | ||
1315 | The state of the arrays for the set chain in question does not matter | |
1316 | since the program has undefined behavior. */ | |
6e73e666 | 1317 | |
ea64ef27 | 1318 | pass = 0; |
6e73e666 | 1319 | do |
ec907dd8 JL |
1320 | { |
1321 | /* Assume nothing will change this iteration of the loop. */ | |
1322 | changed = 0; | |
1323 | ||
ec907dd8 JL |
1324 | /* We want to assign the same IDs each iteration of this loop, so |
1325 | start counting from zero each iteration of the loop. */ | |
1326 | unique_id = 0; | |
1327 | ||
1328 | /* We're at the start of the funtion each iteration through the | |
1329 | loop, so we're copying arguments. */ | |
1330 | copying_arguments = 1; | |
9ae8ffe7 | 1331 | |
6e73e666 JC |
1332 | /* Wipe the potential alias information clean for this pass. */ |
1333 | bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx)); | |
8072f69c | 1334 | |
6e73e666 JC |
1335 | /* Wipe the reg_seen array clean. */ |
1336 | bzero ((char *) reg_seen, reg_base_value_size); | |
9ae8ffe7 | 1337 | |
6e73e666 JC |
1338 | /* Mark all hard registers which may contain an address. |
1339 | The stack, frame and argument pointers may contain an address. | |
1340 | An argument register which can hold a Pmode value may contain | |
1341 | an address even if it is not in BASE_REGS. | |
8072f69c | 1342 | |
6e73e666 JC |
1343 | The address expression is VOIDmode for an argument and |
1344 | Pmode for other registers. */ | |
1345 | ||
1346 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1347 | if (TEST_HARD_REG_BIT (argument_registers, i)) | |
38a448ca RH |
1348 | new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode, |
1349 | gen_rtx_REG (Pmode, i)); | |
6e73e666 JC |
1350 | |
1351 | new_reg_base_value[STACK_POINTER_REGNUM] | |
38a448ca | 1352 | = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); |
6e73e666 | 1353 | new_reg_base_value[ARG_POINTER_REGNUM] |
38a448ca | 1354 | = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); |
6e73e666 | 1355 | new_reg_base_value[FRAME_POINTER_REGNUM] |
38a448ca | 1356 | = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); |
2a2c8203 | 1357 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6e73e666 | 1358 | new_reg_base_value[HARD_FRAME_POINTER_REGNUM] |
38a448ca | 1359 | = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); |
2a2c8203 | 1360 | #endif |
6e73e666 JC |
1361 | if (struct_value_incoming_rtx |
1362 | && GET_CODE (struct_value_incoming_rtx) == REG) | |
1363 | new_reg_base_value[REGNO (struct_value_incoming_rtx)] | |
38a448ca | 1364 | = gen_rtx_ADDRESS (Pmode, struct_value_incoming_rtx); |
6e73e666 JC |
1365 | |
1366 | if (static_chain_rtx | |
1367 | && GET_CODE (static_chain_rtx) == REG) | |
1368 | new_reg_base_value[REGNO (static_chain_rtx)] | |
38a448ca | 1369 | = gen_rtx_ADDRESS (Pmode, static_chain_rtx); |
ec907dd8 JL |
1370 | |
1371 | /* Walk the insns adding values to the new_reg_base_value array. */ | |
1372 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
9ae8ffe7 | 1373 | { |
6e73e666 | 1374 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
ec907dd8 | 1375 | { |
6e73e666 | 1376 | rtx note, set; |
ec907dd8 JL |
1377 | /* If this insn has a noalias note, process it, Otherwise, |
1378 | scan for sets. A simple set will have no side effects | |
1379 | which could change the base value of any other register. */ | |
6e73e666 | 1380 | |
ec907dd8 | 1381 | if (GET_CODE (PATTERN (insn)) == SET |
6e73e666 | 1382 | && (find_reg_note (insn, REG_NOALIAS, NULL_RTX))) |
9f8f10de | 1383 | record_set (SET_DEST (PATTERN (insn)), NULL_RTX); |
ec907dd8 JL |
1384 | else |
1385 | note_stores (PATTERN (insn), record_set); | |
6e73e666 JC |
1386 | |
1387 | set = single_set (insn); | |
1388 | ||
1389 | if (set != 0 | |
1390 | && GET_CODE (SET_DEST (set)) == REG | |
1391 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER | |
1392 | && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 | |
1393 | && REG_N_SETS (REGNO (SET_DEST (set))) == 1) | |
1394 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0) | |
1395 | && GET_CODE (XEXP (note, 0)) != EXPR_LIST) | |
1396 | { | |
1397 | int regno = REGNO (SET_DEST (set)); | |
1398 | reg_known_value[regno] = XEXP (note, 0); | |
1399 | reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV; | |
1400 | } | |
ec907dd8 JL |
1401 | } |
1402 | else if (GET_CODE (insn) == NOTE | |
1403 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) | |
1404 | copying_arguments = 0; | |
6e73e666 | 1405 | } |
ec907dd8 | 1406 | |
6e73e666 | 1407 | /* Now propagate values from new_reg_base_value to reg_base_value. */ |
e51712db | 1408 | for (ui = 0; ui < reg_base_value_size; ui++) |
6e73e666 | 1409 | { |
e51712db KG |
1410 | if (new_reg_base_value[ui] |
1411 | && new_reg_base_value[ui] != reg_base_value[ui] | |
1412 | && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui])) | |
ec907dd8 | 1413 | { |
e51712db | 1414 | reg_base_value[ui] = new_reg_base_value[ui]; |
6e73e666 | 1415 | changed = 1; |
ec907dd8 | 1416 | } |
9ae8ffe7 | 1417 | } |
9ae8ffe7 | 1418 | } |
6e73e666 | 1419 | while (changed && ++pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 JL |
1420 | |
1421 | /* Fill in the remaining entries. */ | |
1422 | for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++) | |
1423 | if (reg_known_value[i] == 0) | |
1424 | reg_known_value[i] = regno_reg_rtx[i]; | |
1425 | ||
9ae8ffe7 JL |
1426 | /* Simplify the reg_base_value array so that no register refers to |
1427 | another register, except to special registers indirectly through | |
1428 | ADDRESS expressions. | |
1429 | ||
1430 | In theory this loop can take as long as O(registers^2), but unless | |
1431 | there are very long dependency chains it will run in close to linear | |
ea64ef27 JL |
1432 | time. |
1433 | ||
1434 | This loop may not be needed any longer now that the main loop does | |
1435 | a better job at propagating alias information. */ | |
1436 | pass = 0; | |
9ae8ffe7 JL |
1437 | do |
1438 | { | |
1439 | changed = 0; | |
ea64ef27 | 1440 | pass++; |
e51712db | 1441 | for (ui = 0; ui < reg_base_value_size; ui++) |
9ae8ffe7 | 1442 | { |
e51712db | 1443 | rtx base = reg_base_value[ui]; |
9ae8ffe7 JL |
1444 | if (base && GET_CODE (base) == REG) |
1445 | { | |
e51712db KG |
1446 | unsigned int base_regno = REGNO (base); |
1447 | if (base_regno == ui) /* register set from itself */ | |
1448 | reg_base_value[ui] = 0; | |
9ae8ffe7 | 1449 | else |
e51712db | 1450 | reg_base_value[ui] = reg_base_value[base_regno]; |
9ae8ffe7 JL |
1451 | changed = 1; |
1452 | } | |
1453 | } | |
1454 | } | |
ea64ef27 | 1455 | while (changed && pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 | 1456 | |
ec907dd8 | 1457 | new_reg_base_value = 0; |
9ae8ffe7 JL |
1458 | reg_seen = 0; |
1459 | } | |
1460 | ||
1461 | void | |
1462 | end_alias_analysis () | |
1463 | { | |
1464 | reg_known_value = 0; | |
1465 | reg_base_value = 0; | |
1466 | reg_base_value_size = 0; | |
de12be17 JC |
1467 | if (alias_invariant) |
1468 | { | |
1469 | free ((char *)alias_invariant); | |
1470 | alias_invariant = 0; | |
1471 | } | |
9ae8ffe7 | 1472 | } |