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9ae8ffe7 1/* Alias analysis for GNU C
1c72c7f6 2 Copyright (C) 1997, 1998 Free Software Foundation, Inc.
9ae8ffe7
JL
3 Contributed by John Carr (jfc@mit.edu).
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#include "config.h"
670ee920 23#include "system.h"
9ae8ffe7
JL
24#include "rtl.h"
25#include "expr.h"
26#include "regs.h"
27#include "hard-reg-set.h"
28#include "flags.h"
264fac34 29#include "output.h"
2e107e9e 30#include "toplev.h"
9ae8ffe7
JL
31
32static rtx canon_rtx PROTO((rtx));
33static int rtx_equal_for_memref_p PROTO((rtx, rtx));
34static rtx find_symbolic_term PROTO((rtx));
35static int memrefs_conflict_p PROTO((int, rtx, int, rtx,
36 HOST_WIDE_INT));
70fec650
JL
37static void record_set PROTO((rtx, rtx));
38static rtx find_base_term PROTO((rtx));
56ee9281
RH
39static int base_alias_check PROTO((rtx, rtx, enum machine_mode,
40 enum machine_mode));
960b4ee6 41static rtx find_base_value PROTO((rtx));
9ae8ffe7
JL
42
43/* Set up all info needed to perform alias analysis on memory references. */
44
45#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
46
41472af8
MM
47/* Perform a basic sanity check. Namely, that there are
48 no alias sets if we're not doing strict aliasing. This helps
49 to catch bugs whereby someone uses PUT_CODE, but doesn't clear
50 MEM_ALIAS_SET, or where a MEM is allocated in some way other
51 than by the use of gen_rtx_MEM, and the MEM_ALIAS_SET is not
52 cleared. */
53#ifdef ENABLE_CHECKING
54#define CHECK_ALIAS_SETS_FOR_CONSISTENCY(MEM1, MEM2) \
55 (!flag_strict_aliasing \
56 && (MEM_ALIAS_SET (MEM1) || MEM_ALIAS_SET (MEM2)) \
57 ? (abort (), 0) : 0)
58#else
4f70758f 59#define CHECK_ALIAS_SETS_FOR_CONSISTENCY(MEM1, MEM2) ((void)0)
41472af8
MM
60#endif
61
62/* Returns nonzero if MEM1 and MEM2 do not alias because they are in
264fac34
MM
63 different alias sets. We ignore alias sets in functions making use
64 of variable arguments because the va_arg macros on some systems are
65 not legal ANSI C. */
66#define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
67 (CHECK_ALIAS_SETS_FOR_CONSISTENCY(MEM1, MEM2), \
68 MEM_ALIAS_SET (MEM1) && MEM_ALIAS_SET (MEM2) \
69 && MEM_ALIAS_SET (MEM1) != MEM_ALIAS_SET (MEM2) \
70 && !current_function_stdarg && !current_function_varargs)
41472af8 71
ea64ef27
JL
72/* Cap the number of passes we make over the insns propagating alias
73 information through set chains.
74
75 10 is a completely arbitrary choice. */
76#define MAX_ALIAS_LOOP_PASSES 10
77
9ae8ffe7
JL
78/* reg_base_value[N] gives an address to which register N is related.
79 If all sets after the first add or subtract to the current value
80 or otherwise modify it so it does not point to a different top level
81 object, reg_base_value[N] is equal to the address part of the source
2a2c8203
JC
82 of the first set.
83
84 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
85 expressions represent certain special values: function arguments and
86 the stack, frame, and argument pointers. The contents of an address
87 expression are not used (but they are descriptive for debugging);
88 only the address and mode matter. Pointer equality, not rtx_equal_p,
89 determines whether two ADDRESS expressions refer to the same base
90 address. The mode determines whether it is a function argument or
91 other special value. */
92
9ae8ffe7 93rtx *reg_base_value;
ec907dd8 94rtx *new_reg_base_value;
9ae8ffe7
JL
95unsigned int reg_base_value_size; /* size of reg_base_value array */
96#define REG_BASE_VALUE(X) \
e51712db 97 ((unsigned) REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0)
9ae8ffe7 98
de12be17
JC
99/* Vector of known invariant relationships between registers. Set in
100 loop unrolling. Indexed by register number, if nonzero the value
101 is an expression describing this register in terms of another.
102
103 The length of this array is REG_BASE_VALUE_SIZE.
104
105 Because this array contains only pseudo registers it has no effect
106 after reload. */
107static rtx *alias_invariant;
108
9ae8ffe7
JL
109/* Vector indexed by N giving the initial (unchanging) value known
110 for pseudo-register N. */
111rtx *reg_known_value;
112
113/* Indicates number of valid entries in reg_known_value. */
114static int reg_known_value_size;
115
116/* Vector recording for each reg_known_value whether it is due to a
117 REG_EQUIV note. Future passes (viz., reload) may replace the
118 pseudo with the equivalent expression and so we account for the
119 dependences that would be introduced if that happens. */
120/* ??? This is a problem only on the Convex. The REG_EQUIV notes created in
121 assign_parms mention the arg pointer, and there are explicit insns in the
122 RTL that modify the arg pointer. Thus we must ensure that such insns don't
123 get scheduled across each other because that would invalidate the REG_EQUIV
124 notes. One could argue that the REG_EQUIV notes are wrong, but solving
125 the problem in the scheduler will likely give better code, so we do it
126 here. */
127char *reg_known_equiv_p;
128
2a2c8203
JC
129/* True when scanning insns from the start of the rtl to the
130 NOTE_INSN_FUNCTION_BEG note. */
9ae8ffe7 131
9ae8ffe7
JL
132static int copying_arguments;
133
2a2c8203
JC
134/* Inside SRC, the source of a SET, find a base address. */
135
9ae8ffe7
JL
136static rtx
137find_base_value (src)
138 register rtx src;
139{
140 switch (GET_CODE (src))
141 {
142 case SYMBOL_REF:
143 case LABEL_REF:
144 return src;
145
146 case REG:
2a2c8203
JC
147 /* At the start of a function argument registers have known base
148 values which may be lost later. Returning an ADDRESS
149 expression here allows optimization based on argument values
150 even when the argument registers are used for other purposes. */
151 if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments)
ec907dd8 152 return new_reg_base_value[REGNO (src)];
73774bc7 153
eaf407a5
JL
154 /* If a pseudo has a known base value, return it. Do not do this
155 for hard regs since it can result in a circular dependency
156 chain for registers which have values at function entry.
157
158 The test above is not sufficient because the scheduler may move
159 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
160 if (REGNO (src) >= FIRST_PSEUDO_REGISTER
e51712db 161 && (unsigned) REGNO (src) < reg_base_value_size
eaf407a5 162 && reg_base_value[REGNO (src)])
73774bc7
JL
163 return reg_base_value[REGNO (src)];
164
9ae8ffe7
JL
165 return src;
166
167 case MEM:
168 /* Check for an argument passed in memory. Only record in the
169 copying-arguments block; it is too hard to track changes
170 otherwise. */
171 if (copying_arguments
172 && (XEXP (src, 0) == arg_pointer_rtx
173 || (GET_CODE (XEXP (src, 0)) == PLUS
174 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
38a448ca 175 return gen_rtx_ADDRESS (VOIDmode, src);
9ae8ffe7
JL
176 return 0;
177
178 case CONST:
179 src = XEXP (src, 0);
180 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
181 break;
182 /* fall through */
2a2c8203 183
9ae8ffe7
JL
184 case PLUS:
185 case MINUS:
2a2c8203 186 {
ec907dd8
JL
187 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
188
189 /* If either operand is a REG, then see if we already have
190 a known value for it. */
191 if (GET_CODE (src_0) == REG)
192 {
193 temp = find_base_value (src_0);
194 if (temp)
195 src_0 = temp;
196 }
197
198 if (GET_CODE (src_1) == REG)
199 {
200 temp = find_base_value (src_1);
201 if (temp)
202 src_1 = temp;
203 }
2a2c8203
JC
204
205 /* Guess which operand is the base address.
206
ec907dd8
JL
207 If either operand is a symbol, then it is the base. If
208 either operand is a CONST_INT, then the other is the base. */
2a2c8203
JC
209
210 if (GET_CODE (src_1) == CONST_INT
211 || GET_CODE (src_0) == SYMBOL_REF
212 || GET_CODE (src_0) == LABEL_REF
213 || GET_CODE (src_0) == CONST)
214 return find_base_value (src_0);
215
ec907dd8
JL
216 if (GET_CODE (src_0) == CONST_INT
217 || GET_CODE (src_1) == SYMBOL_REF
218 || GET_CODE (src_1) == LABEL_REF
219 || GET_CODE (src_1) == CONST)
220 return find_base_value (src_1);
221
222 /* This might not be necessary anymore.
223
224 If either operand is a REG that is a known pointer, then it
225 is the base. */
2a2c8203
JC
226 if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0)))
227 return find_base_value (src_0);
228
229 if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1)))
230 return find_base_value (src_1);
231
9ae8ffe7 232 return 0;
2a2c8203
JC
233 }
234
235 case LO_SUM:
236 /* The standard form is (lo_sum reg sym) so look only at the
237 second operand. */
238 return find_base_value (XEXP (src, 1));
9ae8ffe7
JL
239
240 case AND:
241 /* If the second operand is constant set the base
242 address to the first operand. */
2a2c8203
JC
243 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
244 return find_base_value (XEXP (src, 0));
9ae8ffe7
JL
245 return 0;
246
de12be17
JC
247 case ZERO_EXTEND:
248 case SIGN_EXTEND: /* used for NT/Alpha pointers */
9ae8ffe7 249 case HIGH:
2a2c8203 250 return find_base_value (XEXP (src, 0));
1d300e19
KG
251
252 default:
253 break;
9ae8ffe7
JL
254 }
255
256 return 0;
257}
258
259/* Called from init_alias_analysis indirectly through note_stores. */
260
261/* while scanning insns to find base values, reg_seen[N] is nonzero if
262 register N has been set in this function. */
263static char *reg_seen;
264
13309a5f
JC
265/* Addresses which are known not to alias anything else are identified
266 by a unique integer. */
ec907dd8
JL
267static int unique_id;
268
2a2c8203
JC
269static void
270record_set (dest, set)
9ae8ffe7
JL
271 rtx dest, set;
272{
273 register int regno;
274 rtx src;
275
276 if (GET_CODE (dest) != REG)
277 return;
278
279 regno = REGNO (dest);
280
281 if (set)
282 {
283 /* A CLOBBER wipes out any old value but does not prevent a previously
284 unset register from acquiring a base address (i.e. reg_seen is not
285 set). */
286 if (GET_CODE (set) == CLOBBER)
287 {
ec907dd8 288 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
289 return;
290 }
291 src = SET_SRC (set);
292 }
293 else
294 {
9ae8ffe7
JL
295 if (reg_seen[regno])
296 {
ec907dd8 297 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
298 return;
299 }
300 reg_seen[regno] = 1;
38a448ca
RH
301 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
302 GEN_INT (unique_id++));
9ae8ffe7
JL
303 return;
304 }
305
306 /* This is not the first set. If the new value is not related to the
307 old value, forget the base value. Note that the following code is
308 not detected:
309 extern int x, y; int *p = &x; p += (&y-&x);
310 ANSI C does not allow computing the difference of addresses
311 of distinct top level objects. */
ec907dd8 312 if (new_reg_base_value[regno])
9ae8ffe7
JL
313 switch (GET_CODE (src))
314 {
2a2c8203 315 case LO_SUM:
9ae8ffe7
JL
316 case PLUS:
317 case MINUS:
318 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
ec907dd8 319 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
320 break;
321 case AND:
322 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
ec907dd8 323 new_reg_base_value[regno] = 0;
9ae8ffe7 324 break;
9ae8ffe7 325 default:
ec907dd8 326 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
327 break;
328 }
329 /* If this is the first set of a register, record the value. */
330 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
ec907dd8
JL
331 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
332 new_reg_base_value[regno] = find_base_value (src);
9ae8ffe7
JL
333
334 reg_seen[regno] = 1;
335}
336
337/* Called from loop optimization when a new pseudo-register is created. */
338void
de12be17 339record_base_value (regno, val, invariant)
9ae8ffe7
JL
340 int regno;
341 rtx val;
de12be17 342 int invariant;
9ae8ffe7 343{
e51712db 344 if ((unsigned) regno >= reg_base_value_size)
9ae8ffe7 345 return;
de12be17
JC
346
347 /* If INVARIANT is true then this value also describes an invariant
348 relationship which can be used to deduce that two registers with
349 unknown values are different. */
350 if (invariant && alias_invariant)
351 alias_invariant[regno] = val;
352
9ae8ffe7
JL
353 if (GET_CODE (val) == REG)
354 {
e51712db 355 if ((unsigned) REGNO (val) < reg_base_value_size)
de12be17
JC
356 {
357 reg_base_value[regno] = reg_base_value[REGNO (val)];
358 }
9ae8ffe7
JL
359 return;
360 }
361 reg_base_value[regno] = find_base_value (val);
362}
363
364static rtx
365canon_rtx (x)
366 rtx x;
367{
368 /* Recursively look for equivalences. */
369 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
370 && REGNO (x) < reg_known_value_size)
371 return reg_known_value[REGNO (x)] == x
372 ? x : canon_rtx (reg_known_value[REGNO (x)]);
373 else if (GET_CODE (x) == PLUS)
374 {
375 rtx x0 = canon_rtx (XEXP (x, 0));
376 rtx x1 = canon_rtx (XEXP (x, 1));
377
378 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
379 {
380 /* We can tolerate LO_SUMs being offset here; these
381 rtl are used for nothing other than comparisons. */
382 if (GET_CODE (x0) == CONST_INT)
383 return plus_constant_for_output (x1, INTVAL (x0));
384 else if (GET_CODE (x1) == CONST_INT)
385 return plus_constant_for_output (x0, INTVAL (x1));
38a448ca 386 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
9ae8ffe7
JL
387 }
388 }
389 /* This gives us much better alias analysis when called from
390 the loop optimizer. Note we want to leave the original
391 MEM alone, but need to return the canonicalized MEM with
392 all the flags with their original values. */
393 else if (GET_CODE (x) == MEM)
394 {
395 rtx addr = canon_rtx (XEXP (x, 0));
396 if (addr != XEXP (x, 0))
397 {
38a448ca 398 rtx new = gen_rtx_MEM (GET_MODE (x), addr);
9ae8ffe7
JL
399 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
400 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
401 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
41472af8 402 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (x);
9ae8ffe7
JL
403 x = new;
404 }
405 }
406 return x;
407}
408
409/* Return 1 if X and Y are identical-looking rtx's.
410
411 We use the data in reg_known_value above to see if two registers with
412 different numbers are, in fact, equivalent. */
413
414static int
415rtx_equal_for_memref_p (x, y)
416 rtx x, y;
417{
418 register int i;
419 register int j;
420 register enum rtx_code code;
421 register char *fmt;
422
423 if (x == 0 && y == 0)
424 return 1;
425 if (x == 0 || y == 0)
426 return 0;
427 x = canon_rtx (x);
428 y = canon_rtx (y);
429
430 if (x == y)
431 return 1;
432
433 code = GET_CODE (x);
434 /* Rtx's of different codes cannot be equal. */
435 if (code != GET_CODE (y))
436 return 0;
437
438 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
439 (REG:SI x) and (REG:HI x) are NOT equivalent. */
440
441 if (GET_MODE (x) != GET_MODE (y))
442 return 0;
443
444 /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */
445
446 if (code == REG)
447 return REGNO (x) == REGNO (y);
448 if (code == LABEL_REF)
449 return XEXP (x, 0) == XEXP (y, 0);
450 if (code == SYMBOL_REF)
451 return XSTR (x, 0) == XSTR (y, 0);
de12be17
JC
452 if (code == CONST_INT)
453 return INTVAL (x) == INTVAL (y);
454 if (code == ADDRESSOF)
455 return REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0)) && XINT (x, 1) == XINT (y, 1);
9ae8ffe7
JL
456
457 /* For commutative operations, the RTX match if the operand match in any
458 order. Also handle the simple binary and unary cases without a loop. */
459 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
460 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
461 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
462 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
463 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
464 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
465 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
466 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
467 else if (GET_RTX_CLASS (code) == '1')
468 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
469
470 /* Compare the elements. If any pair of corresponding elements
de12be17
JC
471 fail to match, return 0 for the whole things.
472
473 Limit cases to types which actually appear in addresses. */
9ae8ffe7
JL
474
475 fmt = GET_RTX_FORMAT (code);
476 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
477 {
478 switch (fmt[i])
479 {
9ae8ffe7
JL
480 case 'i':
481 if (XINT (x, i) != XINT (y, i))
482 return 0;
483 break;
484
9ae8ffe7
JL
485 case 'E':
486 /* Two vectors must have the same length. */
487 if (XVECLEN (x, i) != XVECLEN (y, i))
488 return 0;
489
490 /* And the corresponding elements must match. */
491 for (j = 0; j < XVECLEN (x, i); j++)
492 if (rtx_equal_for_memref_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0)
493 return 0;
494 break;
495
496 case 'e':
497 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
498 return 0;
499 break;
500
aee21ba9
JL
501 /* This can happen for an asm which clobbers memory. */
502 case '0':
503 break;
504
9ae8ffe7
JL
505 /* It is believed that rtx's at this level will never
506 contain anything but integers and other rtx's,
507 except for within LABEL_REFs and SYMBOL_REFs. */
508 default:
509 abort ();
510 }
511 }
512 return 1;
513}
514
515/* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
516 X and return it, or return 0 if none found. */
517
518static rtx
519find_symbolic_term (x)
520 rtx x;
521{
522 register int i;
523 register enum rtx_code code;
524 register char *fmt;
525
526 code = GET_CODE (x);
527 if (code == SYMBOL_REF || code == LABEL_REF)
528 return x;
529 if (GET_RTX_CLASS (code) == 'o')
530 return 0;
531
532 fmt = GET_RTX_FORMAT (code);
533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
534 {
535 rtx t;
536
537 if (fmt[i] == 'e')
538 {
539 t = find_symbolic_term (XEXP (x, i));
540 if (t != 0)
541 return t;
542 }
543 else if (fmt[i] == 'E')
544 break;
545 }
546 return 0;
547}
548
549static rtx
550find_base_term (x)
551 register rtx x;
552{
553 switch (GET_CODE (x))
554 {
555 case REG:
556 return REG_BASE_VALUE (x);
557
de12be17
JC
558 case ZERO_EXTEND:
559 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
9ae8ffe7 560 case HIGH:
6d849a2a
JL
561 case PRE_INC:
562 case PRE_DEC:
563 case POST_INC:
564 case POST_DEC:
565 return find_base_term (XEXP (x, 0));
566
9ae8ffe7
JL
567 case CONST:
568 x = XEXP (x, 0);
569 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
570 return 0;
571 /* fall through */
572 case LO_SUM:
573 case PLUS:
574 case MINUS:
575 {
576 rtx tmp = find_base_term (XEXP (x, 0));
577 if (tmp)
578 return tmp;
579 return find_base_term (XEXP (x, 1));
580 }
581
582 case AND:
583 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
584 return REG_BASE_VALUE (XEXP (x, 0));
585 return 0;
586
587 case SYMBOL_REF:
588 case LABEL_REF:
589 return x;
590
591 default:
592 return 0;
593 }
594}
595
596/* Return 0 if the addresses X and Y are known to point to different
597 objects, 1 if they might be pointers to the same object. */
598
599static int
56ee9281 600base_alias_check (x, y, x_mode, y_mode)
9ae8ffe7 601 rtx x, y;
56ee9281 602 enum machine_mode x_mode, y_mode;
9ae8ffe7
JL
603{
604 rtx x_base = find_base_term (x);
605 rtx y_base = find_base_term (y);
606
1c72c7f6
JC
607 /* If the address itself has no known base see if a known equivalent
608 value has one. If either address still has no known base, nothing
609 is known about aliasing. */
610 if (x_base == 0)
611 {
612 rtx x_c;
613 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
614 return 1;
615 x_base = find_base_term (x_c);
616 if (x_base == 0)
617 return 1;
618 }
9ae8ffe7 619
1c72c7f6
JC
620 if (y_base == 0)
621 {
622 rtx y_c;
623 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
624 return 1;
625 y_base = find_base_term (y_c);
626 if (y_base == 0)
627 return 1;
628 }
629
630 /* If the base addresses are equal nothing is known about aliasing. */
631 if (rtx_equal_p (x_base, y_base))
9ae8ffe7
JL
632 return 1;
633
56ee9281
RH
634 /* The base addresses of the read and write are different expressions.
635 If they are both symbols and they are not accessed via AND, there is
636 no conflict. We can bring knowledge of object alignment into play
637 here. For example, on alpha, "char a, b;" can alias one another,
638 though "char a; long b;" cannot. */
9ae8ffe7 639 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
c02f035f 640 {
56ee9281
RH
641 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
642 return 1;
643 if (GET_CODE (x) == AND
644 && (GET_CODE (XEXP (x, 1)) != CONST_INT
645 || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
646 return 1;
647 if (GET_CODE (y) == AND
648 && (GET_CODE (XEXP (y, 1)) != CONST_INT
649 || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
650 return 1;
c02f035f 651 }
9ae8ffe7
JL
652
653 /* If one address is a stack reference there can be no alias:
654 stack references using different base registers do not alias,
655 a stack reference can not alias a parameter, and a stack reference
656 can not alias a global. */
657 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
658 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
659 return 0;
660
661 if (! flag_argument_noalias)
662 return 1;
663
664 if (flag_argument_noalias > 1)
665 return 0;
666
667 /* Weak noalias assertion (arguments are distinct, but may match globals). */
668 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
669}
670
671/* Return nonzero if X and Y (memory addresses) could reference the
672 same location in memory. C is an offset accumulator. When
673 C is nonzero, we are testing aliases between X and Y + C.
674 XSIZE is the size in bytes of the X reference,
675 similarly YSIZE is the size in bytes for Y.
676
677 If XSIZE or YSIZE is zero, we do not know the amount of memory being
678 referenced (the reference was BLKmode), so make the most pessimistic
679 assumptions.
680
c02f035f
RH
681 If XSIZE or YSIZE is negative, we may access memory outside the object
682 being referenced as a side effect. This can happen when using AND to
683 align memory references, as is done on the Alpha.
684
9ae8ffe7 685 Nice to notice that varying addresses cannot conflict with fp if no
0211b6ab 686 local variables had their addresses taken, but that's too hard now. */
9ae8ffe7
JL
687
688
689static int
690memrefs_conflict_p (xsize, x, ysize, y, c)
691 register rtx x, y;
692 int xsize, ysize;
693 HOST_WIDE_INT c;
694{
695 if (GET_CODE (x) == HIGH)
696 x = XEXP (x, 0);
697 else if (GET_CODE (x) == LO_SUM)
698 x = XEXP (x, 1);
699 else
700 x = canon_rtx (x);
701 if (GET_CODE (y) == HIGH)
702 y = XEXP (y, 0);
703 else if (GET_CODE (y) == LO_SUM)
704 y = XEXP (y, 1);
705 else
706 y = canon_rtx (y);
707
708 if (rtx_equal_for_memref_p (x, y))
709 {
c02f035f 710 if (xsize <= 0 || ysize <= 0)
9ae8ffe7
JL
711 return 1;
712 if (c >= 0 && xsize > c)
713 return 1;
714 if (c < 0 && ysize+c > 0)
715 return 1;
716 return 0;
717 }
718
6e73e666
JC
719 /* This code used to check for conflicts involving stack references and
720 globals but the base address alias code now handles these cases. */
9ae8ffe7
JL
721
722 if (GET_CODE (x) == PLUS)
723 {
724 /* The fact that X is canonicalized means that this
725 PLUS rtx is canonicalized. */
726 rtx x0 = XEXP (x, 0);
727 rtx x1 = XEXP (x, 1);
728
729 if (GET_CODE (y) == PLUS)
730 {
731 /* The fact that Y is canonicalized means that this
732 PLUS rtx is canonicalized. */
733 rtx y0 = XEXP (y, 0);
734 rtx y1 = XEXP (y, 1);
735
736 if (rtx_equal_for_memref_p (x1, y1))
737 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
738 if (rtx_equal_for_memref_p (x0, y0))
739 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
740 if (GET_CODE (x1) == CONST_INT)
63be02db
JM
741 {
742 if (GET_CODE (y1) == CONST_INT)
743 return memrefs_conflict_p (xsize, x0, ysize, y0,
744 c - INTVAL (x1) + INTVAL (y1));
745 else
746 return memrefs_conflict_p (xsize, x0, ysize, y,
747 c - INTVAL (x1));
748 }
9ae8ffe7
JL
749 else if (GET_CODE (y1) == CONST_INT)
750 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
751
6e73e666 752 return 1;
9ae8ffe7
JL
753 }
754 else if (GET_CODE (x1) == CONST_INT)
755 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
756 }
757 else if (GET_CODE (y) == PLUS)
758 {
759 /* The fact that Y is canonicalized means that this
760 PLUS rtx is canonicalized. */
761 rtx y0 = XEXP (y, 0);
762 rtx y1 = XEXP (y, 1);
763
764 if (GET_CODE (y1) == CONST_INT)
765 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
766 else
767 return 1;
768 }
769
770 if (GET_CODE (x) == GET_CODE (y))
771 switch (GET_CODE (x))
772 {
773 case MULT:
774 {
775 /* Handle cases where we expect the second operands to be the
776 same, and check only whether the first operand would conflict
777 or not. */
778 rtx x0, y0;
779 rtx x1 = canon_rtx (XEXP (x, 1));
780 rtx y1 = canon_rtx (XEXP (y, 1));
781 if (! rtx_equal_for_memref_p (x1, y1))
782 return 1;
783 x0 = canon_rtx (XEXP (x, 0));
784 y0 = canon_rtx (XEXP (y, 0));
785 if (rtx_equal_for_memref_p (x0, y0))
786 return (xsize == 0 || ysize == 0
787 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
788
789 /* Can't properly adjust our sizes. */
790 if (GET_CODE (x1) != CONST_INT)
791 return 1;
792 xsize /= INTVAL (x1);
793 ysize /= INTVAL (x1);
794 c /= INTVAL (x1);
795 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
796 }
1d300e19 797
de12be17
JC
798 case REG:
799 /* Are these registers known not to be equal? */
800 if (alias_invariant)
801 {
e51712db 802 unsigned int r_x = REGNO (x), r_y = REGNO (y);
de12be17
JC
803 rtx i_x, i_y; /* invariant relationships of X and Y */
804
805 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
806 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
807
808 if (i_x == 0 && i_y == 0)
809 break;
810
811 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
812 ysize, i_y ? i_y : y, c))
813 return 0;
814 }
815 break;
816
1d300e19
KG
817 default:
818 break;
9ae8ffe7
JL
819 }
820
821 /* Treat an access through an AND (e.g. a subword access on an Alpha)
56ee9281
RH
822 as an access with indeterminate size. Assume that references
823 besides AND are aligned, so if the size of the other reference is
824 at least as large as the alignment, assume no other overlap. */
9ae8ffe7 825 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
56ee9281
RH
826 {
827 if (ysize < -INTVAL (XEXP (x, 1)))
828 xsize = -1;
829 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
830 }
9ae8ffe7 831 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
c02f035f 832 {
56ee9281 833 /* ??? If we are indexing far enough into the array/structure, we
c02f035f
RH
834 may yet be able to determine that we can not overlap. But we
835 also need to that we are far enough from the end not to overlap
56ee9281
RH
836 a following reference, so we do nothing with that for now. */
837 if (xsize < -INTVAL (XEXP (y, 1)))
838 ysize = -1;
839 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
c02f035f 840 }
9ae8ffe7
JL
841
842 if (CONSTANT_P (x))
843 {
844 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
845 {
846 c += (INTVAL (y) - INTVAL (x));
c02f035f 847 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
848 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
849 }
850
851 if (GET_CODE (x) == CONST)
852 {
853 if (GET_CODE (y) == CONST)
854 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
855 ysize, canon_rtx (XEXP (y, 0)), c);
856 else
857 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
858 ysize, y, c);
859 }
860 if (GET_CODE (y) == CONST)
861 return memrefs_conflict_p (xsize, x, ysize,
862 canon_rtx (XEXP (y, 0)), c);
863
864 if (CONSTANT_P (y))
c02f035f
RH
865 return (xsize < 0 || ysize < 0
866 || (rtx_equal_for_memref_p (x, y)
867 && (xsize == 0 || ysize == 0
868 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
9ae8ffe7
JL
869
870 return 1;
871 }
872 return 1;
873}
874
875/* Functions to compute memory dependencies.
876
877 Since we process the insns in execution order, we can build tables
878 to keep track of what registers are fixed (and not aliased), what registers
879 are varying in known ways, and what registers are varying in unknown
880 ways.
881
882 If both memory references are volatile, then there must always be a
883 dependence between the two references, since their order can not be
884 changed. A volatile and non-volatile reference can be interchanged
885 though.
886
fa8b6024 887 A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never
9ae8ffe7
JL
888 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must
889 allow QImode aliasing because the ANSI C standard allows character
890 pointers to alias anything. We are assuming that characters are
fa8b6024
JW
891 always QImode here. We also must allow AND addresses, because they may
892 generate accesses outside the object being referenced. This is used to
893 generate aligned addresses from unaligned addresses, for instance, the
894 alpha storeqi_unaligned pattern. */
9ae8ffe7
JL
895
896/* Read dependence: X is read after read in MEM takes place. There can
897 only be a dependence here if both reads are volatile. */
898
899int
900read_dependence (mem, x)
901 rtx mem;
902 rtx x;
903{
904 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
905}
906
907/* True dependence: X is read after store in MEM takes place. */
908
909int
910true_dependence (mem, mem_mode, x, varies)
911 rtx mem;
912 enum machine_mode mem_mode;
913 rtx x;
960b4ee6 914 int (*varies) PROTO((rtx));
9ae8ffe7 915{
6e73e666 916 register rtx x_addr, mem_addr;
9ae8ffe7
JL
917
918 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
919 return 1;
920
41472af8
MM
921 if (DIFFERENT_ALIAS_SETS_P (x, mem))
922 return 0;
923
9ae8ffe7
JL
924 /* If X is an unchanging read, then it can't possibly conflict with any
925 non-unchanging store. It may conflict with an unchanging write though,
926 because there may be a single store to this address to initialize it.
927 Just fall through to the code below to resolve the case where we have
928 both an unchanging read and an unchanging write. This won't handle all
929 cases optimally, but the possible performance loss should be
930 negligible. */
931 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
932 return 0;
933
56ee9281
RH
934 if (mem_mode == VOIDmode)
935 mem_mode = GET_MODE (mem);
936
937 if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x), mem_mode))
1c72c7f6
JC
938 return 0;
939
6e73e666
JC
940 x_addr = canon_rtx (XEXP (x, 0));
941 mem_addr = canon_rtx (XEXP (mem, 0));
942
0211b6ab
JW
943 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
944 SIZE_FOR_MODE (x), x_addr, 0))
945 return 0;
946
947 /* If both references are struct references, or both are not, nothing
948 is known about aliasing.
949
950 If either reference is QImode or BLKmode, ANSI C permits aliasing.
951
952 If both addresses are constant, or both are not, nothing is known
953 about aliasing. */
954 if (MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (mem)
955 || mem_mode == QImode || mem_mode == BLKmode
956 || GET_MODE (x) == QImode || GET_MODE (x) == BLKmode
957 || GET_CODE (x_addr) == AND || GET_CODE (mem_addr) == AND
958 || varies (x_addr) == varies (mem_addr))
959 return 1;
960
961 /* One memory reference is to a constant address, one is not.
962 One is to a structure, the other is not.
963
964 If either memory reference is a variable structure the other is a
965 fixed scalar and there is no aliasing. */
966 if ((MEM_IN_STRUCT_P (mem) && varies (mem_addr))
967 || (MEM_IN_STRUCT_P (x) && varies (x_addr)))
968 return 0;
969
970 return 1;
9ae8ffe7
JL
971}
972
973/* Anti dependence: X is written after read in MEM takes place. */
974
975int
976anti_dependence (mem, x)
977 rtx mem;
978 rtx x;
979{
6e73e666
JC
980 rtx x_addr, mem_addr;
981
9ae8ffe7
JL
982 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
983 return 1;
984
9ae8ffe7
JL
985 /* If MEM is an unchanging read, then it can't possibly conflict with
986 the store to X, because there is at most one store to MEM, and it must
987 have occurred somewhere before MEM. */
9ae8ffe7
JL
988 if (RTX_UNCHANGING_P (mem))
989 return 0;
990
56ee9281
RH
991 if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x),
992 GET_MODE (mem)))
1c72c7f6
JC
993 return 0;
994
995 x = canon_rtx (x);
996 mem = canon_rtx (mem);
997
41472af8
MM
998 if (DIFFERENT_ALIAS_SETS_P (x, mem))
999 return 0;
1000
6e73e666
JC
1001 x_addr = XEXP (x, 0);
1002 mem_addr = XEXP (mem, 0);
1003
0211b6ab
JW
1004 return (memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
1005 SIZE_FOR_MODE (x), x_addr, 0)
1006 && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem)
1007 && GET_MODE (mem) != QImode
1008 && GET_CODE (mem_addr) != AND
1009 && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x))
1010 && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x)
1011 && GET_MODE (x) != QImode
1012 && GET_CODE (x_addr) != AND
1013 && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem)));
9ae8ffe7
JL
1014}
1015
1016/* Output dependence: X is written after store in MEM takes place. */
1017
1018int
1019output_dependence (mem, x)
1020 register rtx mem;
1021 register rtx x;
1022{
1023 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1024 return 1;
1025
56ee9281
RH
1026 if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0), GET_MODE (x),
1027 GET_MODE (mem)))
6e73e666
JC
1028 return 0;
1029
1c72c7f6
JC
1030 x = canon_rtx (x);
1031 mem = canon_rtx (mem);
1032
41472af8
MM
1033 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1034 return 0;
1035
0211b6ab
JW
1036 return (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0),
1037 SIZE_FOR_MODE (x), XEXP (x, 0), 0)
1038 && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem)
1039 && GET_MODE (mem) != QImode
1040 && GET_CODE (XEXP (mem, 0)) != AND
1041 && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x))
1042 && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x)
1043 && GET_MODE (x) != QImode
1044 && GET_CODE (XEXP (x, 0)) != AND
1045 && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem)));
9ae8ffe7
JL
1046}
1047
6e73e666
JC
1048
1049static HARD_REG_SET argument_registers;
1050
1051void
1052init_alias_once ()
1053{
1054 register int i;
1055
1056#ifndef OUTGOING_REGNO
1057#define OUTGOING_REGNO(N) N
1058#endif
1059 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1060 /* Check whether this register can hold an incoming pointer
1061 argument. FUNCTION_ARG_REGNO_P tests outgoing register
1062 numbers, so translate if necessary due to register windows. */
1063 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
1064 && HARD_REGNO_MODE_OK (i, Pmode))
1065 SET_HARD_REG_BIT (argument_registers, i);
1066}
1067
9ae8ffe7
JL
1068void
1069init_alias_analysis ()
1070{
1071 int maxreg = max_reg_num ();
ea64ef27 1072 int changed, pass;
9ae8ffe7 1073 register int i;
e51712db 1074 register unsigned int ui;
9ae8ffe7 1075 register rtx insn;
9ae8ffe7
JL
1076
1077 reg_known_value_size = maxreg;
1078
1079 reg_known_value
1080 = (rtx *) oballoc ((maxreg - FIRST_PSEUDO_REGISTER) * sizeof (rtx))
1081 - FIRST_PSEUDO_REGISTER;
1082 reg_known_equiv_p =
1083 oballoc (maxreg - FIRST_PSEUDO_REGISTER) - FIRST_PSEUDO_REGISTER;
1084 bzero ((char *) (reg_known_value + FIRST_PSEUDO_REGISTER),
1085 (maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx));
1086 bzero (reg_known_equiv_p + FIRST_PSEUDO_REGISTER,
1087 (maxreg - FIRST_PSEUDO_REGISTER) * sizeof (char));
1088
6e73e666
JC
1089 /* Overallocate reg_base_value to allow some growth during loop
1090 optimization. Loop unrolling can create a large number of
1091 registers. */
1092 reg_base_value_size = maxreg * 2;
1093 reg_base_value = (rtx *)oballoc (reg_base_value_size * sizeof (rtx));
1094 new_reg_base_value = (rtx *)alloca (reg_base_value_size * sizeof (rtx));
1095 reg_seen = (char *)alloca (reg_base_value_size);
1096 bzero ((char *) reg_base_value, reg_base_value_size * sizeof (rtx));
de12be17
JC
1097 if (! reload_completed && flag_unroll_loops)
1098 {
1099 alias_invariant = (rtx *)xrealloc (alias_invariant,
1100 reg_base_value_size * sizeof (rtx));
1101 bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx));
1102 }
1103
ec907dd8
JL
1104
1105 /* The basic idea is that each pass through this loop will use the
1106 "constant" information from the previous pass to propagate alias
1107 information through another level of assignments.
1108
1109 This could get expensive if the assignment chains are long. Maybe
1110 we should throttle the number of iterations, possibly based on
6e73e666 1111 the optimization level or flag_expensive_optimizations.
ec907dd8
JL
1112
1113 We could propagate more information in the first pass by making use
1114 of REG_N_SETS to determine immediately that the alias information
ea64ef27
JL
1115 for a pseudo is "constant".
1116
1117 A program with an uninitialized variable can cause an infinite loop
1118 here. Instead of doing a full dataflow analysis to detect such problems
1119 we just cap the number of iterations for the loop.
1120
1121 The state of the arrays for the set chain in question does not matter
1122 since the program has undefined behavior. */
6e73e666 1123
ea64ef27 1124 pass = 0;
6e73e666 1125 do
ec907dd8
JL
1126 {
1127 /* Assume nothing will change this iteration of the loop. */
1128 changed = 0;
1129
ec907dd8
JL
1130 /* We want to assign the same IDs each iteration of this loop, so
1131 start counting from zero each iteration of the loop. */
1132 unique_id = 0;
1133
1134 /* We're at the start of the funtion each iteration through the
1135 loop, so we're copying arguments. */
1136 copying_arguments = 1;
9ae8ffe7 1137
6e73e666
JC
1138 /* Wipe the potential alias information clean for this pass. */
1139 bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx));
8072f69c 1140
6e73e666
JC
1141 /* Wipe the reg_seen array clean. */
1142 bzero ((char *) reg_seen, reg_base_value_size);
9ae8ffe7 1143
6e73e666
JC
1144 /* Mark all hard registers which may contain an address.
1145 The stack, frame and argument pointers may contain an address.
1146 An argument register which can hold a Pmode value may contain
1147 an address even if it is not in BASE_REGS.
8072f69c 1148
6e73e666
JC
1149 The address expression is VOIDmode for an argument and
1150 Pmode for other registers. */
1151
1152 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1153 if (TEST_HARD_REG_BIT (argument_registers, i))
38a448ca
RH
1154 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
1155 gen_rtx_REG (Pmode, i));
6e73e666
JC
1156
1157 new_reg_base_value[STACK_POINTER_REGNUM]
38a448ca 1158 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
6e73e666 1159 new_reg_base_value[ARG_POINTER_REGNUM]
38a448ca 1160 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
6e73e666 1161 new_reg_base_value[FRAME_POINTER_REGNUM]
38a448ca 1162 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2a2c8203 1163#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6e73e666 1164 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
38a448ca 1165 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2a2c8203 1166#endif
6e73e666
JC
1167 if (struct_value_incoming_rtx
1168 && GET_CODE (struct_value_incoming_rtx) == REG)
1169 new_reg_base_value[REGNO (struct_value_incoming_rtx)]
38a448ca 1170 = gen_rtx_ADDRESS (Pmode, struct_value_incoming_rtx);
6e73e666
JC
1171
1172 if (static_chain_rtx
1173 && GET_CODE (static_chain_rtx) == REG)
1174 new_reg_base_value[REGNO (static_chain_rtx)]
38a448ca 1175 = gen_rtx_ADDRESS (Pmode, static_chain_rtx);
ec907dd8
JL
1176
1177 /* Walk the insns adding values to the new_reg_base_value array. */
1178 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9ae8ffe7 1179 {
6e73e666 1180 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
ec907dd8 1181 {
6e73e666 1182 rtx note, set;
ec907dd8
JL
1183 /* If this insn has a noalias note, process it, Otherwise,
1184 scan for sets. A simple set will have no side effects
1185 which could change the base value of any other register. */
6e73e666 1186
ec907dd8 1187 if (GET_CODE (PATTERN (insn)) == SET
6e73e666 1188 && (find_reg_note (insn, REG_NOALIAS, NULL_RTX)))
9f8f10de 1189 record_set (SET_DEST (PATTERN (insn)), NULL_RTX);
ec907dd8
JL
1190 else
1191 note_stores (PATTERN (insn), record_set);
6e73e666
JC
1192
1193 set = single_set (insn);
1194
1195 if (set != 0
1196 && GET_CODE (SET_DEST (set)) == REG
1197 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
1198 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1199 && REG_N_SETS (REGNO (SET_DEST (set))) == 1)
1200 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
1201 && GET_CODE (XEXP (note, 0)) != EXPR_LIST)
1202 {
1203 int regno = REGNO (SET_DEST (set));
1204 reg_known_value[regno] = XEXP (note, 0);
1205 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
1206 }
ec907dd8
JL
1207 }
1208 else if (GET_CODE (insn) == NOTE
1209 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
1210 copying_arguments = 0;
6e73e666 1211 }
ec907dd8 1212
6e73e666 1213 /* Now propagate values from new_reg_base_value to reg_base_value. */
e51712db 1214 for (ui = 0; ui < reg_base_value_size; ui++)
6e73e666 1215 {
e51712db
KG
1216 if (new_reg_base_value[ui]
1217 && new_reg_base_value[ui] != reg_base_value[ui]
1218 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
ec907dd8 1219 {
e51712db 1220 reg_base_value[ui] = new_reg_base_value[ui];
6e73e666 1221 changed = 1;
ec907dd8 1222 }
9ae8ffe7 1223 }
9ae8ffe7 1224 }
6e73e666 1225 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7
JL
1226
1227 /* Fill in the remaining entries. */
1228 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
1229 if (reg_known_value[i] == 0)
1230 reg_known_value[i] = regno_reg_rtx[i];
1231
9ae8ffe7
JL
1232 /* Simplify the reg_base_value array so that no register refers to
1233 another register, except to special registers indirectly through
1234 ADDRESS expressions.
1235
1236 In theory this loop can take as long as O(registers^2), but unless
1237 there are very long dependency chains it will run in close to linear
ea64ef27
JL
1238 time.
1239
1240 This loop may not be needed any longer now that the main loop does
1241 a better job at propagating alias information. */
1242 pass = 0;
9ae8ffe7
JL
1243 do
1244 {
1245 changed = 0;
ea64ef27 1246 pass++;
e51712db 1247 for (ui = 0; ui < reg_base_value_size; ui++)
9ae8ffe7 1248 {
e51712db 1249 rtx base = reg_base_value[ui];
9ae8ffe7
JL
1250 if (base && GET_CODE (base) == REG)
1251 {
e51712db
KG
1252 unsigned int base_regno = REGNO (base);
1253 if (base_regno == ui) /* register set from itself */
1254 reg_base_value[ui] = 0;
9ae8ffe7 1255 else
e51712db 1256 reg_base_value[ui] = reg_base_value[base_regno];
9ae8ffe7
JL
1257 changed = 1;
1258 }
1259 }
1260 }
ea64ef27 1261 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7 1262
ec907dd8 1263 new_reg_base_value = 0;
9ae8ffe7
JL
1264 reg_seen = 0;
1265}
1266
1267void
1268end_alias_analysis ()
1269{
1270 reg_known_value = 0;
1271 reg_base_value = 0;
1272 reg_base_value_size = 0;
de12be17
JC
1273 if (alias_invariant)
1274 {
1275 free ((char *)alias_invariant);
1276 alias_invariant = 0;
1277 }
9ae8ffe7 1278}
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