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9ae8ffe7 | 1 | /* Alias analysis for GNU C |
6e24b709 | 2 | Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. |
9ae8ffe7 JL |
3 | Contributed by John Carr (jfc@mit.edu). |
4 | ||
1322177d | 5 | This file is part of GCC. |
9ae8ffe7 | 6 | |
1322177d LB |
7 | GCC is free software; you can redistribute it and/or modify it under |
8 | the terms of the GNU General Public License as published by the Free | |
9 | Software Foundation; either version 2, or (at your option) any later | |
10 | version. | |
9ae8ffe7 | 11 | |
1322177d LB |
12 | GCC is distributed in the hope that it will be useful, but WITHOUT ANY |
13 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
15 | for more details. | |
9ae8ffe7 JL |
16 | |
17 | You should have received a copy of the GNU General Public License | |
1322177d LB |
18 | along with GCC; see the file COPYING. If not, write to the Free |
19 | Software Foundation, 59 Temple Place - Suite 330, Boston, MA | |
20 | 02111-1307, USA. */ | |
9ae8ffe7 JL |
21 | |
22 | #include "config.h" | |
670ee920 | 23 | #include "system.h" |
9ae8ffe7 | 24 | #include "rtl.h" |
7790df19 | 25 | #include "tree.h" |
6baf1cc8 | 26 | #include "tm_p.h" |
49ad7cfa | 27 | #include "function.h" |
9ae8ffe7 JL |
28 | #include "expr.h" |
29 | #include "regs.h" | |
30 | #include "hard-reg-set.h" | |
e004f2f7 | 31 | #include "basic-block.h" |
9ae8ffe7 | 32 | #include "flags.h" |
264fac34 | 33 | #include "output.h" |
2e107e9e | 34 | #include "toplev.h" |
eab5c70a | 35 | #include "cselib.h" |
3932261a | 36 | #include "splay-tree.h" |
ac606739 | 37 | #include "ggc.h" |
3932261a MM |
38 | |
39 | /* The alias sets assigned to MEMs assist the back-end in determining | |
40 | which MEMs can alias which other MEMs. In general, two MEMs in | |
ac3d9668 RK |
41 | different alias sets cannot alias each other, with one important |
42 | exception. Consider something like: | |
3932261a MM |
43 | |
44 | struct S {int i; double d; }; | |
45 | ||
46 | a store to an `S' can alias something of either type `int' or type | |
47 | `double'. (However, a store to an `int' cannot alias a `double' | |
48 | and vice versa.) We indicate this via a tree structure that looks | |
49 | like: | |
50 | struct S | |
51 | / \ | |
52 | / \ | |
53 | |/_ _\| | |
54 | int double | |
55 | ||
ac3d9668 RK |
56 | (The arrows are directed and point downwards.) |
57 | In this situation we say the alias set for `struct S' is the | |
58 | `superset' and that those for `int' and `double' are `subsets'. | |
59 | ||
3bdf5ad1 RK |
60 | To see whether two alias sets can point to the same memory, we must |
61 | see if either alias set is a subset of the other. We need not trace | |
e3aafbad | 62 | past immediate descendents, however, since we propagate all |
3bdf5ad1 | 63 | grandchildren up one level. |
3932261a MM |
64 | |
65 | Alias set zero is implicitly a superset of all other alias sets. | |
66 | However, this is no actual entry for alias set zero. It is an | |
67 | error to attempt to explicitly construct a subset of zero. */ | |
68 | ||
d4b60170 RK |
69 | typedef struct alias_set_entry |
70 | { | |
3932261a | 71 | /* The alias set number, as stored in MEM_ALIAS_SET. */ |
3bdf5ad1 | 72 | HOST_WIDE_INT alias_set; |
3932261a MM |
73 | |
74 | /* The children of the alias set. These are not just the immediate | |
e3aafbad | 75 | children, but, in fact, all descendents. So, if we have: |
3932261a MM |
76 | |
77 | struct T { struct S s; float f; } | |
78 | ||
79 | continuing our example above, the children here will be all of | |
80 | `int', `double', `float', and `struct S'. */ | |
81 | splay_tree children; | |
2bf105ab RK |
82 | |
83 | /* Nonzero if would have a child of zero: this effectively makes this | |
84 | alias set the same as alias set zero. */ | |
85 | int has_zero_child; | |
d4b60170 | 86 | } *alias_set_entry; |
9ae8ffe7 | 87 | |
3d994c6b KG |
88 | static int rtx_equal_for_memref_p PARAMS ((rtx, rtx)); |
89 | static rtx find_symbolic_term PARAMS ((rtx)); | |
a13d4ebf | 90 | rtx get_addr PARAMS ((rtx)); |
3d994c6b KG |
91 | static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx, |
92 | HOST_WIDE_INT)); | |
93 | static void record_set PARAMS ((rtx, rtx, void *)); | |
94 | static rtx find_base_term PARAMS ((rtx)); | |
95 | static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode, | |
96 | enum machine_mode)); | |
6e24b709 RK |
97 | static int handled_component_p PARAMS ((tree)); |
98 | static int can_address_p PARAMS ((tree)); | |
3d994c6b KG |
99 | static rtx find_base_value PARAMS ((rtx)); |
100 | static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx)); | |
101 | static int insert_subset_children PARAMS ((splay_tree_node, void*)); | |
3bdf5ad1 RK |
102 | static tree find_base_decl PARAMS ((tree)); |
103 | static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT)); | |
eab5c70a | 104 | static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx, |
e38fe8e0 | 105 | int (*) (rtx, int))); |
3d994c6b KG |
106 | static int aliases_everything_p PARAMS ((rtx)); |
107 | static int write_dependence_p PARAMS ((rtx, rtx, int)); | |
bf6d9fd7 | 108 | static int nonlocal_mentioned_p PARAMS ((rtx)); |
9ae8ffe7 JL |
109 | |
110 | /* Set up all info needed to perform alias analysis on memory references. */ | |
111 | ||
d4b60170 | 112 | /* Returns the size in bytes of the mode of X. */ |
9ae8ffe7 JL |
113 | #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X))) |
114 | ||
41472af8 | 115 | /* Returns nonzero if MEM1 and MEM2 do not alias because they are in |
264fac34 MM |
116 | different alias sets. We ignore alias sets in functions making use |
117 | of variable arguments because the va_arg macros on some systems are | |
118 | not legal ANSI C. */ | |
119 | #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \ | |
3932261a | 120 | mems_in_disjoint_alias_sets_p (MEM1, MEM2) |
41472af8 | 121 | |
ea64ef27 | 122 | /* Cap the number of passes we make over the insns propagating alias |
ac3d9668 | 123 | information through set chains. 10 is a completely arbitrary choice. */ |
ea64ef27 JL |
124 | #define MAX_ALIAS_LOOP_PASSES 10 |
125 | ||
9ae8ffe7 JL |
126 | /* reg_base_value[N] gives an address to which register N is related. |
127 | If all sets after the first add or subtract to the current value | |
128 | or otherwise modify it so it does not point to a different top level | |
129 | object, reg_base_value[N] is equal to the address part of the source | |
2a2c8203 JC |
130 | of the first set. |
131 | ||
132 | A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS | |
133 | expressions represent certain special values: function arguments and | |
b3b5ad95 JL |
134 | the stack, frame, and argument pointers. |
135 | ||
136 | The contents of an ADDRESS is not normally used, the mode of the | |
137 | ADDRESS determines whether the ADDRESS is a function argument or some | |
138 | other special value. Pointer equality, not rtx_equal_p, determines whether | |
139 | two ADDRESS expressions refer to the same base address. | |
140 | ||
141 | The only use of the contents of an ADDRESS is for determining if the | |
142 | current function performs nonlocal memory memory references for the | |
143 | purposes of marking the function as a constant function. */ | |
2a2c8203 | 144 | |
ac606739 GS |
145 | static rtx *reg_base_value; |
146 | static rtx *new_reg_base_value; | |
d4b60170 RK |
147 | static unsigned int reg_base_value_size; /* size of reg_base_value array */ |
148 | ||
9ae8ffe7 | 149 | #define REG_BASE_VALUE(X) \ |
fb6754f0 BS |
150 | (REGNO (X) < reg_base_value_size \ |
151 | ? reg_base_value[REGNO (X)] : 0) | |
9ae8ffe7 | 152 | |
de12be17 JC |
153 | /* Vector of known invariant relationships between registers. Set in |
154 | loop unrolling. Indexed by register number, if nonzero the value | |
155 | is an expression describing this register in terms of another. | |
156 | ||
157 | The length of this array is REG_BASE_VALUE_SIZE. | |
158 | ||
159 | Because this array contains only pseudo registers it has no effect | |
160 | after reload. */ | |
161 | static rtx *alias_invariant; | |
162 | ||
c13e8210 MM |
163 | /* Vector indexed by N giving the initial (unchanging) value known for |
164 | pseudo-register N. This array is initialized in | |
165 | init_alias_analysis, and does not change until end_alias_analysis | |
166 | is called. */ | |
9ae8ffe7 JL |
167 | rtx *reg_known_value; |
168 | ||
169 | /* Indicates number of valid entries in reg_known_value. */ | |
770ae6cc | 170 | static unsigned int reg_known_value_size; |
9ae8ffe7 JL |
171 | |
172 | /* Vector recording for each reg_known_value whether it is due to a | |
173 | REG_EQUIV note. Future passes (viz., reload) may replace the | |
174 | pseudo with the equivalent expression and so we account for the | |
ac3d9668 RK |
175 | dependences that would be introduced if that happens. |
176 | ||
177 | The REG_EQUIV notes created in assign_parms may mention the arg | |
178 | pointer, and there are explicit insns in the RTL that modify the | |
179 | arg pointer. Thus we must ensure that such insns don't get | |
180 | scheduled across each other because that would invalidate the | |
181 | REG_EQUIV notes. One could argue that the REG_EQUIV notes are | |
182 | wrong, but solving the problem in the scheduler will likely give | |
183 | better code, so we do it here. */ | |
9ae8ffe7 JL |
184 | char *reg_known_equiv_p; |
185 | ||
2a2c8203 JC |
186 | /* True when scanning insns from the start of the rtl to the |
187 | NOTE_INSN_FUNCTION_BEG note. */ | |
9ae8ffe7 JL |
188 | static int copying_arguments; |
189 | ||
3932261a | 190 | /* The splay-tree used to store the various alias set entries. */ |
3932261a | 191 | static splay_tree alias_sets; |
ac3d9668 | 192 | \f |
3932261a MM |
193 | /* Returns a pointer to the alias set entry for ALIAS_SET, if there is |
194 | such an entry, or NULL otherwise. */ | |
195 | ||
196 | static alias_set_entry | |
197 | get_alias_set_entry (alias_set) | |
3bdf5ad1 | 198 | HOST_WIDE_INT alias_set; |
3932261a | 199 | { |
d4b60170 RK |
200 | splay_tree_node sn |
201 | = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set); | |
3932261a | 202 | |
d4b60170 | 203 | return sn != 0 ? ((alias_set_entry) sn->value) : 0; |
3932261a MM |
204 | } |
205 | ||
ac3d9668 RK |
206 | /* Returns nonzero if the alias sets for MEM1 and MEM2 are such that |
207 | the two MEMs cannot alias each other. */ | |
3932261a MM |
208 | |
209 | static int | |
210 | mems_in_disjoint_alias_sets_p (mem1, mem2) | |
211 | rtx mem1; | |
212 | rtx mem2; | |
213 | { | |
3932261a MM |
214 | #ifdef ENABLE_CHECKING |
215 | /* Perform a basic sanity check. Namely, that there are no alias sets | |
216 | if we're not using strict aliasing. This helps to catch bugs | |
217 | whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or | |
218 | where a MEM is allocated in some way other than by the use of | |
219 | gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to | |
220 | use alias sets to indicate that spilled registers cannot alias each | |
221 | other, we might need to remove this check. */ | |
d4b60170 RK |
222 | if (! flag_strict_aliasing |
223 | && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0)) | |
3932261a MM |
224 | abort (); |
225 | #endif | |
226 | ||
1da68f56 RK |
227 | return ! alias_sets_conflict_p (MEM_ALIAS_SET (mem1), MEM_ALIAS_SET (mem2)); |
228 | } | |
3932261a | 229 | |
1da68f56 RK |
230 | /* Insert the NODE into the splay tree given by DATA. Used by |
231 | record_alias_subset via splay_tree_foreach. */ | |
232 | ||
233 | static int | |
234 | insert_subset_children (node, data) | |
235 | splay_tree_node node; | |
236 | void *data; | |
237 | { | |
238 | splay_tree_insert ((splay_tree) data, node->key, node->value); | |
239 | ||
240 | return 0; | |
241 | } | |
242 | ||
243 | /* Return 1 if the two specified alias sets may conflict. */ | |
244 | ||
245 | int | |
246 | alias_sets_conflict_p (set1, set2) | |
247 | HOST_WIDE_INT set1, set2; | |
248 | { | |
249 | alias_set_entry ase; | |
250 | ||
251 | /* If have no alias set information for one of the operands, we have | |
252 | to assume it can alias anything. */ | |
253 | if (set1 == 0 || set2 == 0 | |
254 | /* If the two alias sets are the same, they may alias. */ | |
255 | || set1 == set2) | |
256 | return 1; | |
3932261a | 257 | |
3bdf5ad1 | 258 | /* See if the first alias set is a subset of the second. */ |
1da68f56 | 259 | ase = get_alias_set_entry (set1); |
2bf105ab RK |
260 | if (ase != 0 |
261 | && (ase->has_zero_child | |
262 | || splay_tree_lookup (ase->children, | |
1da68f56 RK |
263 | (splay_tree_key) set2))) |
264 | return 1; | |
3932261a MM |
265 | |
266 | /* Now do the same, but with the alias sets reversed. */ | |
1da68f56 | 267 | ase = get_alias_set_entry (set2); |
2bf105ab RK |
268 | if (ase != 0 |
269 | && (ase->has_zero_child | |
270 | || splay_tree_lookup (ase->children, | |
1da68f56 RK |
271 | (splay_tree_key) set1))) |
272 | return 1; | |
3932261a | 273 | |
1da68f56 | 274 | /* The two alias sets are distinct and neither one is the |
3932261a | 275 | child of the other. Therefore, they cannot alias. */ |
1da68f56 | 276 | return 0; |
3932261a | 277 | } |
1da68f56 RK |
278 | \f |
279 | /* Return 1 if TYPE is a RECORD_TYPE, UNION_TYPE, or QUAL_UNION_TYPE and has | |
280 | has any readonly fields. If any of the fields have types that | |
281 | contain readonly fields, return true as well. */ | |
3932261a | 282 | |
1da68f56 RK |
283 | int |
284 | readonly_fields_p (type) | |
285 | tree type; | |
3932261a | 286 | { |
1da68f56 RK |
287 | tree field; |
288 | ||
289 | if (TREE_CODE (type) != RECORD_TYPE && TREE_CODE (type) != UNION_TYPE | |
290 | && TREE_CODE (type) != QUAL_UNION_TYPE) | |
291 | return 0; | |
292 | ||
293 | for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field)) | |
294 | if (TREE_CODE (field) == FIELD_DECL | |
295 | && (TREE_READONLY (field) | |
296 | || readonly_fields_p (TREE_TYPE (field)))) | |
297 | return 1; | |
3932261a MM |
298 | |
299 | return 0; | |
300 | } | |
3bdf5ad1 | 301 | \f |
1da68f56 RK |
302 | /* Return 1 if any MEM object of type T1 will always conflict (using the |
303 | dependency routines in this file) with any MEM object of type T2. | |
304 | This is used when allocating temporary storage. If T1 and/or T2 are | |
305 | NULL_TREE, it means we know nothing about the storage. */ | |
306 | ||
307 | int | |
308 | objects_must_conflict_p (t1, t2) | |
309 | tree t1, t2; | |
310 | { | |
e8ea2809 RK |
311 | /* If neither has a type specified, we don't know if they'll conflict |
312 | because we may be using them to store objects of various types, for | |
313 | example the argument and local variables areas of inlined functions. */ | |
981a4c34 | 314 | if (t1 == 0 && t2 == 0) |
e8ea2809 RK |
315 | return 0; |
316 | ||
66cce54d RH |
317 | /* If one or the other has readonly fields or is readonly, |
318 | then they may not conflict. */ | |
319 | if ((t1 != 0 && readonly_fields_p (t1)) | |
320 | || (t2 != 0 && readonly_fields_p (t2)) | |
321 | || (t1 != 0 && TYPE_READONLY (t1)) | |
322 | || (t2 != 0 && TYPE_READONLY (t2))) | |
323 | return 0; | |
324 | ||
1da68f56 RK |
325 | /* If they are the same type, they must conflict. */ |
326 | if (t1 == t2 | |
327 | /* Likewise if both are volatile. */ | |
328 | || (t1 != 0 && TYPE_VOLATILE (t1) && t2 != 0 && TYPE_VOLATILE (t2))) | |
329 | return 1; | |
330 | ||
66cce54d RH |
331 | /* If one is aggregate and the other is scalar then they may not |
332 | conflict. */ | |
333 | if ((t1 != 0 && AGGREGATE_TYPE_P (t1)) | |
334 | != (t2 != 0 && AGGREGATE_TYPE_P (t2))) | |
1da68f56 RK |
335 | return 0; |
336 | ||
ec5c56db | 337 | /* Otherwise they conflict only if the alias sets conflict. */ |
1da68f56 RK |
338 | return alias_sets_conflict_p (t1 ? get_alias_set (t1) : 0, |
339 | t2 ? get_alias_set (t2) : 0); | |
340 | } | |
341 | \f | |
3bdf5ad1 RK |
342 | /* T is an expression with pointer type. Find the DECL on which this |
343 | expression is based. (For example, in `a[i]' this would be `a'.) | |
344 | If there is no such DECL, or a unique decl cannot be determined, | |
345 | NULL_TREE is retured. */ | |
346 | ||
347 | static tree | |
348 | find_base_decl (t) | |
349 | tree t; | |
350 | { | |
351 | tree d0, d1, d2; | |
352 | ||
353 | if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t))) | |
354 | return 0; | |
355 | ||
356 | /* If this is a declaration, return it. */ | |
357 | if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd') | |
358 | return t; | |
359 | ||
360 | /* Handle general expressions. It would be nice to deal with | |
361 | COMPONENT_REFs here. If we could tell that `a' and `b' were the | |
362 | same, then `a->f' and `b->f' are also the same. */ | |
363 | switch (TREE_CODE_CLASS (TREE_CODE (t))) | |
364 | { | |
365 | case '1': | |
366 | return find_base_decl (TREE_OPERAND (t, 0)); | |
367 | ||
368 | case '2': | |
369 | /* Return 0 if found in neither or both are the same. */ | |
370 | d0 = find_base_decl (TREE_OPERAND (t, 0)); | |
371 | d1 = find_base_decl (TREE_OPERAND (t, 1)); | |
372 | if (d0 == d1) | |
373 | return d0; | |
374 | else if (d0 == 0) | |
375 | return d1; | |
376 | else if (d1 == 0) | |
377 | return d0; | |
378 | else | |
379 | return 0; | |
380 | ||
381 | case '3': | |
382 | d0 = find_base_decl (TREE_OPERAND (t, 0)); | |
383 | d1 = find_base_decl (TREE_OPERAND (t, 1)); | |
3bdf5ad1 RK |
384 | d2 = find_base_decl (TREE_OPERAND (t, 2)); |
385 | ||
386 | /* Set any nonzero values from the last, then from the first. */ | |
387 | if (d1 == 0) d1 = d2; | |
388 | if (d0 == 0) d0 = d1; | |
389 | if (d1 == 0) d1 = d0; | |
390 | if (d2 == 0) d2 = d1; | |
391 | ||
392 | /* At this point all are nonzero or all are zero. If all three are the | |
393 | same, return it. Otherwise, return zero. */ | |
394 | return (d0 == d1 && d1 == d2) ? d0 : 0; | |
395 | ||
396 | default: | |
397 | return 0; | |
398 | } | |
399 | } | |
400 | ||
6e24b709 RK |
401 | /* Return 1 if T is an expression that get_inner_reference handles. */ |
402 | ||
403 | static int | |
404 | handled_component_p (t) | |
405 | tree t; | |
406 | { | |
407 | switch (TREE_CODE (t)) | |
408 | { | |
409 | case BIT_FIELD_REF: | |
410 | case COMPONENT_REF: | |
411 | case ARRAY_REF: | |
b4e3fabb | 412 | case ARRAY_RANGE_REF: |
6e24b709 RK |
413 | case NON_LVALUE_EXPR: |
414 | return 1; | |
415 | ||
416 | case NOP_EXPR: | |
417 | case CONVERT_EXPR: | |
418 | return (TYPE_MODE (TREE_TYPE (t)) | |
419 | == TYPE_MODE (TREE_TYPE (TREE_OPERAND (t, 0)))); | |
420 | ||
421 | default: | |
422 | return 0; | |
423 | } | |
424 | } | |
425 | ||
426 | /* Return 1 if all the nested component references handled by | |
427 | get_inner_reference in T are such that we can address the object in T. */ | |
428 | ||
429 | static int | |
430 | can_address_p (t) | |
431 | tree t; | |
432 | { | |
433 | /* If we're at the end, it is vacuously addressable. */ | |
434 | if (! handled_component_p (t)) | |
435 | return 1; | |
436 | ||
437 | /* Bitfields are never addressable. */ | |
438 | else if (TREE_CODE (t) == BIT_FIELD_REF) | |
439 | return 0; | |
440 | ||
441 | else if (TREE_CODE (t) == COMPONENT_REF | |
442 | && ! DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1)) | |
443 | && can_address_p (TREE_OPERAND (t, 0))) | |
444 | return 1; | |
445 | ||
b4e3fabb | 446 | else if ((TREE_CODE (t) == ARRAY_REF || TREE_CODE (t) == ARRAY_RANGE_REF) |
6e24b709 RK |
447 | && ! TYPE_NONALIASED_COMPONENT (TREE_TYPE (TREE_OPERAND (t, 0))) |
448 | && can_address_p (TREE_OPERAND (t, 0))) | |
449 | return 1; | |
450 | ||
451 | return 0; | |
452 | } | |
453 | ||
3bdf5ad1 RK |
454 | /* Return the alias set for T, which may be either a type or an |
455 | expression. Call language-specific routine for help, if needed. */ | |
456 | ||
457 | HOST_WIDE_INT | |
458 | get_alias_set (t) | |
459 | tree t; | |
460 | { | |
f824e5c3 | 461 | tree orig_t; |
3bdf5ad1 | 462 | HOST_WIDE_INT set; |
3bdf5ad1 RK |
463 | |
464 | /* If we're not doing any alias analysis, just assume everything | |
465 | aliases everything else. Also return 0 if this or its type is | |
466 | an error. */ | |
467 | if (! flag_strict_aliasing || t == error_mark_node | |
468 | || (! TYPE_P (t) | |
469 | && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node))) | |
470 | return 0; | |
471 | ||
472 | /* We can be passed either an expression or a type. This and the | |
473 | language-specific routine may make mutually-recursive calls to | |
474 | each other to figure out what to do. At each juncture, we see if | |
475 | this is a tree that the language may need to handle specially. | |
f824e5c3 RK |
476 | First handle things that aren't types and start by removing nops |
477 | since we care only about the actual object. */ | |
478 | if (! TYPE_P (t)) | |
3bdf5ad1 | 479 | { |
f824e5c3 RK |
480 | while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR |
481 | || TREE_CODE (t) == NON_LVALUE_EXPR) | |
482 | t = TREE_OPERAND (t, 0); | |
483 | ||
484 | /* Now give the language a chance to do something but record what we | |
485 | gave it this time. */ | |
486 | orig_t = t; | |
2e761e49 | 487 | if ((set = lang_get_alias_set (t)) != -1) |
f824e5c3 RK |
488 | return set; |
489 | ||
80661759 RK |
490 | /* Now loop the same way as get_inner_reference and get the alias |
491 | set to use. Pick up the outermost object that we could have | |
492 | a pointer to. */ | |
6e24b709 RK |
493 | while (handled_component_p (t) && ! can_address_p (t)) |
494 | t = TREE_OPERAND (t, 0); | |
495 | ||
f824e5c3 RK |
496 | if (TREE_CODE (t) == INDIRECT_REF) |
497 | { | |
498 | /* Check for accesses through restrict-qualified pointers. */ | |
499 | tree decl = find_base_decl (TREE_OPERAND (t, 0)); | |
500 | ||
501 | if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl)) | |
502 | /* We use the alias set indicated in the declaration. */ | |
503 | return DECL_POINTER_ALIAS_SET (decl); | |
504 | ||
505 | /* If we have an INDIRECT_REF via a void pointer, we don't | |
506 | know anything about what that might alias. */ | |
507 | if (TREE_CODE (TREE_TYPE (t)) == VOID_TYPE) | |
508 | return 0; | |
509 | } | |
510 | ||
5755cd38 JM |
511 | /* If we've already determined the alias set for this decl, just |
512 | return it. This is necessary for C++ anonymous unions, whose | |
513 | component variables don't look like union members (boo!). */ | |
514 | if (TREE_CODE (t) == VAR_DECL | |
515 | && DECL_RTL_SET_P (t) && GET_CODE (DECL_RTL (t)) == MEM) | |
516 | return MEM_ALIAS_SET (DECL_RTL (t)); | |
517 | ||
f824e5c3 | 518 | /* Give the language another chance to do something special. */ |
2e761e49 RH |
519 | if (orig_t != t |
520 | && (set = lang_get_alias_set (t)) != -1) | |
f824e5c3 RK |
521 | return set; |
522 | ||
523 | /* Now all we care about is the type. */ | |
524 | t = TREE_TYPE (t); | |
3bdf5ad1 RK |
525 | } |
526 | ||
3bdf5ad1 RK |
527 | /* Variant qualifiers don't affect the alias set, so get the main |
528 | variant. If this is a type with a known alias set, return it. */ | |
529 | t = TYPE_MAIN_VARIANT (t); | |
530 | if (TYPE_P (t) && TYPE_ALIAS_SET_KNOWN_P (t)) | |
531 | return TYPE_ALIAS_SET (t); | |
532 | ||
533 | /* See if the language has special handling for this type. */ | |
2e761e49 | 534 | if ((set = lang_get_alias_set (t)) != -1) |
2bf105ab RK |
535 | { |
536 | /* If the alias set is now known, we are done. */ | |
537 | if (TYPE_ALIAS_SET_KNOWN_P (t)) | |
538 | return TYPE_ALIAS_SET (t); | |
539 | } | |
540 | ||
3bdf5ad1 RK |
541 | /* There are no objects of FUNCTION_TYPE, so there's no point in |
542 | using up an alias set for them. (There are, of course, pointers | |
543 | and references to functions, but that's different.) */ | |
544 | else if (TREE_CODE (t) == FUNCTION_TYPE) | |
545 | set = 0; | |
546 | else | |
547 | /* Otherwise make a new alias set for this type. */ | |
548 | set = new_alias_set (); | |
549 | ||
550 | TYPE_ALIAS_SET (t) = set; | |
2bf105ab RK |
551 | |
552 | /* If this is an aggregate type, we must record any component aliasing | |
553 | information. */ | |
1d79fd2c | 554 | if (AGGREGATE_TYPE_P (t) || TREE_CODE (t) == COMPLEX_TYPE) |
2bf105ab RK |
555 | record_component_aliases (t); |
556 | ||
3bdf5ad1 RK |
557 | return set; |
558 | } | |
559 | ||
560 | /* Return a brand-new alias set. */ | |
561 | ||
562 | HOST_WIDE_INT | |
563 | new_alias_set () | |
564 | { | |
565 | static HOST_WIDE_INT last_alias_set; | |
566 | ||
567 | if (flag_strict_aliasing) | |
568 | return ++last_alias_set; | |
569 | else | |
570 | return 0; | |
571 | } | |
3932261a MM |
572 | |
573 | /* Indicate that things in SUBSET can alias things in SUPERSET, but | |
574 | not vice versa. For example, in C, a store to an `int' can alias a | |
575 | structure containing an `int', but not vice versa. Here, the | |
576 | structure would be the SUPERSET and `int' the SUBSET. This | |
a0c33338 | 577 | function should be called only once per SUPERSET/SUBSET pair. |
3932261a MM |
578 | |
579 | It is illegal for SUPERSET to be zero; everything is implicitly a | |
580 | subset of alias set zero. */ | |
581 | ||
582 | void | |
583 | record_alias_subset (superset, subset) | |
3bdf5ad1 RK |
584 | HOST_WIDE_INT superset; |
585 | HOST_WIDE_INT subset; | |
3932261a MM |
586 | { |
587 | alias_set_entry superset_entry; | |
588 | alias_set_entry subset_entry; | |
589 | ||
590 | if (superset == 0) | |
591 | abort (); | |
592 | ||
593 | superset_entry = get_alias_set_entry (superset); | |
d4b60170 | 594 | if (superset_entry == 0) |
3932261a MM |
595 | { |
596 | /* Create an entry for the SUPERSET, so that we have a place to | |
597 | attach the SUBSET. */ | |
d4b60170 RK |
598 | superset_entry |
599 | = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry)); | |
3932261a MM |
600 | superset_entry->alias_set = superset; |
601 | superset_entry->children | |
30f72379 | 602 | = splay_tree_new (splay_tree_compare_ints, 0, 0); |
570eb5c8 | 603 | superset_entry->has_zero_child = 0; |
d4b60170 | 604 | splay_tree_insert (alias_sets, (splay_tree_key) superset, |
3932261a | 605 | (splay_tree_value) superset_entry); |
3932261a MM |
606 | } |
607 | ||
2bf105ab RK |
608 | if (subset == 0) |
609 | superset_entry->has_zero_child = 1; | |
610 | else | |
611 | { | |
612 | subset_entry = get_alias_set_entry (subset); | |
613 | /* If there is an entry for the subset, enter all of its children | |
614 | (if they are not already present) as children of the SUPERSET. */ | |
615 | if (subset_entry) | |
616 | { | |
617 | if (subset_entry->has_zero_child) | |
618 | superset_entry->has_zero_child = 1; | |
d4b60170 | 619 | |
2bf105ab RK |
620 | splay_tree_foreach (subset_entry->children, insert_subset_children, |
621 | superset_entry->children); | |
622 | } | |
3932261a | 623 | |
2bf105ab RK |
624 | /* Enter the SUBSET itself as a child of the SUPERSET. */ |
625 | splay_tree_insert (superset_entry->children, | |
626 | (splay_tree_key) subset, 0); | |
627 | } | |
3932261a MM |
628 | } |
629 | ||
a0c33338 RK |
630 | /* Record that component types of TYPE, if any, are part of that type for |
631 | aliasing purposes. For record types, we only record component types | |
632 | for fields that are marked addressable. For array types, we always | |
633 | record the component types, so the front end should not call this | |
634 | function if the individual component aren't addressable. */ | |
635 | ||
636 | void | |
637 | record_component_aliases (type) | |
638 | tree type; | |
639 | { | |
3bdf5ad1 | 640 | HOST_WIDE_INT superset = get_alias_set (type); |
a0c33338 RK |
641 | tree field; |
642 | ||
643 | if (superset == 0) | |
644 | return; | |
645 | ||
646 | switch (TREE_CODE (type)) | |
647 | { | |
648 | case ARRAY_TYPE: | |
2bf105ab RK |
649 | if (! TYPE_NONALIASED_COMPONENT (type)) |
650 | record_alias_subset (superset, get_alias_set (TREE_TYPE (type))); | |
a0c33338 RK |
651 | break; |
652 | ||
653 | case RECORD_TYPE: | |
654 | case UNION_TYPE: | |
655 | case QUAL_UNION_TYPE: | |
656 | for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field)) | |
b16a49a1 | 657 | if (TREE_CODE (field) == FIELD_DECL && ! DECL_NONADDRESSABLE_P (field)) |
2bf105ab | 658 | record_alias_subset (superset, get_alias_set (TREE_TYPE (field))); |
a0c33338 RK |
659 | break; |
660 | ||
1d79fd2c JW |
661 | case COMPLEX_TYPE: |
662 | record_alias_subset (superset, get_alias_set (TREE_TYPE (type))); | |
663 | break; | |
664 | ||
a0c33338 RK |
665 | default: |
666 | break; | |
667 | } | |
668 | } | |
669 | ||
3bdf5ad1 RK |
670 | /* Allocate an alias set for use in storing and reading from the varargs |
671 | spill area. */ | |
672 | ||
673 | HOST_WIDE_INT | |
674 | get_varargs_alias_set () | |
675 | { | |
676 | static HOST_WIDE_INT set = -1; | |
677 | ||
678 | if (set == -1) | |
679 | set = new_alias_set (); | |
680 | ||
681 | return set; | |
682 | } | |
683 | ||
684 | /* Likewise, but used for the fixed portions of the frame, e.g., register | |
685 | save areas. */ | |
686 | ||
687 | HOST_WIDE_INT | |
688 | get_frame_alias_set () | |
689 | { | |
690 | static HOST_WIDE_INT set = -1; | |
691 | ||
692 | if (set == -1) | |
693 | set = new_alias_set (); | |
694 | ||
695 | return set; | |
696 | } | |
697 | ||
2a2c8203 JC |
698 | /* Inside SRC, the source of a SET, find a base address. */ |
699 | ||
9ae8ffe7 JL |
700 | static rtx |
701 | find_base_value (src) | |
702 | register rtx src; | |
703 | { | |
713f41f9 | 704 | unsigned int regno; |
9ae8ffe7 JL |
705 | switch (GET_CODE (src)) |
706 | { | |
707 | case SYMBOL_REF: | |
708 | case LABEL_REF: | |
709 | return src; | |
710 | ||
711 | case REG: | |
fb6754f0 | 712 | regno = REGNO (src); |
d4b60170 | 713 | /* At the start of a function, argument registers have known base |
2a2c8203 JC |
714 | values which may be lost later. Returning an ADDRESS |
715 | expression here allows optimization based on argument values | |
716 | even when the argument registers are used for other purposes. */ | |
713f41f9 BS |
717 | if (regno < FIRST_PSEUDO_REGISTER && copying_arguments) |
718 | return new_reg_base_value[regno]; | |
73774bc7 | 719 | |
eaf407a5 JL |
720 | /* If a pseudo has a known base value, return it. Do not do this |
721 | for hard regs since it can result in a circular dependency | |
722 | chain for registers which have values at function entry. | |
723 | ||
724 | The test above is not sufficient because the scheduler may move | |
725 | a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */ | |
713f41f9 BS |
726 | if (regno >= FIRST_PSEUDO_REGISTER |
727 | && regno < reg_base_value_size | |
728 | && reg_base_value[regno]) | |
729 | return reg_base_value[regno]; | |
73774bc7 | 730 | |
9ae8ffe7 JL |
731 | return src; |
732 | ||
733 | case MEM: | |
734 | /* Check for an argument passed in memory. Only record in the | |
735 | copying-arguments block; it is too hard to track changes | |
736 | otherwise. */ | |
737 | if (copying_arguments | |
738 | && (XEXP (src, 0) == arg_pointer_rtx | |
739 | || (GET_CODE (XEXP (src, 0)) == PLUS | |
740 | && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx))) | |
38a448ca | 741 | return gen_rtx_ADDRESS (VOIDmode, src); |
9ae8ffe7 JL |
742 | return 0; |
743 | ||
744 | case CONST: | |
745 | src = XEXP (src, 0); | |
746 | if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS) | |
747 | break; | |
d4b60170 | 748 | |
ec5c56db | 749 | /* ... fall through ... */ |
2a2c8203 | 750 | |
9ae8ffe7 JL |
751 | case PLUS: |
752 | case MINUS: | |
2a2c8203 | 753 | { |
ec907dd8 JL |
754 | rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1); |
755 | ||
756 | /* If either operand is a REG, then see if we already have | |
757 | a known value for it. */ | |
758 | if (GET_CODE (src_0) == REG) | |
759 | { | |
760 | temp = find_base_value (src_0); | |
d4b60170 | 761 | if (temp != 0) |
ec907dd8 JL |
762 | src_0 = temp; |
763 | } | |
764 | ||
765 | if (GET_CODE (src_1) == REG) | |
766 | { | |
767 | temp = find_base_value (src_1); | |
d4b60170 | 768 | if (temp!= 0) |
ec907dd8 JL |
769 | src_1 = temp; |
770 | } | |
2a2c8203 | 771 | |
d4b60170 | 772 | /* Guess which operand is the base address: |
ec907dd8 JL |
773 | If either operand is a symbol, then it is the base. If |
774 | either operand is a CONST_INT, then the other is the base. */ | |
d4b60170 | 775 | if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0)) |
2a2c8203 | 776 | return find_base_value (src_0); |
d4b60170 | 777 | else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1)) |
ec907dd8 JL |
778 | return find_base_value (src_1); |
779 | ||
d4b60170 | 780 | /* This might not be necessary anymore: |
ec907dd8 JL |
781 | If either operand is a REG that is a known pointer, then it |
782 | is the base. */ | |
3502dc9c | 783 | else if (GET_CODE (src_0) == REG && REG_POINTER (src_0)) |
2a2c8203 | 784 | return find_base_value (src_0); |
3502dc9c | 785 | else if (GET_CODE (src_1) == REG && REG_POINTER (src_1)) |
2a2c8203 JC |
786 | return find_base_value (src_1); |
787 | ||
9ae8ffe7 | 788 | return 0; |
2a2c8203 JC |
789 | } |
790 | ||
791 | case LO_SUM: | |
792 | /* The standard form is (lo_sum reg sym) so look only at the | |
793 | second operand. */ | |
794 | return find_base_value (XEXP (src, 1)); | |
9ae8ffe7 JL |
795 | |
796 | case AND: | |
797 | /* If the second operand is constant set the base | |
ec5c56db | 798 | address to the first operand. */ |
2a2c8203 JC |
799 | if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0) |
800 | return find_base_value (XEXP (src, 0)); | |
9ae8ffe7 JL |
801 | return 0; |
802 | ||
61f0131c R |
803 | case TRUNCATE: |
804 | if (GET_MODE_SIZE (GET_MODE (src)) < GET_MODE_SIZE (Pmode)) | |
805 | break; | |
806 | /* Fall through. */ | |
de12be17 JC |
807 | case ZERO_EXTEND: |
808 | case SIGN_EXTEND: /* used for NT/Alpha pointers */ | |
9ae8ffe7 | 809 | case HIGH: |
2a2c8203 | 810 | return find_base_value (XEXP (src, 0)); |
1d300e19 KG |
811 | |
812 | default: | |
813 | break; | |
9ae8ffe7 JL |
814 | } |
815 | ||
816 | return 0; | |
817 | } | |
818 | ||
819 | /* Called from init_alias_analysis indirectly through note_stores. */ | |
820 | ||
d4b60170 | 821 | /* While scanning insns to find base values, reg_seen[N] is nonzero if |
9ae8ffe7 JL |
822 | register N has been set in this function. */ |
823 | static char *reg_seen; | |
824 | ||
13309a5f JC |
825 | /* Addresses which are known not to alias anything else are identified |
826 | by a unique integer. */ | |
ec907dd8 JL |
827 | static int unique_id; |
828 | ||
2a2c8203 | 829 | static void |
84832317 | 830 | record_set (dest, set, data) |
9ae8ffe7 | 831 | rtx dest, set; |
84832317 | 832 | void *data ATTRIBUTE_UNUSED; |
9ae8ffe7 | 833 | { |
ac606739 | 834 | register unsigned regno; |
9ae8ffe7 JL |
835 | rtx src; |
836 | ||
837 | if (GET_CODE (dest) != REG) | |
838 | return; | |
839 | ||
fb6754f0 | 840 | regno = REGNO (dest); |
9ae8ffe7 | 841 | |
ac606739 GS |
842 | if (regno >= reg_base_value_size) |
843 | abort (); | |
844 | ||
9ae8ffe7 JL |
845 | if (set) |
846 | { | |
847 | /* A CLOBBER wipes out any old value but does not prevent a previously | |
848 | unset register from acquiring a base address (i.e. reg_seen is not | |
849 | set). */ | |
850 | if (GET_CODE (set) == CLOBBER) | |
851 | { | |
ec907dd8 | 852 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
853 | return; |
854 | } | |
855 | src = SET_SRC (set); | |
856 | } | |
857 | else | |
858 | { | |
9ae8ffe7 JL |
859 | if (reg_seen[regno]) |
860 | { | |
ec907dd8 | 861 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
862 | return; |
863 | } | |
864 | reg_seen[regno] = 1; | |
38a448ca RH |
865 | new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode, |
866 | GEN_INT (unique_id++)); | |
9ae8ffe7 JL |
867 | return; |
868 | } | |
869 | ||
870 | /* This is not the first set. If the new value is not related to the | |
871 | old value, forget the base value. Note that the following code is | |
872 | not detected: | |
873 | extern int x, y; int *p = &x; p += (&y-&x); | |
874 | ANSI C does not allow computing the difference of addresses | |
875 | of distinct top level objects. */ | |
ec907dd8 | 876 | if (new_reg_base_value[regno]) |
9ae8ffe7 JL |
877 | switch (GET_CODE (src)) |
878 | { | |
2a2c8203 | 879 | case LO_SUM: |
9ae8ffe7 JL |
880 | case MINUS: |
881 | if (XEXP (src, 0) != dest && XEXP (src, 1) != dest) | |
ec907dd8 | 882 | new_reg_base_value[regno] = 0; |
9ae8ffe7 | 883 | break; |
61f0131c R |
884 | case PLUS: |
885 | /* If the value we add in the PLUS is also a valid base value, | |
886 | this might be the actual base value, and the original value | |
887 | an index. */ | |
888 | { | |
889 | rtx other = NULL_RTX; | |
890 | ||
891 | if (XEXP (src, 0) == dest) | |
892 | other = XEXP (src, 1); | |
893 | else if (XEXP (src, 1) == dest) | |
894 | other = XEXP (src, 0); | |
895 | ||
896 | if (! other || find_base_value (other)) | |
897 | new_reg_base_value[regno] = 0; | |
898 | break; | |
899 | } | |
9ae8ffe7 JL |
900 | case AND: |
901 | if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT) | |
ec907dd8 | 902 | new_reg_base_value[regno] = 0; |
9ae8ffe7 | 903 | break; |
9ae8ffe7 | 904 | default: |
ec907dd8 | 905 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
906 | break; |
907 | } | |
908 | /* If this is the first set of a register, record the value. */ | |
909 | else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
ec907dd8 JL |
910 | && ! reg_seen[regno] && new_reg_base_value[regno] == 0) |
911 | new_reg_base_value[regno] = find_base_value (src); | |
9ae8ffe7 JL |
912 | |
913 | reg_seen[regno] = 1; | |
914 | } | |
915 | ||
ac3d9668 RK |
916 | /* Called from loop optimization when a new pseudo-register is |
917 | created. It indicates that REGNO is being set to VAL. f INVARIANT | |
918 | is true then this value also describes an invariant relationship | |
919 | which can be used to deduce that two registers with unknown values | |
920 | are different. */ | |
d4b60170 | 921 | |
9ae8ffe7 | 922 | void |
de12be17 | 923 | record_base_value (regno, val, invariant) |
ac3d9668 | 924 | unsigned int regno; |
9ae8ffe7 | 925 | rtx val; |
de12be17 | 926 | int invariant; |
9ae8ffe7 | 927 | { |
ac3d9668 | 928 | if (regno >= reg_base_value_size) |
9ae8ffe7 | 929 | return; |
de12be17 | 930 | |
de12be17 JC |
931 | if (invariant && alias_invariant) |
932 | alias_invariant[regno] = val; | |
933 | ||
9ae8ffe7 JL |
934 | if (GET_CODE (val) == REG) |
935 | { | |
fb6754f0 BS |
936 | if (REGNO (val) < reg_base_value_size) |
937 | reg_base_value[regno] = reg_base_value[REGNO (val)]; | |
d4b60170 | 938 | |
9ae8ffe7 JL |
939 | return; |
940 | } | |
d4b60170 | 941 | |
9ae8ffe7 JL |
942 | reg_base_value[regno] = find_base_value (val); |
943 | } | |
944 | ||
43fe47ca JW |
945 | /* Clear alias info for a register. This is used if an RTL transformation |
946 | changes the value of a register. This is used in flow by AUTO_INC_DEC | |
947 | optimizations. We don't need to clear reg_base_value, since flow only | |
948 | changes the offset. */ | |
949 | ||
950 | void | |
5197bd50 RK |
951 | clear_reg_alias_info (reg) |
952 | rtx reg; | |
43fe47ca | 953 | { |
4e1a4144 JW |
954 | unsigned int regno = REGNO (reg); |
955 | ||
956 | if (regno < reg_known_value_size && regno >= FIRST_PSEUDO_REGISTER) | |
957 | reg_known_value[regno] = reg; | |
43fe47ca JW |
958 | } |
959 | ||
db048faf MM |
960 | /* Returns a canonical version of X, from the point of view alias |
961 | analysis. (For example, if X is a MEM whose address is a register, | |
962 | and the register has a known value (say a SYMBOL_REF), then a MEM | |
963 | whose address is the SYMBOL_REF is returned.) */ | |
964 | ||
965 | rtx | |
9ae8ffe7 JL |
966 | canon_rtx (x) |
967 | rtx x; | |
968 | { | |
969 | /* Recursively look for equivalences. */ | |
fb6754f0 BS |
970 | if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER |
971 | && REGNO (x) < reg_known_value_size) | |
972 | return reg_known_value[REGNO (x)] == x | |
973 | ? x : canon_rtx (reg_known_value[REGNO (x)]); | |
9ae8ffe7 JL |
974 | else if (GET_CODE (x) == PLUS) |
975 | { | |
976 | rtx x0 = canon_rtx (XEXP (x, 0)); | |
977 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
978 | ||
979 | if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1)) | |
980 | { | |
9ae8ffe7 | 981 | if (GET_CODE (x0) == CONST_INT) |
ed8908e7 | 982 | return plus_constant (x1, INTVAL (x0)); |
9ae8ffe7 | 983 | else if (GET_CODE (x1) == CONST_INT) |
ed8908e7 | 984 | return plus_constant (x0, INTVAL (x1)); |
38a448ca | 985 | return gen_rtx_PLUS (GET_MODE (x), x0, x1); |
9ae8ffe7 JL |
986 | } |
987 | } | |
d4b60170 | 988 | |
9ae8ffe7 JL |
989 | /* This gives us much better alias analysis when called from |
990 | the loop optimizer. Note we want to leave the original | |
991 | MEM alone, but need to return the canonicalized MEM with | |
992 | all the flags with their original values. */ | |
993 | else if (GET_CODE (x) == MEM) | |
f1ec5147 | 994 | x = replace_equiv_address_nv (x, canon_rtx (XEXP (x, 0))); |
d4b60170 | 995 | |
9ae8ffe7 JL |
996 | return x; |
997 | } | |
998 | ||
999 | /* Return 1 if X and Y are identical-looking rtx's. | |
1000 | ||
1001 | We use the data in reg_known_value above to see if two registers with | |
1002 | different numbers are, in fact, equivalent. */ | |
1003 | ||
1004 | static int | |
1005 | rtx_equal_for_memref_p (x, y) | |
1006 | rtx x, y; | |
1007 | { | |
1008 | register int i; | |
1009 | register int j; | |
1010 | register enum rtx_code code; | |
6f7d635c | 1011 | register const char *fmt; |
9ae8ffe7 JL |
1012 | |
1013 | if (x == 0 && y == 0) | |
1014 | return 1; | |
1015 | if (x == 0 || y == 0) | |
1016 | return 0; | |
d4b60170 | 1017 | |
9ae8ffe7 JL |
1018 | x = canon_rtx (x); |
1019 | y = canon_rtx (y); | |
1020 | ||
1021 | if (x == y) | |
1022 | return 1; | |
1023 | ||
1024 | code = GET_CODE (x); | |
1025 | /* Rtx's of different codes cannot be equal. */ | |
1026 | if (code != GET_CODE (y)) | |
1027 | return 0; | |
1028 | ||
1029 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. | |
1030 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ | |
1031 | ||
1032 | if (GET_MODE (x) != GET_MODE (y)) | |
1033 | return 0; | |
1034 | ||
db048faf MM |
1035 | /* Some RTL can be compared without a recursive examination. */ |
1036 | switch (code) | |
1037 | { | |
ab59db3c BS |
1038 | case VALUE: |
1039 | return CSELIB_VAL_PTR (x) == CSELIB_VAL_PTR (y); | |
1040 | ||
db048faf MM |
1041 | case REG: |
1042 | return REGNO (x) == REGNO (y); | |
1043 | ||
1044 | case LABEL_REF: | |
1045 | return XEXP (x, 0) == XEXP (y, 0); | |
1046 | ||
1047 | case SYMBOL_REF: | |
1048 | return XSTR (x, 0) == XSTR (y, 0); | |
1049 | ||
1050 | case CONST_INT: | |
1051 | case CONST_DOUBLE: | |
1052 | /* There's no need to compare the contents of CONST_DOUBLEs or | |
1053 | CONST_INTs because pointer equality is a good enough | |
1054 | comparison for these nodes. */ | |
1055 | return 0; | |
1056 | ||
1057 | case ADDRESSOF: | |
831ecbd4 RK |
1058 | return (XINT (x, 1) == XINT (y, 1) |
1059 | && rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))); | |
db048faf MM |
1060 | |
1061 | default: | |
1062 | break; | |
1063 | } | |
9ae8ffe7 JL |
1064 | |
1065 | /* For commutative operations, the RTX match if the operand match in any | |
1066 | order. Also handle the simple binary and unary cases without a loop. */ | |
1067 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
1068 | return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
1069 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))) | |
1070 | || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1)) | |
1071 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0)))); | |
1072 | else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2') | |
1073 | return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
1074 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))); | |
1075 | else if (GET_RTX_CLASS (code) == '1') | |
1076 | return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)); | |
1077 | ||
1078 | /* Compare the elements. If any pair of corresponding elements | |
de12be17 JC |
1079 | fail to match, return 0 for the whole things. |
1080 | ||
1081 | Limit cases to types which actually appear in addresses. */ | |
9ae8ffe7 JL |
1082 | |
1083 | fmt = GET_RTX_FORMAT (code); | |
1084 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1085 | { | |
1086 | switch (fmt[i]) | |
1087 | { | |
9ae8ffe7 JL |
1088 | case 'i': |
1089 | if (XINT (x, i) != XINT (y, i)) | |
1090 | return 0; | |
1091 | break; | |
1092 | ||
9ae8ffe7 JL |
1093 | case 'E': |
1094 | /* Two vectors must have the same length. */ | |
1095 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
1096 | return 0; | |
1097 | ||
1098 | /* And the corresponding elements must match. */ | |
1099 | for (j = 0; j < XVECLEN (x, i); j++) | |
d4b60170 RK |
1100 | if (rtx_equal_for_memref_p (XVECEXP (x, i, j), |
1101 | XVECEXP (y, i, j)) == 0) | |
9ae8ffe7 JL |
1102 | return 0; |
1103 | break; | |
1104 | ||
1105 | case 'e': | |
1106 | if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0) | |
1107 | return 0; | |
1108 | break; | |
1109 | ||
3237ac18 AH |
1110 | /* This can happen for asm operands. */ |
1111 | case 's': | |
1112 | if (strcmp (XSTR (x, i), XSTR (y, i))) | |
1113 | return 0; | |
1114 | break; | |
1115 | ||
aee21ba9 JL |
1116 | /* This can happen for an asm which clobbers memory. */ |
1117 | case '0': | |
1118 | break; | |
1119 | ||
9ae8ffe7 JL |
1120 | /* It is believed that rtx's at this level will never |
1121 | contain anything but integers and other rtx's, | |
1122 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
1123 | default: | |
1124 | abort (); | |
1125 | } | |
1126 | } | |
1127 | return 1; | |
1128 | } | |
1129 | ||
1130 | /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within | |
1131 | X and return it, or return 0 if none found. */ | |
1132 | ||
1133 | static rtx | |
1134 | find_symbolic_term (x) | |
1135 | rtx x; | |
1136 | { | |
1137 | register int i; | |
1138 | register enum rtx_code code; | |
6f7d635c | 1139 | register const char *fmt; |
9ae8ffe7 JL |
1140 | |
1141 | code = GET_CODE (x); | |
1142 | if (code == SYMBOL_REF || code == LABEL_REF) | |
1143 | return x; | |
1144 | if (GET_RTX_CLASS (code) == 'o') | |
1145 | return 0; | |
1146 | ||
1147 | fmt = GET_RTX_FORMAT (code); | |
1148 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1149 | { | |
1150 | rtx t; | |
1151 | ||
1152 | if (fmt[i] == 'e') | |
1153 | { | |
1154 | t = find_symbolic_term (XEXP (x, i)); | |
1155 | if (t != 0) | |
1156 | return t; | |
1157 | } | |
1158 | else if (fmt[i] == 'E') | |
1159 | break; | |
1160 | } | |
1161 | return 0; | |
1162 | } | |
1163 | ||
1164 | static rtx | |
1165 | find_base_term (x) | |
1166 | register rtx x; | |
1167 | { | |
eab5c70a BS |
1168 | cselib_val *val; |
1169 | struct elt_loc_list *l; | |
1170 | ||
b949ea8b JW |
1171 | #if defined (FIND_BASE_TERM) |
1172 | /* Try machine-dependent ways to find the base term. */ | |
1173 | x = FIND_BASE_TERM (x); | |
1174 | #endif | |
1175 | ||
9ae8ffe7 JL |
1176 | switch (GET_CODE (x)) |
1177 | { | |
1178 | case REG: | |
1179 | return REG_BASE_VALUE (x); | |
1180 | ||
de12be17 JC |
1181 | case ZERO_EXTEND: |
1182 | case SIGN_EXTEND: /* Used for Alpha/NT pointers */ | |
9ae8ffe7 | 1183 | case HIGH: |
6d849a2a JL |
1184 | case PRE_INC: |
1185 | case PRE_DEC: | |
1186 | case POST_INC: | |
1187 | case POST_DEC: | |
1188 | return find_base_term (XEXP (x, 0)); | |
1189 | ||
eab5c70a BS |
1190 | case VALUE: |
1191 | val = CSELIB_VAL_PTR (x); | |
1192 | for (l = val->locs; l; l = l->next) | |
1193 | if ((x = find_base_term (l->loc)) != 0) | |
1194 | return x; | |
1195 | return 0; | |
1196 | ||
9ae8ffe7 JL |
1197 | case CONST: |
1198 | x = XEXP (x, 0); | |
1199 | if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS) | |
1200 | return 0; | |
1201 | /* fall through */ | |
1202 | case LO_SUM: | |
1203 | case PLUS: | |
1204 | case MINUS: | |
1205 | { | |
3c567fae JL |
1206 | rtx tmp1 = XEXP (x, 0); |
1207 | rtx tmp2 = XEXP (x, 1); | |
1208 | ||
1209 | /* This is a litle bit tricky since we have to determine which of | |
1210 | the two operands represents the real base address. Otherwise this | |
1211 | routine may return the index register instead of the base register. | |
1212 | ||
1213 | That may cause us to believe no aliasing was possible, when in | |
1214 | fact aliasing is possible. | |
1215 | ||
1216 | We use a few simple tests to guess the base register. Additional | |
1217 | tests can certainly be added. For example, if one of the operands | |
1218 | is a shift or multiply, then it must be the index register and the | |
1219 | other operand is the base register. */ | |
1220 | ||
b949ea8b JW |
1221 | if (tmp1 == pic_offset_table_rtx && CONSTANT_P (tmp2)) |
1222 | return find_base_term (tmp2); | |
1223 | ||
3c567fae JL |
1224 | /* If either operand is known to be a pointer, then use it |
1225 | to determine the base term. */ | |
3502dc9c | 1226 | if (REG_P (tmp1) && REG_POINTER (tmp1)) |
3c567fae JL |
1227 | return find_base_term (tmp1); |
1228 | ||
3502dc9c | 1229 | if (REG_P (tmp2) && REG_POINTER (tmp2)) |
3c567fae JL |
1230 | return find_base_term (tmp2); |
1231 | ||
1232 | /* Neither operand was known to be a pointer. Go ahead and find the | |
1233 | base term for both operands. */ | |
1234 | tmp1 = find_base_term (tmp1); | |
1235 | tmp2 = find_base_term (tmp2); | |
1236 | ||
1237 | /* If either base term is named object or a special address | |
1238 | (like an argument or stack reference), then use it for the | |
1239 | base term. */ | |
d4b60170 | 1240 | if (tmp1 != 0 |
3c567fae JL |
1241 | && (GET_CODE (tmp1) == SYMBOL_REF |
1242 | || GET_CODE (tmp1) == LABEL_REF | |
1243 | || (GET_CODE (tmp1) == ADDRESS | |
1244 | && GET_MODE (tmp1) != VOIDmode))) | |
1245 | return tmp1; | |
1246 | ||
d4b60170 | 1247 | if (tmp2 != 0 |
3c567fae JL |
1248 | && (GET_CODE (tmp2) == SYMBOL_REF |
1249 | || GET_CODE (tmp2) == LABEL_REF | |
1250 | || (GET_CODE (tmp2) == ADDRESS | |
1251 | && GET_MODE (tmp2) != VOIDmode))) | |
1252 | return tmp2; | |
1253 | ||
1254 | /* We could not determine which of the two operands was the | |
1255 | base register and which was the index. So we can determine | |
1256 | nothing from the base alias check. */ | |
1257 | return 0; | |
9ae8ffe7 JL |
1258 | } |
1259 | ||
1260 | case AND: | |
1261 | if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1262 | return REG_BASE_VALUE (XEXP (x, 0)); | |
1263 | return 0; | |
1264 | ||
1265 | case SYMBOL_REF: | |
1266 | case LABEL_REF: | |
1267 | return x; | |
1268 | ||
d982e46e | 1269 | case ADDRESSOF: |
bb07060a | 1270 | return REG_BASE_VALUE (frame_pointer_rtx); |
d982e46e | 1271 | |
9ae8ffe7 JL |
1272 | default: |
1273 | return 0; | |
1274 | } | |
1275 | } | |
1276 | ||
1277 | /* Return 0 if the addresses X and Y are known to point to different | |
1278 | objects, 1 if they might be pointers to the same object. */ | |
1279 | ||
1280 | static int | |
56ee9281 | 1281 | base_alias_check (x, y, x_mode, y_mode) |
9ae8ffe7 | 1282 | rtx x, y; |
56ee9281 | 1283 | enum machine_mode x_mode, y_mode; |
9ae8ffe7 JL |
1284 | { |
1285 | rtx x_base = find_base_term (x); | |
1286 | rtx y_base = find_base_term (y); | |
1287 | ||
1c72c7f6 JC |
1288 | /* If the address itself has no known base see if a known equivalent |
1289 | value has one. If either address still has no known base, nothing | |
1290 | is known about aliasing. */ | |
1291 | if (x_base == 0) | |
1292 | { | |
1293 | rtx x_c; | |
d4b60170 | 1294 | |
1c72c7f6 JC |
1295 | if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x) |
1296 | return 1; | |
d4b60170 | 1297 | |
1c72c7f6 JC |
1298 | x_base = find_base_term (x_c); |
1299 | if (x_base == 0) | |
1300 | return 1; | |
1301 | } | |
9ae8ffe7 | 1302 | |
1c72c7f6 JC |
1303 | if (y_base == 0) |
1304 | { | |
1305 | rtx y_c; | |
1306 | if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y) | |
1307 | return 1; | |
d4b60170 | 1308 | |
1c72c7f6 JC |
1309 | y_base = find_base_term (y_c); |
1310 | if (y_base == 0) | |
1311 | return 1; | |
1312 | } | |
1313 | ||
1314 | /* If the base addresses are equal nothing is known about aliasing. */ | |
1315 | if (rtx_equal_p (x_base, y_base)) | |
9ae8ffe7 JL |
1316 | return 1; |
1317 | ||
56ee9281 RH |
1318 | /* The base addresses of the read and write are different expressions. |
1319 | If they are both symbols and they are not accessed via AND, there is | |
1320 | no conflict. We can bring knowledge of object alignment into play | |
1321 | here. For example, on alpha, "char a, b;" can alias one another, | |
1322 | though "char a; long b;" cannot. */ | |
9ae8ffe7 | 1323 | if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS) |
c02f035f | 1324 | { |
56ee9281 RH |
1325 | if (GET_CODE (x) == AND && GET_CODE (y) == AND) |
1326 | return 1; | |
1327 | if (GET_CODE (x) == AND | |
1328 | && (GET_CODE (XEXP (x, 1)) != CONST_INT | |
8fa2140d | 1329 | || (int) GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1)))) |
56ee9281 RH |
1330 | return 1; |
1331 | if (GET_CODE (y) == AND | |
1332 | && (GET_CODE (XEXP (y, 1)) != CONST_INT | |
8fa2140d | 1333 | || (int) GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1)))) |
56ee9281 | 1334 | return 1; |
b2972551 JL |
1335 | /* Differing symbols never alias. */ |
1336 | return 0; | |
c02f035f | 1337 | } |
9ae8ffe7 JL |
1338 | |
1339 | /* If one address is a stack reference there can be no alias: | |
1340 | stack references using different base registers do not alias, | |
1341 | a stack reference can not alias a parameter, and a stack reference | |
1342 | can not alias a global. */ | |
1343 | if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode) | |
1344 | || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode)) | |
1345 | return 0; | |
1346 | ||
1347 | if (! flag_argument_noalias) | |
1348 | return 1; | |
1349 | ||
1350 | if (flag_argument_noalias > 1) | |
1351 | return 0; | |
1352 | ||
ec5c56db | 1353 | /* Weak noalias assertion (arguments are distinct, but may match globals). */ |
9ae8ffe7 JL |
1354 | return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode); |
1355 | } | |
1356 | ||
eab5c70a BS |
1357 | /* Convert the address X into something we can use. This is done by returning |
1358 | it unchanged unless it is a value; in the latter case we call cselib to get | |
1359 | a more useful rtx. */ | |
3bdf5ad1 | 1360 | |
a13d4ebf | 1361 | rtx |
eab5c70a BS |
1362 | get_addr (x) |
1363 | rtx x; | |
1364 | { | |
1365 | cselib_val *v; | |
1366 | struct elt_loc_list *l; | |
1367 | ||
1368 | if (GET_CODE (x) != VALUE) | |
1369 | return x; | |
1370 | v = CSELIB_VAL_PTR (x); | |
1371 | for (l = v->locs; l; l = l->next) | |
1372 | if (CONSTANT_P (l->loc)) | |
1373 | return l->loc; | |
1374 | for (l = v->locs; l; l = l->next) | |
1375 | if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM) | |
1376 | return l->loc; | |
1377 | if (v->locs) | |
1378 | return v->locs->loc; | |
1379 | return x; | |
1380 | } | |
1381 | ||
39cec1ac MH |
1382 | /* Return the address of the (N_REFS + 1)th memory reference to ADDR |
1383 | where SIZE is the size in bytes of the memory reference. If ADDR | |
1384 | is not modified by the memory reference then ADDR is returned. */ | |
1385 | ||
1386 | rtx | |
1387 | addr_side_effect_eval (addr, size, n_refs) | |
1388 | rtx addr; | |
1389 | int size; | |
1390 | int n_refs; | |
1391 | { | |
1392 | int offset = 0; | |
1393 | ||
1394 | switch (GET_CODE (addr)) | |
1395 | { | |
1396 | case PRE_INC: | |
1397 | offset = (n_refs + 1) * size; | |
1398 | break; | |
1399 | case PRE_DEC: | |
1400 | offset = -(n_refs + 1) * size; | |
1401 | break; | |
1402 | case POST_INC: | |
1403 | offset = n_refs * size; | |
1404 | break; | |
1405 | case POST_DEC: | |
1406 | offset = -n_refs * size; | |
1407 | break; | |
1408 | ||
1409 | default: | |
1410 | return addr; | |
1411 | } | |
1412 | ||
1413 | if (offset) | |
1414 | addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset)); | |
1415 | else | |
1416 | addr = XEXP (addr, 0); | |
1417 | ||
1418 | return addr; | |
1419 | } | |
1420 | ||
9ae8ffe7 JL |
1421 | /* Return nonzero if X and Y (memory addresses) could reference the |
1422 | same location in memory. C is an offset accumulator. When | |
1423 | C is nonzero, we are testing aliases between X and Y + C. | |
1424 | XSIZE is the size in bytes of the X reference, | |
1425 | similarly YSIZE is the size in bytes for Y. | |
1426 | ||
1427 | If XSIZE or YSIZE is zero, we do not know the amount of memory being | |
1428 | referenced (the reference was BLKmode), so make the most pessimistic | |
1429 | assumptions. | |
1430 | ||
c02f035f RH |
1431 | If XSIZE or YSIZE is negative, we may access memory outside the object |
1432 | being referenced as a side effect. This can happen when using AND to | |
1433 | align memory references, as is done on the Alpha. | |
1434 | ||
9ae8ffe7 | 1435 | Nice to notice that varying addresses cannot conflict with fp if no |
0211b6ab | 1436 | local variables had their addresses taken, but that's too hard now. */ |
9ae8ffe7 | 1437 | |
9ae8ffe7 JL |
1438 | static int |
1439 | memrefs_conflict_p (xsize, x, ysize, y, c) | |
1440 | register rtx x, y; | |
1441 | int xsize, ysize; | |
1442 | HOST_WIDE_INT c; | |
1443 | { | |
eab5c70a BS |
1444 | if (GET_CODE (x) == VALUE) |
1445 | x = get_addr (x); | |
1446 | if (GET_CODE (y) == VALUE) | |
1447 | y = get_addr (y); | |
9ae8ffe7 JL |
1448 | if (GET_CODE (x) == HIGH) |
1449 | x = XEXP (x, 0); | |
1450 | else if (GET_CODE (x) == LO_SUM) | |
1451 | x = XEXP (x, 1); | |
1452 | else | |
39cec1ac | 1453 | x = canon_rtx (addr_side_effect_eval (x, xsize, 0)); |
9ae8ffe7 JL |
1454 | if (GET_CODE (y) == HIGH) |
1455 | y = XEXP (y, 0); | |
1456 | else if (GET_CODE (y) == LO_SUM) | |
1457 | y = XEXP (y, 1); | |
1458 | else | |
39cec1ac | 1459 | y = canon_rtx (addr_side_effect_eval (y, ysize, 0)); |
9ae8ffe7 JL |
1460 | |
1461 | if (rtx_equal_for_memref_p (x, y)) | |
1462 | { | |
c02f035f | 1463 | if (xsize <= 0 || ysize <= 0) |
9ae8ffe7 JL |
1464 | return 1; |
1465 | if (c >= 0 && xsize > c) | |
1466 | return 1; | |
1467 | if (c < 0 && ysize+c > 0) | |
1468 | return 1; | |
1469 | return 0; | |
1470 | } | |
1471 | ||
6e73e666 JC |
1472 | /* This code used to check for conflicts involving stack references and |
1473 | globals but the base address alias code now handles these cases. */ | |
9ae8ffe7 JL |
1474 | |
1475 | if (GET_CODE (x) == PLUS) | |
1476 | { | |
1477 | /* The fact that X is canonicalized means that this | |
1478 | PLUS rtx is canonicalized. */ | |
1479 | rtx x0 = XEXP (x, 0); | |
1480 | rtx x1 = XEXP (x, 1); | |
1481 | ||
1482 | if (GET_CODE (y) == PLUS) | |
1483 | { | |
1484 | /* The fact that Y is canonicalized means that this | |
1485 | PLUS rtx is canonicalized. */ | |
1486 | rtx y0 = XEXP (y, 0); | |
1487 | rtx y1 = XEXP (y, 1); | |
1488 | ||
1489 | if (rtx_equal_for_memref_p (x1, y1)) | |
1490 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1491 | if (rtx_equal_for_memref_p (x0, y0)) | |
1492 | return memrefs_conflict_p (xsize, x1, ysize, y1, c); | |
1493 | if (GET_CODE (x1) == CONST_INT) | |
63be02db JM |
1494 | { |
1495 | if (GET_CODE (y1) == CONST_INT) | |
1496 | return memrefs_conflict_p (xsize, x0, ysize, y0, | |
1497 | c - INTVAL (x1) + INTVAL (y1)); | |
1498 | else | |
1499 | return memrefs_conflict_p (xsize, x0, ysize, y, | |
1500 | c - INTVAL (x1)); | |
1501 | } | |
9ae8ffe7 JL |
1502 | else if (GET_CODE (y1) == CONST_INT) |
1503 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1504 | ||
6e73e666 | 1505 | return 1; |
9ae8ffe7 JL |
1506 | } |
1507 | else if (GET_CODE (x1) == CONST_INT) | |
1508 | return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1)); | |
1509 | } | |
1510 | else if (GET_CODE (y) == PLUS) | |
1511 | { | |
1512 | /* The fact that Y is canonicalized means that this | |
1513 | PLUS rtx is canonicalized. */ | |
1514 | rtx y0 = XEXP (y, 0); | |
1515 | rtx y1 = XEXP (y, 1); | |
1516 | ||
1517 | if (GET_CODE (y1) == CONST_INT) | |
1518 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1519 | else | |
1520 | return 1; | |
1521 | } | |
1522 | ||
1523 | if (GET_CODE (x) == GET_CODE (y)) | |
1524 | switch (GET_CODE (x)) | |
1525 | { | |
1526 | case MULT: | |
1527 | { | |
1528 | /* Handle cases where we expect the second operands to be the | |
1529 | same, and check only whether the first operand would conflict | |
1530 | or not. */ | |
1531 | rtx x0, y0; | |
1532 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
1533 | rtx y1 = canon_rtx (XEXP (y, 1)); | |
1534 | if (! rtx_equal_for_memref_p (x1, y1)) | |
1535 | return 1; | |
1536 | x0 = canon_rtx (XEXP (x, 0)); | |
1537 | y0 = canon_rtx (XEXP (y, 0)); | |
1538 | if (rtx_equal_for_memref_p (x0, y0)) | |
1539 | return (xsize == 0 || ysize == 0 | |
1540 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); | |
1541 | ||
1542 | /* Can't properly adjust our sizes. */ | |
1543 | if (GET_CODE (x1) != CONST_INT) | |
1544 | return 1; | |
1545 | xsize /= INTVAL (x1); | |
1546 | ysize /= INTVAL (x1); | |
1547 | c /= INTVAL (x1); | |
1548 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1549 | } | |
1d300e19 | 1550 | |
de12be17 JC |
1551 | case REG: |
1552 | /* Are these registers known not to be equal? */ | |
1553 | if (alias_invariant) | |
1554 | { | |
e51712db | 1555 | unsigned int r_x = REGNO (x), r_y = REGNO (y); |
de12be17 JC |
1556 | rtx i_x, i_y; /* invariant relationships of X and Y */ |
1557 | ||
1558 | i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x]; | |
1559 | i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y]; | |
1560 | ||
1561 | if (i_x == 0 && i_y == 0) | |
1562 | break; | |
1563 | ||
1564 | if (! memrefs_conflict_p (xsize, i_x ? i_x : x, | |
1565 | ysize, i_y ? i_y : y, c)) | |
1566 | return 0; | |
1567 | } | |
1568 | break; | |
1569 | ||
1d300e19 KG |
1570 | default: |
1571 | break; | |
9ae8ffe7 JL |
1572 | } |
1573 | ||
1574 | /* Treat an access through an AND (e.g. a subword access on an Alpha) | |
56ee9281 RH |
1575 | as an access with indeterminate size. Assume that references |
1576 | besides AND are aligned, so if the size of the other reference is | |
1577 | at least as large as the alignment, assume no other overlap. */ | |
9ae8ffe7 | 1578 | if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT) |
56ee9281 | 1579 | { |
02e3377d | 1580 | if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1))) |
56ee9281 RH |
1581 | xsize = -1; |
1582 | return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c); | |
1583 | } | |
9ae8ffe7 | 1584 | if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT) |
c02f035f | 1585 | { |
56ee9281 | 1586 | /* ??? If we are indexing far enough into the array/structure, we |
c02f035f RH |
1587 | may yet be able to determine that we can not overlap. But we |
1588 | also need to that we are far enough from the end not to overlap | |
56ee9281 | 1589 | a following reference, so we do nothing with that for now. */ |
02e3377d | 1590 | if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1))) |
56ee9281 RH |
1591 | ysize = -1; |
1592 | return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c); | |
c02f035f | 1593 | } |
9ae8ffe7 | 1594 | |
b24ea077 JW |
1595 | if (GET_CODE (x) == ADDRESSOF) |
1596 | { | |
1597 | if (y == frame_pointer_rtx | |
1598 | || GET_CODE (y) == ADDRESSOF) | |
1599 | return xsize <= 0 || ysize <= 0; | |
1600 | } | |
1601 | if (GET_CODE (y) == ADDRESSOF) | |
1602 | { | |
1603 | if (x == frame_pointer_rtx) | |
1604 | return xsize <= 0 || ysize <= 0; | |
1605 | } | |
d982e46e | 1606 | |
9ae8ffe7 JL |
1607 | if (CONSTANT_P (x)) |
1608 | { | |
1609 | if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT) | |
1610 | { | |
1611 | c += (INTVAL (y) - INTVAL (x)); | |
c02f035f | 1612 | return (xsize <= 0 || ysize <= 0 |
9ae8ffe7 JL |
1613 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); |
1614 | } | |
1615 | ||
1616 | if (GET_CODE (x) == CONST) | |
1617 | { | |
1618 | if (GET_CODE (y) == CONST) | |
1619 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1620 | ysize, canon_rtx (XEXP (y, 0)), c); | |
1621 | else | |
1622 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1623 | ysize, y, c); | |
1624 | } | |
1625 | if (GET_CODE (y) == CONST) | |
1626 | return memrefs_conflict_p (xsize, x, ysize, | |
1627 | canon_rtx (XEXP (y, 0)), c); | |
1628 | ||
1629 | if (CONSTANT_P (y)) | |
b949ea8b | 1630 | return (xsize <= 0 || ysize <= 0 |
c02f035f | 1631 | || (rtx_equal_for_memref_p (x, y) |
b949ea8b | 1632 | && ((c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)))); |
9ae8ffe7 JL |
1633 | |
1634 | return 1; | |
1635 | } | |
1636 | return 1; | |
1637 | } | |
1638 | ||
1639 | /* Functions to compute memory dependencies. | |
1640 | ||
1641 | Since we process the insns in execution order, we can build tables | |
1642 | to keep track of what registers are fixed (and not aliased), what registers | |
1643 | are varying in known ways, and what registers are varying in unknown | |
1644 | ways. | |
1645 | ||
1646 | If both memory references are volatile, then there must always be a | |
1647 | dependence between the two references, since their order can not be | |
1648 | changed. A volatile and non-volatile reference can be interchanged | |
1649 | though. | |
1650 | ||
dc1618bc RK |
1651 | A MEM_IN_STRUCT reference at a non-AND varying address can never |
1652 | conflict with a non-MEM_IN_STRUCT reference at a fixed address. We | |
1653 | also must allow AND addresses, because they may generate accesses | |
1654 | outside the object being referenced. This is used to generate | |
1655 | aligned addresses from unaligned addresses, for instance, the alpha | |
1656 | storeqi_unaligned pattern. */ | |
9ae8ffe7 JL |
1657 | |
1658 | /* Read dependence: X is read after read in MEM takes place. There can | |
1659 | only be a dependence here if both reads are volatile. */ | |
1660 | ||
1661 | int | |
1662 | read_dependence (mem, x) | |
1663 | rtx mem; | |
1664 | rtx x; | |
1665 | { | |
1666 | return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem); | |
1667 | } | |
1668 | ||
c6df88cb MM |
1669 | /* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and |
1670 | MEM2 is a reference to a structure at a varying address, or returns | |
1671 | MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL | |
1672 | value is returned MEM1 and MEM2 can never alias. VARIES_P is used | |
1673 | to decide whether or not an address may vary; it should return | |
eab5c70a BS |
1674 | nonzero whenever variation is possible. |
1675 | MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */ | |
1676 | ||
2c72b78f | 1677 | static rtx |
eab5c70a BS |
1678 | fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p) |
1679 | rtx mem1, mem2; | |
1680 | rtx mem1_addr, mem2_addr; | |
e38fe8e0 | 1681 | int (*varies_p) PARAMS ((rtx, int)); |
eab5c70a | 1682 | { |
3e0abe15 GK |
1683 | if (! flag_strict_aliasing) |
1684 | return NULL_RTX; | |
1685 | ||
c6df88cb | 1686 | if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2) |
e38fe8e0 | 1687 | && !varies_p (mem1_addr, 1) && varies_p (mem2_addr, 1)) |
c6df88cb MM |
1688 | /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a |
1689 | varying address. */ | |
1690 | return mem1; | |
1691 | ||
1692 | if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2) | |
e38fe8e0 | 1693 | && varies_p (mem1_addr, 1) && !varies_p (mem2_addr, 1)) |
c6df88cb MM |
1694 | /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a |
1695 | varying address. */ | |
1696 | return mem2; | |
1697 | ||
1698 | return NULL_RTX; | |
1699 | } | |
1700 | ||
1701 | /* Returns nonzero if something about the mode or address format MEM1 | |
1702 | indicates that it might well alias *anything*. */ | |
1703 | ||
2c72b78f | 1704 | static int |
c6df88cb MM |
1705 | aliases_everything_p (mem) |
1706 | rtx mem; | |
1707 | { | |
c6df88cb MM |
1708 | if (GET_CODE (XEXP (mem, 0)) == AND) |
1709 | /* If the address is an AND, its very hard to know at what it is | |
1710 | actually pointing. */ | |
1711 | return 1; | |
1712 | ||
1713 | return 0; | |
1714 | } | |
1715 | ||
9ae8ffe7 JL |
1716 | /* True dependence: X is read after store in MEM takes place. */ |
1717 | ||
1718 | int | |
1719 | true_dependence (mem, mem_mode, x, varies) | |
1720 | rtx mem; | |
1721 | enum machine_mode mem_mode; | |
1722 | rtx x; | |
e38fe8e0 | 1723 | int (*varies) PARAMS ((rtx, int)); |
9ae8ffe7 | 1724 | { |
6e73e666 | 1725 | register rtx x_addr, mem_addr; |
49982682 | 1726 | rtx base; |
9ae8ffe7 JL |
1727 | |
1728 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1729 | return 1; | |
1730 | ||
41472af8 MM |
1731 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1732 | return 0; | |
1733 | ||
b949ea8b JW |
1734 | /* Unchanging memory can't conflict with non-unchanging memory. |
1735 | A non-unchanging read can conflict with a non-unchanging write. | |
1736 | An unchanging read can conflict with an unchanging write since | |
1737 | there may be a single store to this address to initialize it. | |
ec569656 RK |
1738 | Note that an unchanging store can conflict with a non-unchanging read |
1739 | since we have to make conservative assumptions when we have a | |
1740 | record with readonly fields and we are copying the whole thing. | |
b949ea8b JW |
1741 | Just fall through to the code below to resolve potential conflicts. |
1742 | This won't handle all cases optimally, but the possible performance | |
1743 | loss should be negligible. */ | |
ec569656 | 1744 | if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem)) |
9ae8ffe7 JL |
1745 | return 0; |
1746 | ||
56ee9281 RH |
1747 | if (mem_mode == VOIDmode) |
1748 | mem_mode = GET_MODE (mem); | |
1749 | ||
eab5c70a BS |
1750 | x_addr = get_addr (XEXP (x, 0)); |
1751 | mem_addr = get_addr (XEXP (mem, 0)); | |
1752 | ||
55efb413 JW |
1753 | base = find_base_term (x_addr); |
1754 | if (base && (GET_CODE (base) == LABEL_REF | |
1755 | || (GET_CODE (base) == SYMBOL_REF | |
1756 | && CONSTANT_POOL_ADDRESS_P (base)))) | |
1757 | return 0; | |
1758 | ||
eab5c70a | 1759 | if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode)) |
1c72c7f6 JC |
1760 | return 0; |
1761 | ||
eab5c70a BS |
1762 | x_addr = canon_rtx (x_addr); |
1763 | mem_addr = canon_rtx (mem_addr); | |
6e73e666 | 1764 | |
0211b6ab JW |
1765 | if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr, |
1766 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1767 | return 0; | |
1768 | ||
c6df88cb | 1769 | if (aliases_everything_p (x)) |
0211b6ab JW |
1770 | return 1; |
1771 | ||
c6df88cb MM |
1772 | /* We cannot use aliases_everyting_p to test MEM, since we must look |
1773 | at MEM_MODE, rather than GET_MODE (MEM). */ | |
1774 | if (mem_mode == QImode || GET_CODE (mem_addr) == AND) | |
a13d4ebf AM |
1775 | return 1; |
1776 | ||
1777 | /* In true_dependence we also allow BLKmode to alias anything. Why | |
1778 | don't we do this in anti_dependence and output_dependence? */ | |
1779 | if (mem_mode == BLKmode || GET_MODE (x) == BLKmode) | |
1780 | return 1; | |
1781 | ||
1782 | return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr, | |
1783 | varies); | |
1784 | } | |
1785 | ||
1786 | /* Canonical true dependence: X is read after store in MEM takes place. | |
1787 | Variant of true_dependece which assumes MEM has already been | |
1788 | canonicalized (hence we no longer do that here). | |
1789 | The mem_addr argument has been added, since true_dependence computed | |
1790 | this value prior to canonicalizing. */ | |
1791 | ||
1792 | int | |
1793 | canon_true_dependence (mem, mem_mode, mem_addr, x, varies) | |
1794 | rtx mem, mem_addr, x; | |
1795 | enum machine_mode mem_mode; | |
1796 | int (*varies) PARAMS ((rtx, int)); | |
1797 | { | |
1798 | register rtx x_addr; | |
1799 | ||
1800 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1801 | return 1; | |
1802 | ||
1803 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) | |
1804 | return 0; | |
1805 | ||
1806 | /* If X is an unchanging read, then it can't possibly conflict with any | |
1807 | non-unchanging store. It may conflict with an unchanging write though, | |
1808 | because there may be a single store to this address to initialize it. | |
1809 | Just fall through to the code below to resolve the case where we have | |
1810 | both an unchanging read and an unchanging write. This won't handle all | |
1811 | cases optimally, but the possible performance loss should be | |
1812 | negligible. */ | |
1813 | if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem)) | |
1814 | return 0; | |
1815 | ||
1816 | x_addr = get_addr (XEXP (x, 0)); | |
1817 | ||
1818 | if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode)) | |
1819 | return 0; | |
1820 | ||
1821 | x_addr = canon_rtx (x_addr); | |
1822 | if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr, | |
1823 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1824 | return 0; | |
1825 | ||
1826 | if (aliases_everything_p (x)) | |
1827 | return 1; | |
1828 | ||
1829 | /* We cannot use aliases_everyting_p to test MEM, since we must look | |
1830 | at MEM_MODE, rather than GET_MODE (MEM). */ | |
1831 | if (mem_mode == QImode || GET_CODE (mem_addr) == AND) | |
c6df88cb | 1832 | return 1; |
0211b6ab | 1833 | |
c6df88cb MM |
1834 | /* In true_dependence we also allow BLKmode to alias anything. Why |
1835 | don't we do this in anti_dependence and output_dependence? */ | |
1836 | if (mem_mode == BLKmode || GET_MODE (x) == BLKmode) | |
1837 | return 1; | |
0211b6ab | 1838 | |
eab5c70a BS |
1839 | return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr, |
1840 | varies); | |
9ae8ffe7 JL |
1841 | } |
1842 | ||
c6df88cb MM |
1843 | /* Returns non-zero if a write to X might alias a previous read from |
1844 | (or, if WRITEP is non-zero, a write to) MEM. */ | |
9ae8ffe7 | 1845 | |
2c72b78f | 1846 | static int |
c6df88cb | 1847 | write_dependence_p (mem, x, writep) |
9ae8ffe7 JL |
1848 | rtx mem; |
1849 | rtx x; | |
c6df88cb | 1850 | int writep; |
9ae8ffe7 | 1851 | { |
6e73e666 | 1852 | rtx x_addr, mem_addr; |
c6df88cb | 1853 | rtx fixed_scalar; |
49982682 | 1854 | rtx base; |
6e73e666 | 1855 | |
9ae8ffe7 JL |
1856 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) |
1857 | return 1; | |
1858 | ||
eab5c70a BS |
1859 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1860 | return 0; | |
1861 | ||
b949ea8b JW |
1862 | /* Unchanging memory can't conflict with non-unchanging memory. */ |
1863 | if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem)) | |
1864 | return 0; | |
1865 | ||
9ae8ffe7 JL |
1866 | /* If MEM is an unchanging read, then it can't possibly conflict with |
1867 | the store to X, because there is at most one store to MEM, and it must | |
1868 | have occurred somewhere before MEM. */ | |
55efb413 JW |
1869 | if (! writep && RTX_UNCHANGING_P (mem)) |
1870 | return 0; | |
1871 | ||
1872 | x_addr = get_addr (XEXP (x, 0)); | |
1873 | mem_addr = get_addr (XEXP (mem, 0)); | |
1874 | ||
49982682 JW |
1875 | if (! writep) |
1876 | { | |
55efb413 | 1877 | base = find_base_term (mem_addr); |
49982682 JW |
1878 | if (base && (GET_CODE (base) == LABEL_REF |
1879 | || (GET_CODE (base) == SYMBOL_REF | |
1880 | && CONSTANT_POOL_ADDRESS_P (base)))) | |
1881 | return 0; | |
1882 | } | |
1883 | ||
eab5c70a BS |
1884 | if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), |
1885 | GET_MODE (mem))) | |
41472af8 MM |
1886 | return 0; |
1887 | ||
eab5c70a BS |
1888 | x_addr = canon_rtx (x_addr); |
1889 | mem_addr = canon_rtx (mem_addr); | |
6e73e666 | 1890 | |
c6df88cb MM |
1891 | if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr, |
1892 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1893 | return 0; | |
1894 | ||
1895 | fixed_scalar | |
eab5c70a BS |
1896 | = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr, |
1897 | rtx_addr_varies_p); | |
1898 | ||
c6df88cb MM |
1899 | return (!(fixed_scalar == mem && !aliases_everything_p (x)) |
1900 | && !(fixed_scalar == x && !aliases_everything_p (mem))); | |
1901 | } | |
1902 | ||
1903 | /* Anti dependence: X is written after read in MEM takes place. */ | |
1904 | ||
1905 | int | |
1906 | anti_dependence (mem, x) | |
1907 | rtx mem; | |
1908 | rtx x; | |
1909 | { | |
1910 | return write_dependence_p (mem, x, /*writep=*/0); | |
9ae8ffe7 JL |
1911 | } |
1912 | ||
1913 | /* Output dependence: X is written after store in MEM takes place. */ | |
1914 | ||
1915 | int | |
1916 | output_dependence (mem, x) | |
1917 | register rtx mem; | |
1918 | register rtx x; | |
1919 | { | |
c6df88cb | 1920 | return write_dependence_p (mem, x, /*writep=*/1); |
9ae8ffe7 JL |
1921 | } |
1922 | ||
bf6d9fd7 | 1923 | /* Returns non-zero if X mentions something which is not |
7790df19 JW |
1924 | local to the function and is not constant. */ |
1925 | ||
1926 | static int | |
bf6d9fd7 | 1927 | nonlocal_mentioned_p (x) |
7790df19 JW |
1928 | rtx x; |
1929 | { | |
1930 | rtx base; | |
1931 | register RTX_CODE code; | |
1932 | int regno; | |
1933 | ||
1934 | code = GET_CODE (x); | |
1935 | ||
1936 | if (GET_RTX_CLASS (code) == 'i') | |
1937 | { | |
2a8f6b90 JH |
1938 | /* Constant functions can be constant if they don't use |
1939 | scratch memory used to mark function w/o side effects. */ | |
24a28584 | 1940 | if (code == CALL_INSN && CONST_OR_PURE_CALL_P (x)) |
2a8f6b90 JH |
1941 | { |
1942 | x = CALL_INSN_FUNCTION_USAGE (x); | |
f8cd4126 RK |
1943 | if (x == 0) |
1944 | return 0; | |
2a8f6b90 JH |
1945 | } |
1946 | else | |
1947 | x = PATTERN (x); | |
7790df19 JW |
1948 | code = GET_CODE (x); |
1949 | } | |
1950 | ||
1951 | switch (code) | |
1952 | { | |
1953 | case SUBREG: | |
1954 | if (GET_CODE (SUBREG_REG (x)) == REG) | |
1955 | { | |
1956 | /* Global registers are not local. */ | |
1957 | if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER | |
ddef6bc7 | 1958 | && global_regs[subreg_regno (x)]) |
7790df19 JW |
1959 | return 1; |
1960 | return 0; | |
1961 | } | |
1962 | break; | |
1963 | ||
1964 | case REG: | |
1965 | regno = REGNO (x); | |
1966 | /* Global registers are not local. */ | |
1967 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
1968 | return 1; | |
1969 | return 0; | |
1970 | ||
1971 | case SCRATCH: | |
1972 | case PC: | |
1973 | case CC0: | |
1974 | case CONST_INT: | |
1975 | case CONST_DOUBLE: | |
1976 | case CONST: | |
1977 | case LABEL_REF: | |
1978 | return 0; | |
1979 | ||
1980 | case SYMBOL_REF: | |
1981 | /* Constants in the function's constants pool are constant. */ | |
1982 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1983 | return 0; | |
1984 | return 1; | |
1985 | ||
1986 | case CALL: | |
bf6d9fd7 | 1987 | /* Non-constant calls and recursion are not local. */ |
7790df19 JW |
1988 | return 1; |
1989 | ||
1990 | case MEM: | |
1991 | /* Be overly conservative and consider any volatile memory | |
1992 | reference as not local. */ | |
1993 | if (MEM_VOLATILE_P (x)) | |
1994 | return 1; | |
1995 | base = find_base_term (XEXP (x, 0)); | |
1996 | if (base) | |
1997 | { | |
b3b5ad95 JL |
1998 | /* A Pmode ADDRESS could be a reference via the structure value |
1999 | address or static chain. Such memory references are nonlocal. | |
2000 | ||
2001 | Thus, we have to examine the contents of the ADDRESS to find | |
2002 | out if this is a local reference or not. */ | |
2003 | if (GET_CODE (base) == ADDRESS | |
2004 | && GET_MODE (base) == Pmode | |
2005 | && (XEXP (base, 0) == stack_pointer_rtx | |
2006 | || XEXP (base, 0) == arg_pointer_rtx | |
2007 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
2008 | || XEXP (base, 0) == hard_frame_pointer_rtx | |
2009 | #endif | |
2010 | || XEXP (base, 0) == frame_pointer_rtx)) | |
7790df19 JW |
2011 | return 0; |
2012 | /* Constants in the function's constant pool are constant. */ | |
2013 | if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base)) | |
2014 | return 0; | |
2015 | } | |
2016 | return 1; | |
2017 | ||
bf6d9fd7 | 2018 | case UNSPEC_VOLATILE: |
7790df19 | 2019 | case ASM_INPUT: |
7790df19 JW |
2020 | return 1; |
2021 | ||
bf6d9fd7 JW |
2022 | case ASM_OPERANDS: |
2023 | if (MEM_VOLATILE_P (x)) | |
2024 | return 1; | |
2025 | ||
2026 | /* FALLTHROUGH */ | |
2027 | ||
7790df19 JW |
2028 | default: |
2029 | break; | |
2030 | } | |
2031 | ||
2032 | /* Recursively scan the operands of this expression. */ | |
2033 | ||
2034 | { | |
499b1098 | 2035 | register const char *fmt = GET_RTX_FORMAT (code); |
7790df19 JW |
2036 | register int i; |
2037 | ||
2038 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
2039 | { | |
2a8f6b90 | 2040 | if (fmt[i] == 'e' && XEXP (x, i)) |
7790df19 | 2041 | { |
bf6d9fd7 | 2042 | if (nonlocal_mentioned_p (XEXP (x, i))) |
7790df19 JW |
2043 | return 1; |
2044 | } | |
d4757e6a | 2045 | else if (fmt[i] == 'E') |
7790df19 JW |
2046 | { |
2047 | register int j; | |
2048 | for (j = 0; j < XVECLEN (x, i); j++) | |
bf6d9fd7 | 2049 | if (nonlocal_mentioned_p (XVECEXP (x, i, j))) |
7790df19 JW |
2050 | return 1; |
2051 | } | |
2052 | } | |
2053 | } | |
2054 | ||
2055 | return 0; | |
2056 | } | |
2057 | ||
2058 | /* Mark the function if it is constant. */ | |
2059 | ||
2060 | void | |
2061 | mark_constant_function () | |
2062 | { | |
2063 | rtx insn; | |
bf6d9fd7 | 2064 | int nonlocal_mentioned; |
7790df19 JW |
2065 | |
2066 | if (TREE_PUBLIC (current_function_decl) | |
2067 | || TREE_READONLY (current_function_decl) | |
bf6d9fd7 | 2068 | || DECL_IS_PURE (current_function_decl) |
7790df19 JW |
2069 | || TREE_THIS_VOLATILE (current_function_decl) |
2070 | || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode) | |
2071 | return; | |
2072 | ||
e004f2f7 | 2073 | /* A loop might not return which counts as a side effect. */ |
0ecf09f9 | 2074 | if (mark_dfs_back_edges ()) |
e004f2f7 JW |
2075 | return; |
2076 | ||
bf6d9fd7 JW |
2077 | nonlocal_mentioned = 0; |
2078 | ||
2079 | init_alias_analysis (); | |
2080 | ||
7790df19 JW |
2081 | /* Determine if this is a constant function. */ |
2082 | ||
2083 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
bf6d9fd7 JW |
2084 | if (INSN_P (insn) && nonlocal_mentioned_p (insn)) |
2085 | { | |
2086 | nonlocal_mentioned = 1; | |
2087 | break; | |
2088 | } | |
2089 | ||
2090 | end_alias_analysis (); | |
7790df19 JW |
2091 | |
2092 | /* Mark the function. */ | |
2093 | ||
bf6d9fd7 JW |
2094 | if (! nonlocal_mentioned) |
2095 | TREE_READONLY (current_function_decl) = 1; | |
7790df19 JW |
2096 | } |
2097 | ||
6e73e666 JC |
2098 | |
2099 | static HARD_REG_SET argument_registers; | |
2100 | ||
2101 | void | |
2102 | init_alias_once () | |
2103 | { | |
2104 | register int i; | |
2105 | ||
2106 | #ifndef OUTGOING_REGNO | |
2107 | #define OUTGOING_REGNO(N) N | |
2108 | #endif | |
2109 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
2110 | /* Check whether this register can hold an incoming pointer | |
2111 | argument. FUNCTION_ARG_REGNO_P tests outgoing register | |
ec5c56db | 2112 | numbers, so translate if necessary due to register windows. */ |
6e73e666 JC |
2113 | if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i)) |
2114 | && HARD_REGNO_MODE_OK (i, Pmode)) | |
2115 | SET_HARD_REG_BIT (argument_registers, i); | |
3932261a | 2116 | |
30f72379 | 2117 | alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0); |
6e73e666 JC |
2118 | } |
2119 | ||
c13e8210 MM |
2120 | /* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE |
2121 | array. */ | |
2122 | ||
9ae8ffe7 JL |
2123 | void |
2124 | init_alias_analysis () | |
2125 | { | |
2126 | int maxreg = max_reg_num (); | |
ea64ef27 | 2127 | int changed, pass; |
9ae8ffe7 | 2128 | register int i; |
e51712db | 2129 | register unsigned int ui; |
9ae8ffe7 | 2130 | register rtx insn; |
9ae8ffe7 JL |
2131 | |
2132 | reg_known_value_size = maxreg; | |
2133 | ||
e05e2395 MM |
2134 | reg_known_value |
2135 | = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx)) | |
2136 | - FIRST_PSEUDO_REGISTER; | |
2137 | reg_known_equiv_p | |
2138 | = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char)) | |
9ae8ffe7 | 2139 | - FIRST_PSEUDO_REGISTER; |
9ae8ffe7 | 2140 | |
6e73e666 JC |
2141 | /* Overallocate reg_base_value to allow some growth during loop |
2142 | optimization. Loop unrolling can create a large number of | |
2143 | registers. */ | |
2144 | reg_base_value_size = maxreg * 2; | |
ac606739 | 2145 | reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx)); |
1f8f4a0b | 2146 | ggc_add_rtx_root (reg_base_value, reg_base_value_size); |
ac606739 | 2147 | |
e05e2395 MM |
2148 | new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx)); |
2149 | reg_seen = (char *) xmalloc (reg_base_value_size); | |
de12be17 JC |
2150 | if (! reload_completed && flag_unroll_loops) |
2151 | { | |
ac606739 | 2152 | /* ??? Why are we realloc'ing if we're just going to zero it? */ |
de12be17 JC |
2153 | alias_invariant = (rtx *)xrealloc (alias_invariant, |
2154 | reg_base_value_size * sizeof (rtx)); | |
961192e1 | 2155 | memset ((char *)alias_invariant, 0, reg_base_value_size * sizeof (rtx)); |
de12be17 | 2156 | } |
ec907dd8 JL |
2157 | |
2158 | /* The basic idea is that each pass through this loop will use the | |
2159 | "constant" information from the previous pass to propagate alias | |
2160 | information through another level of assignments. | |
2161 | ||
2162 | This could get expensive if the assignment chains are long. Maybe | |
2163 | we should throttle the number of iterations, possibly based on | |
6e73e666 | 2164 | the optimization level or flag_expensive_optimizations. |
ec907dd8 JL |
2165 | |
2166 | We could propagate more information in the first pass by making use | |
2167 | of REG_N_SETS to determine immediately that the alias information | |
ea64ef27 JL |
2168 | for a pseudo is "constant". |
2169 | ||
2170 | A program with an uninitialized variable can cause an infinite loop | |
2171 | here. Instead of doing a full dataflow analysis to detect such problems | |
2172 | we just cap the number of iterations for the loop. | |
2173 | ||
2174 | The state of the arrays for the set chain in question does not matter | |
2175 | since the program has undefined behavior. */ | |
6e73e666 | 2176 | |
ea64ef27 | 2177 | pass = 0; |
6e73e666 | 2178 | do |
ec907dd8 JL |
2179 | { |
2180 | /* Assume nothing will change this iteration of the loop. */ | |
2181 | changed = 0; | |
2182 | ||
ec907dd8 JL |
2183 | /* We want to assign the same IDs each iteration of this loop, so |
2184 | start counting from zero each iteration of the loop. */ | |
2185 | unique_id = 0; | |
2186 | ||
2187 | /* We're at the start of the funtion each iteration through the | |
2188 | loop, so we're copying arguments. */ | |
2189 | copying_arguments = 1; | |
9ae8ffe7 | 2190 | |
6e73e666 | 2191 | /* Wipe the potential alias information clean for this pass. */ |
961192e1 | 2192 | memset ((char *) new_reg_base_value, 0, reg_base_value_size * sizeof (rtx)); |
8072f69c | 2193 | |
6e73e666 | 2194 | /* Wipe the reg_seen array clean. */ |
961192e1 | 2195 | memset ((char *) reg_seen, 0, reg_base_value_size); |
9ae8ffe7 | 2196 | |
6e73e666 JC |
2197 | /* Mark all hard registers which may contain an address. |
2198 | The stack, frame and argument pointers may contain an address. | |
2199 | An argument register which can hold a Pmode value may contain | |
2200 | an address even if it is not in BASE_REGS. | |
8072f69c | 2201 | |
6e73e666 JC |
2202 | The address expression is VOIDmode for an argument and |
2203 | Pmode for other registers. */ | |
2204 | ||
2205 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
2206 | if (TEST_HARD_REG_BIT (argument_registers, i)) | |
38a448ca RH |
2207 | new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode, |
2208 | gen_rtx_REG (Pmode, i)); | |
6e73e666 JC |
2209 | |
2210 | new_reg_base_value[STACK_POINTER_REGNUM] | |
38a448ca | 2211 | = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); |
6e73e666 | 2212 | new_reg_base_value[ARG_POINTER_REGNUM] |
38a448ca | 2213 | = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); |
6e73e666 | 2214 | new_reg_base_value[FRAME_POINTER_REGNUM] |
38a448ca | 2215 | = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); |
2a2c8203 | 2216 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6e73e666 | 2217 | new_reg_base_value[HARD_FRAME_POINTER_REGNUM] |
38a448ca | 2218 | = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); |
2a2c8203 | 2219 | #endif |
ec907dd8 JL |
2220 | |
2221 | /* Walk the insns adding values to the new_reg_base_value array. */ | |
2222 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
9ae8ffe7 | 2223 | { |
2c3c49de | 2224 | if (INSN_P (insn)) |
ec907dd8 | 2225 | { |
6e73e666 | 2226 | rtx note, set; |
efc9bd41 RK |
2227 | |
2228 | #if defined (HAVE_prologue) || defined (HAVE_epilogue) | |
657959ca JL |
2229 | /* The prologue/epilouge insns are not threaded onto the |
2230 | insn chain until after reload has completed. Thus, | |
2231 | there is no sense wasting time checking if INSN is in | |
2232 | the prologue/epilogue until after reload has completed. */ | |
2233 | if (reload_completed | |
2234 | && prologue_epilogue_contains (insn)) | |
efc9bd41 RK |
2235 | continue; |
2236 | #endif | |
2237 | ||
ec907dd8 JL |
2238 | /* If this insn has a noalias note, process it, Otherwise, |
2239 | scan for sets. A simple set will have no side effects | |
ec5c56db | 2240 | which could change the base value of any other register. */ |
6e73e666 | 2241 | |
ec907dd8 | 2242 | if (GET_CODE (PATTERN (insn)) == SET |
efc9bd41 RK |
2243 | && REG_NOTES (insn) != 0 |
2244 | && find_reg_note (insn, REG_NOALIAS, NULL_RTX)) | |
84832317 | 2245 | record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL); |
ec907dd8 | 2246 | else |
84832317 | 2247 | note_stores (PATTERN (insn), record_set, NULL); |
6e73e666 JC |
2248 | |
2249 | set = single_set (insn); | |
2250 | ||
2251 | if (set != 0 | |
2252 | && GET_CODE (SET_DEST (set)) == REG | |
fb6754f0 | 2253 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER) |
6e73e666 | 2254 | { |
fb6754f0 | 2255 | unsigned int regno = REGNO (SET_DEST (set)); |
713f41f9 BS |
2256 | rtx src = SET_SRC (set); |
2257 | ||
2258 | if (REG_NOTES (insn) != 0 | |
2259 | && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 | |
2260 | && REG_N_SETS (regno) == 1) | |
2261 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0) | |
2262 | && GET_CODE (XEXP (note, 0)) != EXPR_LIST | |
bb2cf916 | 2263 | && ! rtx_varies_p (XEXP (note, 0), 1) |
713f41f9 BS |
2264 | && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0))) |
2265 | { | |
2266 | reg_known_value[regno] = XEXP (note, 0); | |
2267 | reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV; | |
2268 | } | |
2269 | else if (REG_N_SETS (regno) == 1 | |
2270 | && GET_CODE (src) == PLUS | |
2271 | && GET_CODE (XEXP (src, 0)) == REG | |
fb6754f0 BS |
2272 | && REGNO (XEXP (src, 0)) >= FIRST_PSEUDO_REGISTER |
2273 | && (reg_known_value[REGNO (XEXP (src, 0))]) | |
713f41f9 BS |
2274 | && GET_CODE (XEXP (src, 1)) == CONST_INT) |
2275 | { | |
2276 | rtx op0 = XEXP (src, 0); | |
bb2cf916 | 2277 | op0 = reg_known_value[REGNO (op0)]; |
713f41f9 | 2278 | reg_known_value[regno] |
ed8908e7 | 2279 | = plus_constant (op0, INTVAL (XEXP (src, 1))); |
713f41f9 BS |
2280 | reg_known_equiv_p[regno] = 0; |
2281 | } | |
2282 | else if (REG_N_SETS (regno) == 1 | |
2283 | && ! rtx_varies_p (src, 1)) | |
2284 | { | |
2285 | reg_known_value[regno] = src; | |
2286 | reg_known_equiv_p[regno] = 0; | |
2287 | } | |
6e73e666 | 2288 | } |
ec907dd8 JL |
2289 | } |
2290 | else if (GET_CODE (insn) == NOTE | |
2291 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) | |
2292 | copying_arguments = 0; | |
6e73e666 | 2293 | } |
ec907dd8 | 2294 | |
6e73e666 | 2295 | /* Now propagate values from new_reg_base_value to reg_base_value. */ |
e51712db | 2296 | for (ui = 0; ui < reg_base_value_size; ui++) |
6e73e666 | 2297 | { |
e51712db KG |
2298 | if (new_reg_base_value[ui] |
2299 | && new_reg_base_value[ui] != reg_base_value[ui] | |
2300 | && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui])) | |
ec907dd8 | 2301 | { |
e51712db | 2302 | reg_base_value[ui] = new_reg_base_value[ui]; |
6e73e666 | 2303 | changed = 1; |
ec907dd8 | 2304 | } |
9ae8ffe7 | 2305 | } |
9ae8ffe7 | 2306 | } |
6e73e666 | 2307 | while (changed && ++pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 JL |
2308 | |
2309 | /* Fill in the remaining entries. */ | |
2310 | for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++) | |
2311 | if (reg_known_value[i] == 0) | |
2312 | reg_known_value[i] = regno_reg_rtx[i]; | |
2313 | ||
9ae8ffe7 JL |
2314 | /* Simplify the reg_base_value array so that no register refers to |
2315 | another register, except to special registers indirectly through | |
2316 | ADDRESS expressions. | |
2317 | ||
2318 | In theory this loop can take as long as O(registers^2), but unless | |
2319 | there are very long dependency chains it will run in close to linear | |
ea64ef27 JL |
2320 | time. |
2321 | ||
2322 | This loop may not be needed any longer now that the main loop does | |
2323 | a better job at propagating alias information. */ | |
2324 | pass = 0; | |
9ae8ffe7 JL |
2325 | do |
2326 | { | |
2327 | changed = 0; | |
ea64ef27 | 2328 | pass++; |
e51712db | 2329 | for (ui = 0; ui < reg_base_value_size; ui++) |
9ae8ffe7 | 2330 | { |
e51712db | 2331 | rtx base = reg_base_value[ui]; |
9ae8ffe7 JL |
2332 | if (base && GET_CODE (base) == REG) |
2333 | { | |
fb6754f0 | 2334 | unsigned int base_regno = REGNO (base); |
e51712db KG |
2335 | if (base_regno == ui) /* register set from itself */ |
2336 | reg_base_value[ui] = 0; | |
9ae8ffe7 | 2337 | else |
e51712db | 2338 | reg_base_value[ui] = reg_base_value[base_regno]; |
9ae8ffe7 JL |
2339 | changed = 1; |
2340 | } | |
2341 | } | |
2342 | } | |
ea64ef27 | 2343 | while (changed && pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 | 2344 | |
e05e2395 MM |
2345 | /* Clean up. */ |
2346 | free (new_reg_base_value); | |
ec907dd8 | 2347 | new_reg_base_value = 0; |
e05e2395 | 2348 | free (reg_seen); |
9ae8ffe7 JL |
2349 | reg_seen = 0; |
2350 | } | |
2351 | ||
2352 | void | |
2353 | end_alias_analysis () | |
2354 | { | |
e05e2395 | 2355 | free (reg_known_value + FIRST_PSEUDO_REGISTER); |
9ae8ffe7 | 2356 | reg_known_value = 0; |
ac606739 | 2357 | reg_known_value_size = 0; |
e05e2395 MM |
2358 | free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER); |
2359 | reg_known_equiv_p = 0; | |
ac606739 GS |
2360 | if (reg_base_value) |
2361 | { | |
1f8f4a0b | 2362 | ggc_del_root (reg_base_value); |
ac606739 GS |
2363 | free (reg_base_value); |
2364 | reg_base_value = 0; | |
2365 | } | |
9ae8ffe7 | 2366 | reg_base_value_size = 0; |
de12be17 JC |
2367 | if (alias_invariant) |
2368 | { | |
ac606739 | 2369 | free (alias_invariant); |
de12be17 JC |
2370 | alias_invariant = 0; |
2371 | } | |
9ae8ffe7 | 2372 | } |