]>
Commit | Line | Data |
---|---|---|
9ae8ffe7 | 1 | /* Alias analysis for GNU C |
3d994c6b | 2 | Copyright (C) 1997, 1998, 1999, 2000 Free Software Foundation, Inc. |
9ae8ffe7 JL |
3 | Contributed by John Carr (jfc@mit.edu). |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "config.h" | |
670ee920 | 23 | #include "system.h" |
9ae8ffe7 | 24 | #include "rtl.h" |
7790df19 | 25 | #include "tree.h" |
6baf1cc8 | 26 | #include "tm_p.h" |
49ad7cfa | 27 | #include "function.h" |
ac606739 | 28 | #include "insn-flags.h" |
9ae8ffe7 JL |
29 | #include "expr.h" |
30 | #include "regs.h" | |
31 | #include "hard-reg-set.h" | |
32 | #include "flags.h" | |
264fac34 | 33 | #include "output.h" |
2e107e9e | 34 | #include "toplev.h" |
eab5c70a | 35 | #include "cselib.h" |
3932261a | 36 | #include "splay-tree.h" |
ac606739 | 37 | #include "ggc.h" |
3932261a MM |
38 | |
39 | /* The alias sets assigned to MEMs assist the back-end in determining | |
40 | which MEMs can alias which other MEMs. In general, two MEMs in | |
ac3d9668 RK |
41 | different alias sets cannot alias each other, with one important |
42 | exception. Consider something like: | |
3932261a MM |
43 | |
44 | struct S {int i; double d; }; | |
45 | ||
46 | a store to an `S' can alias something of either type `int' or type | |
47 | `double'. (However, a store to an `int' cannot alias a `double' | |
48 | and vice versa.) We indicate this via a tree structure that looks | |
49 | like: | |
50 | struct S | |
51 | / \ | |
52 | / \ | |
53 | |/_ _\| | |
54 | int double | |
55 | ||
ac3d9668 RK |
56 | (The arrows are directed and point downwards.) |
57 | In this situation we say the alias set for `struct S' is the | |
58 | `superset' and that those for `int' and `double' are `subsets'. | |
59 | ||
3bdf5ad1 RK |
60 | To see whether two alias sets can point to the same memory, we must |
61 | see if either alias set is a subset of the other. We need not trace | |
62 | past immediate decendents, however, since we propagate all | |
63 | grandchildren up one level. | |
3932261a MM |
64 | |
65 | Alias set zero is implicitly a superset of all other alias sets. | |
66 | However, this is no actual entry for alias set zero. It is an | |
67 | error to attempt to explicitly construct a subset of zero. */ | |
68 | ||
d4b60170 RK |
69 | typedef struct alias_set_entry |
70 | { | |
3932261a | 71 | /* The alias set number, as stored in MEM_ALIAS_SET. */ |
3bdf5ad1 | 72 | HOST_WIDE_INT alias_set; |
3932261a MM |
73 | |
74 | /* The children of the alias set. These are not just the immediate | |
ac3d9668 | 75 | children, but, in fact, all decendents. So, if we have: |
3932261a MM |
76 | |
77 | struct T { struct S s; float f; } | |
78 | ||
79 | continuing our example above, the children here will be all of | |
80 | `int', `double', `float', and `struct S'. */ | |
81 | splay_tree children; | |
2bf105ab RK |
82 | |
83 | /* Nonzero if would have a child of zero: this effectively makes this | |
84 | alias set the same as alias set zero. */ | |
85 | int has_zero_child; | |
d4b60170 | 86 | } *alias_set_entry; |
9ae8ffe7 | 87 | |
3d994c6b KG |
88 | static int rtx_equal_for_memref_p PARAMS ((rtx, rtx)); |
89 | static rtx find_symbolic_term PARAMS ((rtx)); | |
eab5c70a | 90 | static rtx get_addr PARAMS ((rtx)); |
3d994c6b KG |
91 | static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx, |
92 | HOST_WIDE_INT)); | |
93 | static void record_set PARAMS ((rtx, rtx, void *)); | |
94 | static rtx find_base_term PARAMS ((rtx)); | |
95 | static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode, | |
96 | enum machine_mode)); | |
97 | static rtx find_base_value PARAMS ((rtx)); | |
98 | static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx)); | |
99 | static int insert_subset_children PARAMS ((splay_tree_node, void*)); | |
3bdf5ad1 RK |
100 | static tree find_base_decl PARAMS ((tree)); |
101 | static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT)); | |
eab5c70a | 102 | static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx, |
3bdf5ad1 | 103 | int (*) (rtx))); |
3d994c6b KG |
104 | static int aliases_everything_p PARAMS ((rtx)); |
105 | static int write_dependence_p PARAMS ((rtx, rtx, int)); | |
106 | static int nonlocal_reference_p PARAMS ((rtx)); | |
9ae8ffe7 JL |
107 | |
108 | /* Set up all info needed to perform alias analysis on memory references. */ | |
109 | ||
d4b60170 | 110 | /* Returns the size in bytes of the mode of X. */ |
9ae8ffe7 JL |
111 | #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X))) |
112 | ||
41472af8 | 113 | /* Returns nonzero if MEM1 and MEM2 do not alias because they are in |
264fac34 MM |
114 | different alias sets. We ignore alias sets in functions making use |
115 | of variable arguments because the va_arg macros on some systems are | |
116 | not legal ANSI C. */ | |
117 | #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \ | |
3932261a | 118 | mems_in_disjoint_alias_sets_p (MEM1, MEM2) |
41472af8 | 119 | |
ea64ef27 | 120 | /* Cap the number of passes we make over the insns propagating alias |
ac3d9668 | 121 | information through set chains. 10 is a completely arbitrary choice. */ |
ea64ef27 JL |
122 | #define MAX_ALIAS_LOOP_PASSES 10 |
123 | ||
9ae8ffe7 JL |
124 | /* reg_base_value[N] gives an address to which register N is related. |
125 | If all sets after the first add or subtract to the current value | |
126 | or otherwise modify it so it does not point to a different top level | |
127 | object, reg_base_value[N] is equal to the address part of the source | |
2a2c8203 JC |
128 | of the first set. |
129 | ||
130 | A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS | |
131 | expressions represent certain special values: function arguments and | |
b3b5ad95 JL |
132 | the stack, frame, and argument pointers. |
133 | ||
134 | The contents of an ADDRESS is not normally used, the mode of the | |
135 | ADDRESS determines whether the ADDRESS is a function argument or some | |
136 | other special value. Pointer equality, not rtx_equal_p, determines whether | |
137 | two ADDRESS expressions refer to the same base address. | |
138 | ||
139 | The only use of the contents of an ADDRESS is for determining if the | |
140 | current function performs nonlocal memory memory references for the | |
141 | purposes of marking the function as a constant function. */ | |
2a2c8203 | 142 | |
ac606739 GS |
143 | static rtx *reg_base_value; |
144 | static rtx *new_reg_base_value; | |
d4b60170 RK |
145 | static unsigned int reg_base_value_size; /* size of reg_base_value array */ |
146 | ||
9ae8ffe7 | 147 | #define REG_BASE_VALUE(X) \ |
3bdf5ad1 | 148 | (REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0) |
9ae8ffe7 | 149 | |
de12be17 JC |
150 | /* Vector of known invariant relationships between registers. Set in |
151 | loop unrolling. Indexed by register number, if nonzero the value | |
152 | is an expression describing this register in terms of another. | |
153 | ||
154 | The length of this array is REG_BASE_VALUE_SIZE. | |
155 | ||
156 | Because this array contains only pseudo registers it has no effect | |
157 | after reload. */ | |
158 | static rtx *alias_invariant; | |
159 | ||
c13e8210 MM |
160 | /* Vector indexed by N giving the initial (unchanging) value known for |
161 | pseudo-register N. This array is initialized in | |
162 | init_alias_analysis, and does not change until end_alias_analysis | |
163 | is called. */ | |
9ae8ffe7 JL |
164 | rtx *reg_known_value; |
165 | ||
166 | /* Indicates number of valid entries in reg_known_value. */ | |
770ae6cc | 167 | static unsigned int reg_known_value_size; |
9ae8ffe7 JL |
168 | |
169 | /* Vector recording for each reg_known_value whether it is due to a | |
170 | REG_EQUIV note. Future passes (viz., reload) may replace the | |
171 | pseudo with the equivalent expression and so we account for the | |
ac3d9668 RK |
172 | dependences that would be introduced if that happens. |
173 | ||
174 | The REG_EQUIV notes created in assign_parms may mention the arg | |
175 | pointer, and there are explicit insns in the RTL that modify the | |
176 | arg pointer. Thus we must ensure that such insns don't get | |
177 | scheduled across each other because that would invalidate the | |
178 | REG_EQUIV notes. One could argue that the REG_EQUIV notes are | |
179 | wrong, but solving the problem in the scheduler will likely give | |
180 | better code, so we do it here. */ | |
9ae8ffe7 JL |
181 | char *reg_known_equiv_p; |
182 | ||
2a2c8203 JC |
183 | /* True when scanning insns from the start of the rtl to the |
184 | NOTE_INSN_FUNCTION_BEG note. */ | |
9ae8ffe7 JL |
185 | static int copying_arguments; |
186 | ||
3932261a | 187 | /* The splay-tree used to store the various alias set entries. */ |
3932261a | 188 | static splay_tree alias_sets; |
ac3d9668 | 189 | \f |
3932261a MM |
190 | /* Returns a pointer to the alias set entry for ALIAS_SET, if there is |
191 | such an entry, or NULL otherwise. */ | |
192 | ||
193 | static alias_set_entry | |
194 | get_alias_set_entry (alias_set) | |
3bdf5ad1 | 195 | HOST_WIDE_INT alias_set; |
3932261a | 196 | { |
d4b60170 RK |
197 | splay_tree_node sn |
198 | = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set); | |
3932261a | 199 | |
d4b60170 | 200 | return sn != 0 ? ((alias_set_entry) sn->value) : 0; |
3932261a MM |
201 | } |
202 | ||
ac3d9668 RK |
203 | /* Returns nonzero if the alias sets for MEM1 and MEM2 are such that |
204 | the two MEMs cannot alias each other. */ | |
3932261a MM |
205 | |
206 | static int | |
207 | mems_in_disjoint_alias_sets_p (mem1, mem2) | |
208 | rtx mem1; | |
209 | rtx mem2; | |
210 | { | |
211 | alias_set_entry ase; | |
212 | ||
213 | #ifdef ENABLE_CHECKING | |
214 | /* Perform a basic sanity check. Namely, that there are no alias sets | |
215 | if we're not using strict aliasing. This helps to catch bugs | |
216 | whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or | |
217 | where a MEM is allocated in some way other than by the use of | |
218 | gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to | |
219 | use alias sets to indicate that spilled registers cannot alias each | |
220 | other, we might need to remove this check. */ | |
d4b60170 RK |
221 | if (! flag_strict_aliasing |
222 | && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0)) | |
3932261a MM |
223 | abort (); |
224 | #endif | |
225 | ||
226 | /* The code used in varargs macros are often not conforming ANSI C, | |
227 | which can trick the compiler into making incorrect aliasing | |
228 | assumptions in these functions. So, we don't use alias sets in | |
229 | such a function. FIXME: This should be moved into the front-end; | |
230 | it is a language-dependent notion, and there's no reason not to | |
231 | still use these checks to handle globals. */ | |
232 | if (current_function_stdarg || current_function_varargs) | |
233 | return 0; | |
234 | ||
d4b60170 RK |
235 | /* If have no alias set information for one of the MEMs, we have to assume |
236 | it can alias anything. */ | |
237 | if (MEM_ALIAS_SET (mem1) == 0 || MEM_ALIAS_SET (mem2) == 0) | |
3932261a MM |
238 | return 0; |
239 | ||
d4b60170 | 240 | /* If the two alias sets are the same, they may alias. */ |
3932261a | 241 | if (MEM_ALIAS_SET (mem1) == MEM_ALIAS_SET (mem2)) |
3932261a MM |
242 | return 0; |
243 | ||
3bdf5ad1 | 244 | /* See if the first alias set is a subset of the second. */ |
3932261a | 245 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem1)); |
2bf105ab RK |
246 | if (ase != 0 |
247 | && (ase->has_zero_child | |
248 | || splay_tree_lookup (ase->children, | |
249 | (splay_tree_key) MEM_ALIAS_SET (mem2)))) | |
3932261a MM |
250 | return 0; |
251 | ||
252 | /* Now do the same, but with the alias sets reversed. */ | |
253 | ase = get_alias_set_entry (MEM_ALIAS_SET (mem2)); | |
2bf105ab RK |
254 | if (ase != 0 |
255 | && (ase->has_zero_child | |
256 | || splay_tree_lookup (ase->children, | |
257 | (splay_tree_key) MEM_ALIAS_SET (mem1)))) | |
3932261a MM |
258 | return 0; |
259 | ||
260 | /* The two MEMs are in distinct alias sets, and neither one is the | |
261 | child of the other. Therefore, they cannot alias. */ | |
262 | return 1; | |
263 | } | |
264 | ||
265 | /* Insert the NODE into the splay tree given by DATA. Used by | |
266 | record_alias_subset via splay_tree_foreach. */ | |
267 | ||
268 | static int | |
269 | insert_subset_children (node, data) | |
270 | splay_tree_node node; | |
271 | void *data; | |
272 | { | |
d4b60170 | 273 | splay_tree_insert ((splay_tree) data, node->key, node->value); |
3932261a MM |
274 | |
275 | return 0; | |
276 | } | |
3bdf5ad1 RK |
277 | \f |
278 | /* T is an expression with pointer type. Find the DECL on which this | |
279 | expression is based. (For example, in `a[i]' this would be `a'.) | |
280 | If there is no such DECL, or a unique decl cannot be determined, | |
281 | NULL_TREE is retured. */ | |
282 | ||
283 | static tree | |
284 | find_base_decl (t) | |
285 | tree t; | |
286 | { | |
287 | tree d0, d1, d2; | |
288 | ||
289 | if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t))) | |
290 | return 0; | |
291 | ||
292 | /* If this is a declaration, return it. */ | |
293 | if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd') | |
294 | return t; | |
295 | ||
296 | /* Handle general expressions. It would be nice to deal with | |
297 | COMPONENT_REFs here. If we could tell that `a' and `b' were the | |
298 | same, then `a->f' and `b->f' are also the same. */ | |
299 | switch (TREE_CODE_CLASS (TREE_CODE (t))) | |
300 | { | |
301 | case '1': | |
302 | return find_base_decl (TREE_OPERAND (t, 0)); | |
303 | ||
304 | case '2': | |
305 | /* Return 0 if found in neither or both are the same. */ | |
306 | d0 = find_base_decl (TREE_OPERAND (t, 0)); | |
307 | d1 = find_base_decl (TREE_OPERAND (t, 1)); | |
308 | if (d0 == d1) | |
309 | return d0; | |
310 | else if (d0 == 0) | |
311 | return d1; | |
312 | else if (d1 == 0) | |
313 | return d0; | |
314 | else | |
315 | return 0; | |
316 | ||
317 | case '3': | |
318 | d0 = find_base_decl (TREE_OPERAND (t, 0)); | |
319 | d1 = find_base_decl (TREE_OPERAND (t, 1)); | |
320 | d0 = find_base_decl (TREE_OPERAND (t, 0)); | |
321 | d2 = find_base_decl (TREE_OPERAND (t, 2)); | |
322 | ||
323 | /* Set any nonzero values from the last, then from the first. */ | |
324 | if (d1 == 0) d1 = d2; | |
325 | if (d0 == 0) d0 = d1; | |
326 | if (d1 == 0) d1 = d0; | |
327 | if (d2 == 0) d2 = d1; | |
328 | ||
329 | /* At this point all are nonzero or all are zero. If all three are the | |
330 | same, return it. Otherwise, return zero. */ | |
331 | return (d0 == d1 && d1 == d2) ? d0 : 0; | |
332 | ||
333 | default: | |
334 | return 0; | |
335 | } | |
336 | } | |
337 | ||
338 | /* Return the alias set for T, which may be either a type or an | |
339 | expression. Call language-specific routine for help, if needed. */ | |
340 | ||
341 | HOST_WIDE_INT | |
342 | get_alias_set (t) | |
343 | tree t; | |
344 | { | |
f824e5c3 | 345 | tree orig_t; |
3bdf5ad1 | 346 | HOST_WIDE_INT set; |
3bdf5ad1 RK |
347 | |
348 | /* If we're not doing any alias analysis, just assume everything | |
349 | aliases everything else. Also return 0 if this or its type is | |
350 | an error. */ | |
351 | if (! flag_strict_aliasing || t == error_mark_node | |
352 | || (! TYPE_P (t) | |
353 | && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node))) | |
354 | return 0; | |
355 | ||
356 | /* We can be passed either an expression or a type. This and the | |
357 | language-specific routine may make mutually-recursive calls to | |
358 | each other to figure out what to do. At each juncture, we see if | |
359 | this is a tree that the language may need to handle specially. | |
f824e5c3 RK |
360 | First handle things that aren't types and start by removing nops |
361 | since we care only about the actual object. */ | |
362 | if (! TYPE_P (t)) | |
3bdf5ad1 | 363 | { |
f824e5c3 RK |
364 | while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR |
365 | || TREE_CODE (t) == NON_LVALUE_EXPR) | |
366 | t = TREE_OPERAND (t, 0); | |
367 | ||
368 | /* Now give the language a chance to do something but record what we | |
369 | gave it this time. */ | |
370 | orig_t = t; | |
2e761e49 | 371 | if ((set = lang_get_alias_set (t)) != -1) |
f824e5c3 RK |
372 | return set; |
373 | ||
80661759 RK |
374 | /* Now loop the same way as get_inner_reference and get the alias |
375 | set to use. Pick up the outermost object that we could have | |
376 | a pointer to. */ | |
377 | while (1) | |
378 | { | |
379 | /* Unnamed bitfields are not an addressable object. */ | |
380 | if (TREE_CODE (t) == BIT_FIELD_REF) | |
381 | ; | |
382 | else if (TREE_CODE (t) == COMPONENT_REF) | |
383 | { | |
384 | if (! DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1))) | |
385 | /* Stop at an adressable decl. */ | |
386 | break; | |
387 | } | |
388 | else if (TREE_CODE (t) == ARRAY_REF) | |
389 | { | |
390 | if (! TYPE_NONALIASED_COMPONENT | |
391 | (TREE_TYPE (TREE_OPERAND (t, 0)))) | |
392 | /* Stop at an addresssable array element. */ | |
393 | break; | |
394 | } | |
395 | else if (TREE_CODE (t) != NON_LVALUE_EXPR | |
396 | && ! ((TREE_CODE (t) == NOP_EXPR | |
397 | || TREE_CODE (t) == CONVERT_EXPR) | |
398 | && (TYPE_MODE (TREE_TYPE (t)) | |
399 | == TYPE_MODE (TREE_TYPE (TREE_OPERAND (t, 0)))))) | |
400 | /* Stop if not one of above and not mode-preserving conversion. */ | |
401 | break; | |
402 | ||
403 | t = TREE_OPERAND (t, 0); | |
404 | } | |
405 | ||
f824e5c3 RK |
406 | if (TREE_CODE (t) == INDIRECT_REF) |
407 | { | |
408 | /* Check for accesses through restrict-qualified pointers. */ | |
409 | tree decl = find_base_decl (TREE_OPERAND (t, 0)); | |
410 | ||
411 | if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl)) | |
412 | /* We use the alias set indicated in the declaration. */ | |
413 | return DECL_POINTER_ALIAS_SET (decl); | |
414 | ||
415 | /* If we have an INDIRECT_REF via a void pointer, we don't | |
416 | know anything about what that might alias. */ | |
417 | if (TREE_CODE (TREE_TYPE (t)) == VOID_TYPE) | |
418 | return 0; | |
419 | } | |
420 | ||
421 | /* Give the language another chance to do something special. */ | |
2e761e49 RH |
422 | if (orig_t != t |
423 | && (set = lang_get_alias_set (t)) != -1) | |
f824e5c3 RK |
424 | return set; |
425 | ||
426 | /* Now all we care about is the type. */ | |
427 | t = TREE_TYPE (t); | |
3bdf5ad1 RK |
428 | } |
429 | ||
3bdf5ad1 RK |
430 | /* Variant qualifiers don't affect the alias set, so get the main |
431 | variant. If this is a type with a known alias set, return it. */ | |
432 | t = TYPE_MAIN_VARIANT (t); | |
433 | if (TYPE_P (t) && TYPE_ALIAS_SET_KNOWN_P (t)) | |
434 | return TYPE_ALIAS_SET (t); | |
435 | ||
436 | /* See if the language has special handling for this type. */ | |
2e761e49 | 437 | if ((set = lang_get_alias_set (t)) != -1) |
2bf105ab RK |
438 | { |
439 | /* If the alias set is now known, we are done. */ | |
440 | if (TYPE_ALIAS_SET_KNOWN_P (t)) | |
441 | return TYPE_ALIAS_SET (t); | |
442 | } | |
443 | ||
3bdf5ad1 RK |
444 | /* There are no objects of FUNCTION_TYPE, so there's no point in |
445 | using up an alias set for them. (There are, of course, pointers | |
446 | and references to functions, but that's different.) */ | |
447 | else if (TREE_CODE (t) == FUNCTION_TYPE) | |
448 | set = 0; | |
449 | else | |
450 | /* Otherwise make a new alias set for this type. */ | |
451 | set = new_alias_set (); | |
452 | ||
453 | TYPE_ALIAS_SET (t) = set; | |
2bf105ab RK |
454 | |
455 | /* If this is an aggregate type, we must record any component aliasing | |
456 | information. */ | |
457 | if (AGGREGATE_TYPE_P (t)) | |
458 | record_component_aliases (t); | |
459 | ||
3bdf5ad1 RK |
460 | return set; |
461 | } | |
462 | ||
463 | /* Return a brand-new alias set. */ | |
464 | ||
465 | HOST_WIDE_INT | |
466 | new_alias_set () | |
467 | { | |
468 | static HOST_WIDE_INT last_alias_set; | |
469 | ||
470 | if (flag_strict_aliasing) | |
471 | return ++last_alias_set; | |
472 | else | |
473 | return 0; | |
474 | } | |
3932261a MM |
475 | |
476 | /* Indicate that things in SUBSET can alias things in SUPERSET, but | |
477 | not vice versa. For example, in C, a store to an `int' can alias a | |
478 | structure containing an `int', but not vice versa. Here, the | |
479 | structure would be the SUPERSET and `int' the SUBSET. This | |
a0c33338 | 480 | function should be called only once per SUPERSET/SUBSET pair. |
3932261a MM |
481 | |
482 | It is illegal for SUPERSET to be zero; everything is implicitly a | |
483 | subset of alias set zero. */ | |
484 | ||
485 | void | |
486 | record_alias_subset (superset, subset) | |
3bdf5ad1 RK |
487 | HOST_WIDE_INT superset; |
488 | HOST_WIDE_INT subset; | |
3932261a MM |
489 | { |
490 | alias_set_entry superset_entry; | |
491 | alias_set_entry subset_entry; | |
492 | ||
493 | if (superset == 0) | |
494 | abort (); | |
495 | ||
496 | superset_entry = get_alias_set_entry (superset); | |
d4b60170 | 497 | if (superset_entry == 0) |
3932261a MM |
498 | { |
499 | /* Create an entry for the SUPERSET, so that we have a place to | |
500 | attach the SUBSET. */ | |
d4b60170 RK |
501 | superset_entry |
502 | = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry)); | |
3932261a MM |
503 | superset_entry->alias_set = superset; |
504 | superset_entry->children | |
30f72379 | 505 | = splay_tree_new (splay_tree_compare_ints, 0, 0); |
570eb5c8 | 506 | superset_entry->has_zero_child = 0; |
d4b60170 | 507 | splay_tree_insert (alias_sets, (splay_tree_key) superset, |
3932261a | 508 | (splay_tree_value) superset_entry); |
3932261a MM |
509 | } |
510 | ||
2bf105ab RK |
511 | if (subset == 0) |
512 | superset_entry->has_zero_child = 1; | |
513 | else | |
514 | { | |
515 | subset_entry = get_alias_set_entry (subset); | |
516 | /* If there is an entry for the subset, enter all of its children | |
517 | (if they are not already present) as children of the SUPERSET. */ | |
518 | if (subset_entry) | |
519 | { | |
520 | if (subset_entry->has_zero_child) | |
521 | superset_entry->has_zero_child = 1; | |
d4b60170 | 522 | |
2bf105ab RK |
523 | splay_tree_foreach (subset_entry->children, insert_subset_children, |
524 | superset_entry->children); | |
525 | } | |
3932261a | 526 | |
2bf105ab RK |
527 | /* Enter the SUBSET itself as a child of the SUPERSET. */ |
528 | splay_tree_insert (superset_entry->children, | |
529 | (splay_tree_key) subset, 0); | |
530 | } | |
3932261a MM |
531 | } |
532 | ||
a0c33338 RK |
533 | /* Record that component types of TYPE, if any, are part of that type for |
534 | aliasing purposes. For record types, we only record component types | |
535 | for fields that are marked addressable. For array types, we always | |
536 | record the component types, so the front end should not call this | |
537 | function if the individual component aren't addressable. */ | |
538 | ||
539 | void | |
540 | record_component_aliases (type) | |
541 | tree type; | |
542 | { | |
3bdf5ad1 | 543 | HOST_WIDE_INT superset = get_alias_set (type); |
a0c33338 RK |
544 | tree field; |
545 | ||
546 | if (superset == 0) | |
547 | return; | |
548 | ||
549 | switch (TREE_CODE (type)) | |
550 | { | |
551 | case ARRAY_TYPE: | |
2bf105ab RK |
552 | if (! TYPE_NONALIASED_COMPONENT (type)) |
553 | record_alias_subset (superset, get_alias_set (TREE_TYPE (type))); | |
a0c33338 RK |
554 | break; |
555 | ||
556 | case RECORD_TYPE: | |
557 | case UNION_TYPE: | |
558 | case QUAL_UNION_TYPE: | |
559 | for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field)) | |
b16a49a1 | 560 | if (TREE_CODE (field) == FIELD_DECL && ! DECL_NONADDRESSABLE_P (field)) |
2bf105ab | 561 | record_alias_subset (superset, get_alias_set (TREE_TYPE (field))); |
a0c33338 RK |
562 | break; |
563 | ||
564 | default: | |
565 | break; | |
566 | } | |
567 | } | |
568 | ||
3bdf5ad1 RK |
569 | /* Allocate an alias set for use in storing and reading from the varargs |
570 | spill area. */ | |
571 | ||
572 | HOST_WIDE_INT | |
573 | get_varargs_alias_set () | |
574 | { | |
575 | static HOST_WIDE_INT set = -1; | |
576 | ||
577 | if (set == -1) | |
578 | set = new_alias_set (); | |
579 | ||
580 | return set; | |
581 | } | |
582 | ||
583 | /* Likewise, but used for the fixed portions of the frame, e.g., register | |
584 | save areas. */ | |
585 | ||
586 | HOST_WIDE_INT | |
587 | get_frame_alias_set () | |
588 | { | |
589 | static HOST_WIDE_INT set = -1; | |
590 | ||
591 | if (set == -1) | |
592 | set = new_alias_set (); | |
593 | ||
594 | return set; | |
595 | } | |
596 | ||
2a2c8203 JC |
597 | /* Inside SRC, the source of a SET, find a base address. */ |
598 | ||
9ae8ffe7 JL |
599 | static rtx |
600 | find_base_value (src) | |
601 | register rtx src; | |
602 | { | |
603 | switch (GET_CODE (src)) | |
604 | { | |
605 | case SYMBOL_REF: | |
606 | case LABEL_REF: | |
607 | return src; | |
608 | ||
609 | case REG: | |
d4b60170 | 610 | /* At the start of a function, argument registers have known base |
2a2c8203 JC |
611 | values which may be lost later. Returning an ADDRESS |
612 | expression here allows optimization based on argument values | |
613 | even when the argument registers are used for other purposes. */ | |
614 | if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments) | |
ec907dd8 | 615 | return new_reg_base_value[REGNO (src)]; |
73774bc7 | 616 | |
eaf407a5 JL |
617 | /* If a pseudo has a known base value, return it. Do not do this |
618 | for hard regs since it can result in a circular dependency | |
619 | chain for registers which have values at function entry. | |
620 | ||
621 | The test above is not sufficient because the scheduler may move | |
622 | a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */ | |
623 | if (REGNO (src) >= FIRST_PSEUDO_REGISTER | |
e51712db | 624 | && (unsigned) REGNO (src) < reg_base_value_size |
eaf407a5 | 625 | && reg_base_value[REGNO (src)]) |
73774bc7 JL |
626 | return reg_base_value[REGNO (src)]; |
627 | ||
9ae8ffe7 JL |
628 | return src; |
629 | ||
630 | case MEM: | |
631 | /* Check for an argument passed in memory. Only record in the | |
632 | copying-arguments block; it is too hard to track changes | |
633 | otherwise. */ | |
634 | if (copying_arguments | |
635 | && (XEXP (src, 0) == arg_pointer_rtx | |
636 | || (GET_CODE (XEXP (src, 0)) == PLUS | |
637 | && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx))) | |
38a448ca | 638 | return gen_rtx_ADDRESS (VOIDmode, src); |
9ae8ffe7 JL |
639 | return 0; |
640 | ||
641 | case CONST: | |
642 | src = XEXP (src, 0); | |
643 | if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS) | |
644 | break; | |
d4b60170 RK |
645 | |
646 | /* ... fall through ... */ | |
2a2c8203 | 647 | |
9ae8ffe7 JL |
648 | case PLUS: |
649 | case MINUS: | |
2a2c8203 | 650 | { |
ec907dd8 JL |
651 | rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1); |
652 | ||
653 | /* If either operand is a REG, then see if we already have | |
654 | a known value for it. */ | |
655 | if (GET_CODE (src_0) == REG) | |
656 | { | |
657 | temp = find_base_value (src_0); | |
d4b60170 | 658 | if (temp != 0) |
ec907dd8 JL |
659 | src_0 = temp; |
660 | } | |
661 | ||
662 | if (GET_CODE (src_1) == REG) | |
663 | { | |
664 | temp = find_base_value (src_1); | |
d4b60170 | 665 | if (temp!= 0) |
ec907dd8 JL |
666 | src_1 = temp; |
667 | } | |
2a2c8203 | 668 | |
d4b60170 | 669 | /* Guess which operand is the base address: |
ec907dd8 JL |
670 | If either operand is a symbol, then it is the base. If |
671 | either operand is a CONST_INT, then the other is the base. */ | |
d4b60170 | 672 | if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0)) |
2a2c8203 | 673 | return find_base_value (src_0); |
d4b60170 | 674 | else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1)) |
ec907dd8 JL |
675 | return find_base_value (src_1); |
676 | ||
d4b60170 | 677 | /* This might not be necessary anymore: |
ec907dd8 JL |
678 | If either operand is a REG that is a known pointer, then it |
679 | is the base. */ | |
d4b60170 | 680 | else if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0))) |
2a2c8203 | 681 | return find_base_value (src_0); |
d4b60170 | 682 | else if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1))) |
2a2c8203 JC |
683 | return find_base_value (src_1); |
684 | ||
9ae8ffe7 | 685 | return 0; |
2a2c8203 JC |
686 | } |
687 | ||
688 | case LO_SUM: | |
689 | /* The standard form is (lo_sum reg sym) so look only at the | |
690 | second operand. */ | |
691 | return find_base_value (XEXP (src, 1)); | |
9ae8ffe7 JL |
692 | |
693 | case AND: | |
694 | /* If the second operand is constant set the base | |
695 | address to the first operand. */ | |
2a2c8203 JC |
696 | if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0) |
697 | return find_base_value (XEXP (src, 0)); | |
9ae8ffe7 JL |
698 | return 0; |
699 | ||
de12be17 JC |
700 | case ZERO_EXTEND: |
701 | case SIGN_EXTEND: /* used for NT/Alpha pointers */ | |
9ae8ffe7 | 702 | case HIGH: |
2a2c8203 | 703 | return find_base_value (XEXP (src, 0)); |
1d300e19 KG |
704 | |
705 | default: | |
706 | break; | |
9ae8ffe7 JL |
707 | } |
708 | ||
709 | return 0; | |
710 | } | |
711 | ||
712 | /* Called from init_alias_analysis indirectly through note_stores. */ | |
713 | ||
d4b60170 | 714 | /* While scanning insns to find base values, reg_seen[N] is nonzero if |
9ae8ffe7 JL |
715 | register N has been set in this function. */ |
716 | static char *reg_seen; | |
717 | ||
13309a5f JC |
718 | /* Addresses which are known not to alias anything else are identified |
719 | by a unique integer. */ | |
ec907dd8 JL |
720 | static int unique_id; |
721 | ||
2a2c8203 | 722 | static void |
84832317 | 723 | record_set (dest, set, data) |
9ae8ffe7 | 724 | rtx dest, set; |
84832317 | 725 | void *data ATTRIBUTE_UNUSED; |
9ae8ffe7 | 726 | { |
ac606739 | 727 | register unsigned regno; |
9ae8ffe7 JL |
728 | rtx src; |
729 | ||
730 | if (GET_CODE (dest) != REG) | |
731 | return; | |
732 | ||
733 | regno = REGNO (dest); | |
734 | ||
ac606739 GS |
735 | if (regno >= reg_base_value_size) |
736 | abort (); | |
737 | ||
9ae8ffe7 JL |
738 | if (set) |
739 | { | |
740 | /* A CLOBBER wipes out any old value but does not prevent a previously | |
741 | unset register from acquiring a base address (i.e. reg_seen is not | |
742 | set). */ | |
743 | if (GET_CODE (set) == CLOBBER) | |
744 | { | |
ec907dd8 | 745 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
746 | return; |
747 | } | |
748 | src = SET_SRC (set); | |
749 | } | |
750 | else | |
751 | { | |
9ae8ffe7 JL |
752 | if (reg_seen[regno]) |
753 | { | |
ec907dd8 | 754 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
755 | return; |
756 | } | |
757 | reg_seen[regno] = 1; | |
38a448ca RH |
758 | new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode, |
759 | GEN_INT (unique_id++)); | |
9ae8ffe7 JL |
760 | return; |
761 | } | |
762 | ||
763 | /* This is not the first set. If the new value is not related to the | |
764 | old value, forget the base value. Note that the following code is | |
765 | not detected: | |
766 | extern int x, y; int *p = &x; p += (&y-&x); | |
767 | ANSI C does not allow computing the difference of addresses | |
768 | of distinct top level objects. */ | |
ec907dd8 | 769 | if (new_reg_base_value[regno]) |
9ae8ffe7 JL |
770 | switch (GET_CODE (src)) |
771 | { | |
2a2c8203 | 772 | case LO_SUM: |
9ae8ffe7 JL |
773 | case PLUS: |
774 | case MINUS: | |
775 | if (XEXP (src, 0) != dest && XEXP (src, 1) != dest) | |
ec907dd8 | 776 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
777 | break; |
778 | case AND: | |
779 | if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT) | |
ec907dd8 | 780 | new_reg_base_value[regno] = 0; |
9ae8ffe7 | 781 | break; |
9ae8ffe7 | 782 | default: |
ec907dd8 | 783 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
784 | break; |
785 | } | |
786 | /* If this is the first set of a register, record the value. */ | |
787 | else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
ec907dd8 JL |
788 | && ! reg_seen[regno] && new_reg_base_value[regno] == 0) |
789 | new_reg_base_value[regno] = find_base_value (src); | |
9ae8ffe7 JL |
790 | |
791 | reg_seen[regno] = 1; | |
792 | } | |
793 | ||
ac3d9668 RK |
794 | /* Called from loop optimization when a new pseudo-register is |
795 | created. It indicates that REGNO is being set to VAL. f INVARIANT | |
796 | is true then this value also describes an invariant relationship | |
797 | which can be used to deduce that two registers with unknown values | |
798 | are different. */ | |
d4b60170 | 799 | |
9ae8ffe7 | 800 | void |
de12be17 | 801 | record_base_value (regno, val, invariant) |
ac3d9668 | 802 | unsigned int regno; |
9ae8ffe7 | 803 | rtx val; |
de12be17 | 804 | int invariant; |
9ae8ffe7 | 805 | { |
ac3d9668 | 806 | if (regno >= reg_base_value_size) |
9ae8ffe7 | 807 | return; |
de12be17 | 808 | |
de12be17 JC |
809 | if (invariant && alias_invariant) |
810 | alias_invariant[regno] = val; | |
811 | ||
9ae8ffe7 JL |
812 | if (GET_CODE (val) == REG) |
813 | { | |
ac3d9668 | 814 | if (REGNO (val) < reg_base_value_size) |
d4b60170 RK |
815 | reg_base_value[regno] = reg_base_value[REGNO (val)]; |
816 | ||
9ae8ffe7 JL |
817 | return; |
818 | } | |
d4b60170 | 819 | |
9ae8ffe7 JL |
820 | reg_base_value[regno] = find_base_value (val); |
821 | } | |
822 | ||
db048faf MM |
823 | /* Returns a canonical version of X, from the point of view alias |
824 | analysis. (For example, if X is a MEM whose address is a register, | |
825 | and the register has a known value (say a SYMBOL_REF), then a MEM | |
826 | whose address is the SYMBOL_REF is returned.) */ | |
827 | ||
828 | rtx | |
9ae8ffe7 JL |
829 | canon_rtx (x) |
830 | rtx x; | |
831 | { | |
832 | /* Recursively look for equivalences. */ | |
833 | if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
834 | && REGNO (x) < reg_known_value_size) | |
835 | return reg_known_value[REGNO (x)] == x | |
836 | ? x : canon_rtx (reg_known_value[REGNO (x)]); | |
837 | else if (GET_CODE (x) == PLUS) | |
838 | { | |
839 | rtx x0 = canon_rtx (XEXP (x, 0)); | |
840 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
841 | ||
842 | if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1)) | |
843 | { | |
844 | /* We can tolerate LO_SUMs being offset here; these | |
845 | rtl are used for nothing other than comparisons. */ | |
846 | if (GET_CODE (x0) == CONST_INT) | |
847 | return plus_constant_for_output (x1, INTVAL (x0)); | |
848 | else if (GET_CODE (x1) == CONST_INT) | |
849 | return plus_constant_for_output (x0, INTVAL (x1)); | |
38a448ca | 850 | return gen_rtx_PLUS (GET_MODE (x), x0, x1); |
9ae8ffe7 JL |
851 | } |
852 | } | |
d4b60170 | 853 | |
9ae8ffe7 JL |
854 | /* This gives us much better alias analysis when called from |
855 | the loop optimizer. Note we want to leave the original | |
856 | MEM alone, but need to return the canonicalized MEM with | |
857 | all the flags with their original values. */ | |
858 | else if (GET_CODE (x) == MEM) | |
859 | { | |
860 | rtx addr = canon_rtx (XEXP (x, 0)); | |
d4b60170 | 861 | |
9ae8ffe7 JL |
862 | if (addr != XEXP (x, 0)) |
863 | { | |
38a448ca | 864 | rtx new = gen_rtx_MEM (GET_MODE (x), addr); |
d4b60170 | 865 | |
c6df88cb | 866 | MEM_COPY_ATTRIBUTES (new, x); |
9ae8ffe7 JL |
867 | x = new; |
868 | } | |
869 | } | |
870 | return x; | |
871 | } | |
872 | ||
873 | /* Return 1 if X and Y are identical-looking rtx's. | |
874 | ||
875 | We use the data in reg_known_value above to see if two registers with | |
876 | different numbers are, in fact, equivalent. */ | |
877 | ||
878 | static int | |
879 | rtx_equal_for_memref_p (x, y) | |
880 | rtx x, y; | |
881 | { | |
882 | register int i; | |
883 | register int j; | |
884 | register enum rtx_code code; | |
6f7d635c | 885 | register const char *fmt; |
9ae8ffe7 JL |
886 | |
887 | if (x == 0 && y == 0) | |
888 | return 1; | |
889 | if (x == 0 || y == 0) | |
890 | return 0; | |
d4b60170 | 891 | |
9ae8ffe7 JL |
892 | x = canon_rtx (x); |
893 | y = canon_rtx (y); | |
894 | ||
895 | if (x == y) | |
896 | return 1; | |
897 | ||
898 | code = GET_CODE (x); | |
899 | /* Rtx's of different codes cannot be equal. */ | |
900 | if (code != GET_CODE (y)) | |
901 | return 0; | |
902 | ||
903 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. | |
904 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ | |
905 | ||
906 | if (GET_MODE (x) != GET_MODE (y)) | |
907 | return 0; | |
908 | ||
db048faf MM |
909 | /* Some RTL can be compared without a recursive examination. */ |
910 | switch (code) | |
911 | { | |
912 | case REG: | |
913 | return REGNO (x) == REGNO (y); | |
914 | ||
915 | case LABEL_REF: | |
916 | return XEXP (x, 0) == XEXP (y, 0); | |
917 | ||
918 | case SYMBOL_REF: | |
919 | return XSTR (x, 0) == XSTR (y, 0); | |
920 | ||
921 | case CONST_INT: | |
922 | case CONST_DOUBLE: | |
923 | /* There's no need to compare the contents of CONST_DOUBLEs or | |
924 | CONST_INTs because pointer equality is a good enough | |
925 | comparison for these nodes. */ | |
926 | return 0; | |
927 | ||
928 | case ADDRESSOF: | |
929 | return (REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0)) | |
930 | && XINT (x, 1) == XINT (y, 1)); | |
931 | ||
932 | default: | |
933 | break; | |
934 | } | |
9ae8ffe7 JL |
935 | |
936 | /* For commutative operations, the RTX match if the operand match in any | |
937 | order. Also handle the simple binary and unary cases without a loop. */ | |
938 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
939 | return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
940 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))) | |
941 | || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1)) | |
942 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0)))); | |
943 | else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2') | |
944 | return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
945 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))); | |
946 | else if (GET_RTX_CLASS (code) == '1') | |
947 | return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)); | |
948 | ||
949 | /* Compare the elements. If any pair of corresponding elements | |
de12be17 JC |
950 | fail to match, return 0 for the whole things. |
951 | ||
952 | Limit cases to types which actually appear in addresses. */ | |
9ae8ffe7 JL |
953 | |
954 | fmt = GET_RTX_FORMAT (code); | |
955 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
956 | { | |
957 | switch (fmt[i]) | |
958 | { | |
9ae8ffe7 JL |
959 | case 'i': |
960 | if (XINT (x, i) != XINT (y, i)) | |
961 | return 0; | |
962 | break; | |
963 | ||
9ae8ffe7 JL |
964 | case 'E': |
965 | /* Two vectors must have the same length. */ | |
966 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
967 | return 0; | |
968 | ||
969 | /* And the corresponding elements must match. */ | |
970 | for (j = 0; j < XVECLEN (x, i); j++) | |
d4b60170 RK |
971 | if (rtx_equal_for_memref_p (XVECEXP (x, i, j), |
972 | XVECEXP (y, i, j)) == 0) | |
9ae8ffe7 JL |
973 | return 0; |
974 | break; | |
975 | ||
976 | case 'e': | |
977 | if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0) | |
978 | return 0; | |
979 | break; | |
980 | ||
aee21ba9 JL |
981 | /* This can happen for an asm which clobbers memory. */ |
982 | case '0': | |
983 | break; | |
984 | ||
9ae8ffe7 JL |
985 | /* It is believed that rtx's at this level will never |
986 | contain anything but integers and other rtx's, | |
987 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
988 | default: | |
989 | abort (); | |
990 | } | |
991 | } | |
992 | return 1; | |
993 | } | |
994 | ||
995 | /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within | |
996 | X and return it, or return 0 if none found. */ | |
997 | ||
998 | static rtx | |
999 | find_symbolic_term (x) | |
1000 | rtx x; | |
1001 | { | |
1002 | register int i; | |
1003 | register enum rtx_code code; | |
6f7d635c | 1004 | register const char *fmt; |
9ae8ffe7 JL |
1005 | |
1006 | code = GET_CODE (x); | |
1007 | if (code == SYMBOL_REF || code == LABEL_REF) | |
1008 | return x; | |
1009 | if (GET_RTX_CLASS (code) == 'o') | |
1010 | return 0; | |
1011 | ||
1012 | fmt = GET_RTX_FORMAT (code); | |
1013 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1014 | { | |
1015 | rtx t; | |
1016 | ||
1017 | if (fmt[i] == 'e') | |
1018 | { | |
1019 | t = find_symbolic_term (XEXP (x, i)); | |
1020 | if (t != 0) | |
1021 | return t; | |
1022 | } | |
1023 | else if (fmt[i] == 'E') | |
1024 | break; | |
1025 | } | |
1026 | return 0; | |
1027 | } | |
1028 | ||
1029 | static rtx | |
1030 | find_base_term (x) | |
1031 | register rtx x; | |
1032 | { | |
eab5c70a BS |
1033 | cselib_val *val; |
1034 | struct elt_loc_list *l; | |
1035 | ||
b949ea8b JW |
1036 | #if defined (FIND_BASE_TERM) |
1037 | /* Try machine-dependent ways to find the base term. */ | |
1038 | x = FIND_BASE_TERM (x); | |
1039 | #endif | |
1040 | ||
9ae8ffe7 JL |
1041 | switch (GET_CODE (x)) |
1042 | { | |
1043 | case REG: | |
1044 | return REG_BASE_VALUE (x); | |
1045 | ||
de12be17 JC |
1046 | case ZERO_EXTEND: |
1047 | case SIGN_EXTEND: /* Used for Alpha/NT pointers */ | |
9ae8ffe7 | 1048 | case HIGH: |
6d849a2a JL |
1049 | case PRE_INC: |
1050 | case PRE_DEC: | |
1051 | case POST_INC: | |
1052 | case POST_DEC: | |
1053 | return find_base_term (XEXP (x, 0)); | |
1054 | ||
eab5c70a BS |
1055 | case VALUE: |
1056 | val = CSELIB_VAL_PTR (x); | |
1057 | for (l = val->locs; l; l = l->next) | |
1058 | if ((x = find_base_term (l->loc)) != 0) | |
1059 | return x; | |
1060 | return 0; | |
1061 | ||
9ae8ffe7 JL |
1062 | case CONST: |
1063 | x = XEXP (x, 0); | |
1064 | if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS) | |
1065 | return 0; | |
1066 | /* fall through */ | |
1067 | case LO_SUM: | |
1068 | case PLUS: | |
1069 | case MINUS: | |
1070 | { | |
3c567fae JL |
1071 | rtx tmp1 = XEXP (x, 0); |
1072 | rtx tmp2 = XEXP (x, 1); | |
1073 | ||
1074 | /* This is a litle bit tricky since we have to determine which of | |
1075 | the two operands represents the real base address. Otherwise this | |
1076 | routine may return the index register instead of the base register. | |
1077 | ||
1078 | That may cause us to believe no aliasing was possible, when in | |
1079 | fact aliasing is possible. | |
1080 | ||
1081 | We use a few simple tests to guess the base register. Additional | |
1082 | tests can certainly be added. For example, if one of the operands | |
1083 | is a shift or multiply, then it must be the index register and the | |
1084 | other operand is the base register. */ | |
1085 | ||
b949ea8b JW |
1086 | if (tmp1 == pic_offset_table_rtx && CONSTANT_P (tmp2)) |
1087 | return find_base_term (tmp2); | |
1088 | ||
3c567fae JL |
1089 | /* If either operand is known to be a pointer, then use it |
1090 | to determine the base term. */ | |
1091 | if (REG_P (tmp1) && REGNO_POINTER_FLAG (REGNO (tmp1))) | |
1092 | return find_base_term (tmp1); | |
1093 | ||
1094 | if (REG_P (tmp2) && REGNO_POINTER_FLAG (REGNO (tmp2))) | |
1095 | return find_base_term (tmp2); | |
1096 | ||
1097 | /* Neither operand was known to be a pointer. Go ahead and find the | |
1098 | base term for both operands. */ | |
1099 | tmp1 = find_base_term (tmp1); | |
1100 | tmp2 = find_base_term (tmp2); | |
1101 | ||
1102 | /* If either base term is named object or a special address | |
1103 | (like an argument or stack reference), then use it for the | |
1104 | base term. */ | |
d4b60170 | 1105 | if (tmp1 != 0 |
3c567fae JL |
1106 | && (GET_CODE (tmp1) == SYMBOL_REF |
1107 | || GET_CODE (tmp1) == LABEL_REF | |
1108 | || (GET_CODE (tmp1) == ADDRESS | |
1109 | && GET_MODE (tmp1) != VOIDmode))) | |
1110 | return tmp1; | |
1111 | ||
d4b60170 | 1112 | if (tmp2 != 0 |
3c567fae JL |
1113 | && (GET_CODE (tmp2) == SYMBOL_REF |
1114 | || GET_CODE (tmp2) == LABEL_REF | |
1115 | || (GET_CODE (tmp2) == ADDRESS | |
1116 | && GET_MODE (tmp2) != VOIDmode))) | |
1117 | return tmp2; | |
1118 | ||
1119 | /* We could not determine which of the two operands was the | |
1120 | base register and which was the index. So we can determine | |
1121 | nothing from the base alias check. */ | |
1122 | return 0; | |
9ae8ffe7 JL |
1123 | } |
1124 | ||
1125 | case AND: | |
1126 | if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
1127 | return REG_BASE_VALUE (XEXP (x, 0)); | |
1128 | return 0; | |
1129 | ||
1130 | case SYMBOL_REF: | |
1131 | case LABEL_REF: | |
1132 | return x; | |
1133 | ||
1134 | default: | |
1135 | return 0; | |
1136 | } | |
1137 | } | |
1138 | ||
1139 | /* Return 0 if the addresses X and Y are known to point to different | |
1140 | objects, 1 if they might be pointers to the same object. */ | |
1141 | ||
1142 | static int | |
56ee9281 | 1143 | base_alias_check (x, y, x_mode, y_mode) |
9ae8ffe7 | 1144 | rtx x, y; |
56ee9281 | 1145 | enum machine_mode x_mode, y_mode; |
9ae8ffe7 JL |
1146 | { |
1147 | rtx x_base = find_base_term (x); | |
1148 | rtx y_base = find_base_term (y); | |
1149 | ||
1c72c7f6 JC |
1150 | /* If the address itself has no known base see if a known equivalent |
1151 | value has one. If either address still has no known base, nothing | |
1152 | is known about aliasing. */ | |
1153 | if (x_base == 0) | |
1154 | { | |
1155 | rtx x_c; | |
d4b60170 | 1156 | |
1c72c7f6 JC |
1157 | if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x) |
1158 | return 1; | |
d4b60170 | 1159 | |
1c72c7f6 JC |
1160 | x_base = find_base_term (x_c); |
1161 | if (x_base == 0) | |
1162 | return 1; | |
1163 | } | |
9ae8ffe7 | 1164 | |
1c72c7f6 JC |
1165 | if (y_base == 0) |
1166 | { | |
1167 | rtx y_c; | |
1168 | if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y) | |
1169 | return 1; | |
d4b60170 | 1170 | |
1c72c7f6 JC |
1171 | y_base = find_base_term (y_c); |
1172 | if (y_base == 0) | |
1173 | return 1; | |
1174 | } | |
1175 | ||
1176 | /* If the base addresses are equal nothing is known about aliasing. */ | |
1177 | if (rtx_equal_p (x_base, y_base)) | |
9ae8ffe7 JL |
1178 | return 1; |
1179 | ||
56ee9281 RH |
1180 | /* The base addresses of the read and write are different expressions. |
1181 | If they are both symbols and they are not accessed via AND, there is | |
1182 | no conflict. We can bring knowledge of object alignment into play | |
1183 | here. For example, on alpha, "char a, b;" can alias one another, | |
1184 | though "char a; long b;" cannot. */ | |
9ae8ffe7 | 1185 | if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS) |
c02f035f | 1186 | { |
56ee9281 RH |
1187 | if (GET_CODE (x) == AND && GET_CODE (y) == AND) |
1188 | return 1; | |
1189 | if (GET_CODE (x) == AND | |
1190 | && (GET_CODE (XEXP (x, 1)) != CONST_INT | |
1191 | || GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1)))) | |
1192 | return 1; | |
1193 | if (GET_CODE (y) == AND | |
1194 | && (GET_CODE (XEXP (y, 1)) != CONST_INT | |
1195 | || GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1)))) | |
1196 | return 1; | |
b2972551 JL |
1197 | /* Differing symbols never alias. */ |
1198 | return 0; | |
c02f035f | 1199 | } |
9ae8ffe7 JL |
1200 | |
1201 | /* If one address is a stack reference there can be no alias: | |
1202 | stack references using different base registers do not alias, | |
1203 | a stack reference can not alias a parameter, and a stack reference | |
1204 | can not alias a global. */ | |
1205 | if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode) | |
1206 | || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode)) | |
1207 | return 0; | |
1208 | ||
1209 | if (! flag_argument_noalias) | |
1210 | return 1; | |
1211 | ||
1212 | if (flag_argument_noalias > 1) | |
1213 | return 0; | |
1214 | ||
1215 | /* Weak noalias assertion (arguments are distinct, but may match globals). */ | |
1216 | return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode); | |
1217 | } | |
1218 | ||
eab5c70a BS |
1219 | /* Convert the address X into something we can use. This is done by returning |
1220 | it unchanged unless it is a value; in the latter case we call cselib to get | |
1221 | a more useful rtx. */ | |
3bdf5ad1 | 1222 | |
eab5c70a BS |
1223 | static rtx |
1224 | get_addr (x) | |
1225 | rtx x; | |
1226 | { | |
1227 | cselib_val *v; | |
1228 | struct elt_loc_list *l; | |
1229 | ||
1230 | if (GET_CODE (x) != VALUE) | |
1231 | return x; | |
1232 | v = CSELIB_VAL_PTR (x); | |
1233 | for (l = v->locs; l; l = l->next) | |
1234 | if (CONSTANT_P (l->loc)) | |
1235 | return l->loc; | |
1236 | for (l = v->locs; l; l = l->next) | |
1237 | if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM) | |
1238 | return l->loc; | |
1239 | if (v->locs) | |
1240 | return v->locs->loc; | |
1241 | return x; | |
1242 | } | |
1243 | ||
39cec1ac MH |
1244 | /* Return the address of the (N_REFS + 1)th memory reference to ADDR |
1245 | where SIZE is the size in bytes of the memory reference. If ADDR | |
1246 | is not modified by the memory reference then ADDR is returned. */ | |
1247 | ||
1248 | rtx | |
1249 | addr_side_effect_eval (addr, size, n_refs) | |
1250 | rtx addr; | |
1251 | int size; | |
1252 | int n_refs; | |
1253 | { | |
1254 | int offset = 0; | |
1255 | ||
1256 | switch (GET_CODE (addr)) | |
1257 | { | |
1258 | case PRE_INC: | |
1259 | offset = (n_refs + 1) * size; | |
1260 | break; | |
1261 | case PRE_DEC: | |
1262 | offset = -(n_refs + 1) * size; | |
1263 | break; | |
1264 | case POST_INC: | |
1265 | offset = n_refs * size; | |
1266 | break; | |
1267 | case POST_DEC: | |
1268 | offset = -n_refs * size; | |
1269 | break; | |
1270 | ||
1271 | default: | |
1272 | return addr; | |
1273 | } | |
1274 | ||
1275 | if (offset) | |
1276 | addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset)); | |
1277 | else | |
1278 | addr = XEXP (addr, 0); | |
1279 | ||
1280 | return addr; | |
1281 | } | |
1282 | ||
9ae8ffe7 JL |
1283 | /* Return nonzero if X and Y (memory addresses) could reference the |
1284 | same location in memory. C is an offset accumulator. When | |
1285 | C is nonzero, we are testing aliases between X and Y + C. | |
1286 | XSIZE is the size in bytes of the X reference, | |
1287 | similarly YSIZE is the size in bytes for Y. | |
1288 | ||
1289 | If XSIZE or YSIZE is zero, we do not know the amount of memory being | |
1290 | referenced (the reference was BLKmode), so make the most pessimistic | |
1291 | assumptions. | |
1292 | ||
c02f035f RH |
1293 | If XSIZE or YSIZE is negative, we may access memory outside the object |
1294 | being referenced as a side effect. This can happen when using AND to | |
1295 | align memory references, as is done on the Alpha. | |
1296 | ||
9ae8ffe7 | 1297 | Nice to notice that varying addresses cannot conflict with fp if no |
0211b6ab | 1298 | local variables had their addresses taken, but that's too hard now. */ |
9ae8ffe7 | 1299 | |
9ae8ffe7 JL |
1300 | static int |
1301 | memrefs_conflict_p (xsize, x, ysize, y, c) | |
1302 | register rtx x, y; | |
1303 | int xsize, ysize; | |
1304 | HOST_WIDE_INT c; | |
1305 | { | |
eab5c70a BS |
1306 | if (GET_CODE (x) == VALUE) |
1307 | x = get_addr (x); | |
1308 | if (GET_CODE (y) == VALUE) | |
1309 | y = get_addr (y); | |
9ae8ffe7 JL |
1310 | if (GET_CODE (x) == HIGH) |
1311 | x = XEXP (x, 0); | |
1312 | else if (GET_CODE (x) == LO_SUM) | |
1313 | x = XEXP (x, 1); | |
1314 | else | |
39cec1ac | 1315 | x = canon_rtx (addr_side_effect_eval (x, xsize, 0)); |
9ae8ffe7 JL |
1316 | if (GET_CODE (y) == HIGH) |
1317 | y = XEXP (y, 0); | |
1318 | else if (GET_CODE (y) == LO_SUM) | |
1319 | y = XEXP (y, 1); | |
1320 | else | |
39cec1ac | 1321 | y = canon_rtx (addr_side_effect_eval (y, ysize, 0)); |
9ae8ffe7 JL |
1322 | |
1323 | if (rtx_equal_for_memref_p (x, y)) | |
1324 | { | |
c02f035f | 1325 | if (xsize <= 0 || ysize <= 0) |
9ae8ffe7 JL |
1326 | return 1; |
1327 | if (c >= 0 && xsize > c) | |
1328 | return 1; | |
1329 | if (c < 0 && ysize+c > 0) | |
1330 | return 1; | |
1331 | return 0; | |
1332 | } | |
1333 | ||
6e73e666 JC |
1334 | /* This code used to check for conflicts involving stack references and |
1335 | globals but the base address alias code now handles these cases. */ | |
9ae8ffe7 JL |
1336 | |
1337 | if (GET_CODE (x) == PLUS) | |
1338 | { | |
1339 | /* The fact that X is canonicalized means that this | |
1340 | PLUS rtx is canonicalized. */ | |
1341 | rtx x0 = XEXP (x, 0); | |
1342 | rtx x1 = XEXP (x, 1); | |
1343 | ||
1344 | if (GET_CODE (y) == PLUS) | |
1345 | { | |
1346 | /* The fact that Y is canonicalized means that this | |
1347 | PLUS rtx is canonicalized. */ | |
1348 | rtx y0 = XEXP (y, 0); | |
1349 | rtx y1 = XEXP (y, 1); | |
1350 | ||
1351 | if (rtx_equal_for_memref_p (x1, y1)) | |
1352 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1353 | if (rtx_equal_for_memref_p (x0, y0)) | |
1354 | return memrefs_conflict_p (xsize, x1, ysize, y1, c); | |
1355 | if (GET_CODE (x1) == CONST_INT) | |
63be02db JM |
1356 | { |
1357 | if (GET_CODE (y1) == CONST_INT) | |
1358 | return memrefs_conflict_p (xsize, x0, ysize, y0, | |
1359 | c - INTVAL (x1) + INTVAL (y1)); | |
1360 | else | |
1361 | return memrefs_conflict_p (xsize, x0, ysize, y, | |
1362 | c - INTVAL (x1)); | |
1363 | } | |
9ae8ffe7 JL |
1364 | else if (GET_CODE (y1) == CONST_INT) |
1365 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1366 | ||
6e73e666 | 1367 | return 1; |
9ae8ffe7 JL |
1368 | } |
1369 | else if (GET_CODE (x1) == CONST_INT) | |
1370 | return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1)); | |
1371 | } | |
1372 | else if (GET_CODE (y) == PLUS) | |
1373 | { | |
1374 | /* The fact that Y is canonicalized means that this | |
1375 | PLUS rtx is canonicalized. */ | |
1376 | rtx y0 = XEXP (y, 0); | |
1377 | rtx y1 = XEXP (y, 1); | |
1378 | ||
1379 | if (GET_CODE (y1) == CONST_INT) | |
1380 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
1381 | else | |
1382 | return 1; | |
1383 | } | |
1384 | ||
1385 | if (GET_CODE (x) == GET_CODE (y)) | |
1386 | switch (GET_CODE (x)) | |
1387 | { | |
1388 | case MULT: | |
1389 | { | |
1390 | /* Handle cases where we expect the second operands to be the | |
1391 | same, and check only whether the first operand would conflict | |
1392 | or not. */ | |
1393 | rtx x0, y0; | |
1394 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
1395 | rtx y1 = canon_rtx (XEXP (y, 1)); | |
1396 | if (! rtx_equal_for_memref_p (x1, y1)) | |
1397 | return 1; | |
1398 | x0 = canon_rtx (XEXP (x, 0)); | |
1399 | y0 = canon_rtx (XEXP (y, 0)); | |
1400 | if (rtx_equal_for_memref_p (x0, y0)) | |
1401 | return (xsize == 0 || ysize == 0 | |
1402 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); | |
1403 | ||
1404 | /* Can't properly adjust our sizes. */ | |
1405 | if (GET_CODE (x1) != CONST_INT) | |
1406 | return 1; | |
1407 | xsize /= INTVAL (x1); | |
1408 | ysize /= INTVAL (x1); | |
1409 | c /= INTVAL (x1); | |
1410 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
1411 | } | |
1d300e19 | 1412 | |
de12be17 JC |
1413 | case REG: |
1414 | /* Are these registers known not to be equal? */ | |
1415 | if (alias_invariant) | |
1416 | { | |
e51712db | 1417 | unsigned int r_x = REGNO (x), r_y = REGNO (y); |
de12be17 JC |
1418 | rtx i_x, i_y; /* invariant relationships of X and Y */ |
1419 | ||
1420 | i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x]; | |
1421 | i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y]; | |
1422 | ||
1423 | if (i_x == 0 && i_y == 0) | |
1424 | break; | |
1425 | ||
1426 | if (! memrefs_conflict_p (xsize, i_x ? i_x : x, | |
1427 | ysize, i_y ? i_y : y, c)) | |
1428 | return 0; | |
1429 | } | |
1430 | break; | |
1431 | ||
1d300e19 KG |
1432 | default: |
1433 | break; | |
9ae8ffe7 JL |
1434 | } |
1435 | ||
1436 | /* Treat an access through an AND (e.g. a subword access on an Alpha) | |
56ee9281 RH |
1437 | as an access with indeterminate size. Assume that references |
1438 | besides AND are aligned, so if the size of the other reference is | |
1439 | at least as large as the alignment, assume no other overlap. */ | |
9ae8ffe7 | 1440 | if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT) |
56ee9281 | 1441 | { |
02e3377d | 1442 | if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1))) |
56ee9281 RH |
1443 | xsize = -1; |
1444 | return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c); | |
1445 | } | |
9ae8ffe7 | 1446 | if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT) |
c02f035f | 1447 | { |
56ee9281 | 1448 | /* ??? If we are indexing far enough into the array/structure, we |
c02f035f RH |
1449 | may yet be able to determine that we can not overlap. But we |
1450 | also need to that we are far enough from the end not to overlap | |
56ee9281 | 1451 | a following reference, so we do nothing with that for now. */ |
02e3377d | 1452 | if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1))) |
56ee9281 RH |
1453 | ysize = -1; |
1454 | return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c); | |
c02f035f | 1455 | } |
9ae8ffe7 JL |
1456 | |
1457 | if (CONSTANT_P (x)) | |
1458 | { | |
1459 | if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT) | |
1460 | { | |
1461 | c += (INTVAL (y) - INTVAL (x)); | |
c02f035f | 1462 | return (xsize <= 0 || ysize <= 0 |
9ae8ffe7 JL |
1463 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); |
1464 | } | |
1465 | ||
1466 | if (GET_CODE (x) == CONST) | |
1467 | { | |
1468 | if (GET_CODE (y) == CONST) | |
1469 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1470 | ysize, canon_rtx (XEXP (y, 0)), c); | |
1471 | else | |
1472 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
1473 | ysize, y, c); | |
1474 | } | |
1475 | if (GET_CODE (y) == CONST) | |
1476 | return memrefs_conflict_p (xsize, x, ysize, | |
1477 | canon_rtx (XEXP (y, 0)), c); | |
1478 | ||
1479 | if (CONSTANT_P (y)) | |
b949ea8b | 1480 | return (xsize <= 0 || ysize <= 0 |
c02f035f | 1481 | || (rtx_equal_for_memref_p (x, y) |
b949ea8b | 1482 | && ((c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)))); |
9ae8ffe7 JL |
1483 | |
1484 | return 1; | |
1485 | } | |
1486 | return 1; | |
1487 | } | |
1488 | ||
1489 | /* Functions to compute memory dependencies. | |
1490 | ||
1491 | Since we process the insns in execution order, we can build tables | |
1492 | to keep track of what registers are fixed (and not aliased), what registers | |
1493 | are varying in known ways, and what registers are varying in unknown | |
1494 | ways. | |
1495 | ||
1496 | If both memory references are volatile, then there must always be a | |
1497 | dependence between the two references, since their order can not be | |
1498 | changed. A volatile and non-volatile reference can be interchanged | |
1499 | though. | |
1500 | ||
dc1618bc RK |
1501 | A MEM_IN_STRUCT reference at a non-AND varying address can never |
1502 | conflict with a non-MEM_IN_STRUCT reference at a fixed address. We | |
1503 | also must allow AND addresses, because they may generate accesses | |
1504 | outside the object being referenced. This is used to generate | |
1505 | aligned addresses from unaligned addresses, for instance, the alpha | |
1506 | storeqi_unaligned pattern. */ | |
9ae8ffe7 JL |
1507 | |
1508 | /* Read dependence: X is read after read in MEM takes place. There can | |
1509 | only be a dependence here if both reads are volatile. */ | |
1510 | ||
1511 | int | |
1512 | read_dependence (mem, x) | |
1513 | rtx mem; | |
1514 | rtx x; | |
1515 | { | |
1516 | return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem); | |
1517 | } | |
1518 | ||
c6df88cb MM |
1519 | /* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and |
1520 | MEM2 is a reference to a structure at a varying address, or returns | |
1521 | MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL | |
1522 | value is returned MEM1 and MEM2 can never alias. VARIES_P is used | |
1523 | to decide whether or not an address may vary; it should return | |
eab5c70a BS |
1524 | nonzero whenever variation is possible. |
1525 | MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */ | |
1526 | ||
2c72b78f | 1527 | static rtx |
eab5c70a BS |
1528 | fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p) |
1529 | rtx mem1, mem2; | |
1530 | rtx mem1_addr, mem2_addr; | |
3d994c6b | 1531 | int (*varies_p) PARAMS ((rtx)); |
eab5c70a | 1532 | { |
3e0abe15 GK |
1533 | if (! flag_strict_aliasing) |
1534 | return NULL_RTX; | |
1535 | ||
c6df88cb MM |
1536 | if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2) |
1537 | && !varies_p (mem1_addr) && varies_p (mem2_addr)) | |
1538 | /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a | |
1539 | varying address. */ | |
1540 | return mem1; | |
1541 | ||
1542 | if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2) | |
1543 | && varies_p (mem1_addr) && !varies_p (mem2_addr)) | |
1544 | /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a | |
1545 | varying address. */ | |
1546 | return mem2; | |
1547 | ||
1548 | return NULL_RTX; | |
1549 | } | |
1550 | ||
1551 | /* Returns nonzero if something about the mode or address format MEM1 | |
1552 | indicates that it might well alias *anything*. */ | |
1553 | ||
2c72b78f | 1554 | static int |
c6df88cb MM |
1555 | aliases_everything_p (mem) |
1556 | rtx mem; | |
1557 | { | |
c6df88cb MM |
1558 | if (GET_CODE (XEXP (mem, 0)) == AND) |
1559 | /* If the address is an AND, its very hard to know at what it is | |
1560 | actually pointing. */ | |
1561 | return 1; | |
1562 | ||
1563 | return 0; | |
1564 | } | |
1565 | ||
9ae8ffe7 JL |
1566 | /* True dependence: X is read after store in MEM takes place. */ |
1567 | ||
1568 | int | |
1569 | true_dependence (mem, mem_mode, x, varies) | |
1570 | rtx mem; | |
1571 | enum machine_mode mem_mode; | |
1572 | rtx x; | |
3d994c6b | 1573 | int (*varies) PARAMS ((rtx)); |
9ae8ffe7 | 1574 | { |
6e73e666 | 1575 | register rtx x_addr, mem_addr; |
49982682 | 1576 | rtx base; |
9ae8ffe7 JL |
1577 | |
1578 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1579 | return 1; | |
1580 | ||
41472af8 MM |
1581 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1582 | return 0; | |
1583 | ||
b949ea8b JW |
1584 | /* Unchanging memory can't conflict with non-unchanging memory. |
1585 | A non-unchanging read can conflict with a non-unchanging write. | |
1586 | An unchanging read can conflict with an unchanging write since | |
1587 | there may be a single store to this address to initialize it. | |
1588 | Just fall through to the code below to resolve potential conflicts. | |
1589 | This won't handle all cases optimally, but the possible performance | |
1590 | loss should be negligible. */ | |
1591 | if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem)) | |
9ae8ffe7 JL |
1592 | return 0; |
1593 | ||
56ee9281 RH |
1594 | if (mem_mode == VOIDmode) |
1595 | mem_mode = GET_MODE (mem); | |
1596 | ||
eab5c70a BS |
1597 | x_addr = get_addr (XEXP (x, 0)); |
1598 | mem_addr = get_addr (XEXP (mem, 0)); | |
1599 | ||
55efb413 JW |
1600 | base = find_base_term (x_addr); |
1601 | if (base && (GET_CODE (base) == LABEL_REF | |
1602 | || (GET_CODE (base) == SYMBOL_REF | |
1603 | && CONSTANT_POOL_ADDRESS_P (base)))) | |
1604 | return 0; | |
1605 | ||
eab5c70a | 1606 | if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode)) |
1c72c7f6 JC |
1607 | return 0; |
1608 | ||
eab5c70a BS |
1609 | x_addr = canon_rtx (x_addr); |
1610 | mem_addr = canon_rtx (mem_addr); | |
6e73e666 | 1611 | |
0211b6ab JW |
1612 | if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr, |
1613 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1614 | return 0; | |
1615 | ||
c6df88cb | 1616 | if (aliases_everything_p (x)) |
0211b6ab JW |
1617 | return 1; |
1618 | ||
c6df88cb MM |
1619 | /* We cannot use aliases_everyting_p to test MEM, since we must look |
1620 | at MEM_MODE, rather than GET_MODE (MEM). */ | |
1621 | if (mem_mode == QImode || GET_CODE (mem_addr) == AND) | |
1622 | return 1; | |
0211b6ab | 1623 | |
c6df88cb MM |
1624 | /* In true_dependence we also allow BLKmode to alias anything. Why |
1625 | don't we do this in anti_dependence and output_dependence? */ | |
1626 | if (mem_mode == BLKmode || GET_MODE (x) == BLKmode) | |
1627 | return 1; | |
0211b6ab | 1628 | |
eab5c70a BS |
1629 | return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr, |
1630 | varies); | |
9ae8ffe7 JL |
1631 | } |
1632 | ||
c6df88cb MM |
1633 | /* Returns non-zero if a write to X might alias a previous read from |
1634 | (or, if WRITEP is non-zero, a write to) MEM. */ | |
9ae8ffe7 | 1635 | |
2c72b78f | 1636 | static int |
c6df88cb | 1637 | write_dependence_p (mem, x, writep) |
9ae8ffe7 JL |
1638 | rtx mem; |
1639 | rtx x; | |
c6df88cb | 1640 | int writep; |
9ae8ffe7 | 1641 | { |
6e73e666 | 1642 | rtx x_addr, mem_addr; |
c6df88cb | 1643 | rtx fixed_scalar; |
49982682 | 1644 | rtx base; |
6e73e666 | 1645 | |
9ae8ffe7 JL |
1646 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) |
1647 | return 1; | |
1648 | ||
eab5c70a BS |
1649 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1650 | return 0; | |
1651 | ||
b949ea8b JW |
1652 | /* Unchanging memory can't conflict with non-unchanging memory. */ |
1653 | if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem)) | |
1654 | return 0; | |
1655 | ||
9ae8ffe7 JL |
1656 | /* If MEM is an unchanging read, then it can't possibly conflict with |
1657 | the store to X, because there is at most one store to MEM, and it must | |
1658 | have occurred somewhere before MEM. */ | |
55efb413 JW |
1659 | if (! writep && RTX_UNCHANGING_P (mem)) |
1660 | return 0; | |
1661 | ||
1662 | x_addr = get_addr (XEXP (x, 0)); | |
1663 | mem_addr = get_addr (XEXP (mem, 0)); | |
1664 | ||
49982682 JW |
1665 | if (! writep) |
1666 | { | |
55efb413 | 1667 | base = find_base_term (mem_addr); |
49982682 JW |
1668 | if (base && (GET_CODE (base) == LABEL_REF |
1669 | || (GET_CODE (base) == SYMBOL_REF | |
1670 | && CONSTANT_POOL_ADDRESS_P (base)))) | |
1671 | return 0; | |
1672 | } | |
1673 | ||
eab5c70a BS |
1674 | if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), |
1675 | GET_MODE (mem))) | |
41472af8 MM |
1676 | return 0; |
1677 | ||
eab5c70a BS |
1678 | x_addr = canon_rtx (x_addr); |
1679 | mem_addr = canon_rtx (mem_addr); | |
6e73e666 | 1680 | |
c6df88cb MM |
1681 | if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr, |
1682 | SIZE_FOR_MODE (x), x_addr, 0)) | |
1683 | return 0; | |
1684 | ||
1685 | fixed_scalar | |
eab5c70a BS |
1686 | = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr, |
1687 | rtx_addr_varies_p); | |
1688 | ||
c6df88cb MM |
1689 | return (!(fixed_scalar == mem && !aliases_everything_p (x)) |
1690 | && !(fixed_scalar == x && !aliases_everything_p (mem))); | |
1691 | } | |
1692 | ||
1693 | /* Anti dependence: X is written after read in MEM takes place. */ | |
1694 | ||
1695 | int | |
1696 | anti_dependence (mem, x) | |
1697 | rtx mem; | |
1698 | rtx x; | |
1699 | { | |
1700 | return write_dependence_p (mem, x, /*writep=*/0); | |
9ae8ffe7 JL |
1701 | } |
1702 | ||
1703 | /* Output dependence: X is written after store in MEM takes place. */ | |
1704 | ||
1705 | int | |
1706 | output_dependence (mem, x) | |
1707 | register rtx mem; | |
1708 | register rtx x; | |
1709 | { | |
c6df88cb | 1710 | return write_dependence_p (mem, x, /*writep=*/1); |
9ae8ffe7 JL |
1711 | } |
1712 | ||
7790df19 JW |
1713 | /* Returns non-zero if X might refer to something which is not |
1714 | local to the function and is not constant. */ | |
1715 | ||
1716 | static int | |
1717 | nonlocal_reference_p (x) | |
1718 | rtx x; | |
1719 | { | |
1720 | rtx base; | |
1721 | register RTX_CODE code; | |
1722 | int regno; | |
1723 | ||
1724 | code = GET_CODE (x); | |
1725 | ||
1726 | if (GET_RTX_CLASS (code) == 'i') | |
1727 | { | |
2a8f6b90 JH |
1728 | /* Constant functions can be constant if they don't use |
1729 | scratch memory used to mark function w/o side effects. */ | |
7790df19 | 1730 | if (code == CALL_INSN && CONST_CALL_P (x)) |
2a8f6b90 JH |
1731 | { |
1732 | x = CALL_INSN_FUNCTION_USAGE (x); | |
f8cd4126 RK |
1733 | if (x == 0) |
1734 | return 0; | |
2a8f6b90 JH |
1735 | } |
1736 | else | |
1737 | x = PATTERN (x); | |
7790df19 JW |
1738 | code = GET_CODE (x); |
1739 | } | |
1740 | ||
1741 | switch (code) | |
1742 | { | |
1743 | case SUBREG: | |
1744 | if (GET_CODE (SUBREG_REG (x)) == REG) | |
1745 | { | |
1746 | /* Global registers are not local. */ | |
1747 | if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER | |
1748 | && global_regs[REGNO (SUBREG_REG (x)) + SUBREG_WORD (x)]) | |
1749 | return 1; | |
1750 | return 0; | |
1751 | } | |
1752 | break; | |
1753 | ||
1754 | case REG: | |
1755 | regno = REGNO (x); | |
1756 | /* Global registers are not local. */ | |
1757 | if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno]) | |
1758 | return 1; | |
1759 | return 0; | |
1760 | ||
1761 | case SCRATCH: | |
1762 | case PC: | |
1763 | case CC0: | |
1764 | case CONST_INT: | |
1765 | case CONST_DOUBLE: | |
1766 | case CONST: | |
1767 | case LABEL_REF: | |
1768 | return 0; | |
1769 | ||
1770 | case SYMBOL_REF: | |
1771 | /* Constants in the function's constants pool are constant. */ | |
1772 | if (CONSTANT_POOL_ADDRESS_P (x)) | |
1773 | return 0; | |
1774 | return 1; | |
1775 | ||
1776 | case CALL: | |
1777 | /* Recursion introduces no additional considerations. */ | |
1778 | if (GET_CODE (XEXP (x, 0)) == MEM | |
1779 | && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF | |
1780 | && strcmp(XSTR (XEXP (XEXP (x, 0), 0), 0), | |
1781 | IDENTIFIER_POINTER ( | |
1782 | DECL_ASSEMBLER_NAME (current_function_decl))) == 0) | |
1783 | return 0; | |
1784 | return 1; | |
1785 | ||
1786 | case MEM: | |
1787 | /* Be overly conservative and consider any volatile memory | |
1788 | reference as not local. */ | |
1789 | if (MEM_VOLATILE_P (x)) | |
1790 | return 1; | |
1791 | base = find_base_term (XEXP (x, 0)); | |
1792 | if (base) | |
1793 | { | |
b3b5ad95 JL |
1794 | /* A Pmode ADDRESS could be a reference via the structure value |
1795 | address or static chain. Such memory references are nonlocal. | |
1796 | ||
1797 | Thus, we have to examine the contents of the ADDRESS to find | |
1798 | out if this is a local reference or not. */ | |
1799 | if (GET_CODE (base) == ADDRESS | |
1800 | && GET_MODE (base) == Pmode | |
1801 | && (XEXP (base, 0) == stack_pointer_rtx | |
1802 | || XEXP (base, 0) == arg_pointer_rtx | |
1803 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
1804 | || XEXP (base, 0) == hard_frame_pointer_rtx | |
1805 | #endif | |
1806 | || XEXP (base, 0) == frame_pointer_rtx)) | |
7790df19 JW |
1807 | return 0; |
1808 | /* Constants in the function's constant pool are constant. */ | |
1809 | if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base)) | |
1810 | return 0; | |
1811 | } | |
1812 | return 1; | |
1813 | ||
1814 | case ASM_INPUT: | |
1815 | case ASM_OPERANDS: | |
1816 | return 1; | |
1817 | ||
1818 | default: | |
1819 | break; | |
1820 | } | |
1821 | ||
1822 | /* Recursively scan the operands of this expression. */ | |
1823 | ||
1824 | { | |
499b1098 | 1825 | register const char *fmt = GET_RTX_FORMAT (code); |
7790df19 JW |
1826 | register int i; |
1827 | ||
1828 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
1829 | { | |
2a8f6b90 | 1830 | if (fmt[i] == 'e' && XEXP (x, i)) |
7790df19 JW |
1831 | { |
1832 | if (nonlocal_reference_p (XEXP (x, i))) | |
1833 | return 1; | |
1834 | } | |
d4757e6a | 1835 | else if (fmt[i] == 'E') |
7790df19 JW |
1836 | { |
1837 | register int j; | |
1838 | for (j = 0; j < XVECLEN (x, i); j++) | |
1839 | if (nonlocal_reference_p (XVECEXP (x, i, j))) | |
1840 | return 1; | |
1841 | } | |
1842 | } | |
1843 | } | |
1844 | ||
1845 | return 0; | |
1846 | } | |
1847 | ||
1848 | /* Mark the function if it is constant. */ | |
1849 | ||
1850 | void | |
1851 | mark_constant_function () | |
1852 | { | |
1853 | rtx insn; | |
1854 | ||
1855 | if (TREE_PUBLIC (current_function_decl) | |
1856 | || TREE_READONLY (current_function_decl) | |
1857 | || TREE_THIS_VOLATILE (current_function_decl) | |
1858 | || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode) | |
1859 | return; | |
1860 | ||
1861 | /* Determine if this is a constant function. */ | |
1862 | ||
1863 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
2c3c49de | 1864 | if (INSN_P (insn) && nonlocal_reference_p (insn)) |
7790df19 JW |
1865 | return; |
1866 | ||
1867 | /* Mark the function. */ | |
1868 | ||
1869 | TREE_READONLY (current_function_decl) = 1; | |
1870 | } | |
1871 | ||
6e73e666 JC |
1872 | |
1873 | static HARD_REG_SET argument_registers; | |
1874 | ||
1875 | void | |
1876 | init_alias_once () | |
1877 | { | |
1878 | register int i; | |
1879 | ||
1880 | #ifndef OUTGOING_REGNO | |
1881 | #define OUTGOING_REGNO(N) N | |
1882 | #endif | |
1883 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1884 | /* Check whether this register can hold an incoming pointer | |
1885 | argument. FUNCTION_ARG_REGNO_P tests outgoing register | |
1886 | numbers, so translate if necessary due to register windows. */ | |
1887 | if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i)) | |
1888 | && HARD_REGNO_MODE_OK (i, Pmode)) | |
1889 | SET_HARD_REG_BIT (argument_registers, i); | |
3932261a | 1890 | |
30f72379 | 1891 | alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0); |
6e73e666 JC |
1892 | } |
1893 | ||
c13e8210 MM |
1894 | /* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE |
1895 | array. */ | |
1896 | ||
9ae8ffe7 JL |
1897 | void |
1898 | init_alias_analysis () | |
1899 | { | |
1900 | int maxreg = max_reg_num (); | |
ea64ef27 | 1901 | int changed, pass; |
9ae8ffe7 | 1902 | register int i; |
e51712db | 1903 | register unsigned int ui; |
9ae8ffe7 | 1904 | register rtx insn; |
9ae8ffe7 JL |
1905 | |
1906 | reg_known_value_size = maxreg; | |
1907 | ||
e05e2395 MM |
1908 | reg_known_value |
1909 | = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx)) | |
1910 | - FIRST_PSEUDO_REGISTER; | |
1911 | reg_known_equiv_p | |
1912 | = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char)) | |
9ae8ffe7 | 1913 | - FIRST_PSEUDO_REGISTER; |
9ae8ffe7 | 1914 | |
6e73e666 JC |
1915 | /* Overallocate reg_base_value to allow some growth during loop |
1916 | optimization. Loop unrolling can create a large number of | |
1917 | registers. */ | |
1918 | reg_base_value_size = maxreg * 2; | |
ac606739 GS |
1919 | reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx)); |
1920 | if (ggc_p) | |
1921 | ggc_add_rtx_root (reg_base_value, reg_base_value_size); | |
1922 | ||
e05e2395 MM |
1923 | new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx)); |
1924 | reg_seen = (char *) xmalloc (reg_base_value_size); | |
de12be17 JC |
1925 | if (! reload_completed && flag_unroll_loops) |
1926 | { | |
ac606739 | 1927 | /* ??? Why are we realloc'ing if we're just going to zero it? */ |
de12be17 JC |
1928 | alias_invariant = (rtx *)xrealloc (alias_invariant, |
1929 | reg_base_value_size * sizeof (rtx)); | |
1930 | bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx)); | |
1931 | } | |
1932 | ||
ec907dd8 JL |
1933 | |
1934 | /* The basic idea is that each pass through this loop will use the | |
1935 | "constant" information from the previous pass to propagate alias | |
1936 | information through another level of assignments. | |
1937 | ||
1938 | This could get expensive if the assignment chains are long. Maybe | |
1939 | we should throttle the number of iterations, possibly based on | |
6e73e666 | 1940 | the optimization level or flag_expensive_optimizations. |
ec907dd8 JL |
1941 | |
1942 | We could propagate more information in the first pass by making use | |
1943 | of REG_N_SETS to determine immediately that the alias information | |
ea64ef27 JL |
1944 | for a pseudo is "constant". |
1945 | ||
1946 | A program with an uninitialized variable can cause an infinite loop | |
1947 | here. Instead of doing a full dataflow analysis to detect such problems | |
1948 | we just cap the number of iterations for the loop. | |
1949 | ||
1950 | The state of the arrays for the set chain in question does not matter | |
1951 | since the program has undefined behavior. */ | |
6e73e666 | 1952 | |
ea64ef27 | 1953 | pass = 0; |
6e73e666 | 1954 | do |
ec907dd8 JL |
1955 | { |
1956 | /* Assume nothing will change this iteration of the loop. */ | |
1957 | changed = 0; | |
1958 | ||
ec907dd8 JL |
1959 | /* We want to assign the same IDs each iteration of this loop, so |
1960 | start counting from zero each iteration of the loop. */ | |
1961 | unique_id = 0; | |
1962 | ||
1963 | /* We're at the start of the funtion each iteration through the | |
1964 | loop, so we're copying arguments. */ | |
1965 | copying_arguments = 1; | |
9ae8ffe7 | 1966 | |
6e73e666 JC |
1967 | /* Wipe the potential alias information clean for this pass. */ |
1968 | bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx)); | |
8072f69c | 1969 | |
6e73e666 JC |
1970 | /* Wipe the reg_seen array clean. */ |
1971 | bzero ((char *) reg_seen, reg_base_value_size); | |
9ae8ffe7 | 1972 | |
6e73e666 JC |
1973 | /* Mark all hard registers which may contain an address. |
1974 | The stack, frame and argument pointers may contain an address. | |
1975 | An argument register which can hold a Pmode value may contain | |
1976 | an address even if it is not in BASE_REGS. | |
8072f69c | 1977 | |
6e73e666 JC |
1978 | The address expression is VOIDmode for an argument and |
1979 | Pmode for other registers. */ | |
1980 | ||
1981 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1982 | if (TEST_HARD_REG_BIT (argument_registers, i)) | |
38a448ca RH |
1983 | new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode, |
1984 | gen_rtx_REG (Pmode, i)); | |
6e73e666 JC |
1985 | |
1986 | new_reg_base_value[STACK_POINTER_REGNUM] | |
38a448ca | 1987 | = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); |
6e73e666 | 1988 | new_reg_base_value[ARG_POINTER_REGNUM] |
38a448ca | 1989 | = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); |
6e73e666 | 1990 | new_reg_base_value[FRAME_POINTER_REGNUM] |
38a448ca | 1991 | = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); |
2a2c8203 | 1992 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6e73e666 | 1993 | new_reg_base_value[HARD_FRAME_POINTER_REGNUM] |
38a448ca | 1994 | = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); |
2a2c8203 | 1995 | #endif |
ec907dd8 JL |
1996 | |
1997 | /* Walk the insns adding values to the new_reg_base_value array. */ | |
1998 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
9ae8ffe7 | 1999 | { |
2c3c49de | 2000 | if (INSN_P (insn)) |
ec907dd8 | 2001 | { |
6e73e666 | 2002 | rtx note, set; |
efc9bd41 RK |
2003 | |
2004 | #if defined (HAVE_prologue) || defined (HAVE_epilogue) | |
657959ca JL |
2005 | /* The prologue/epilouge insns are not threaded onto the |
2006 | insn chain until after reload has completed. Thus, | |
2007 | there is no sense wasting time checking if INSN is in | |
2008 | the prologue/epilogue until after reload has completed. */ | |
2009 | if (reload_completed | |
2010 | && prologue_epilogue_contains (insn)) | |
efc9bd41 RK |
2011 | continue; |
2012 | #endif | |
2013 | ||
ec907dd8 JL |
2014 | /* If this insn has a noalias note, process it, Otherwise, |
2015 | scan for sets. A simple set will have no side effects | |
2016 | which could change the base value of any other register. */ | |
6e73e666 | 2017 | |
ec907dd8 | 2018 | if (GET_CODE (PATTERN (insn)) == SET |
efc9bd41 RK |
2019 | && REG_NOTES (insn) != 0 |
2020 | && find_reg_note (insn, REG_NOALIAS, NULL_RTX)) | |
84832317 | 2021 | record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL); |
ec907dd8 | 2022 | else |
84832317 | 2023 | note_stores (PATTERN (insn), record_set, NULL); |
6e73e666 JC |
2024 | |
2025 | set = single_set (insn); | |
2026 | ||
2027 | if (set != 0 | |
2028 | && GET_CODE (SET_DEST (set)) == REG | |
2029 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER | |
efc9bd41 | 2030 | && REG_NOTES (insn) != 0 |
6e73e666 JC |
2031 | && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 |
2032 | && REG_N_SETS (REGNO (SET_DEST (set))) == 1) | |
2033 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0) | |
6ba14f92 R |
2034 | && GET_CODE (XEXP (note, 0)) != EXPR_LIST |
2035 | && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0))) | |
6e73e666 JC |
2036 | { |
2037 | int regno = REGNO (SET_DEST (set)); | |
2038 | reg_known_value[regno] = XEXP (note, 0); | |
2039 | reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV; | |
2040 | } | |
ec907dd8 JL |
2041 | } |
2042 | else if (GET_CODE (insn) == NOTE | |
2043 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) | |
2044 | copying_arguments = 0; | |
6e73e666 | 2045 | } |
ec907dd8 | 2046 | |
6e73e666 | 2047 | /* Now propagate values from new_reg_base_value to reg_base_value. */ |
e51712db | 2048 | for (ui = 0; ui < reg_base_value_size; ui++) |
6e73e666 | 2049 | { |
e51712db KG |
2050 | if (new_reg_base_value[ui] |
2051 | && new_reg_base_value[ui] != reg_base_value[ui] | |
2052 | && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui])) | |
ec907dd8 | 2053 | { |
e51712db | 2054 | reg_base_value[ui] = new_reg_base_value[ui]; |
6e73e666 | 2055 | changed = 1; |
ec907dd8 | 2056 | } |
9ae8ffe7 | 2057 | } |
9ae8ffe7 | 2058 | } |
6e73e666 | 2059 | while (changed && ++pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 JL |
2060 | |
2061 | /* Fill in the remaining entries. */ | |
2062 | for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++) | |
2063 | if (reg_known_value[i] == 0) | |
2064 | reg_known_value[i] = regno_reg_rtx[i]; | |
2065 | ||
9ae8ffe7 JL |
2066 | /* Simplify the reg_base_value array so that no register refers to |
2067 | another register, except to special registers indirectly through | |
2068 | ADDRESS expressions. | |
2069 | ||
2070 | In theory this loop can take as long as O(registers^2), but unless | |
2071 | there are very long dependency chains it will run in close to linear | |
ea64ef27 JL |
2072 | time. |
2073 | ||
2074 | This loop may not be needed any longer now that the main loop does | |
2075 | a better job at propagating alias information. */ | |
2076 | pass = 0; | |
9ae8ffe7 JL |
2077 | do |
2078 | { | |
2079 | changed = 0; | |
ea64ef27 | 2080 | pass++; |
e51712db | 2081 | for (ui = 0; ui < reg_base_value_size; ui++) |
9ae8ffe7 | 2082 | { |
e51712db | 2083 | rtx base = reg_base_value[ui]; |
9ae8ffe7 JL |
2084 | if (base && GET_CODE (base) == REG) |
2085 | { | |
e51712db KG |
2086 | unsigned int base_regno = REGNO (base); |
2087 | if (base_regno == ui) /* register set from itself */ | |
2088 | reg_base_value[ui] = 0; | |
9ae8ffe7 | 2089 | else |
e51712db | 2090 | reg_base_value[ui] = reg_base_value[base_regno]; |
9ae8ffe7 JL |
2091 | changed = 1; |
2092 | } | |
2093 | } | |
2094 | } | |
ea64ef27 | 2095 | while (changed && pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 | 2096 | |
e05e2395 MM |
2097 | /* Clean up. */ |
2098 | free (new_reg_base_value); | |
ec907dd8 | 2099 | new_reg_base_value = 0; |
e05e2395 | 2100 | free (reg_seen); |
9ae8ffe7 JL |
2101 | reg_seen = 0; |
2102 | } | |
2103 | ||
2104 | void | |
2105 | end_alias_analysis () | |
2106 | { | |
e05e2395 | 2107 | free (reg_known_value + FIRST_PSEUDO_REGISTER); |
9ae8ffe7 | 2108 | reg_known_value = 0; |
ac606739 | 2109 | reg_known_value_size = 0; |
e05e2395 MM |
2110 | free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER); |
2111 | reg_known_equiv_p = 0; | |
ac606739 GS |
2112 | if (reg_base_value) |
2113 | { | |
2114 | if (ggc_p) | |
2115 | ggc_del_root (reg_base_value); | |
2116 | free (reg_base_value); | |
2117 | reg_base_value = 0; | |
2118 | } | |
9ae8ffe7 | 2119 | reg_base_value_size = 0; |
de12be17 JC |
2120 | if (alias_invariant) |
2121 | { | |
ac606739 | 2122 | free (alias_invariant); |
de12be17 JC |
2123 | alias_invariant = 0; |
2124 | } | |
9ae8ffe7 | 2125 | } |