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9ae8ffe7 1/* Alias analysis for GNU C
6e24b709 2 Copyright (C) 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
9ae8ffe7
JL
3 Contributed by John Carr (jfc@mit.edu).
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22#include "config.h"
670ee920 23#include "system.h"
9ae8ffe7 24#include "rtl.h"
7790df19 25#include "tree.h"
6baf1cc8 26#include "tm_p.h"
49ad7cfa 27#include "function.h"
9ae8ffe7
JL
28#include "expr.h"
29#include "regs.h"
30#include "hard-reg-set.h"
e004f2f7 31#include "basic-block.h"
9ae8ffe7 32#include "flags.h"
264fac34 33#include "output.h"
2e107e9e 34#include "toplev.h"
eab5c70a 35#include "cselib.h"
3932261a 36#include "splay-tree.h"
ac606739 37#include "ggc.h"
3932261a
MM
38
39/* The alias sets assigned to MEMs assist the back-end in determining
40 which MEMs can alias which other MEMs. In general, two MEMs in
ac3d9668
RK
41 different alias sets cannot alias each other, with one important
42 exception. Consider something like:
3932261a
MM
43
44 struct S {int i; double d; };
45
46 a store to an `S' can alias something of either type `int' or type
47 `double'. (However, a store to an `int' cannot alias a `double'
48 and vice versa.) We indicate this via a tree structure that looks
49 like:
50 struct S
51 / \
52 / \
53 |/_ _\|
54 int double
55
ac3d9668
RK
56 (The arrows are directed and point downwards.)
57 In this situation we say the alias set for `struct S' is the
58 `superset' and that those for `int' and `double' are `subsets'.
59
3bdf5ad1
RK
60 To see whether two alias sets can point to the same memory, we must
61 see if either alias set is a subset of the other. We need not trace
62 past immediate decendents, however, since we propagate all
63 grandchildren up one level.
3932261a
MM
64
65 Alias set zero is implicitly a superset of all other alias sets.
66 However, this is no actual entry for alias set zero. It is an
67 error to attempt to explicitly construct a subset of zero. */
68
d4b60170
RK
69typedef struct alias_set_entry
70{
3932261a 71 /* The alias set number, as stored in MEM_ALIAS_SET. */
3bdf5ad1 72 HOST_WIDE_INT alias_set;
3932261a
MM
73
74 /* The children of the alias set. These are not just the immediate
ac3d9668 75 children, but, in fact, all decendents. So, if we have:
3932261a
MM
76
77 struct T { struct S s; float f; }
78
79 continuing our example above, the children here will be all of
80 `int', `double', `float', and `struct S'. */
81 splay_tree children;
2bf105ab
RK
82
83 /* Nonzero if would have a child of zero: this effectively makes this
84 alias set the same as alias set zero. */
85 int has_zero_child;
d4b60170 86} *alias_set_entry;
9ae8ffe7 87
3d994c6b
KG
88static int rtx_equal_for_memref_p PARAMS ((rtx, rtx));
89static rtx find_symbolic_term PARAMS ((rtx));
a13d4ebf 90rtx get_addr PARAMS ((rtx));
3d994c6b
KG
91static int memrefs_conflict_p PARAMS ((int, rtx, int, rtx,
92 HOST_WIDE_INT));
93static void record_set PARAMS ((rtx, rtx, void *));
94static rtx find_base_term PARAMS ((rtx));
95static int base_alias_check PARAMS ((rtx, rtx, enum machine_mode,
96 enum machine_mode));
6e24b709
RK
97static int handled_component_p PARAMS ((tree));
98static int can_address_p PARAMS ((tree));
3d994c6b
KG
99static rtx find_base_value PARAMS ((rtx));
100static int mems_in_disjoint_alias_sets_p PARAMS ((rtx, rtx));
101static int insert_subset_children PARAMS ((splay_tree_node, void*));
3bdf5ad1
RK
102static tree find_base_decl PARAMS ((tree));
103static alias_set_entry get_alias_set_entry PARAMS ((HOST_WIDE_INT));
eab5c70a 104static rtx fixed_scalar_and_varying_struct_p PARAMS ((rtx, rtx, rtx, rtx,
e38fe8e0 105 int (*) (rtx, int)));
3d994c6b
KG
106static int aliases_everything_p PARAMS ((rtx));
107static int write_dependence_p PARAMS ((rtx, rtx, int));
bf6d9fd7 108static int nonlocal_mentioned_p PARAMS ((rtx));
9ae8ffe7 109
e004f2f7
JW
110static int loop_p PARAMS ((void));
111
9ae8ffe7
JL
112/* Set up all info needed to perform alias analysis on memory references. */
113
d4b60170 114/* Returns the size in bytes of the mode of X. */
9ae8ffe7
JL
115#define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X)))
116
41472af8 117/* Returns nonzero if MEM1 and MEM2 do not alias because they are in
264fac34
MM
118 different alias sets. We ignore alias sets in functions making use
119 of variable arguments because the va_arg macros on some systems are
120 not legal ANSI C. */
121#define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \
3932261a 122 mems_in_disjoint_alias_sets_p (MEM1, MEM2)
41472af8 123
ea64ef27 124/* Cap the number of passes we make over the insns propagating alias
ac3d9668 125 information through set chains. 10 is a completely arbitrary choice. */
ea64ef27
JL
126#define MAX_ALIAS_LOOP_PASSES 10
127
9ae8ffe7
JL
128/* reg_base_value[N] gives an address to which register N is related.
129 If all sets after the first add or subtract to the current value
130 or otherwise modify it so it does not point to a different top level
131 object, reg_base_value[N] is equal to the address part of the source
2a2c8203
JC
132 of the first set.
133
134 A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS
135 expressions represent certain special values: function arguments and
b3b5ad95
JL
136 the stack, frame, and argument pointers.
137
138 The contents of an ADDRESS is not normally used, the mode of the
139 ADDRESS determines whether the ADDRESS is a function argument or some
140 other special value. Pointer equality, not rtx_equal_p, determines whether
141 two ADDRESS expressions refer to the same base address.
142
143 The only use of the contents of an ADDRESS is for determining if the
144 current function performs nonlocal memory memory references for the
145 purposes of marking the function as a constant function. */
2a2c8203 146
ac606739
GS
147static rtx *reg_base_value;
148static rtx *new_reg_base_value;
d4b60170
RK
149static unsigned int reg_base_value_size; /* size of reg_base_value array */
150
9ae8ffe7 151#define REG_BASE_VALUE(X) \
fb6754f0
BS
152 (REGNO (X) < reg_base_value_size \
153 ? reg_base_value[REGNO (X)] : 0)
9ae8ffe7 154
de12be17
JC
155/* Vector of known invariant relationships between registers. Set in
156 loop unrolling. Indexed by register number, if nonzero the value
157 is an expression describing this register in terms of another.
158
159 The length of this array is REG_BASE_VALUE_SIZE.
160
161 Because this array contains only pseudo registers it has no effect
162 after reload. */
163static rtx *alias_invariant;
164
c13e8210
MM
165/* Vector indexed by N giving the initial (unchanging) value known for
166 pseudo-register N. This array is initialized in
167 init_alias_analysis, and does not change until end_alias_analysis
168 is called. */
9ae8ffe7
JL
169rtx *reg_known_value;
170
171/* Indicates number of valid entries in reg_known_value. */
770ae6cc 172static unsigned int reg_known_value_size;
9ae8ffe7
JL
173
174/* Vector recording for each reg_known_value whether it is due to a
175 REG_EQUIV note. Future passes (viz., reload) may replace the
176 pseudo with the equivalent expression and so we account for the
ac3d9668
RK
177 dependences that would be introduced if that happens.
178
179 The REG_EQUIV notes created in assign_parms may mention the arg
180 pointer, and there are explicit insns in the RTL that modify the
181 arg pointer. Thus we must ensure that such insns don't get
182 scheduled across each other because that would invalidate the
183 REG_EQUIV notes. One could argue that the REG_EQUIV notes are
184 wrong, but solving the problem in the scheduler will likely give
185 better code, so we do it here. */
9ae8ffe7
JL
186char *reg_known_equiv_p;
187
2a2c8203
JC
188/* True when scanning insns from the start of the rtl to the
189 NOTE_INSN_FUNCTION_BEG note. */
9ae8ffe7
JL
190static int copying_arguments;
191
3932261a 192/* The splay-tree used to store the various alias set entries. */
3932261a 193static splay_tree alias_sets;
ac3d9668 194\f
3932261a
MM
195/* Returns a pointer to the alias set entry for ALIAS_SET, if there is
196 such an entry, or NULL otherwise. */
197
198static alias_set_entry
199get_alias_set_entry (alias_set)
3bdf5ad1 200 HOST_WIDE_INT alias_set;
3932261a 201{
d4b60170
RK
202 splay_tree_node sn
203 = splay_tree_lookup (alias_sets, (splay_tree_key) alias_set);
3932261a 204
d4b60170 205 return sn != 0 ? ((alias_set_entry) sn->value) : 0;
3932261a
MM
206}
207
ac3d9668
RK
208/* Returns nonzero if the alias sets for MEM1 and MEM2 are such that
209 the two MEMs cannot alias each other. */
3932261a
MM
210
211static int
212mems_in_disjoint_alias_sets_p (mem1, mem2)
213 rtx mem1;
214 rtx mem2;
215{
3932261a
MM
216#ifdef ENABLE_CHECKING
217/* Perform a basic sanity check. Namely, that there are no alias sets
218 if we're not using strict aliasing. This helps to catch bugs
219 whereby someone uses PUT_CODE, but doesn't clear MEM_ALIAS_SET, or
220 where a MEM is allocated in some way other than by the use of
221 gen_rtx_MEM, and the MEM_ALIAS_SET is not cleared. If we begin to
222 use alias sets to indicate that spilled registers cannot alias each
223 other, we might need to remove this check. */
d4b60170
RK
224 if (! flag_strict_aliasing
225 && (MEM_ALIAS_SET (mem1) != 0 || MEM_ALIAS_SET (mem2) != 0))
3932261a
MM
226 abort ();
227#endif
228
1da68f56
RK
229 return ! alias_sets_conflict_p (MEM_ALIAS_SET (mem1), MEM_ALIAS_SET (mem2));
230}
3932261a 231
1da68f56
RK
232/* Insert the NODE into the splay tree given by DATA. Used by
233 record_alias_subset via splay_tree_foreach. */
234
235static int
236insert_subset_children (node, data)
237 splay_tree_node node;
238 void *data;
239{
240 splay_tree_insert ((splay_tree) data, node->key, node->value);
241
242 return 0;
243}
244
245/* Return 1 if the two specified alias sets may conflict. */
246
247int
248alias_sets_conflict_p (set1, set2)
249 HOST_WIDE_INT set1, set2;
250{
251 alias_set_entry ase;
252
253 /* If have no alias set information for one of the operands, we have
254 to assume it can alias anything. */
255 if (set1 == 0 || set2 == 0
256 /* If the two alias sets are the same, they may alias. */
257 || set1 == set2)
258 return 1;
3932261a 259
3bdf5ad1 260 /* See if the first alias set is a subset of the second. */
1da68f56 261 ase = get_alias_set_entry (set1);
2bf105ab
RK
262 if (ase != 0
263 && (ase->has_zero_child
264 || splay_tree_lookup (ase->children,
1da68f56
RK
265 (splay_tree_key) set2)))
266 return 1;
3932261a
MM
267
268 /* Now do the same, but with the alias sets reversed. */
1da68f56 269 ase = get_alias_set_entry (set2);
2bf105ab
RK
270 if (ase != 0
271 && (ase->has_zero_child
272 || splay_tree_lookup (ase->children,
1da68f56
RK
273 (splay_tree_key) set1)))
274 return 1;
3932261a 275
1da68f56 276 /* The two alias sets are distinct and neither one is the
3932261a 277 child of the other. Therefore, they cannot alias. */
1da68f56 278 return 0;
3932261a 279}
1da68f56 280\f
ba4828e0
RK
281/* Set the alias set of MEM to SET. */
282
283void
284set_mem_alias_set (mem, set)
285 rtx mem;
286 HOST_WIDE_INT set;
287{
288 /* We would like to do this test but can't yet since when converting a
289 REG to a MEM, the alias set field is undefined. */
290#if 0
291 /* If the new and old alias sets don't conflict, something is wrong. */
292 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
293 abort ();
294#endif
295
296 MEM_ALIAS_SET (mem) = set;
297}
298\f
1da68f56
RK
299/* Return 1 if TYPE is a RECORD_TYPE, UNION_TYPE, or QUAL_UNION_TYPE and has
300 has any readonly fields. If any of the fields have types that
301 contain readonly fields, return true as well. */
3932261a 302
1da68f56
RK
303int
304readonly_fields_p (type)
305 tree type;
3932261a 306{
1da68f56
RK
307 tree field;
308
309 if (TREE_CODE (type) != RECORD_TYPE && TREE_CODE (type) != UNION_TYPE
310 && TREE_CODE (type) != QUAL_UNION_TYPE)
311 return 0;
312
313 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
314 if (TREE_CODE (field) == FIELD_DECL
315 && (TREE_READONLY (field)
316 || readonly_fields_p (TREE_TYPE (field))))
317 return 1;
3932261a
MM
318
319 return 0;
320}
3bdf5ad1 321\f
1da68f56
RK
322/* Return 1 if any MEM object of type T1 will always conflict (using the
323 dependency routines in this file) with any MEM object of type T2.
324 This is used when allocating temporary storage. If T1 and/or T2 are
325 NULL_TREE, it means we know nothing about the storage. */
326
327int
328objects_must_conflict_p (t1, t2)
329 tree t1, t2;
330{
e8ea2809
RK
331 /* If neither has a type specified, we don't know if they'll conflict
332 because we may be using them to store objects of various types, for
333 example the argument and local variables areas of inlined functions. */
981a4c34 334 if (t1 == 0 && t2 == 0)
e8ea2809
RK
335 return 0;
336
66cce54d
RH
337 /* If one or the other has readonly fields or is readonly,
338 then they may not conflict. */
339 if ((t1 != 0 && readonly_fields_p (t1))
340 || (t2 != 0 && readonly_fields_p (t2))
341 || (t1 != 0 && TYPE_READONLY (t1))
342 || (t2 != 0 && TYPE_READONLY (t2)))
343 return 0;
344
1da68f56
RK
345 /* If they are the same type, they must conflict. */
346 if (t1 == t2
347 /* Likewise if both are volatile. */
348 || (t1 != 0 && TYPE_VOLATILE (t1) && t2 != 0 && TYPE_VOLATILE (t2)))
349 return 1;
350
66cce54d
RH
351 /* If one is aggregate and the other is scalar then they may not
352 conflict. */
353 if ((t1 != 0 && AGGREGATE_TYPE_P (t1))
354 != (t2 != 0 && AGGREGATE_TYPE_P (t2)))
1da68f56
RK
355 return 0;
356
357 /* Otherwise they conflict only if the alias sets conflict. */
358 return alias_sets_conflict_p (t1 ? get_alias_set (t1) : 0,
359 t2 ? get_alias_set (t2) : 0);
360}
361\f
3bdf5ad1
RK
362/* T is an expression with pointer type. Find the DECL on which this
363 expression is based. (For example, in `a[i]' this would be `a'.)
364 If there is no such DECL, or a unique decl cannot be determined,
365 NULL_TREE is retured. */
366
367static tree
368find_base_decl (t)
369 tree t;
370{
371 tree d0, d1, d2;
372
373 if (t == 0 || t == error_mark_node || ! POINTER_TYPE_P (TREE_TYPE (t)))
374 return 0;
375
376 /* If this is a declaration, return it. */
377 if (TREE_CODE_CLASS (TREE_CODE (t)) == 'd')
378 return t;
379
380 /* Handle general expressions. It would be nice to deal with
381 COMPONENT_REFs here. If we could tell that `a' and `b' were the
382 same, then `a->f' and `b->f' are also the same. */
383 switch (TREE_CODE_CLASS (TREE_CODE (t)))
384 {
385 case '1':
386 return find_base_decl (TREE_OPERAND (t, 0));
387
388 case '2':
389 /* Return 0 if found in neither or both are the same. */
390 d0 = find_base_decl (TREE_OPERAND (t, 0));
391 d1 = find_base_decl (TREE_OPERAND (t, 1));
392 if (d0 == d1)
393 return d0;
394 else if (d0 == 0)
395 return d1;
396 else if (d1 == 0)
397 return d0;
398 else
399 return 0;
400
401 case '3':
402 d0 = find_base_decl (TREE_OPERAND (t, 0));
403 d1 = find_base_decl (TREE_OPERAND (t, 1));
404 d0 = find_base_decl (TREE_OPERAND (t, 0));
405 d2 = find_base_decl (TREE_OPERAND (t, 2));
406
407 /* Set any nonzero values from the last, then from the first. */
408 if (d1 == 0) d1 = d2;
409 if (d0 == 0) d0 = d1;
410 if (d1 == 0) d1 = d0;
411 if (d2 == 0) d2 = d1;
412
413 /* At this point all are nonzero or all are zero. If all three are the
414 same, return it. Otherwise, return zero. */
415 return (d0 == d1 && d1 == d2) ? d0 : 0;
416
417 default:
418 return 0;
419 }
420}
421
6e24b709
RK
422/* Return 1 if T is an expression that get_inner_reference handles. */
423
424static int
425handled_component_p (t)
426 tree t;
427{
428 switch (TREE_CODE (t))
429 {
430 case BIT_FIELD_REF:
431 case COMPONENT_REF:
432 case ARRAY_REF:
b4e3fabb 433 case ARRAY_RANGE_REF:
6e24b709
RK
434 case NON_LVALUE_EXPR:
435 return 1;
436
437 case NOP_EXPR:
438 case CONVERT_EXPR:
439 return (TYPE_MODE (TREE_TYPE (t))
440 == TYPE_MODE (TREE_TYPE (TREE_OPERAND (t, 0))));
441
442 default:
443 return 0;
444 }
445}
446
447/* Return 1 if all the nested component references handled by
448 get_inner_reference in T are such that we can address the object in T. */
449
450static int
451can_address_p (t)
452 tree t;
453{
454 /* If we're at the end, it is vacuously addressable. */
455 if (! handled_component_p (t))
456 return 1;
457
458 /* Bitfields are never addressable. */
459 else if (TREE_CODE (t) == BIT_FIELD_REF)
460 return 0;
461
462 else if (TREE_CODE (t) == COMPONENT_REF
463 && ! DECL_NONADDRESSABLE_P (TREE_OPERAND (t, 1))
464 && can_address_p (TREE_OPERAND (t, 0)))
465 return 1;
466
b4e3fabb 467 else if ((TREE_CODE (t) == ARRAY_REF || TREE_CODE (t) == ARRAY_RANGE_REF)
6e24b709
RK
468 && ! TYPE_NONALIASED_COMPONENT (TREE_TYPE (TREE_OPERAND (t, 0)))
469 && can_address_p (TREE_OPERAND (t, 0)))
470 return 1;
471
472 return 0;
473}
474
3bdf5ad1
RK
475/* Return the alias set for T, which may be either a type or an
476 expression. Call language-specific routine for help, if needed. */
477
478HOST_WIDE_INT
479get_alias_set (t)
480 tree t;
481{
f824e5c3 482 tree orig_t;
3bdf5ad1 483 HOST_WIDE_INT set;
3bdf5ad1
RK
484
485 /* If we're not doing any alias analysis, just assume everything
486 aliases everything else. Also return 0 if this or its type is
487 an error. */
488 if (! flag_strict_aliasing || t == error_mark_node
489 || (! TYPE_P (t)
490 && (TREE_TYPE (t) == 0 || TREE_TYPE (t) == error_mark_node)))
491 return 0;
492
493 /* We can be passed either an expression or a type. This and the
494 language-specific routine may make mutually-recursive calls to
495 each other to figure out what to do. At each juncture, we see if
496 this is a tree that the language may need to handle specially.
f824e5c3
RK
497 First handle things that aren't types and start by removing nops
498 since we care only about the actual object. */
499 if (! TYPE_P (t))
3bdf5ad1 500 {
f824e5c3
RK
501 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
502 || TREE_CODE (t) == NON_LVALUE_EXPR)
503 t = TREE_OPERAND (t, 0);
504
505 /* Now give the language a chance to do something but record what we
506 gave it this time. */
507 orig_t = t;
2e761e49 508 if ((set = lang_get_alias_set (t)) != -1)
f824e5c3
RK
509 return set;
510
80661759
RK
511 /* Now loop the same way as get_inner_reference and get the alias
512 set to use. Pick up the outermost object that we could have
513 a pointer to. */
6e24b709
RK
514 while (handled_component_p (t) && ! can_address_p (t))
515 t = TREE_OPERAND (t, 0);
516
f824e5c3
RK
517 if (TREE_CODE (t) == INDIRECT_REF)
518 {
519 /* Check for accesses through restrict-qualified pointers. */
520 tree decl = find_base_decl (TREE_OPERAND (t, 0));
521
522 if (decl && DECL_POINTER_ALIAS_SET_KNOWN_P (decl))
523 /* We use the alias set indicated in the declaration. */
524 return DECL_POINTER_ALIAS_SET (decl);
525
526 /* If we have an INDIRECT_REF via a void pointer, we don't
527 know anything about what that might alias. */
528 if (TREE_CODE (TREE_TYPE (t)) == VOID_TYPE)
529 return 0;
530 }
531
532 /* Give the language another chance to do something special. */
2e761e49
RH
533 if (orig_t != t
534 && (set = lang_get_alias_set (t)) != -1)
f824e5c3
RK
535 return set;
536
537 /* Now all we care about is the type. */
538 t = TREE_TYPE (t);
3bdf5ad1
RK
539 }
540
3bdf5ad1
RK
541 /* Variant qualifiers don't affect the alias set, so get the main
542 variant. If this is a type with a known alias set, return it. */
543 t = TYPE_MAIN_VARIANT (t);
544 if (TYPE_P (t) && TYPE_ALIAS_SET_KNOWN_P (t))
545 return TYPE_ALIAS_SET (t);
546
547 /* See if the language has special handling for this type. */
2e761e49 548 if ((set = lang_get_alias_set (t)) != -1)
2bf105ab
RK
549 {
550 /* If the alias set is now known, we are done. */
551 if (TYPE_ALIAS_SET_KNOWN_P (t))
552 return TYPE_ALIAS_SET (t);
553 }
554
3bdf5ad1
RK
555 /* There are no objects of FUNCTION_TYPE, so there's no point in
556 using up an alias set for them. (There are, of course, pointers
557 and references to functions, but that's different.) */
558 else if (TREE_CODE (t) == FUNCTION_TYPE)
559 set = 0;
560 else
561 /* Otherwise make a new alias set for this type. */
562 set = new_alias_set ();
563
564 TYPE_ALIAS_SET (t) = set;
2bf105ab
RK
565
566 /* If this is an aggregate type, we must record any component aliasing
567 information. */
1d79fd2c 568 if (AGGREGATE_TYPE_P (t) || TREE_CODE (t) == COMPLEX_TYPE)
2bf105ab
RK
569 record_component_aliases (t);
570
3bdf5ad1
RK
571 return set;
572}
573
574/* Return a brand-new alias set. */
575
576HOST_WIDE_INT
577new_alias_set ()
578{
579 static HOST_WIDE_INT last_alias_set;
580
581 if (flag_strict_aliasing)
582 return ++last_alias_set;
583 else
584 return 0;
585}
3932261a
MM
586
587/* Indicate that things in SUBSET can alias things in SUPERSET, but
588 not vice versa. For example, in C, a store to an `int' can alias a
589 structure containing an `int', but not vice versa. Here, the
590 structure would be the SUPERSET and `int' the SUBSET. This
a0c33338 591 function should be called only once per SUPERSET/SUBSET pair.
3932261a
MM
592
593 It is illegal for SUPERSET to be zero; everything is implicitly a
594 subset of alias set zero. */
595
596void
597record_alias_subset (superset, subset)
3bdf5ad1
RK
598 HOST_WIDE_INT superset;
599 HOST_WIDE_INT subset;
3932261a
MM
600{
601 alias_set_entry superset_entry;
602 alias_set_entry subset_entry;
603
604 if (superset == 0)
605 abort ();
606
607 superset_entry = get_alias_set_entry (superset);
d4b60170 608 if (superset_entry == 0)
3932261a
MM
609 {
610 /* Create an entry for the SUPERSET, so that we have a place to
611 attach the SUBSET. */
d4b60170
RK
612 superset_entry
613 = (alias_set_entry) xmalloc (sizeof (struct alias_set_entry));
3932261a
MM
614 superset_entry->alias_set = superset;
615 superset_entry->children
30f72379 616 = splay_tree_new (splay_tree_compare_ints, 0, 0);
570eb5c8 617 superset_entry->has_zero_child = 0;
d4b60170 618 splay_tree_insert (alias_sets, (splay_tree_key) superset,
3932261a 619 (splay_tree_value) superset_entry);
3932261a
MM
620 }
621
2bf105ab
RK
622 if (subset == 0)
623 superset_entry->has_zero_child = 1;
624 else
625 {
626 subset_entry = get_alias_set_entry (subset);
627 /* If there is an entry for the subset, enter all of its children
628 (if they are not already present) as children of the SUPERSET. */
629 if (subset_entry)
630 {
631 if (subset_entry->has_zero_child)
632 superset_entry->has_zero_child = 1;
d4b60170 633
2bf105ab
RK
634 splay_tree_foreach (subset_entry->children, insert_subset_children,
635 superset_entry->children);
636 }
3932261a 637
2bf105ab
RK
638 /* Enter the SUBSET itself as a child of the SUPERSET. */
639 splay_tree_insert (superset_entry->children,
640 (splay_tree_key) subset, 0);
641 }
3932261a
MM
642}
643
a0c33338
RK
644/* Record that component types of TYPE, if any, are part of that type for
645 aliasing purposes. For record types, we only record component types
646 for fields that are marked addressable. For array types, we always
647 record the component types, so the front end should not call this
648 function if the individual component aren't addressable. */
649
650void
651record_component_aliases (type)
652 tree type;
653{
3bdf5ad1 654 HOST_WIDE_INT superset = get_alias_set (type);
a0c33338
RK
655 tree field;
656
657 if (superset == 0)
658 return;
659
660 switch (TREE_CODE (type))
661 {
662 case ARRAY_TYPE:
2bf105ab
RK
663 if (! TYPE_NONALIASED_COMPONENT (type))
664 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
a0c33338
RK
665 break;
666
667 case RECORD_TYPE:
668 case UNION_TYPE:
669 case QUAL_UNION_TYPE:
670 for (field = TYPE_FIELDS (type); field != 0; field = TREE_CHAIN (field))
b16a49a1 671 if (TREE_CODE (field) == FIELD_DECL && ! DECL_NONADDRESSABLE_P (field))
2bf105ab 672 record_alias_subset (superset, get_alias_set (TREE_TYPE (field)));
a0c33338
RK
673 break;
674
1d79fd2c
JW
675 case COMPLEX_TYPE:
676 record_alias_subset (superset, get_alias_set (TREE_TYPE (type)));
677 break;
678
a0c33338
RK
679 default:
680 break;
681 }
682}
683
3bdf5ad1
RK
684/* Allocate an alias set for use in storing and reading from the varargs
685 spill area. */
686
687HOST_WIDE_INT
688get_varargs_alias_set ()
689{
690 static HOST_WIDE_INT set = -1;
691
692 if (set == -1)
693 set = new_alias_set ();
694
695 return set;
696}
697
698/* Likewise, but used for the fixed portions of the frame, e.g., register
699 save areas. */
700
701HOST_WIDE_INT
702get_frame_alias_set ()
703{
704 static HOST_WIDE_INT set = -1;
705
706 if (set == -1)
707 set = new_alias_set ();
708
709 return set;
710}
711
2a2c8203
JC
712/* Inside SRC, the source of a SET, find a base address. */
713
9ae8ffe7
JL
714static rtx
715find_base_value (src)
716 register rtx src;
717{
713f41f9 718 unsigned int regno;
9ae8ffe7
JL
719 switch (GET_CODE (src))
720 {
721 case SYMBOL_REF:
722 case LABEL_REF:
723 return src;
724
725 case REG:
fb6754f0 726 regno = REGNO (src);
d4b60170 727 /* At the start of a function, argument registers have known base
2a2c8203
JC
728 values which may be lost later. Returning an ADDRESS
729 expression here allows optimization based on argument values
730 even when the argument registers are used for other purposes. */
713f41f9
BS
731 if (regno < FIRST_PSEUDO_REGISTER && copying_arguments)
732 return new_reg_base_value[regno];
73774bc7 733
eaf407a5
JL
734 /* If a pseudo has a known base value, return it. Do not do this
735 for hard regs since it can result in a circular dependency
736 chain for registers which have values at function entry.
737
738 The test above is not sufficient because the scheduler may move
739 a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */
713f41f9
BS
740 if (regno >= FIRST_PSEUDO_REGISTER
741 && regno < reg_base_value_size
742 && reg_base_value[regno])
743 return reg_base_value[regno];
73774bc7 744
9ae8ffe7
JL
745 return src;
746
747 case MEM:
748 /* Check for an argument passed in memory. Only record in the
749 copying-arguments block; it is too hard to track changes
750 otherwise. */
751 if (copying_arguments
752 && (XEXP (src, 0) == arg_pointer_rtx
753 || (GET_CODE (XEXP (src, 0)) == PLUS
754 && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx)))
38a448ca 755 return gen_rtx_ADDRESS (VOIDmode, src);
9ae8ffe7
JL
756 return 0;
757
758 case CONST:
759 src = XEXP (src, 0);
760 if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS)
761 break;
d4b60170
RK
762
763 /* ... fall through ... */
2a2c8203 764
9ae8ffe7
JL
765 case PLUS:
766 case MINUS:
2a2c8203 767 {
ec907dd8
JL
768 rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1);
769
770 /* If either operand is a REG, then see if we already have
771 a known value for it. */
772 if (GET_CODE (src_0) == REG)
773 {
774 temp = find_base_value (src_0);
d4b60170 775 if (temp != 0)
ec907dd8
JL
776 src_0 = temp;
777 }
778
779 if (GET_CODE (src_1) == REG)
780 {
781 temp = find_base_value (src_1);
d4b60170 782 if (temp!= 0)
ec907dd8
JL
783 src_1 = temp;
784 }
2a2c8203 785
d4b60170 786 /* Guess which operand is the base address:
ec907dd8
JL
787 If either operand is a symbol, then it is the base. If
788 either operand is a CONST_INT, then the other is the base. */
d4b60170 789 if (GET_CODE (src_1) == CONST_INT || CONSTANT_P (src_0))
2a2c8203 790 return find_base_value (src_0);
d4b60170 791 else if (GET_CODE (src_0) == CONST_INT || CONSTANT_P (src_1))
ec907dd8
JL
792 return find_base_value (src_1);
793
d4b60170 794 /* This might not be necessary anymore:
ec907dd8
JL
795 If either operand is a REG that is a known pointer, then it
796 is the base. */
3502dc9c 797 else if (GET_CODE (src_0) == REG && REG_POINTER (src_0))
2a2c8203 798 return find_base_value (src_0);
3502dc9c 799 else if (GET_CODE (src_1) == REG && REG_POINTER (src_1))
2a2c8203
JC
800 return find_base_value (src_1);
801
9ae8ffe7 802 return 0;
2a2c8203
JC
803 }
804
805 case LO_SUM:
806 /* The standard form is (lo_sum reg sym) so look only at the
807 second operand. */
808 return find_base_value (XEXP (src, 1));
9ae8ffe7
JL
809
810 case AND:
811 /* If the second operand is constant set the base
812 address to the first operand. */
2a2c8203
JC
813 if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0)
814 return find_base_value (XEXP (src, 0));
9ae8ffe7
JL
815 return 0;
816
61f0131c
R
817 case TRUNCATE:
818 if (GET_MODE_SIZE (GET_MODE (src)) < GET_MODE_SIZE (Pmode))
819 break;
820 /* Fall through. */
de12be17
JC
821 case ZERO_EXTEND:
822 case SIGN_EXTEND: /* used for NT/Alpha pointers */
9ae8ffe7 823 case HIGH:
2a2c8203 824 return find_base_value (XEXP (src, 0));
1d300e19
KG
825
826 default:
827 break;
9ae8ffe7
JL
828 }
829
830 return 0;
831}
832
833/* Called from init_alias_analysis indirectly through note_stores. */
834
d4b60170 835/* While scanning insns to find base values, reg_seen[N] is nonzero if
9ae8ffe7
JL
836 register N has been set in this function. */
837static char *reg_seen;
838
13309a5f
JC
839/* Addresses which are known not to alias anything else are identified
840 by a unique integer. */
ec907dd8
JL
841static int unique_id;
842
2a2c8203 843static void
84832317 844record_set (dest, set, data)
9ae8ffe7 845 rtx dest, set;
84832317 846 void *data ATTRIBUTE_UNUSED;
9ae8ffe7 847{
ac606739 848 register unsigned regno;
9ae8ffe7
JL
849 rtx src;
850
851 if (GET_CODE (dest) != REG)
852 return;
853
fb6754f0 854 regno = REGNO (dest);
9ae8ffe7 855
ac606739
GS
856 if (regno >= reg_base_value_size)
857 abort ();
858
9ae8ffe7
JL
859 if (set)
860 {
861 /* A CLOBBER wipes out any old value but does not prevent a previously
862 unset register from acquiring a base address (i.e. reg_seen is not
863 set). */
864 if (GET_CODE (set) == CLOBBER)
865 {
ec907dd8 866 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
867 return;
868 }
869 src = SET_SRC (set);
870 }
871 else
872 {
9ae8ffe7
JL
873 if (reg_seen[regno])
874 {
ec907dd8 875 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
876 return;
877 }
878 reg_seen[regno] = 1;
38a448ca
RH
879 new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode,
880 GEN_INT (unique_id++));
9ae8ffe7
JL
881 return;
882 }
883
884 /* This is not the first set. If the new value is not related to the
885 old value, forget the base value. Note that the following code is
886 not detected:
887 extern int x, y; int *p = &x; p += (&y-&x);
888 ANSI C does not allow computing the difference of addresses
889 of distinct top level objects. */
ec907dd8 890 if (new_reg_base_value[regno])
9ae8ffe7
JL
891 switch (GET_CODE (src))
892 {
2a2c8203 893 case LO_SUM:
9ae8ffe7
JL
894 case MINUS:
895 if (XEXP (src, 0) != dest && XEXP (src, 1) != dest)
ec907dd8 896 new_reg_base_value[regno] = 0;
9ae8ffe7 897 break;
61f0131c
R
898 case PLUS:
899 /* If the value we add in the PLUS is also a valid base value,
900 this might be the actual base value, and the original value
901 an index. */
902 {
903 rtx other = NULL_RTX;
904
905 if (XEXP (src, 0) == dest)
906 other = XEXP (src, 1);
907 else if (XEXP (src, 1) == dest)
908 other = XEXP (src, 0);
909
910 if (! other || find_base_value (other))
911 new_reg_base_value[regno] = 0;
912 break;
913 }
9ae8ffe7
JL
914 case AND:
915 if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT)
ec907dd8 916 new_reg_base_value[regno] = 0;
9ae8ffe7 917 break;
9ae8ffe7 918 default:
ec907dd8 919 new_reg_base_value[regno] = 0;
9ae8ffe7
JL
920 break;
921 }
922 /* If this is the first set of a register, record the value. */
923 else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno])
ec907dd8
JL
924 && ! reg_seen[regno] && new_reg_base_value[regno] == 0)
925 new_reg_base_value[regno] = find_base_value (src);
9ae8ffe7
JL
926
927 reg_seen[regno] = 1;
928}
929
ac3d9668
RK
930/* Called from loop optimization when a new pseudo-register is
931 created. It indicates that REGNO is being set to VAL. f INVARIANT
932 is true then this value also describes an invariant relationship
933 which can be used to deduce that two registers with unknown values
934 are different. */
d4b60170 935
9ae8ffe7 936void
de12be17 937record_base_value (regno, val, invariant)
ac3d9668 938 unsigned int regno;
9ae8ffe7 939 rtx val;
de12be17 940 int invariant;
9ae8ffe7 941{
ac3d9668 942 if (regno >= reg_base_value_size)
9ae8ffe7 943 return;
de12be17 944
de12be17
JC
945 if (invariant && alias_invariant)
946 alias_invariant[regno] = val;
947
9ae8ffe7
JL
948 if (GET_CODE (val) == REG)
949 {
fb6754f0
BS
950 if (REGNO (val) < reg_base_value_size)
951 reg_base_value[regno] = reg_base_value[REGNO (val)];
d4b60170 952
9ae8ffe7
JL
953 return;
954 }
d4b60170 955
9ae8ffe7
JL
956 reg_base_value[regno] = find_base_value (val);
957}
958
db048faf
MM
959/* Returns a canonical version of X, from the point of view alias
960 analysis. (For example, if X is a MEM whose address is a register,
961 and the register has a known value (say a SYMBOL_REF), then a MEM
962 whose address is the SYMBOL_REF is returned.) */
963
964rtx
9ae8ffe7
JL
965canon_rtx (x)
966 rtx x;
967{
968 /* Recursively look for equivalences. */
fb6754f0
BS
969 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
970 && REGNO (x) < reg_known_value_size)
971 return reg_known_value[REGNO (x)] == x
972 ? x : canon_rtx (reg_known_value[REGNO (x)]);
9ae8ffe7
JL
973 else if (GET_CODE (x) == PLUS)
974 {
975 rtx x0 = canon_rtx (XEXP (x, 0));
976 rtx x1 = canon_rtx (XEXP (x, 1));
977
978 if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1))
979 {
9ae8ffe7 980 if (GET_CODE (x0) == CONST_INT)
ed8908e7 981 return plus_constant (x1, INTVAL (x0));
9ae8ffe7 982 else if (GET_CODE (x1) == CONST_INT)
ed8908e7 983 return plus_constant (x0, INTVAL (x1));
38a448ca 984 return gen_rtx_PLUS (GET_MODE (x), x0, x1);
9ae8ffe7
JL
985 }
986 }
d4b60170 987
9ae8ffe7
JL
988 /* This gives us much better alias analysis when called from
989 the loop optimizer. Note we want to leave the original
990 MEM alone, but need to return the canonicalized MEM with
991 all the flags with their original values. */
992 else if (GET_CODE (x) == MEM)
f1ec5147 993 x = replace_equiv_address_nv (x, canon_rtx (XEXP (x, 0)));
d4b60170 994
9ae8ffe7
JL
995 return x;
996}
997
998/* Return 1 if X and Y are identical-looking rtx's.
999
1000 We use the data in reg_known_value above to see if two registers with
1001 different numbers are, in fact, equivalent. */
1002
1003static int
1004rtx_equal_for_memref_p (x, y)
1005 rtx x, y;
1006{
1007 register int i;
1008 register int j;
1009 register enum rtx_code code;
6f7d635c 1010 register const char *fmt;
9ae8ffe7
JL
1011
1012 if (x == 0 && y == 0)
1013 return 1;
1014 if (x == 0 || y == 0)
1015 return 0;
d4b60170 1016
9ae8ffe7
JL
1017 x = canon_rtx (x);
1018 y = canon_rtx (y);
1019
1020 if (x == y)
1021 return 1;
1022
1023 code = GET_CODE (x);
1024 /* Rtx's of different codes cannot be equal. */
1025 if (code != GET_CODE (y))
1026 return 0;
1027
1028 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1029 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1030
1031 if (GET_MODE (x) != GET_MODE (y))
1032 return 0;
1033
db048faf
MM
1034 /* Some RTL can be compared without a recursive examination. */
1035 switch (code)
1036 {
1037 case REG:
1038 return REGNO (x) == REGNO (y);
1039
1040 case LABEL_REF:
1041 return XEXP (x, 0) == XEXP (y, 0);
1042
1043 case SYMBOL_REF:
1044 return XSTR (x, 0) == XSTR (y, 0);
1045
1046 case CONST_INT:
1047 case CONST_DOUBLE:
1048 /* There's no need to compare the contents of CONST_DOUBLEs or
1049 CONST_INTs because pointer equality is a good enough
1050 comparison for these nodes. */
1051 return 0;
1052
1053 case ADDRESSOF:
831ecbd4
RK
1054 return (XINT (x, 1) == XINT (y, 1)
1055 && rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)));
db048faf
MM
1056
1057 default:
1058 break;
1059 }
9ae8ffe7
JL
1060
1061 /* For commutative operations, the RTX match if the operand match in any
1062 order. Also handle the simple binary and unary cases without a loop. */
1063 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
1064 return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
1065 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)))
1066 || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1))
1067 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0))));
1068 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
1069 return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0))
1070 && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1)));
1071 else if (GET_RTX_CLASS (code) == '1')
1072 return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0));
1073
1074 /* Compare the elements. If any pair of corresponding elements
de12be17
JC
1075 fail to match, return 0 for the whole things.
1076
1077 Limit cases to types which actually appear in addresses. */
9ae8ffe7
JL
1078
1079 fmt = GET_RTX_FORMAT (code);
1080 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1081 {
1082 switch (fmt[i])
1083 {
9ae8ffe7
JL
1084 case 'i':
1085 if (XINT (x, i) != XINT (y, i))
1086 return 0;
1087 break;
1088
9ae8ffe7
JL
1089 case 'E':
1090 /* Two vectors must have the same length. */
1091 if (XVECLEN (x, i) != XVECLEN (y, i))
1092 return 0;
1093
1094 /* And the corresponding elements must match. */
1095 for (j = 0; j < XVECLEN (x, i); j++)
d4b60170
RK
1096 if (rtx_equal_for_memref_p (XVECEXP (x, i, j),
1097 XVECEXP (y, i, j)) == 0)
9ae8ffe7
JL
1098 return 0;
1099 break;
1100
1101 case 'e':
1102 if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0)
1103 return 0;
1104 break;
1105
3237ac18
AH
1106 /* This can happen for asm operands. */
1107 case 's':
1108 if (strcmp (XSTR (x, i), XSTR (y, i)))
1109 return 0;
1110 break;
1111
aee21ba9
JL
1112 /* This can happen for an asm which clobbers memory. */
1113 case '0':
1114 break;
1115
9ae8ffe7
JL
1116 /* It is believed that rtx's at this level will never
1117 contain anything but integers and other rtx's,
1118 except for within LABEL_REFs and SYMBOL_REFs. */
1119 default:
1120 abort ();
1121 }
1122 }
1123 return 1;
1124}
1125
1126/* Given an rtx X, find a SYMBOL_REF or LABEL_REF within
1127 X and return it, or return 0 if none found. */
1128
1129static rtx
1130find_symbolic_term (x)
1131 rtx x;
1132{
1133 register int i;
1134 register enum rtx_code code;
6f7d635c 1135 register const char *fmt;
9ae8ffe7
JL
1136
1137 code = GET_CODE (x);
1138 if (code == SYMBOL_REF || code == LABEL_REF)
1139 return x;
1140 if (GET_RTX_CLASS (code) == 'o')
1141 return 0;
1142
1143 fmt = GET_RTX_FORMAT (code);
1144 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1145 {
1146 rtx t;
1147
1148 if (fmt[i] == 'e')
1149 {
1150 t = find_symbolic_term (XEXP (x, i));
1151 if (t != 0)
1152 return t;
1153 }
1154 else if (fmt[i] == 'E')
1155 break;
1156 }
1157 return 0;
1158}
1159
1160static rtx
1161find_base_term (x)
1162 register rtx x;
1163{
eab5c70a
BS
1164 cselib_val *val;
1165 struct elt_loc_list *l;
1166
b949ea8b
JW
1167#if defined (FIND_BASE_TERM)
1168 /* Try machine-dependent ways to find the base term. */
1169 x = FIND_BASE_TERM (x);
1170#endif
1171
9ae8ffe7
JL
1172 switch (GET_CODE (x))
1173 {
1174 case REG:
1175 return REG_BASE_VALUE (x);
1176
de12be17
JC
1177 case ZERO_EXTEND:
1178 case SIGN_EXTEND: /* Used for Alpha/NT pointers */
9ae8ffe7 1179 case HIGH:
6d849a2a
JL
1180 case PRE_INC:
1181 case PRE_DEC:
1182 case POST_INC:
1183 case POST_DEC:
1184 return find_base_term (XEXP (x, 0));
1185
eab5c70a
BS
1186 case VALUE:
1187 val = CSELIB_VAL_PTR (x);
1188 for (l = val->locs; l; l = l->next)
1189 if ((x = find_base_term (l->loc)) != 0)
1190 return x;
1191 return 0;
1192
9ae8ffe7
JL
1193 case CONST:
1194 x = XEXP (x, 0);
1195 if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS)
1196 return 0;
1197 /* fall through */
1198 case LO_SUM:
1199 case PLUS:
1200 case MINUS:
1201 {
3c567fae
JL
1202 rtx tmp1 = XEXP (x, 0);
1203 rtx tmp2 = XEXP (x, 1);
1204
1205 /* This is a litle bit tricky since we have to determine which of
1206 the two operands represents the real base address. Otherwise this
1207 routine may return the index register instead of the base register.
1208
1209 That may cause us to believe no aliasing was possible, when in
1210 fact aliasing is possible.
1211
1212 We use a few simple tests to guess the base register. Additional
1213 tests can certainly be added. For example, if one of the operands
1214 is a shift or multiply, then it must be the index register and the
1215 other operand is the base register. */
1216
b949ea8b
JW
1217 if (tmp1 == pic_offset_table_rtx && CONSTANT_P (tmp2))
1218 return find_base_term (tmp2);
1219
3c567fae
JL
1220 /* If either operand is known to be a pointer, then use it
1221 to determine the base term. */
3502dc9c 1222 if (REG_P (tmp1) && REG_POINTER (tmp1))
3c567fae
JL
1223 return find_base_term (tmp1);
1224
3502dc9c 1225 if (REG_P (tmp2) && REG_POINTER (tmp2))
3c567fae
JL
1226 return find_base_term (tmp2);
1227
1228 /* Neither operand was known to be a pointer. Go ahead and find the
1229 base term for both operands. */
1230 tmp1 = find_base_term (tmp1);
1231 tmp2 = find_base_term (tmp2);
1232
1233 /* If either base term is named object or a special address
1234 (like an argument or stack reference), then use it for the
1235 base term. */
d4b60170 1236 if (tmp1 != 0
3c567fae
JL
1237 && (GET_CODE (tmp1) == SYMBOL_REF
1238 || GET_CODE (tmp1) == LABEL_REF
1239 || (GET_CODE (tmp1) == ADDRESS
1240 && GET_MODE (tmp1) != VOIDmode)))
1241 return tmp1;
1242
d4b60170 1243 if (tmp2 != 0
3c567fae
JL
1244 && (GET_CODE (tmp2) == SYMBOL_REF
1245 || GET_CODE (tmp2) == LABEL_REF
1246 || (GET_CODE (tmp2) == ADDRESS
1247 && GET_MODE (tmp2) != VOIDmode)))
1248 return tmp2;
1249
1250 /* We could not determine which of the two operands was the
1251 base register and which was the index. So we can determine
1252 nothing from the base alias check. */
1253 return 0;
9ae8ffe7
JL
1254 }
1255
1256 case AND:
1257 if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT)
1258 return REG_BASE_VALUE (XEXP (x, 0));
1259 return 0;
1260
1261 case SYMBOL_REF:
1262 case LABEL_REF:
1263 return x;
1264
d982e46e 1265 case ADDRESSOF:
bb07060a 1266 return REG_BASE_VALUE (frame_pointer_rtx);
d982e46e 1267
9ae8ffe7
JL
1268 default:
1269 return 0;
1270 }
1271}
1272
1273/* Return 0 if the addresses X and Y are known to point to different
1274 objects, 1 if they might be pointers to the same object. */
1275
1276static int
56ee9281 1277base_alias_check (x, y, x_mode, y_mode)
9ae8ffe7 1278 rtx x, y;
56ee9281 1279 enum machine_mode x_mode, y_mode;
9ae8ffe7
JL
1280{
1281 rtx x_base = find_base_term (x);
1282 rtx y_base = find_base_term (y);
1283
1c72c7f6
JC
1284 /* If the address itself has no known base see if a known equivalent
1285 value has one. If either address still has no known base, nothing
1286 is known about aliasing. */
1287 if (x_base == 0)
1288 {
1289 rtx x_c;
d4b60170 1290
1c72c7f6
JC
1291 if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x)
1292 return 1;
d4b60170 1293
1c72c7f6
JC
1294 x_base = find_base_term (x_c);
1295 if (x_base == 0)
1296 return 1;
1297 }
9ae8ffe7 1298
1c72c7f6
JC
1299 if (y_base == 0)
1300 {
1301 rtx y_c;
1302 if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y)
1303 return 1;
d4b60170 1304
1c72c7f6
JC
1305 y_base = find_base_term (y_c);
1306 if (y_base == 0)
1307 return 1;
1308 }
1309
1310 /* If the base addresses are equal nothing is known about aliasing. */
1311 if (rtx_equal_p (x_base, y_base))
9ae8ffe7
JL
1312 return 1;
1313
56ee9281
RH
1314 /* The base addresses of the read and write are different expressions.
1315 If they are both symbols and they are not accessed via AND, there is
1316 no conflict. We can bring knowledge of object alignment into play
1317 here. For example, on alpha, "char a, b;" can alias one another,
1318 though "char a; long b;" cannot. */
9ae8ffe7 1319 if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS)
c02f035f 1320 {
56ee9281
RH
1321 if (GET_CODE (x) == AND && GET_CODE (y) == AND)
1322 return 1;
1323 if (GET_CODE (x) == AND
1324 && (GET_CODE (XEXP (x, 1)) != CONST_INT
8fa2140d 1325 || (int) GET_MODE_UNIT_SIZE (y_mode) < -INTVAL (XEXP (x, 1))))
56ee9281
RH
1326 return 1;
1327 if (GET_CODE (y) == AND
1328 && (GET_CODE (XEXP (y, 1)) != CONST_INT
8fa2140d 1329 || (int) GET_MODE_UNIT_SIZE (x_mode) < -INTVAL (XEXP (y, 1))))
56ee9281 1330 return 1;
b2972551
JL
1331 /* Differing symbols never alias. */
1332 return 0;
c02f035f 1333 }
9ae8ffe7
JL
1334
1335 /* If one address is a stack reference there can be no alias:
1336 stack references using different base registers do not alias,
1337 a stack reference can not alias a parameter, and a stack reference
1338 can not alias a global. */
1339 if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode)
1340 || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode))
1341 return 0;
1342
1343 if (! flag_argument_noalias)
1344 return 1;
1345
1346 if (flag_argument_noalias > 1)
1347 return 0;
1348
1349 /* Weak noalias assertion (arguments are distinct, but may match globals). */
1350 return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode);
1351}
1352
eab5c70a
BS
1353/* Convert the address X into something we can use. This is done by returning
1354 it unchanged unless it is a value; in the latter case we call cselib to get
1355 a more useful rtx. */
3bdf5ad1 1356
a13d4ebf 1357rtx
eab5c70a
BS
1358get_addr (x)
1359 rtx x;
1360{
1361 cselib_val *v;
1362 struct elt_loc_list *l;
1363
1364 if (GET_CODE (x) != VALUE)
1365 return x;
1366 v = CSELIB_VAL_PTR (x);
1367 for (l = v->locs; l; l = l->next)
1368 if (CONSTANT_P (l->loc))
1369 return l->loc;
1370 for (l = v->locs; l; l = l->next)
1371 if (GET_CODE (l->loc) != REG && GET_CODE (l->loc) != MEM)
1372 return l->loc;
1373 if (v->locs)
1374 return v->locs->loc;
1375 return x;
1376}
1377
39cec1ac
MH
1378/* Return the address of the (N_REFS + 1)th memory reference to ADDR
1379 where SIZE is the size in bytes of the memory reference. If ADDR
1380 is not modified by the memory reference then ADDR is returned. */
1381
1382rtx
1383addr_side_effect_eval (addr, size, n_refs)
1384 rtx addr;
1385 int size;
1386 int n_refs;
1387{
1388 int offset = 0;
1389
1390 switch (GET_CODE (addr))
1391 {
1392 case PRE_INC:
1393 offset = (n_refs + 1) * size;
1394 break;
1395 case PRE_DEC:
1396 offset = -(n_refs + 1) * size;
1397 break;
1398 case POST_INC:
1399 offset = n_refs * size;
1400 break;
1401 case POST_DEC:
1402 offset = -n_refs * size;
1403 break;
1404
1405 default:
1406 return addr;
1407 }
1408
1409 if (offset)
1410 addr = gen_rtx_PLUS (GET_MODE (addr), XEXP (addr, 0), GEN_INT (offset));
1411 else
1412 addr = XEXP (addr, 0);
1413
1414 return addr;
1415}
1416
9ae8ffe7
JL
1417/* Return nonzero if X and Y (memory addresses) could reference the
1418 same location in memory. C is an offset accumulator. When
1419 C is nonzero, we are testing aliases between X and Y + C.
1420 XSIZE is the size in bytes of the X reference,
1421 similarly YSIZE is the size in bytes for Y.
1422
1423 If XSIZE or YSIZE is zero, we do not know the amount of memory being
1424 referenced (the reference was BLKmode), so make the most pessimistic
1425 assumptions.
1426
c02f035f
RH
1427 If XSIZE or YSIZE is negative, we may access memory outside the object
1428 being referenced as a side effect. This can happen when using AND to
1429 align memory references, as is done on the Alpha.
1430
9ae8ffe7 1431 Nice to notice that varying addresses cannot conflict with fp if no
0211b6ab 1432 local variables had their addresses taken, but that's too hard now. */
9ae8ffe7 1433
9ae8ffe7
JL
1434static int
1435memrefs_conflict_p (xsize, x, ysize, y, c)
1436 register rtx x, y;
1437 int xsize, ysize;
1438 HOST_WIDE_INT c;
1439{
eab5c70a
BS
1440 if (GET_CODE (x) == VALUE)
1441 x = get_addr (x);
1442 if (GET_CODE (y) == VALUE)
1443 y = get_addr (y);
9ae8ffe7
JL
1444 if (GET_CODE (x) == HIGH)
1445 x = XEXP (x, 0);
1446 else if (GET_CODE (x) == LO_SUM)
1447 x = XEXP (x, 1);
1448 else
39cec1ac 1449 x = canon_rtx (addr_side_effect_eval (x, xsize, 0));
9ae8ffe7
JL
1450 if (GET_CODE (y) == HIGH)
1451 y = XEXP (y, 0);
1452 else if (GET_CODE (y) == LO_SUM)
1453 y = XEXP (y, 1);
1454 else
39cec1ac 1455 y = canon_rtx (addr_side_effect_eval (y, ysize, 0));
9ae8ffe7
JL
1456
1457 if (rtx_equal_for_memref_p (x, y))
1458 {
c02f035f 1459 if (xsize <= 0 || ysize <= 0)
9ae8ffe7
JL
1460 return 1;
1461 if (c >= 0 && xsize > c)
1462 return 1;
1463 if (c < 0 && ysize+c > 0)
1464 return 1;
1465 return 0;
1466 }
1467
6e73e666
JC
1468 /* This code used to check for conflicts involving stack references and
1469 globals but the base address alias code now handles these cases. */
9ae8ffe7
JL
1470
1471 if (GET_CODE (x) == PLUS)
1472 {
1473 /* The fact that X is canonicalized means that this
1474 PLUS rtx is canonicalized. */
1475 rtx x0 = XEXP (x, 0);
1476 rtx x1 = XEXP (x, 1);
1477
1478 if (GET_CODE (y) == PLUS)
1479 {
1480 /* The fact that Y is canonicalized means that this
1481 PLUS rtx is canonicalized. */
1482 rtx y0 = XEXP (y, 0);
1483 rtx y1 = XEXP (y, 1);
1484
1485 if (rtx_equal_for_memref_p (x1, y1))
1486 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1487 if (rtx_equal_for_memref_p (x0, y0))
1488 return memrefs_conflict_p (xsize, x1, ysize, y1, c);
1489 if (GET_CODE (x1) == CONST_INT)
63be02db
JM
1490 {
1491 if (GET_CODE (y1) == CONST_INT)
1492 return memrefs_conflict_p (xsize, x0, ysize, y0,
1493 c - INTVAL (x1) + INTVAL (y1));
1494 else
1495 return memrefs_conflict_p (xsize, x0, ysize, y,
1496 c - INTVAL (x1));
1497 }
9ae8ffe7
JL
1498 else if (GET_CODE (y1) == CONST_INT)
1499 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1500
6e73e666 1501 return 1;
9ae8ffe7
JL
1502 }
1503 else if (GET_CODE (x1) == CONST_INT)
1504 return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1));
1505 }
1506 else if (GET_CODE (y) == PLUS)
1507 {
1508 /* The fact that Y is canonicalized means that this
1509 PLUS rtx is canonicalized. */
1510 rtx y0 = XEXP (y, 0);
1511 rtx y1 = XEXP (y, 1);
1512
1513 if (GET_CODE (y1) == CONST_INT)
1514 return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1));
1515 else
1516 return 1;
1517 }
1518
1519 if (GET_CODE (x) == GET_CODE (y))
1520 switch (GET_CODE (x))
1521 {
1522 case MULT:
1523 {
1524 /* Handle cases where we expect the second operands to be the
1525 same, and check only whether the first operand would conflict
1526 or not. */
1527 rtx x0, y0;
1528 rtx x1 = canon_rtx (XEXP (x, 1));
1529 rtx y1 = canon_rtx (XEXP (y, 1));
1530 if (! rtx_equal_for_memref_p (x1, y1))
1531 return 1;
1532 x0 = canon_rtx (XEXP (x, 0));
1533 y0 = canon_rtx (XEXP (y, 0));
1534 if (rtx_equal_for_memref_p (x0, y0))
1535 return (xsize == 0 || ysize == 0
1536 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1537
1538 /* Can't properly adjust our sizes. */
1539 if (GET_CODE (x1) != CONST_INT)
1540 return 1;
1541 xsize /= INTVAL (x1);
1542 ysize /= INTVAL (x1);
1543 c /= INTVAL (x1);
1544 return memrefs_conflict_p (xsize, x0, ysize, y0, c);
1545 }
1d300e19 1546
de12be17
JC
1547 case REG:
1548 /* Are these registers known not to be equal? */
1549 if (alias_invariant)
1550 {
e51712db 1551 unsigned int r_x = REGNO (x), r_y = REGNO (y);
de12be17
JC
1552 rtx i_x, i_y; /* invariant relationships of X and Y */
1553
1554 i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x];
1555 i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y];
1556
1557 if (i_x == 0 && i_y == 0)
1558 break;
1559
1560 if (! memrefs_conflict_p (xsize, i_x ? i_x : x,
1561 ysize, i_y ? i_y : y, c))
1562 return 0;
1563 }
1564 break;
1565
1d300e19
KG
1566 default:
1567 break;
9ae8ffe7
JL
1568 }
1569
1570 /* Treat an access through an AND (e.g. a subword access on an Alpha)
56ee9281
RH
1571 as an access with indeterminate size. Assume that references
1572 besides AND are aligned, so if the size of the other reference is
1573 at least as large as the alignment, assume no other overlap. */
9ae8ffe7 1574 if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT)
56ee9281 1575 {
02e3377d 1576 if (GET_CODE (y) == AND || ysize < -INTVAL (XEXP (x, 1)))
56ee9281
RH
1577 xsize = -1;
1578 return memrefs_conflict_p (xsize, XEXP (x, 0), ysize, y, c);
1579 }
9ae8ffe7 1580 if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT)
c02f035f 1581 {
56ee9281 1582 /* ??? If we are indexing far enough into the array/structure, we
c02f035f
RH
1583 may yet be able to determine that we can not overlap. But we
1584 also need to that we are far enough from the end not to overlap
56ee9281 1585 a following reference, so we do nothing with that for now. */
02e3377d 1586 if (GET_CODE (x) == AND || xsize < -INTVAL (XEXP (y, 1)))
56ee9281
RH
1587 ysize = -1;
1588 return memrefs_conflict_p (xsize, x, ysize, XEXP (y, 0), c);
c02f035f 1589 }
9ae8ffe7 1590
b24ea077
JW
1591 if (GET_CODE (x) == ADDRESSOF)
1592 {
1593 if (y == frame_pointer_rtx
1594 || GET_CODE (y) == ADDRESSOF)
1595 return xsize <= 0 || ysize <= 0;
1596 }
1597 if (GET_CODE (y) == ADDRESSOF)
1598 {
1599 if (x == frame_pointer_rtx)
1600 return xsize <= 0 || ysize <= 0;
1601 }
d982e46e 1602
9ae8ffe7
JL
1603 if (CONSTANT_P (x))
1604 {
1605 if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT)
1606 {
1607 c += (INTVAL (y) - INTVAL (x));
c02f035f 1608 return (xsize <= 0 || ysize <= 0
9ae8ffe7
JL
1609 || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0));
1610 }
1611
1612 if (GET_CODE (x) == CONST)
1613 {
1614 if (GET_CODE (y) == CONST)
1615 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1616 ysize, canon_rtx (XEXP (y, 0)), c);
1617 else
1618 return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)),
1619 ysize, y, c);
1620 }
1621 if (GET_CODE (y) == CONST)
1622 return memrefs_conflict_p (xsize, x, ysize,
1623 canon_rtx (XEXP (y, 0)), c);
1624
1625 if (CONSTANT_P (y))
b949ea8b 1626 return (xsize <= 0 || ysize <= 0
c02f035f 1627 || (rtx_equal_for_memref_p (x, y)
b949ea8b 1628 && ((c >= 0 && xsize > c) || (c < 0 && ysize+c > 0))));
9ae8ffe7
JL
1629
1630 return 1;
1631 }
1632 return 1;
1633}
1634
1635/* Functions to compute memory dependencies.
1636
1637 Since we process the insns in execution order, we can build tables
1638 to keep track of what registers are fixed (and not aliased), what registers
1639 are varying in known ways, and what registers are varying in unknown
1640 ways.
1641
1642 If both memory references are volatile, then there must always be a
1643 dependence between the two references, since their order can not be
1644 changed. A volatile and non-volatile reference can be interchanged
1645 though.
1646
dc1618bc
RK
1647 A MEM_IN_STRUCT reference at a non-AND varying address can never
1648 conflict with a non-MEM_IN_STRUCT reference at a fixed address. We
1649 also must allow AND addresses, because they may generate accesses
1650 outside the object being referenced. This is used to generate
1651 aligned addresses from unaligned addresses, for instance, the alpha
1652 storeqi_unaligned pattern. */
9ae8ffe7
JL
1653
1654/* Read dependence: X is read after read in MEM takes place. There can
1655 only be a dependence here if both reads are volatile. */
1656
1657int
1658read_dependence (mem, x)
1659 rtx mem;
1660 rtx x;
1661{
1662 return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem);
1663}
1664
c6df88cb
MM
1665/* Returns MEM1 if and only if MEM1 is a scalar at a fixed address and
1666 MEM2 is a reference to a structure at a varying address, or returns
1667 MEM2 if vice versa. Otherwise, returns NULL_RTX. If a non-NULL
1668 value is returned MEM1 and MEM2 can never alias. VARIES_P is used
1669 to decide whether or not an address may vary; it should return
eab5c70a
BS
1670 nonzero whenever variation is possible.
1671 MEM1_ADDR and MEM2_ADDR are the addresses of MEM1 and MEM2. */
1672
2c72b78f 1673static rtx
eab5c70a
BS
1674fixed_scalar_and_varying_struct_p (mem1, mem2, mem1_addr, mem2_addr, varies_p)
1675 rtx mem1, mem2;
1676 rtx mem1_addr, mem2_addr;
e38fe8e0 1677 int (*varies_p) PARAMS ((rtx, int));
eab5c70a 1678{
3e0abe15
GK
1679 if (! flag_strict_aliasing)
1680 return NULL_RTX;
1681
c6df88cb 1682 if (MEM_SCALAR_P (mem1) && MEM_IN_STRUCT_P (mem2)
e38fe8e0 1683 && !varies_p (mem1_addr, 1) && varies_p (mem2_addr, 1))
c6df88cb
MM
1684 /* MEM1 is a scalar at a fixed address; MEM2 is a struct at a
1685 varying address. */
1686 return mem1;
1687
1688 if (MEM_IN_STRUCT_P (mem1) && MEM_SCALAR_P (mem2)
e38fe8e0 1689 && varies_p (mem1_addr, 1) && !varies_p (mem2_addr, 1))
c6df88cb
MM
1690 /* MEM2 is a scalar at a fixed address; MEM1 is a struct at a
1691 varying address. */
1692 return mem2;
1693
1694 return NULL_RTX;
1695}
1696
1697/* Returns nonzero if something about the mode or address format MEM1
1698 indicates that it might well alias *anything*. */
1699
2c72b78f 1700static int
c6df88cb
MM
1701aliases_everything_p (mem)
1702 rtx mem;
1703{
c6df88cb
MM
1704 if (GET_CODE (XEXP (mem, 0)) == AND)
1705 /* If the address is an AND, its very hard to know at what it is
1706 actually pointing. */
1707 return 1;
1708
1709 return 0;
1710}
1711
9ae8ffe7
JL
1712/* True dependence: X is read after store in MEM takes place. */
1713
1714int
1715true_dependence (mem, mem_mode, x, varies)
1716 rtx mem;
1717 enum machine_mode mem_mode;
1718 rtx x;
e38fe8e0 1719 int (*varies) PARAMS ((rtx, int));
9ae8ffe7 1720{
6e73e666 1721 register rtx x_addr, mem_addr;
49982682 1722 rtx base;
9ae8ffe7
JL
1723
1724 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1725 return 1;
1726
41472af8
MM
1727 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1728 return 0;
1729
b949ea8b
JW
1730 /* Unchanging memory can't conflict with non-unchanging memory.
1731 A non-unchanging read can conflict with a non-unchanging write.
1732 An unchanging read can conflict with an unchanging write since
1733 there may be a single store to this address to initialize it.
ec569656
RK
1734 Note that an unchanging store can conflict with a non-unchanging read
1735 since we have to make conservative assumptions when we have a
1736 record with readonly fields and we are copying the whole thing.
b949ea8b
JW
1737 Just fall through to the code below to resolve potential conflicts.
1738 This won't handle all cases optimally, but the possible performance
1739 loss should be negligible. */
ec569656 1740 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
9ae8ffe7
JL
1741 return 0;
1742
56ee9281
RH
1743 if (mem_mode == VOIDmode)
1744 mem_mode = GET_MODE (mem);
1745
eab5c70a
BS
1746 x_addr = get_addr (XEXP (x, 0));
1747 mem_addr = get_addr (XEXP (mem, 0));
1748
55efb413
JW
1749 base = find_base_term (x_addr);
1750 if (base && (GET_CODE (base) == LABEL_REF
1751 || (GET_CODE (base) == SYMBOL_REF
1752 && CONSTANT_POOL_ADDRESS_P (base))))
1753 return 0;
1754
eab5c70a 1755 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1c72c7f6
JC
1756 return 0;
1757
eab5c70a
BS
1758 x_addr = canon_rtx (x_addr);
1759 mem_addr = canon_rtx (mem_addr);
6e73e666 1760
0211b6ab
JW
1761 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1762 SIZE_FOR_MODE (x), x_addr, 0))
1763 return 0;
1764
c6df88cb 1765 if (aliases_everything_p (x))
0211b6ab
JW
1766 return 1;
1767
c6df88cb
MM
1768 /* We cannot use aliases_everyting_p to test MEM, since we must look
1769 at MEM_MODE, rather than GET_MODE (MEM). */
1770 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
a13d4ebf
AM
1771 return 1;
1772
1773 /* In true_dependence we also allow BLKmode to alias anything. Why
1774 don't we do this in anti_dependence and output_dependence? */
1775 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1776 return 1;
1777
1778 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1779 varies);
1780}
1781
1782/* Canonical true dependence: X is read after store in MEM takes place.
1783 Variant of true_dependece which assumes MEM has already been
1784 canonicalized (hence we no longer do that here).
1785 The mem_addr argument has been added, since true_dependence computed
1786 this value prior to canonicalizing. */
1787
1788int
1789canon_true_dependence (mem, mem_mode, mem_addr, x, varies)
1790 rtx mem, mem_addr, x;
1791 enum machine_mode mem_mode;
1792 int (*varies) PARAMS ((rtx, int));
1793{
1794 register rtx x_addr;
1795
1796 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1797 return 1;
1798
1799 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1800 return 0;
1801
1802 /* If X is an unchanging read, then it can't possibly conflict with any
1803 non-unchanging store. It may conflict with an unchanging write though,
1804 because there may be a single store to this address to initialize it.
1805 Just fall through to the code below to resolve the case where we have
1806 both an unchanging read and an unchanging write. This won't handle all
1807 cases optimally, but the possible performance loss should be
1808 negligible. */
1809 if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem))
1810 return 0;
1811
1812 x_addr = get_addr (XEXP (x, 0));
1813
1814 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x), mem_mode))
1815 return 0;
1816
1817 x_addr = canon_rtx (x_addr);
1818 if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr,
1819 SIZE_FOR_MODE (x), x_addr, 0))
1820 return 0;
1821
1822 if (aliases_everything_p (x))
1823 return 1;
1824
1825 /* We cannot use aliases_everyting_p to test MEM, since we must look
1826 at MEM_MODE, rather than GET_MODE (MEM). */
1827 if (mem_mode == QImode || GET_CODE (mem_addr) == AND)
c6df88cb 1828 return 1;
0211b6ab 1829
c6df88cb
MM
1830 /* In true_dependence we also allow BLKmode to alias anything. Why
1831 don't we do this in anti_dependence and output_dependence? */
1832 if (mem_mode == BLKmode || GET_MODE (x) == BLKmode)
1833 return 1;
0211b6ab 1834
eab5c70a
BS
1835 return ! fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1836 varies);
9ae8ffe7
JL
1837}
1838
c6df88cb
MM
1839/* Returns non-zero if a write to X might alias a previous read from
1840 (or, if WRITEP is non-zero, a write to) MEM. */
9ae8ffe7 1841
2c72b78f 1842static int
c6df88cb 1843write_dependence_p (mem, x, writep)
9ae8ffe7
JL
1844 rtx mem;
1845 rtx x;
c6df88cb 1846 int writep;
9ae8ffe7 1847{
6e73e666 1848 rtx x_addr, mem_addr;
c6df88cb 1849 rtx fixed_scalar;
49982682 1850 rtx base;
6e73e666 1851
9ae8ffe7
JL
1852 if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem))
1853 return 1;
1854
eab5c70a
BS
1855 if (DIFFERENT_ALIAS_SETS_P (x, mem))
1856 return 0;
1857
b949ea8b
JW
1858 /* Unchanging memory can't conflict with non-unchanging memory. */
1859 if (RTX_UNCHANGING_P (x) != RTX_UNCHANGING_P (mem))
1860 return 0;
1861
9ae8ffe7
JL
1862 /* If MEM is an unchanging read, then it can't possibly conflict with
1863 the store to X, because there is at most one store to MEM, and it must
1864 have occurred somewhere before MEM. */
55efb413
JW
1865 if (! writep && RTX_UNCHANGING_P (mem))
1866 return 0;
1867
1868 x_addr = get_addr (XEXP (x, 0));
1869 mem_addr = get_addr (XEXP (mem, 0));
1870
49982682
JW
1871 if (! writep)
1872 {
55efb413 1873 base = find_base_term (mem_addr);
49982682
JW
1874 if (base && (GET_CODE (base) == LABEL_REF
1875 || (GET_CODE (base) == SYMBOL_REF
1876 && CONSTANT_POOL_ADDRESS_P (base))))
1877 return 0;
1878 }
1879
eab5c70a
BS
1880 if (! base_alias_check (x_addr, mem_addr, GET_MODE (x),
1881 GET_MODE (mem)))
41472af8
MM
1882 return 0;
1883
eab5c70a
BS
1884 x_addr = canon_rtx (x_addr);
1885 mem_addr = canon_rtx (mem_addr);
6e73e666 1886
c6df88cb
MM
1887 if (!memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr,
1888 SIZE_FOR_MODE (x), x_addr, 0))
1889 return 0;
1890
1891 fixed_scalar
eab5c70a
BS
1892 = fixed_scalar_and_varying_struct_p (mem, x, mem_addr, x_addr,
1893 rtx_addr_varies_p);
1894
c6df88cb
MM
1895 return (!(fixed_scalar == mem && !aliases_everything_p (x))
1896 && !(fixed_scalar == x && !aliases_everything_p (mem)));
1897}
1898
1899/* Anti dependence: X is written after read in MEM takes place. */
1900
1901int
1902anti_dependence (mem, x)
1903 rtx mem;
1904 rtx x;
1905{
1906 return write_dependence_p (mem, x, /*writep=*/0);
9ae8ffe7
JL
1907}
1908
1909/* Output dependence: X is written after store in MEM takes place. */
1910
1911int
1912output_dependence (mem, x)
1913 register rtx mem;
1914 register rtx x;
1915{
c6df88cb 1916 return write_dependence_p (mem, x, /*writep=*/1);
9ae8ffe7
JL
1917}
1918
bf6d9fd7 1919/* Returns non-zero if X mentions something which is not
7790df19
JW
1920 local to the function and is not constant. */
1921
1922static int
bf6d9fd7 1923nonlocal_mentioned_p (x)
7790df19
JW
1924 rtx x;
1925{
1926 rtx base;
1927 register RTX_CODE code;
1928 int regno;
1929
1930 code = GET_CODE (x);
1931
1932 if (GET_RTX_CLASS (code) == 'i')
1933 {
2a8f6b90
JH
1934 /* Constant functions can be constant if they don't use
1935 scratch memory used to mark function w/o side effects. */
7790df19 1936 if (code == CALL_INSN && CONST_CALL_P (x))
2a8f6b90
JH
1937 {
1938 x = CALL_INSN_FUNCTION_USAGE (x);
f8cd4126
RK
1939 if (x == 0)
1940 return 0;
2a8f6b90
JH
1941 }
1942 else
1943 x = PATTERN (x);
7790df19
JW
1944 code = GET_CODE (x);
1945 }
1946
1947 switch (code)
1948 {
1949 case SUBREG:
1950 if (GET_CODE (SUBREG_REG (x)) == REG)
1951 {
1952 /* Global registers are not local. */
1953 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER
ddef6bc7 1954 && global_regs[subreg_regno (x)])
7790df19
JW
1955 return 1;
1956 return 0;
1957 }
1958 break;
1959
1960 case REG:
1961 regno = REGNO (x);
1962 /* Global registers are not local. */
1963 if (regno < FIRST_PSEUDO_REGISTER && global_regs[regno])
1964 return 1;
1965 return 0;
1966
1967 case SCRATCH:
1968 case PC:
1969 case CC0:
1970 case CONST_INT:
1971 case CONST_DOUBLE:
1972 case CONST:
1973 case LABEL_REF:
1974 return 0;
1975
1976 case SYMBOL_REF:
1977 /* Constants in the function's constants pool are constant. */
1978 if (CONSTANT_POOL_ADDRESS_P (x))
1979 return 0;
1980 return 1;
1981
1982 case CALL:
bf6d9fd7 1983 /* Non-constant calls and recursion are not local. */
7790df19
JW
1984 return 1;
1985
1986 case MEM:
1987 /* Be overly conservative and consider any volatile memory
1988 reference as not local. */
1989 if (MEM_VOLATILE_P (x))
1990 return 1;
1991 base = find_base_term (XEXP (x, 0));
1992 if (base)
1993 {
b3b5ad95
JL
1994 /* A Pmode ADDRESS could be a reference via the structure value
1995 address or static chain. Such memory references are nonlocal.
1996
1997 Thus, we have to examine the contents of the ADDRESS to find
1998 out if this is a local reference or not. */
1999 if (GET_CODE (base) == ADDRESS
2000 && GET_MODE (base) == Pmode
2001 && (XEXP (base, 0) == stack_pointer_rtx
2002 || XEXP (base, 0) == arg_pointer_rtx
2003#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2004 || XEXP (base, 0) == hard_frame_pointer_rtx
2005#endif
2006 || XEXP (base, 0) == frame_pointer_rtx))
7790df19
JW
2007 return 0;
2008 /* Constants in the function's constant pool are constant. */
2009 if (GET_CODE (base) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (base))
2010 return 0;
2011 }
2012 return 1;
2013
bf6d9fd7 2014 case UNSPEC_VOLATILE:
7790df19 2015 case ASM_INPUT:
7790df19
JW
2016 return 1;
2017
bf6d9fd7
JW
2018 case ASM_OPERANDS:
2019 if (MEM_VOLATILE_P (x))
2020 return 1;
2021
2022 /* FALLTHROUGH */
2023
7790df19
JW
2024 default:
2025 break;
2026 }
2027
2028 /* Recursively scan the operands of this expression. */
2029
2030 {
499b1098 2031 register const char *fmt = GET_RTX_FORMAT (code);
7790df19
JW
2032 register int i;
2033
2034 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2035 {
2a8f6b90 2036 if (fmt[i] == 'e' && XEXP (x, i))
7790df19 2037 {
bf6d9fd7 2038 if (nonlocal_mentioned_p (XEXP (x, i)))
7790df19
JW
2039 return 1;
2040 }
d4757e6a 2041 else if (fmt[i] == 'E')
7790df19
JW
2042 {
2043 register int j;
2044 for (j = 0; j < XVECLEN (x, i); j++)
bf6d9fd7 2045 if (nonlocal_mentioned_p (XVECEXP (x, i, j)))
7790df19
JW
2046 return 1;
2047 }
2048 }
2049 }
2050
2051 return 0;
2052}
2053
e004f2f7
JW
2054/* Return non-zero if a loop (natural or otherwise) is present.
2055 Inspired by Depth_First_Search_PP described in:
2056
2057 Advanced Compiler Design and Implementation
2058 Steven Muchnick
2059 Morgan Kaufmann, 1997
2060
2061 and heavily borrowed from flow_depth_first_order_compute. */
2062
2063static int
2064loop_p ()
2065{
2066 edge *stack;
2067 int *pre;
2068 int *post;
2069 int sp;
2070 int prenum = 1;
2071 int postnum = 1;
2072 sbitmap visited;
2073
2074 /* Allocate the preorder and postorder number arrays. */
2075 pre = (int *) xcalloc (n_basic_blocks, sizeof (int));
2076 post = (int *) xcalloc (n_basic_blocks, sizeof (int));
2077
2078 /* Allocate stack for back-tracking up CFG. */
2079 stack = (edge *) xmalloc ((n_basic_blocks + 1) * sizeof (edge));
2080 sp = 0;
2081
2082 /* Allocate bitmap to track nodes that have been visited. */
2083 visited = sbitmap_alloc (n_basic_blocks);
2084
2085 /* None of the nodes in the CFG have been visited yet. */
2086 sbitmap_zero (visited);
2087
2088 /* Push the first edge on to the stack. */
2089 stack[sp++] = ENTRY_BLOCK_PTR->succ;
2090
2091 while (sp)
2092 {
2093 edge e;
2094 basic_block src;
2095 basic_block dest;
2096
2097 /* Look at the edge on the top of the stack. */
2098 e = stack[sp - 1];
2099 src = e->src;
2100 dest = e->dest;
2101
2102 /* Check if the edge destination has been visited yet. */
2103 if (dest != EXIT_BLOCK_PTR && ! TEST_BIT (visited, dest->index))
2104 {
2105 /* Mark that we have visited the destination. */
2106 SET_BIT (visited, dest->index);
2107
2108 pre[dest->index] = prenum++;
2109
2110 if (dest->succ)
2111 {
2112 /* Since the DEST node has been visited for the first
2113 time, check its successors. */
2114 stack[sp++] = dest->succ;
2115 }
2116 else
2117 post[dest->index] = postnum++;
2118 }
2119 else
2120 {
d69d0316 2121 if (dest != EXIT_BLOCK_PTR && src != ENTRY_BLOCK_PTR
e004f2f7
JW
2122 && pre[src->index] >= pre[dest->index]
2123 && post[dest->index] == 0)
2124 break;
2125
2126 if (! e->succ_next && src != ENTRY_BLOCK_PTR)
2127 post[src->index] = postnum++;
2128
2129 if (e->succ_next)
2130 stack[sp - 1] = e->succ_next;
2131 else
2132 sp--;
2133 }
2134 }
2135
2136 free (pre);
2137 free (post);
2138 free (stack);
2139 sbitmap_free (visited);
2140
2141 return sp;
2142}
2143
7790df19
JW
2144/* Mark the function if it is constant. */
2145
2146void
2147mark_constant_function ()
2148{
2149 rtx insn;
bf6d9fd7 2150 int nonlocal_mentioned;
7790df19
JW
2151
2152 if (TREE_PUBLIC (current_function_decl)
2153 || TREE_READONLY (current_function_decl)
bf6d9fd7 2154 || DECL_IS_PURE (current_function_decl)
7790df19
JW
2155 || TREE_THIS_VOLATILE (current_function_decl)
2156 || TYPE_MODE (TREE_TYPE (current_function_decl)) == VOIDmode)
2157 return;
2158
e004f2f7
JW
2159 /* A loop might not return which counts as a side effect. */
2160 if (loop_p ())
2161 return;
2162
bf6d9fd7
JW
2163 nonlocal_mentioned = 0;
2164
2165 init_alias_analysis ();
2166
7790df19
JW
2167 /* Determine if this is a constant function. */
2168
2169 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
bf6d9fd7
JW
2170 if (INSN_P (insn) && nonlocal_mentioned_p (insn))
2171 {
2172 nonlocal_mentioned = 1;
2173 break;
2174 }
2175
2176 end_alias_analysis ();
7790df19
JW
2177
2178 /* Mark the function. */
2179
bf6d9fd7
JW
2180 if (! nonlocal_mentioned)
2181 TREE_READONLY (current_function_decl) = 1;
7790df19
JW
2182}
2183
6e73e666
JC
2184
2185static HARD_REG_SET argument_registers;
2186
2187void
2188init_alias_once ()
2189{
2190 register int i;
2191
2192#ifndef OUTGOING_REGNO
2193#define OUTGOING_REGNO(N) N
2194#endif
2195 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2196 /* Check whether this register can hold an incoming pointer
2197 argument. FUNCTION_ARG_REGNO_P tests outgoing register
2198 numbers, so translate if necessary due to register windows. */
2199 if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i))
2200 && HARD_REGNO_MODE_OK (i, Pmode))
2201 SET_HARD_REG_BIT (argument_registers, i);
3932261a 2202
30f72379 2203 alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0);
6e73e666
JC
2204}
2205
c13e8210
MM
2206/* Initialize the aliasing machinery. Initialize the REG_KNOWN_VALUE
2207 array. */
2208
9ae8ffe7
JL
2209void
2210init_alias_analysis ()
2211{
2212 int maxreg = max_reg_num ();
ea64ef27 2213 int changed, pass;
9ae8ffe7 2214 register int i;
e51712db 2215 register unsigned int ui;
9ae8ffe7 2216 register rtx insn;
9ae8ffe7
JL
2217
2218 reg_known_value_size = maxreg;
2219
e05e2395
MM
2220 reg_known_value
2221 = (rtx *) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (rtx))
2222 - FIRST_PSEUDO_REGISTER;
2223 reg_known_equiv_p
2224 = (char*) xcalloc ((maxreg - FIRST_PSEUDO_REGISTER), sizeof (char))
9ae8ffe7 2225 - FIRST_PSEUDO_REGISTER;
9ae8ffe7 2226
6e73e666
JC
2227 /* Overallocate reg_base_value to allow some growth during loop
2228 optimization. Loop unrolling can create a large number of
2229 registers. */
2230 reg_base_value_size = maxreg * 2;
ac606739 2231 reg_base_value = (rtx *) xcalloc (reg_base_value_size, sizeof (rtx));
1f8f4a0b 2232 ggc_add_rtx_root (reg_base_value, reg_base_value_size);
ac606739 2233
e05e2395
MM
2234 new_reg_base_value = (rtx *) xmalloc (reg_base_value_size * sizeof (rtx));
2235 reg_seen = (char *) xmalloc (reg_base_value_size);
de12be17
JC
2236 if (! reload_completed && flag_unroll_loops)
2237 {
ac606739 2238 /* ??? Why are we realloc'ing if we're just going to zero it? */
de12be17
JC
2239 alias_invariant = (rtx *)xrealloc (alias_invariant,
2240 reg_base_value_size * sizeof (rtx));
961192e1 2241 memset ((char *)alias_invariant, 0, reg_base_value_size * sizeof (rtx));
de12be17 2242 }
ec907dd8
JL
2243
2244 /* The basic idea is that each pass through this loop will use the
2245 "constant" information from the previous pass to propagate alias
2246 information through another level of assignments.
2247
2248 This could get expensive if the assignment chains are long. Maybe
2249 we should throttle the number of iterations, possibly based on
6e73e666 2250 the optimization level or flag_expensive_optimizations.
ec907dd8
JL
2251
2252 We could propagate more information in the first pass by making use
2253 of REG_N_SETS to determine immediately that the alias information
ea64ef27
JL
2254 for a pseudo is "constant".
2255
2256 A program with an uninitialized variable can cause an infinite loop
2257 here. Instead of doing a full dataflow analysis to detect such problems
2258 we just cap the number of iterations for the loop.
2259
2260 The state of the arrays for the set chain in question does not matter
2261 since the program has undefined behavior. */
6e73e666 2262
ea64ef27 2263 pass = 0;
6e73e666 2264 do
ec907dd8
JL
2265 {
2266 /* Assume nothing will change this iteration of the loop. */
2267 changed = 0;
2268
ec907dd8
JL
2269 /* We want to assign the same IDs each iteration of this loop, so
2270 start counting from zero each iteration of the loop. */
2271 unique_id = 0;
2272
2273 /* We're at the start of the funtion each iteration through the
2274 loop, so we're copying arguments. */
2275 copying_arguments = 1;
9ae8ffe7 2276
6e73e666 2277 /* Wipe the potential alias information clean for this pass. */
961192e1 2278 memset ((char *) new_reg_base_value, 0, reg_base_value_size * sizeof (rtx));
8072f69c 2279
6e73e666 2280 /* Wipe the reg_seen array clean. */
961192e1 2281 memset ((char *) reg_seen, 0, reg_base_value_size);
9ae8ffe7 2282
6e73e666
JC
2283 /* Mark all hard registers which may contain an address.
2284 The stack, frame and argument pointers may contain an address.
2285 An argument register which can hold a Pmode value may contain
2286 an address even if it is not in BASE_REGS.
8072f69c 2287
6e73e666
JC
2288 The address expression is VOIDmode for an argument and
2289 Pmode for other registers. */
2290
2291 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
2292 if (TEST_HARD_REG_BIT (argument_registers, i))
38a448ca
RH
2293 new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode,
2294 gen_rtx_REG (Pmode, i));
6e73e666
JC
2295
2296 new_reg_base_value[STACK_POINTER_REGNUM]
38a448ca 2297 = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx);
6e73e666 2298 new_reg_base_value[ARG_POINTER_REGNUM]
38a448ca 2299 = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx);
6e73e666 2300 new_reg_base_value[FRAME_POINTER_REGNUM]
38a448ca 2301 = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx);
2a2c8203 2302#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6e73e666 2303 new_reg_base_value[HARD_FRAME_POINTER_REGNUM]
38a448ca 2304 = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx);
2a2c8203 2305#endif
ec907dd8
JL
2306
2307 /* Walk the insns adding values to the new_reg_base_value array. */
2308 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
9ae8ffe7 2309 {
2c3c49de 2310 if (INSN_P (insn))
ec907dd8 2311 {
6e73e666 2312 rtx note, set;
efc9bd41
RK
2313
2314#if defined (HAVE_prologue) || defined (HAVE_epilogue)
657959ca
JL
2315 /* The prologue/epilouge insns are not threaded onto the
2316 insn chain until after reload has completed. Thus,
2317 there is no sense wasting time checking if INSN is in
2318 the prologue/epilogue until after reload has completed. */
2319 if (reload_completed
2320 && prologue_epilogue_contains (insn))
efc9bd41
RK
2321 continue;
2322#endif
2323
ec907dd8
JL
2324 /* If this insn has a noalias note, process it, Otherwise,
2325 scan for sets. A simple set will have no side effects
2326 which could change the base value of any other register. */
6e73e666 2327
ec907dd8 2328 if (GET_CODE (PATTERN (insn)) == SET
efc9bd41
RK
2329 && REG_NOTES (insn) != 0
2330 && find_reg_note (insn, REG_NOALIAS, NULL_RTX))
84832317 2331 record_set (SET_DEST (PATTERN (insn)), NULL_RTX, NULL);
ec907dd8 2332 else
84832317 2333 note_stores (PATTERN (insn), record_set, NULL);
6e73e666
JC
2334
2335 set = single_set (insn);
2336
2337 if (set != 0
2338 && GET_CODE (SET_DEST (set)) == REG
fb6754f0 2339 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
6e73e666 2340 {
fb6754f0 2341 unsigned int regno = REGNO (SET_DEST (set));
713f41f9
BS
2342 rtx src = SET_SRC (set);
2343
2344 if (REG_NOTES (insn) != 0
2345 && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
2346 && REG_N_SETS (regno) == 1)
2347 || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0)
2348 && GET_CODE (XEXP (note, 0)) != EXPR_LIST
bb2cf916 2349 && ! rtx_varies_p (XEXP (note, 0), 1)
713f41f9
BS
2350 && ! reg_overlap_mentioned_p (SET_DEST (set), XEXP (note, 0)))
2351 {
2352 reg_known_value[regno] = XEXP (note, 0);
2353 reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV;
2354 }
2355 else if (REG_N_SETS (regno) == 1
2356 && GET_CODE (src) == PLUS
2357 && GET_CODE (XEXP (src, 0)) == REG
fb6754f0
BS
2358 && REGNO (XEXP (src, 0)) >= FIRST_PSEUDO_REGISTER
2359 && (reg_known_value[REGNO (XEXP (src, 0))])
713f41f9
BS
2360 && GET_CODE (XEXP (src, 1)) == CONST_INT)
2361 {
2362 rtx op0 = XEXP (src, 0);
bb2cf916 2363 op0 = reg_known_value[REGNO (op0)];
713f41f9 2364 reg_known_value[regno]
ed8908e7 2365 = plus_constant (op0, INTVAL (XEXP (src, 1)));
713f41f9
BS
2366 reg_known_equiv_p[regno] = 0;
2367 }
2368 else if (REG_N_SETS (regno) == 1
2369 && ! rtx_varies_p (src, 1))
2370 {
2371 reg_known_value[regno] = src;
2372 reg_known_equiv_p[regno] = 0;
2373 }
6e73e666 2374 }
ec907dd8
JL
2375 }
2376 else if (GET_CODE (insn) == NOTE
2377 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
2378 copying_arguments = 0;
6e73e666 2379 }
ec907dd8 2380
6e73e666 2381 /* Now propagate values from new_reg_base_value to reg_base_value. */
e51712db 2382 for (ui = 0; ui < reg_base_value_size; ui++)
6e73e666 2383 {
e51712db
KG
2384 if (new_reg_base_value[ui]
2385 && new_reg_base_value[ui] != reg_base_value[ui]
2386 && ! rtx_equal_p (new_reg_base_value[ui], reg_base_value[ui]))
ec907dd8 2387 {
e51712db 2388 reg_base_value[ui] = new_reg_base_value[ui];
6e73e666 2389 changed = 1;
ec907dd8 2390 }
9ae8ffe7 2391 }
9ae8ffe7 2392 }
6e73e666 2393 while (changed && ++pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7
JL
2394
2395 /* Fill in the remaining entries. */
2396 for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++)
2397 if (reg_known_value[i] == 0)
2398 reg_known_value[i] = regno_reg_rtx[i];
2399
9ae8ffe7
JL
2400 /* Simplify the reg_base_value array so that no register refers to
2401 another register, except to special registers indirectly through
2402 ADDRESS expressions.
2403
2404 In theory this loop can take as long as O(registers^2), but unless
2405 there are very long dependency chains it will run in close to linear
ea64ef27
JL
2406 time.
2407
2408 This loop may not be needed any longer now that the main loop does
2409 a better job at propagating alias information. */
2410 pass = 0;
9ae8ffe7
JL
2411 do
2412 {
2413 changed = 0;
ea64ef27 2414 pass++;
e51712db 2415 for (ui = 0; ui < reg_base_value_size; ui++)
9ae8ffe7 2416 {
e51712db 2417 rtx base = reg_base_value[ui];
9ae8ffe7
JL
2418 if (base && GET_CODE (base) == REG)
2419 {
fb6754f0 2420 unsigned int base_regno = REGNO (base);
e51712db
KG
2421 if (base_regno == ui) /* register set from itself */
2422 reg_base_value[ui] = 0;
9ae8ffe7 2423 else
e51712db 2424 reg_base_value[ui] = reg_base_value[base_regno];
9ae8ffe7
JL
2425 changed = 1;
2426 }
2427 }
2428 }
ea64ef27 2429 while (changed && pass < MAX_ALIAS_LOOP_PASSES);
9ae8ffe7 2430
e05e2395
MM
2431 /* Clean up. */
2432 free (new_reg_base_value);
ec907dd8 2433 new_reg_base_value = 0;
e05e2395 2434 free (reg_seen);
9ae8ffe7
JL
2435 reg_seen = 0;
2436}
2437
2438void
2439end_alias_analysis ()
2440{
e05e2395 2441 free (reg_known_value + FIRST_PSEUDO_REGISTER);
9ae8ffe7 2442 reg_known_value = 0;
ac606739 2443 reg_known_value_size = 0;
e05e2395
MM
2444 free (reg_known_equiv_p + FIRST_PSEUDO_REGISTER);
2445 reg_known_equiv_p = 0;
ac606739
GS
2446 if (reg_base_value)
2447 {
1f8f4a0b 2448 ggc_del_root (reg_base_value);
ac606739
GS
2449 free (reg_base_value);
2450 reg_base_value = 0;
2451 }
9ae8ffe7 2452 reg_base_value_size = 0;
de12be17
JC
2453 if (alias_invariant)
2454 {
ac606739 2455 free (alias_invariant);
de12be17
JC
2456 alias_invariant = 0;
2457 }
9ae8ffe7 2458}
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