]>
Commit | Line | Data |
---|---|---|
9ae8ffe7 | 1 | /* Alias analysis for GNU C |
1c72c7f6 | 2 | Copyright (C) 1997, 1998 Free Software Foundation, Inc. |
9ae8ffe7 JL |
3 | Contributed by John Carr (jfc@mit.edu). |
4 | ||
5 | This file is part of GNU CC. | |
6 | ||
7 | GNU CC is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | GNU CC is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with GNU CC; see the file COPYING. If not, write to | |
19 | the Free Software Foundation, 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "config.h" | |
670ee920 | 23 | #include "system.h" |
9ae8ffe7 JL |
24 | #include "rtl.h" |
25 | #include "expr.h" | |
26 | #include "regs.h" | |
27 | #include "hard-reg-set.h" | |
28 | #include "flags.h" | |
264fac34 | 29 | #include "output.h" |
2e107e9e | 30 | #include "toplev.h" |
9ae8ffe7 JL |
31 | |
32 | static rtx canon_rtx PROTO((rtx)); | |
33 | static int rtx_equal_for_memref_p PROTO((rtx, rtx)); | |
34 | static rtx find_symbolic_term PROTO((rtx)); | |
35 | static int memrefs_conflict_p PROTO((int, rtx, int, rtx, | |
36 | HOST_WIDE_INT)); | |
70fec650 JL |
37 | static void record_set PROTO((rtx, rtx)); |
38 | static rtx find_base_term PROTO((rtx)); | |
39 | static int base_alias_check PROTO((rtx, rtx)); | |
960b4ee6 | 40 | static rtx find_base_value PROTO((rtx)); |
9ae8ffe7 JL |
41 | |
42 | /* Set up all info needed to perform alias analysis on memory references. */ | |
43 | ||
44 | #define SIZE_FOR_MODE(X) (GET_MODE_SIZE (GET_MODE (X))) | |
45 | ||
41472af8 MM |
46 | /* Perform a basic sanity check. Namely, that there are |
47 | no alias sets if we're not doing strict aliasing. This helps | |
48 | to catch bugs whereby someone uses PUT_CODE, but doesn't clear | |
49 | MEM_ALIAS_SET, or where a MEM is allocated in some way other | |
50 | than by the use of gen_rtx_MEM, and the MEM_ALIAS_SET is not | |
51 | cleared. */ | |
52 | #ifdef ENABLE_CHECKING | |
53 | #define CHECK_ALIAS_SETS_FOR_CONSISTENCY(MEM1, MEM2) \ | |
54 | (!flag_strict_aliasing \ | |
55 | && (MEM_ALIAS_SET (MEM1) || MEM_ALIAS_SET (MEM2)) \ | |
56 | ? (abort (), 0) : 0) | |
57 | #else | |
4f70758f | 58 | #define CHECK_ALIAS_SETS_FOR_CONSISTENCY(MEM1, MEM2) ((void)0) |
41472af8 MM |
59 | #endif |
60 | ||
61 | /* Returns nonzero if MEM1 and MEM2 do not alias because they are in | |
264fac34 MM |
62 | different alias sets. We ignore alias sets in functions making use |
63 | of variable arguments because the va_arg macros on some systems are | |
64 | not legal ANSI C. */ | |
65 | #define DIFFERENT_ALIAS_SETS_P(MEM1, MEM2) \ | |
66 | (CHECK_ALIAS_SETS_FOR_CONSISTENCY(MEM1, MEM2), \ | |
67 | MEM_ALIAS_SET (MEM1) && MEM_ALIAS_SET (MEM2) \ | |
68 | && MEM_ALIAS_SET (MEM1) != MEM_ALIAS_SET (MEM2) \ | |
69 | && !current_function_stdarg && !current_function_varargs) | |
41472af8 | 70 | |
ea64ef27 JL |
71 | /* Cap the number of passes we make over the insns propagating alias |
72 | information through set chains. | |
73 | ||
74 | 10 is a completely arbitrary choice. */ | |
75 | #define MAX_ALIAS_LOOP_PASSES 10 | |
76 | ||
9ae8ffe7 JL |
77 | /* reg_base_value[N] gives an address to which register N is related. |
78 | If all sets after the first add or subtract to the current value | |
79 | or otherwise modify it so it does not point to a different top level | |
80 | object, reg_base_value[N] is equal to the address part of the source | |
2a2c8203 JC |
81 | of the first set. |
82 | ||
83 | A base address can be an ADDRESS, SYMBOL_REF, or LABEL_REF. ADDRESS | |
84 | expressions represent certain special values: function arguments and | |
85 | the stack, frame, and argument pointers. The contents of an address | |
86 | expression are not used (but they are descriptive for debugging); | |
87 | only the address and mode matter. Pointer equality, not rtx_equal_p, | |
88 | determines whether two ADDRESS expressions refer to the same base | |
89 | address. The mode determines whether it is a function argument or | |
90 | other special value. */ | |
91 | ||
9ae8ffe7 | 92 | rtx *reg_base_value; |
ec907dd8 | 93 | rtx *new_reg_base_value; |
9ae8ffe7 JL |
94 | unsigned int reg_base_value_size; /* size of reg_base_value array */ |
95 | #define REG_BASE_VALUE(X) \ | |
96 | (REGNO (X) < reg_base_value_size ? reg_base_value[REGNO (X)] : 0) | |
97 | ||
de12be17 JC |
98 | /* Vector of known invariant relationships between registers. Set in |
99 | loop unrolling. Indexed by register number, if nonzero the value | |
100 | is an expression describing this register in terms of another. | |
101 | ||
102 | The length of this array is REG_BASE_VALUE_SIZE. | |
103 | ||
104 | Because this array contains only pseudo registers it has no effect | |
105 | after reload. */ | |
106 | static rtx *alias_invariant; | |
107 | ||
9ae8ffe7 JL |
108 | /* Vector indexed by N giving the initial (unchanging) value known |
109 | for pseudo-register N. */ | |
110 | rtx *reg_known_value; | |
111 | ||
112 | /* Indicates number of valid entries in reg_known_value. */ | |
113 | static int reg_known_value_size; | |
114 | ||
115 | /* Vector recording for each reg_known_value whether it is due to a | |
116 | REG_EQUIV note. Future passes (viz., reload) may replace the | |
117 | pseudo with the equivalent expression and so we account for the | |
118 | dependences that would be introduced if that happens. */ | |
119 | /* ??? This is a problem only on the Convex. The REG_EQUIV notes created in | |
120 | assign_parms mention the arg pointer, and there are explicit insns in the | |
121 | RTL that modify the arg pointer. Thus we must ensure that such insns don't | |
122 | get scheduled across each other because that would invalidate the REG_EQUIV | |
123 | notes. One could argue that the REG_EQUIV notes are wrong, but solving | |
124 | the problem in the scheduler will likely give better code, so we do it | |
125 | here. */ | |
126 | char *reg_known_equiv_p; | |
127 | ||
2a2c8203 JC |
128 | /* True when scanning insns from the start of the rtl to the |
129 | NOTE_INSN_FUNCTION_BEG note. */ | |
9ae8ffe7 | 130 | |
9ae8ffe7 JL |
131 | static int copying_arguments; |
132 | ||
2a2c8203 JC |
133 | /* Inside SRC, the source of a SET, find a base address. */ |
134 | ||
9ae8ffe7 JL |
135 | static rtx |
136 | find_base_value (src) | |
137 | register rtx src; | |
138 | { | |
139 | switch (GET_CODE (src)) | |
140 | { | |
141 | case SYMBOL_REF: | |
142 | case LABEL_REF: | |
143 | return src; | |
144 | ||
145 | case REG: | |
2a2c8203 JC |
146 | /* At the start of a function argument registers have known base |
147 | values which may be lost later. Returning an ADDRESS | |
148 | expression here allows optimization based on argument values | |
149 | even when the argument registers are used for other purposes. */ | |
150 | if (REGNO (src) < FIRST_PSEUDO_REGISTER && copying_arguments) | |
ec907dd8 | 151 | return new_reg_base_value[REGNO (src)]; |
73774bc7 | 152 | |
eaf407a5 JL |
153 | /* If a pseudo has a known base value, return it. Do not do this |
154 | for hard regs since it can result in a circular dependency | |
155 | chain for registers which have values at function entry. | |
156 | ||
157 | The test above is not sufficient because the scheduler may move | |
158 | a copy out of an arg reg past the NOTE_INSN_FUNCTION_BEGIN. */ | |
159 | if (REGNO (src) >= FIRST_PSEUDO_REGISTER | |
74186471 | 160 | && REGNO (src) < reg_base_value_size |
eaf407a5 | 161 | && reg_base_value[REGNO (src)]) |
73774bc7 JL |
162 | return reg_base_value[REGNO (src)]; |
163 | ||
9ae8ffe7 JL |
164 | return src; |
165 | ||
166 | case MEM: | |
167 | /* Check for an argument passed in memory. Only record in the | |
168 | copying-arguments block; it is too hard to track changes | |
169 | otherwise. */ | |
170 | if (copying_arguments | |
171 | && (XEXP (src, 0) == arg_pointer_rtx | |
172 | || (GET_CODE (XEXP (src, 0)) == PLUS | |
173 | && XEXP (XEXP (src, 0), 0) == arg_pointer_rtx))) | |
38a448ca | 174 | return gen_rtx_ADDRESS (VOIDmode, src); |
9ae8ffe7 JL |
175 | return 0; |
176 | ||
177 | case CONST: | |
178 | src = XEXP (src, 0); | |
179 | if (GET_CODE (src) != PLUS && GET_CODE (src) != MINUS) | |
180 | break; | |
181 | /* fall through */ | |
2a2c8203 | 182 | |
9ae8ffe7 JL |
183 | case PLUS: |
184 | case MINUS: | |
2a2c8203 | 185 | { |
ec907dd8 JL |
186 | rtx temp, src_0 = XEXP (src, 0), src_1 = XEXP (src, 1); |
187 | ||
188 | /* If either operand is a REG, then see if we already have | |
189 | a known value for it. */ | |
190 | if (GET_CODE (src_0) == REG) | |
191 | { | |
192 | temp = find_base_value (src_0); | |
193 | if (temp) | |
194 | src_0 = temp; | |
195 | } | |
196 | ||
197 | if (GET_CODE (src_1) == REG) | |
198 | { | |
199 | temp = find_base_value (src_1); | |
200 | if (temp) | |
201 | src_1 = temp; | |
202 | } | |
2a2c8203 JC |
203 | |
204 | /* Guess which operand is the base address. | |
205 | ||
ec907dd8 JL |
206 | If either operand is a symbol, then it is the base. If |
207 | either operand is a CONST_INT, then the other is the base. */ | |
2a2c8203 JC |
208 | |
209 | if (GET_CODE (src_1) == CONST_INT | |
210 | || GET_CODE (src_0) == SYMBOL_REF | |
211 | || GET_CODE (src_0) == LABEL_REF | |
212 | || GET_CODE (src_0) == CONST) | |
213 | return find_base_value (src_0); | |
214 | ||
ec907dd8 JL |
215 | if (GET_CODE (src_0) == CONST_INT |
216 | || GET_CODE (src_1) == SYMBOL_REF | |
217 | || GET_CODE (src_1) == LABEL_REF | |
218 | || GET_CODE (src_1) == CONST) | |
219 | return find_base_value (src_1); | |
220 | ||
221 | /* This might not be necessary anymore. | |
222 | ||
223 | If either operand is a REG that is a known pointer, then it | |
224 | is the base. */ | |
2a2c8203 JC |
225 | if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0))) |
226 | return find_base_value (src_0); | |
227 | ||
228 | if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1))) | |
229 | return find_base_value (src_1); | |
230 | ||
9ae8ffe7 | 231 | return 0; |
2a2c8203 JC |
232 | } |
233 | ||
234 | case LO_SUM: | |
235 | /* The standard form is (lo_sum reg sym) so look only at the | |
236 | second operand. */ | |
237 | return find_base_value (XEXP (src, 1)); | |
9ae8ffe7 JL |
238 | |
239 | case AND: | |
240 | /* If the second operand is constant set the base | |
241 | address to the first operand. */ | |
2a2c8203 JC |
242 | if (GET_CODE (XEXP (src, 1)) == CONST_INT && INTVAL (XEXP (src, 1)) != 0) |
243 | return find_base_value (XEXP (src, 0)); | |
9ae8ffe7 JL |
244 | return 0; |
245 | ||
de12be17 JC |
246 | case ZERO_EXTEND: |
247 | case SIGN_EXTEND: /* used for NT/Alpha pointers */ | |
9ae8ffe7 | 248 | case HIGH: |
2a2c8203 | 249 | return find_base_value (XEXP (src, 0)); |
1d300e19 KG |
250 | |
251 | default: | |
252 | break; | |
9ae8ffe7 JL |
253 | } |
254 | ||
255 | return 0; | |
256 | } | |
257 | ||
258 | /* Called from init_alias_analysis indirectly through note_stores. */ | |
259 | ||
260 | /* while scanning insns to find base values, reg_seen[N] is nonzero if | |
261 | register N has been set in this function. */ | |
262 | static char *reg_seen; | |
263 | ||
13309a5f JC |
264 | /* Addresses which are known not to alias anything else are identified |
265 | by a unique integer. */ | |
ec907dd8 JL |
266 | static int unique_id; |
267 | ||
2a2c8203 JC |
268 | static void |
269 | record_set (dest, set) | |
9ae8ffe7 JL |
270 | rtx dest, set; |
271 | { | |
272 | register int regno; | |
273 | rtx src; | |
274 | ||
275 | if (GET_CODE (dest) != REG) | |
276 | return; | |
277 | ||
278 | regno = REGNO (dest); | |
279 | ||
280 | if (set) | |
281 | { | |
282 | /* A CLOBBER wipes out any old value but does not prevent a previously | |
283 | unset register from acquiring a base address (i.e. reg_seen is not | |
284 | set). */ | |
285 | if (GET_CODE (set) == CLOBBER) | |
286 | { | |
ec907dd8 | 287 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
288 | return; |
289 | } | |
290 | src = SET_SRC (set); | |
291 | } | |
292 | else | |
293 | { | |
9ae8ffe7 JL |
294 | if (reg_seen[regno]) |
295 | { | |
ec907dd8 | 296 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
297 | return; |
298 | } | |
299 | reg_seen[regno] = 1; | |
38a448ca RH |
300 | new_reg_base_value[regno] = gen_rtx_ADDRESS (Pmode, |
301 | GEN_INT (unique_id++)); | |
9ae8ffe7 JL |
302 | return; |
303 | } | |
304 | ||
305 | /* This is not the first set. If the new value is not related to the | |
306 | old value, forget the base value. Note that the following code is | |
307 | not detected: | |
308 | extern int x, y; int *p = &x; p += (&y-&x); | |
309 | ANSI C does not allow computing the difference of addresses | |
310 | of distinct top level objects. */ | |
ec907dd8 | 311 | if (new_reg_base_value[regno]) |
9ae8ffe7 JL |
312 | switch (GET_CODE (src)) |
313 | { | |
2a2c8203 | 314 | case LO_SUM: |
9ae8ffe7 JL |
315 | case PLUS: |
316 | case MINUS: | |
317 | if (XEXP (src, 0) != dest && XEXP (src, 1) != dest) | |
ec907dd8 | 318 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
319 | break; |
320 | case AND: | |
321 | if (XEXP (src, 0) != dest || GET_CODE (XEXP (src, 1)) != CONST_INT) | |
ec907dd8 | 322 | new_reg_base_value[regno] = 0; |
9ae8ffe7 | 323 | break; |
9ae8ffe7 | 324 | default: |
ec907dd8 | 325 | new_reg_base_value[regno] = 0; |
9ae8ffe7 JL |
326 | break; |
327 | } | |
328 | /* If this is the first set of a register, record the value. */ | |
329 | else if ((regno >= FIRST_PSEUDO_REGISTER || ! fixed_regs[regno]) | |
ec907dd8 JL |
330 | && ! reg_seen[regno] && new_reg_base_value[regno] == 0) |
331 | new_reg_base_value[regno] = find_base_value (src); | |
9ae8ffe7 JL |
332 | |
333 | reg_seen[regno] = 1; | |
334 | } | |
335 | ||
336 | /* Called from loop optimization when a new pseudo-register is created. */ | |
337 | void | |
de12be17 | 338 | record_base_value (regno, val, invariant) |
9ae8ffe7 JL |
339 | int regno; |
340 | rtx val; | |
de12be17 | 341 | int invariant; |
9ae8ffe7 | 342 | { |
6e73e666 | 343 | if (regno >= reg_base_value_size) |
9ae8ffe7 | 344 | return; |
de12be17 JC |
345 | |
346 | /* If INVARIANT is true then this value also describes an invariant | |
347 | relationship which can be used to deduce that two registers with | |
348 | unknown values are different. */ | |
349 | if (invariant && alias_invariant) | |
350 | alias_invariant[regno] = val; | |
351 | ||
9ae8ffe7 JL |
352 | if (GET_CODE (val) == REG) |
353 | { | |
354 | if (REGNO (val) < reg_base_value_size) | |
de12be17 JC |
355 | { |
356 | reg_base_value[regno] = reg_base_value[REGNO (val)]; | |
357 | } | |
9ae8ffe7 JL |
358 | return; |
359 | } | |
360 | reg_base_value[regno] = find_base_value (val); | |
361 | } | |
362 | ||
363 | static rtx | |
364 | canon_rtx (x) | |
365 | rtx x; | |
366 | { | |
367 | /* Recursively look for equivalences. */ | |
368 | if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER | |
369 | && REGNO (x) < reg_known_value_size) | |
370 | return reg_known_value[REGNO (x)] == x | |
371 | ? x : canon_rtx (reg_known_value[REGNO (x)]); | |
372 | else if (GET_CODE (x) == PLUS) | |
373 | { | |
374 | rtx x0 = canon_rtx (XEXP (x, 0)); | |
375 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
376 | ||
377 | if (x0 != XEXP (x, 0) || x1 != XEXP (x, 1)) | |
378 | { | |
379 | /* We can tolerate LO_SUMs being offset here; these | |
380 | rtl are used for nothing other than comparisons. */ | |
381 | if (GET_CODE (x0) == CONST_INT) | |
382 | return plus_constant_for_output (x1, INTVAL (x0)); | |
383 | else if (GET_CODE (x1) == CONST_INT) | |
384 | return plus_constant_for_output (x0, INTVAL (x1)); | |
38a448ca | 385 | return gen_rtx_PLUS (GET_MODE (x), x0, x1); |
9ae8ffe7 JL |
386 | } |
387 | } | |
388 | /* This gives us much better alias analysis when called from | |
389 | the loop optimizer. Note we want to leave the original | |
390 | MEM alone, but need to return the canonicalized MEM with | |
391 | all the flags with their original values. */ | |
392 | else if (GET_CODE (x) == MEM) | |
393 | { | |
394 | rtx addr = canon_rtx (XEXP (x, 0)); | |
395 | if (addr != XEXP (x, 0)) | |
396 | { | |
38a448ca | 397 | rtx new = gen_rtx_MEM (GET_MODE (x), addr); |
9ae8ffe7 JL |
398 | MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x); |
399 | RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); | |
400 | MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x); | |
41472af8 | 401 | MEM_ALIAS_SET (new) = MEM_ALIAS_SET (x); |
9ae8ffe7 JL |
402 | x = new; |
403 | } | |
404 | } | |
405 | return x; | |
406 | } | |
407 | ||
408 | /* Return 1 if X and Y are identical-looking rtx's. | |
409 | ||
410 | We use the data in reg_known_value above to see if two registers with | |
411 | different numbers are, in fact, equivalent. */ | |
412 | ||
413 | static int | |
414 | rtx_equal_for_memref_p (x, y) | |
415 | rtx x, y; | |
416 | { | |
417 | register int i; | |
418 | register int j; | |
419 | register enum rtx_code code; | |
420 | register char *fmt; | |
421 | ||
422 | if (x == 0 && y == 0) | |
423 | return 1; | |
424 | if (x == 0 || y == 0) | |
425 | return 0; | |
426 | x = canon_rtx (x); | |
427 | y = canon_rtx (y); | |
428 | ||
429 | if (x == y) | |
430 | return 1; | |
431 | ||
432 | code = GET_CODE (x); | |
433 | /* Rtx's of different codes cannot be equal. */ | |
434 | if (code != GET_CODE (y)) | |
435 | return 0; | |
436 | ||
437 | /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. | |
438 | (REG:SI x) and (REG:HI x) are NOT equivalent. */ | |
439 | ||
440 | if (GET_MODE (x) != GET_MODE (y)) | |
441 | return 0; | |
442 | ||
443 | /* REG, LABEL_REF, and SYMBOL_REF can be compared nonrecursively. */ | |
444 | ||
445 | if (code == REG) | |
446 | return REGNO (x) == REGNO (y); | |
447 | if (code == LABEL_REF) | |
448 | return XEXP (x, 0) == XEXP (y, 0); | |
449 | if (code == SYMBOL_REF) | |
450 | return XSTR (x, 0) == XSTR (y, 0); | |
de12be17 JC |
451 | if (code == CONST_INT) |
452 | return INTVAL (x) == INTVAL (y); | |
453 | if (code == ADDRESSOF) | |
454 | return REGNO (XEXP (x, 0)) == REGNO (XEXP (y, 0)) && XINT (x, 1) == XINT (y, 1); | |
9ae8ffe7 JL |
455 | |
456 | /* For commutative operations, the RTX match if the operand match in any | |
457 | order. Also handle the simple binary and unary cases without a loop. */ | |
458 | if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') | |
459 | return ((rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
460 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))) | |
461 | || (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 1)) | |
462 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 0)))); | |
463 | else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2') | |
464 | return (rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)) | |
465 | && rtx_equal_for_memref_p (XEXP (x, 1), XEXP (y, 1))); | |
466 | else if (GET_RTX_CLASS (code) == '1') | |
467 | return rtx_equal_for_memref_p (XEXP (x, 0), XEXP (y, 0)); | |
468 | ||
469 | /* Compare the elements. If any pair of corresponding elements | |
de12be17 JC |
470 | fail to match, return 0 for the whole things. |
471 | ||
472 | Limit cases to types which actually appear in addresses. */ | |
9ae8ffe7 JL |
473 | |
474 | fmt = GET_RTX_FORMAT (code); | |
475 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
476 | { | |
477 | switch (fmt[i]) | |
478 | { | |
9ae8ffe7 JL |
479 | case 'i': |
480 | if (XINT (x, i) != XINT (y, i)) | |
481 | return 0; | |
482 | break; | |
483 | ||
9ae8ffe7 JL |
484 | case 'E': |
485 | /* Two vectors must have the same length. */ | |
486 | if (XVECLEN (x, i) != XVECLEN (y, i)) | |
487 | return 0; | |
488 | ||
489 | /* And the corresponding elements must match. */ | |
490 | for (j = 0; j < XVECLEN (x, i); j++) | |
491 | if (rtx_equal_for_memref_p (XVECEXP (x, i, j), XVECEXP (y, i, j)) == 0) | |
492 | return 0; | |
493 | break; | |
494 | ||
495 | case 'e': | |
496 | if (rtx_equal_for_memref_p (XEXP (x, i), XEXP (y, i)) == 0) | |
497 | return 0; | |
498 | break; | |
499 | ||
aee21ba9 JL |
500 | /* This can happen for an asm which clobbers memory. */ |
501 | case '0': | |
502 | break; | |
503 | ||
9ae8ffe7 JL |
504 | /* It is believed that rtx's at this level will never |
505 | contain anything but integers and other rtx's, | |
506 | except for within LABEL_REFs and SYMBOL_REFs. */ | |
507 | default: | |
508 | abort (); | |
509 | } | |
510 | } | |
511 | return 1; | |
512 | } | |
513 | ||
514 | /* Given an rtx X, find a SYMBOL_REF or LABEL_REF within | |
515 | X and return it, or return 0 if none found. */ | |
516 | ||
517 | static rtx | |
518 | find_symbolic_term (x) | |
519 | rtx x; | |
520 | { | |
521 | register int i; | |
522 | register enum rtx_code code; | |
523 | register char *fmt; | |
524 | ||
525 | code = GET_CODE (x); | |
526 | if (code == SYMBOL_REF || code == LABEL_REF) | |
527 | return x; | |
528 | if (GET_RTX_CLASS (code) == 'o') | |
529 | return 0; | |
530 | ||
531 | fmt = GET_RTX_FORMAT (code); | |
532 | for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) | |
533 | { | |
534 | rtx t; | |
535 | ||
536 | if (fmt[i] == 'e') | |
537 | { | |
538 | t = find_symbolic_term (XEXP (x, i)); | |
539 | if (t != 0) | |
540 | return t; | |
541 | } | |
542 | else if (fmt[i] == 'E') | |
543 | break; | |
544 | } | |
545 | return 0; | |
546 | } | |
547 | ||
548 | static rtx | |
549 | find_base_term (x) | |
550 | register rtx x; | |
551 | { | |
552 | switch (GET_CODE (x)) | |
553 | { | |
554 | case REG: | |
555 | return REG_BASE_VALUE (x); | |
556 | ||
de12be17 JC |
557 | case ZERO_EXTEND: |
558 | case SIGN_EXTEND: /* Used for Alpha/NT pointers */ | |
9ae8ffe7 | 559 | case HIGH: |
6d849a2a JL |
560 | case PRE_INC: |
561 | case PRE_DEC: | |
562 | case POST_INC: | |
563 | case POST_DEC: | |
564 | return find_base_term (XEXP (x, 0)); | |
565 | ||
9ae8ffe7 JL |
566 | case CONST: |
567 | x = XEXP (x, 0); | |
568 | if (GET_CODE (x) != PLUS && GET_CODE (x) != MINUS) | |
569 | return 0; | |
570 | /* fall through */ | |
571 | case LO_SUM: | |
572 | case PLUS: | |
573 | case MINUS: | |
574 | { | |
575 | rtx tmp = find_base_term (XEXP (x, 0)); | |
576 | if (tmp) | |
577 | return tmp; | |
578 | return find_base_term (XEXP (x, 1)); | |
579 | } | |
580 | ||
581 | case AND: | |
582 | if (GET_CODE (XEXP (x, 0)) == REG && GET_CODE (XEXP (x, 1)) == CONST_INT) | |
583 | return REG_BASE_VALUE (XEXP (x, 0)); | |
584 | return 0; | |
585 | ||
586 | case SYMBOL_REF: | |
587 | case LABEL_REF: | |
588 | return x; | |
589 | ||
590 | default: | |
591 | return 0; | |
592 | } | |
593 | } | |
594 | ||
595 | /* Return 0 if the addresses X and Y are known to point to different | |
596 | objects, 1 if they might be pointers to the same object. */ | |
597 | ||
598 | static int | |
599 | base_alias_check (x, y) | |
600 | rtx x, y; | |
601 | { | |
602 | rtx x_base = find_base_term (x); | |
603 | rtx y_base = find_base_term (y); | |
604 | ||
1c72c7f6 JC |
605 | /* If the address itself has no known base see if a known equivalent |
606 | value has one. If either address still has no known base, nothing | |
607 | is known about aliasing. */ | |
608 | if (x_base == 0) | |
609 | { | |
610 | rtx x_c; | |
611 | if (! flag_expensive_optimizations || (x_c = canon_rtx (x)) == x) | |
612 | return 1; | |
613 | x_base = find_base_term (x_c); | |
614 | if (x_base == 0) | |
615 | return 1; | |
616 | } | |
9ae8ffe7 | 617 | |
1c72c7f6 JC |
618 | if (y_base == 0) |
619 | { | |
620 | rtx y_c; | |
621 | if (! flag_expensive_optimizations || (y_c = canon_rtx (y)) == y) | |
622 | return 1; | |
623 | y_base = find_base_term (y_c); | |
624 | if (y_base == 0) | |
625 | return 1; | |
626 | } | |
627 | ||
628 | /* If the base addresses are equal nothing is known about aliasing. */ | |
629 | if (rtx_equal_p (x_base, y_base)) | |
9ae8ffe7 JL |
630 | return 1; |
631 | ||
632 | /* The base addresses of the read and write are different | |
c02f035f RH |
633 | expressions. If they are both symbols and they are not accessed |
634 | via AND, there is no conflict. */ | |
635 | /* XXX: We can bring knowledge of object alignment and offset into | |
636 | play here. For example, on alpha, "char a, b;" can alias one | |
637 | another, though "char a; long b;" cannot. Similarly, offsets | |
638 | into strutures may be brought into play. Given "char a, b[40];", | |
639 | a and b[1] may overlap, but a and b[20] do not. */ | |
9ae8ffe7 | 640 | if (GET_CODE (x_base) != ADDRESS && GET_CODE (y_base) != ADDRESS) |
c02f035f RH |
641 | { |
642 | return GET_CODE (x) == AND || GET_CODE (y) == AND; | |
643 | } | |
9ae8ffe7 JL |
644 | |
645 | /* If one address is a stack reference there can be no alias: | |
646 | stack references using different base registers do not alias, | |
647 | a stack reference can not alias a parameter, and a stack reference | |
648 | can not alias a global. */ | |
649 | if ((GET_CODE (x_base) == ADDRESS && GET_MODE (x_base) == Pmode) | |
650 | || (GET_CODE (y_base) == ADDRESS && GET_MODE (y_base) == Pmode)) | |
651 | return 0; | |
652 | ||
653 | if (! flag_argument_noalias) | |
654 | return 1; | |
655 | ||
656 | if (flag_argument_noalias > 1) | |
657 | return 0; | |
658 | ||
659 | /* Weak noalias assertion (arguments are distinct, but may match globals). */ | |
660 | return ! (GET_MODE (x_base) == VOIDmode && GET_MODE (y_base) == VOIDmode); | |
661 | } | |
662 | ||
663 | /* Return nonzero if X and Y (memory addresses) could reference the | |
664 | same location in memory. C is an offset accumulator. When | |
665 | C is nonzero, we are testing aliases between X and Y + C. | |
666 | XSIZE is the size in bytes of the X reference, | |
667 | similarly YSIZE is the size in bytes for Y. | |
668 | ||
669 | If XSIZE or YSIZE is zero, we do not know the amount of memory being | |
670 | referenced (the reference was BLKmode), so make the most pessimistic | |
671 | assumptions. | |
672 | ||
c02f035f RH |
673 | If XSIZE or YSIZE is negative, we may access memory outside the object |
674 | being referenced as a side effect. This can happen when using AND to | |
675 | align memory references, as is done on the Alpha. | |
676 | ||
9ae8ffe7 | 677 | Nice to notice that varying addresses cannot conflict with fp if no |
0211b6ab | 678 | local variables had their addresses taken, but that's too hard now. */ |
9ae8ffe7 JL |
679 | |
680 | ||
681 | static int | |
682 | memrefs_conflict_p (xsize, x, ysize, y, c) | |
683 | register rtx x, y; | |
684 | int xsize, ysize; | |
685 | HOST_WIDE_INT c; | |
686 | { | |
687 | if (GET_CODE (x) == HIGH) | |
688 | x = XEXP (x, 0); | |
689 | else if (GET_CODE (x) == LO_SUM) | |
690 | x = XEXP (x, 1); | |
691 | else | |
692 | x = canon_rtx (x); | |
693 | if (GET_CODE (y) == HIGH) | |
694 | y = XEXP (y, 0); | |
695 | else if (GET_CODE (y) == LO_SUM) | |
696 | y = XEXP (y, 1); | |
697 | else | |
698 | y = canon_rtx (y); | |
699 | ||
700 | if (rtx_equal_for_memref_p (x, y)) | |
701 | { | |
c02f035f | 702 | if (xsize <= 0 || ysize <= 0) |
9ae8ffe7 JL |
703 | return 1; |
704 | if (c >= 0 && xsize > c) | |
705 | return 1; | |
706 | if (c < 0 && ysize+c > 0) | |
707 | return 1; | |
708 | return 0; | |
709 | } | |
710 | ||
6e73e666 JC |
711 | /* This code used to check for conflicts involving stack references and |
712 | globals but the base address alias code now handles these cases. */ | |
9ae8ffe7 JL |
713 | |
714 | if (GET_CODE (x) == PLUS) | |
715 | { | |
716 | /* The fact that X is canonicalized means that this | |
717 | PLUS rtx is canonicalized. */ | |
718 | rtx x0 = XEXP (x, 0); | |
719 | rtx x1 = XEXP (x, 1); | |
720 | ||
721 | if (GET_CODE (y) == PLUS) | |
722 | { | |
723 | /* The fact that Y is canonicalized means that this | |
724 | PLUS rtx is canonicalized. */ | |
725 | rtx y0 = XEXP (y, 0); | |
726 | rtx y1 = XEXP (y, 1); | |
727 | ||
728 | if (rtx_equal_for_memref_p (x1, y1)) | |
729 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
730 | if (rtx_equal_for_memref_p (x0, y0)) | |
731 | return memrefs_conflict_p (xsize, x1, ysize, y1, c); | |
732 | if (GET_CODE (x1) == CONST_INT) | |
63be02db JM |
733 | { |
734 | if (GET_CODE (y1) == CONST_INT) | |
735 | return memrefs_conflict_p (xsize, x0, ysize, y0, | |
736 | c - INTVAL (x1) + INTVAL (y1)); | |
737 | else | |
738 | return memrefs_conflict_p (xsize, x0, ysize, y, | |
739 | c - INTVAL (x1)); | |
740 | } | |
9ae8ffe7 JL |
741 | else if (GET_CODE (y1) == CONST_INT) |
742 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
743 | ||
6e73e666 | 744 | return 1; |
9ae8ffe7 JL |
745 | } |
746 | else if (GET_CODE (x1) == CONST_INT) | |
747 | return memrefs_conflict_p (xsize, x0, ysize, y, c - INTVAL (x1)); | |
748 | } | |
749 | else if (GET_CODE (y) == PLUS) | |
750 | { | |
751 | /* The fact that Y is canonicalized means that this | |
752 | PLUS rtx is canonicalized. */ | |
753 | rtx y0 = XEXP (y, 0); | |
754 | rtx y1 = XEXP (y, 1); | |
755 | ||
756 | if (GET_CODE (y1) == CONST_INT) | |
757 | return memrefs_conflict_p (xsize, x, ysize, y0, c + INTVAL (y1)); | |
758 | else | |
759 | return 1; | |
760 | } | |
761 | ||
762 | if (GET_CODE (x) == GET_CODE (y)) | |
763 | switch (GET_CODE (x)) | |
764 | { | |
765 | case MULT: | |
766 | { | |
767 | /* Handle cases where we expect the second operands to be the | |
768 | same, and check only whether the first operand would conflict | |
769 | or not. */ | |
770 | rtx x0, y0; | |
771 | rtx x1 = canon_rtx (XEXP (x, 1)); | |
772 | rtx y1 = canon_rtx (XEXP (y, 1)); | |
773 | if (! rtx_equal_for_memref_p (x1, y1)) | |
774 | return 1; | |
775 | x0 = canon_rtx (XEXP (x, 0)); | |
776 | y0 = canon_rtx (XEXP (y, 0)); | |
777 | if (rtx_equal_for_memref_p (x0, y0)) | |
778 | return (xsize == 0 || ysize == 0 | |
779 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); | |
780 | ||
781 | /* Can't properly adjust our sizes. */ | |
782 | if (GET_CODE (x1) != CONST_INT) | |
783 | return 1; | |
784 | xsize /= INTVAL (x1); | |
785 | ysize /= INTVAL (x1); | |
786 | c /= INTVAL (x1); | |
787 | return memrefs_conflict_p (xsize, x0, ysize, y0, c); | |
788 | } | |
1d300e19 | 789 | |
de12be17 JC |
790 | case REG: |
791 | /* Are these registers known not to be equal? */ | |
792 | if (alias_invariant) | |
793 | { | |
794 | int r_x = REGNO (x), r_y = REGNO (y); | |
795 | rtx i_x, i_y; /* invariant relationships of X and Y */ | |
796 | ||
797 | i_x = r_x >= reg_base_value_size ? 0 : alias_invariant[r_x]; | |
798 | i_y = r_y >= reg_base_value_size ? 0 : alias_invariant[r_y]; | |
799 | ||
800 | if (i_x == 0 && i_y == 0) | |
801 | break; | |
802 | ||
803 | if (! memrefs_conflict_p (xsize, i_x ? i_x : x, | |
804 | ysize, i_y ? i_y : y, c)) | |
805 | return 0; | |
806 | } | |
807 | break; | |
808 | ||
1d300e19 KG |
809 | default: |
810 | break; | |
9ae8ffe7 JL |
811 | } |
812 | ||
813 | /* Treat an access through an AND (e.g. a subword access on an Alpha) | |
1c72c7f6 JC |
814 | as an access with indeterminate size. |
815 | ??? Could instead convert an n byte reference at (and x y) to an | |
816 | n-y byte reference at (plus x y). */ | |
9ae8ffe7 | 817 | if (GET_CODE (x) == AND && GET_CODE (XEXP (x, 1)) == CONST_INT) |
c02f035f | 818 | return memrefs_conflict_p (-1, XEXP (x, 0), ysize, y, c); |
9ae8ffe7 | 819 | if (GET_CODE (y) == AND && GET_CODE (XEXP (y, 1)) == CONST_INT) |
c02f035f RH |
820 | { |
821 | /* XXX: If we are indexing far enough into the array/structure, we | |
822 | may yet be able to determine that we can not overlap. But we | |
823 | also need to that we are far enough from the end not to overlap | |
824 | a following reference, so we do nothing for now. */ | |
825 | return memrefs_conflict_p (xsize, x, -1, XEXP (y, 0), c); | |
826 | } | |
9ae8ffe7 JL |
827 | |
828 | if (CONSTANT_P (x)) | |
829 | { | |
830 | if (GET_CODE (x) == CONST_INT && GET_CODE (y) == CONST_INT) | |
831 | { | |
832 | c += (INTVAL (y) - INTVAL (x)); | |
c02f035f | 833 | return (xsize <= 0 || ysize <= 0 |
9ae8ffe7 JL |
834 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)); |
835 | } | |
836 | ||
837 | if (GET_CODE (x) == CONST) | |
838 | { | |
839 | if (GET_CODE (y) == CONST) | |
840 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
841 | ysize, canon_rtx (XEXP (y, 0)), c); | |
842 | else | |
843 | return memrefs_conflict_p (xsize, canon_rtx (XEXP (x, 0)), | |
844 | ysize, y, c); | |
845 | } | |
846 | if (GET_CODE (y) == CONST) | |
847 | return memrefs_conflict_p (xsize, x, ysize, | |
848 | canon_rtx (XEXP (y, 0)), c); | |
849 | ||
850 | if (CONSTANT_P (y)) | |
c02f035f RH |
851 | return (xsize < 0 || ysize < 0 |
852 | || (rtx_equal_for_memref_p (x, y) | |
853 | && (xsize == 0 || ysize == 0 | |
854 | || (c >= 0 && xsize > c) || (c < 0 && ysize+c > 0)))); | |
9ae8ffe7 JL |
855 | |
856 | return 1; | |
857 | } | |
858 | return 1; | |
859 | } | |
860 | ||
861 | /* Functions to compute memory dependencies. | |
862 | ||
863 | Since we process the insns in execution order, we can build tables | |
864 | to keep track of what registers are fixed (and not aliased), what registers | |
865 | are varying in known ways, and what registers are varying in unknown | |
866 | ways. | |
867 | ||
868 | If both memory references are volatile, then there must always be a | |
869 | dependence between the two references, since their order can not be | |
870 | changed. A volatile and non-volatile reference can be interchanged | |
871 | though. | |
872 | ||
fa8b6024 | 873 | A MEM_IN_STRUCT reference at a non-QImode non-AND varying address can never |
9ae8ffe7 JL |
874 | conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must |
875 | allow QImode aliasing because the ANSI C standard allows character | |
876 | pointers to alias anything. We are assuming that characters are | |
fa8b6024 JW |
877 | always QImode here. We also must allow AND addresses, because they may |
878 | generate accesses outside the object being referenced. This is used to | |
879 | generate aligned addresses from unaligned addresses, for instance, the | |
880 | alpha storeqi_unaligned pattern. */ | |
9ae8ffe7 JL |
881 | |
882 | /* Read dependence: X is read after read in MEM takes place. There can | |
883 | only be a dependence here if both reads are volatile. */ | |
884 | ||
885 | int | |
886 | read_dependence (mem, x) | |
887 | rtx mem; | |
888 | rtx x; | |
889 | { | |
890 | return MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem); | |
891 | } | |
892 | ||
893 | /* True dependence: X is read after store in MEM takes place. */ | |
894 | ||
895 | int | |
896 | true_dependence (mem, mem_mode, x, varies) | |
897 | rtx mem; | |
898 | enum machine_mode mem_mode; | |
899 | rtx x; | |
960b4ee6 | 900 | int (*varies) PROTO((rtx)); |
9ae8ffe7 | 901 | { |
6e73e666 | 902 | register rtx x_addr, mem_addr; |
9ae8ffe7 JL |
903 | |
904 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
905 | return 1; | |
906 | ||
41472af8 MM |
907 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
908 | return 0; | |
909 | ||
9ae8ffe7 JL |
910 | /* If X is an unchanging read, then it can't possibly conflict with any |
911 | non-unchanging store. It may conflict with an unchanging write though, | |
912 | because there may be a single store to this address to initialize it. | |
913 | Just fall through to the code below to resolve the case where we have | |
914 | both an unchanging read and an unchanging write. This won't handle all | |
915 | cases optimally, but the possible performance loss should be | |
916 | negligible. */ | |
917 | if (RTX_UNCHANGING_P (x) && ! RTX_UNCHANGING_P (mem)) | |
918 | return 0; | |
919 | ||
1c72c7f6 JC |
920 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0))) |
921 | return 0; | |
922 | ||
6e73e666 JC |
923 | x_addr = canon_rtx (XEXP (x, 0)); |
924 | mem_addr = canon_rtx (XEXP (mem, 0)); | |
925 | ||
9ae8ffe7 JL |
926 | if (mem_mode == VOIDmode) |
927 | mem_mode = GET_MODE (mem); | |
928 | ||
0211b6ab JW |
929 | if (! memrefs_conflict_p (GET_MODE_SIZE (mem_mode), mem_addr, |
930 | SIZE_FOR_MODE (x), x_addr, 0)) | |
931 | return 0; | |
932 | ||
933 | /* If both references are struct references, or both are not, nothing | |
934 | is known about aliasing. | |
935 | ||
936 | If either reference is QImode or BLKmode, ANSI C permits aliasing. | |
937 | ||
938 | If both addresses are constant, or both are not, nothing is known | |
939 | about aliasing. */ | |
940 | if (MEM_IN_STRUCT_P (x) == MEM_IN_STRUCT_P (mem) | |
941 | || mem_mode == QImode || mem_mode == BLKmode | |
942 | || GET_MODE (x) == QImode || GET_MODE (x) == BLKmode | |
943 | || GET_CODE (x_addr) == AND || GET_CODE (mem_addr) == AND | |
944 | || varies (x_addr) == varies (mem_addr)) | |
945 | return 1; | |
946 | ||
947 | /* One memory reference is to a constant address, one is not. | |
948 | One is to a structure, the other is not. | |
949 | ||
950 | If either memory reference is a variable structure the other is a | |
951 | fixed scalar and there is no aliasing. */ | |
952 | if ((MEM_IN_STRUCT_P (mem) && varies (mem_addr)) | |
953 | || (MEM_IN_STRUCT_P (x) && varies (x_addr))) | |
954 | return 0; | |
955 | ||
956 | return 1; | |
9ae8ffe7 JL |
957 | } |
958 | ||
959 | /* Anti dependence: X is written after read in MEM takes place. */ | |
960 | ||
961 | int | |
962 | anti_dependence (mem, x) | |
963 | rtx mem; | |
964 | rtx x; | |
965 | { | |
6e73e666 JC |
966 | rtx x_addr, mem_addr; |
967 | ||
9ae8ffe7 JL |
968 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) |
969 | return 1; | |
970 | ||
9ae8ffe7 JL |
971 | /* If MEM is an unchanging read, then it can't possibly conflict with |
972 | the store to X, because there is at most one store to MEM, and it must | |
973 | have occurred somewhere before MEM. */ | |
9ae8ffe7 JL |
974 | if (RTX_UNCHANGING_P (mem)) |
975 | return 0; | |
976 | ||
1c72c7f6 JC |
977 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0))) |
978 | return 0; | |
979 | ||
980 | x = canon_rtx (x); | |
981 | mem = canon_rtx (mem); | |
982 | ||
41472af8 MM |
983 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
984 | return 0; | |
985 | ||
6e73e666 JC |
986 | x_addr = XEXP (x, 0); |
987 | mem_addr = XEXP (mem, 0); | |
988 | ||
0211b6ab JW |
989 | return (memrefs_conflict_p (SIZE_FOR_MODE (mem), mem_addr, |
990 | SIZE_FOR_MODE (x), x_addr, 0) | |
991 | && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem) | |
992 | && GET_MODE (mem) != QImode | |
993 | && GET_CODE (mem_addr) != AND | |
994 | && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x)) | |
995 | && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x) | |
996 | && GET_MODE (x) != QImode | |
997 | && GET_CODE (x_addr) != AND | |
998 | && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem))); | |
9ae8ffe7 JL |
999 | } |
1000 | ||
1001 | /* Output dependence: X is written after store in MEM takes place. */ | |
1002 | ||
1003 | int | |
1004 | output_dependence (mem, x) | |
1005 | register rtx mem; | |
1006 | register rtx x; | |
1007 | { | |
1008 | if (MEM_VOLATILE_P (x) && MEM_VOLATILE_P (mem)) | |
1009 | return 1; | |
1010 | ||
6e73e666 JC |
1011 | if (! base_alias_check (XEXP (x, 0), XEXP (mem, 0))) |
1012 | return 0; | |
1013 | ||
1c72c7f6 JC |
1014 | x = canon_rtx (x); |
1015 | mem = canon_rtx (mem); | |
1016 | ||
41472af8 MM |
1017 | if (DIFFERENT_ALIAS_SETS_P (x, mem)) |
1018 | return 0; | |
1019 | ||
0211b6ab JW |
1020 | return (memrefs_conflict_p (SIZE_FOR_MODE (mem), XEXP (mem, 0), |
1021 | SIZE_FOR_MODE (x), XEXP (x, 0), 0) | |
1022 | && ! (MEM_IN_STRUCT_P (mem) && rtx_addr_varies_p (mem) | |
1023 | && GET_MODE (mem) != QImode | |
1024 | && GET_CODE (XEXP (mem, 0)) != AND | |
1025 | && ! MEM_IN_STRUCT_P (x) && ! rtx_addr_varies_p (x)) | |
1026 | && ! (MEM_IN_STRUCT_P (x) && rtx_addr_varies_p (x) | |
1027 | && GET_MODE (x) != QImode | |
1028 | && GET_CODE (XEXP (x, 0)) != AND | |
1029 | && ! MEM_IN_STRUCT_P (mem) && ! rtx_addr_varies_p (mem))); | |
9ae8ffe7 JL |
1030 | } |
1031 | ||
6e73e666 JC |
1032 | |
1033 | static HARD_REG_SET argument_registers; | |
1034 | ||
1035 | void | |
1036 | init_alias_once () | |
1037 | { | |
1038 | register int i; | |
1039 | ||
1040 | #ifndef OUTGOING_REGNO | |
1041 | #define OUTGOING_REGNO(N) N | |
1042 | #endif | |
1043 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1044 | /* Check whether this register can hold an incoming pointer | |
1045 | argument. FUNCTION_ARG_REGNO_P tests outgoing register | |
1046 | numbers, so translate if necessary due to register windows. */ | |
1047 | if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i)) | |
1048 | && HARD_REGNO_MODE_OK (i, Pmode)) | |
1049 | SET_HARD_REG_BIT (argument_registers, i); | |
1050 | } | |
1051 | ||
9ae8ffe7 JL |
1052 | void |
1053 | init_alias_analysis () | |
1054 | { | |
1055 | int maxreg = max_reg_num (); | |
ea64ef27 | 1056 | int changed, pass; |
9ae8ffe7 JL |
1057 | register int i; |
1058 | register rtx insn; | |
9ae8ffe7 JL |
1059 | |
1060 | reg_known_value_size = maxreg; | |
1061 | ||
1062 | reg_known_value | |
1063 | = (rtx *) oballoc ((maxreg - FIRST_PSEUDO_REGISTER) * sizeof (rtx)) | |
1064 | - FIRST_PSEUDO_REGISTER; | |
1065 | reg_known_equiv_p = | |
1066 | oballoc (maxreg - FIRST_PSEUDO_REGISTER) - FIRST_PSEUDO_REGISTER; | |
1067 | bzero ((char *) (reg_known_value + FIRST_PSEUDO_REGISTER), | |
1068 | (maxreg-FIRST_PSEUDO_REGISTER) * sizeof (rtx)); | |
1069 | bzero (reg_known_equiv_p + FIRST_PSEUDO_REGISTER, | |
1070 | (maxreg - FIRST_PSEUDO_REGISTER) * sizeof (char)); | |
1071 | ||
6e73e666 JC |
1072 | /* Overallocate reg_base_value to allow some growth during loop |
1073 | optimization. Loop unrolling can create a large number of | |
1074 | registers. */ | |
1075 | reg_base_value_size = maxreg * 2; | |
1076 | reg_base_value = (rtx *)oballoc (reg_base_value_size * sizeof (rtx)); | |
1077 | new_reg_base_value = (rtx *)alloca (reg_base_value_size * sizeof (rtx)); | |
1078 | reg_seen = (char *)alloca (reg_base_value_size); | |
1079 | bzero ((char *) reg_base_value, reg_base_value_size * sizeof (rtx)); | |
de12be17 JC |
1080 | if (! reload_completed && flag_unroll_loops) |
1081 | { | |
1082 | alias_invariant = (rtx *)xrealloc (alias_invariant, | |
1083 | reg_base_value_size * sizeof (rtx)); | |
1084 | bzero ((char *)alias_invariant, reg_base_value_size * sizeof (rtx)); | |
1085 | } | |
1086 | ||
ec907dd8 JL |
1087 | |
1088 | /* The basic idea is that each pass through this loop will use the | |
1089 | "constant" information from the previous pass to propagate alias | |
1090 | information through another level of assignments. | |
1091 | ||
1092 | This could get expensive if the assignment chains are long. Maybe | |
1093 | we should throttle the number of iterations, possibly based on | |
6e73e666 | 1094 | the optimization level or flag_expensive_optimizations. |
ec907dd8 JL |
1095 | |
1096 | We could propagate more information in the first pass by making use | |
1097 | of REG_N_SETS to determine immediately that the alias information | |
ea64ef27 JL |
1098 | for a pseudo is "constant". |
1099 | ||
1100 | A program with an uninitialized variable can cause an infinite loop | |
1101 | here. Instead of doing a full dataflow analysis to detect such problems | |
1102 | we just cap the number of iterations for the loop. | |
1103 | ||
1104 | The state of the arrays for the set chain in question does not matter | |
1105 | since the program has undefined behavior. */ | |
6e73e666 | 1106 | |
ea64ef27 | 1107 | pass = 0; |
6e73e666 | 1108 | do |
ec907dd8 JL |
1109 | { |
1110 | /* Assume nothing will change this iteration of the loop. */ | |
1111 | changed = 0; | |
1112 | ||
ec907dd8 JL |
1113 | /* We want to assign the same IDs each iteration of this loop, so |
1114 | start counting from zero each iteration of the loop. */ | |
1115 | unique_id = 0; | |
1116 | ||
1117 | /* We're at the start of the funtion each iteration through the | |
1118 | loop, so we're copying arguments. */ | |
1119 | copying_arguments = 1; | |
9ae8ffe7 | 1120 | |
6e73e666 JC |
1121 | /* Wipe the potential alias information clean for this pass. */ |
1122 | bzero ((char *) new_reg_base_value, reg_base_value_size * sizeof (rtx)); | |
8072f69c | 1123 | |
6e73e666 JC |
1124 | /* Wipe the reg_seen array clean. */ |
1125 | bzero ((char *) reg_seen, reg_base_value_size); | |
9ae8ffe7 | 1126 | |
6e73e666 JC |
1127 | /* Mark all hard registers which may contain an address. |
1128 | The stack, frame and argument pointers may contain an address. | |
1129 | An argument register which can hold a Pmode value may contain | |
1130 | an address even if it is not in BASE_REGS. | |
8072f69c | 1131 | |
6e73e666 JC |
1132 | The address expression is VOIDmode for an argument and |
1133 | Pmode for other registers. */ | |
1134 | ||
1135 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
1136 | if (TEST_HARD_REG_BIT (argument_registers, i)) | |
38a448ca RH |
1137 | new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode, |
1138 | gen_rtx_REG (Pmode, i)); | |
6e73e666 JC |
1139 | |
1140 | new_reg_base_value[STACK_POINTER_REGNUM] | |
38a448ca | 1141 | = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); |
6e73e666 | 1142 | new_reg_base_value[ARG_POINTER_REGNUM] |
38a448ca | 1143 | = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); |
6e73e666 | 1144 | new_reg_base_value[FRAME_POINTER_REGNUM] |
38a448ca | 1145 | = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); |
2a2c8203 | 1146 | #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM |
6e73e666 | 1147 | new_reg_base_value[HARD_FRAME_POINTER_REGNUM] |
38a448ca | 1148 | = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); |
2a2c8203 | 1149 | #endif |
6e73e666 JC |
1150 | if (struct_value_incoming_rtx |
1151 | && GET_CODE (struct_value_incoming_rtx) == REG) | |
1152 | new_reg_base_value[REGNO (struct_value_incoming_rtx)] | |
38a448ca | 1153 | = gen_rtx_ADDRESS (Pmode, struct_value_incoming_rtx); |
6e73e666 JC |
1154 | |
1155 | if (static_chain_rtx | |
1156 | && GET_CODE (static_chain_rtx) == REG) | |
1157 | new_reg_base_value[REGNO (static_chain_rtx)] | |
38a448ca | 1158 | = gen_rtx_ADDRESS (Pmode, static_chain_rtx); |
ec907dd8 JL |
1159 | |
1160 | /* Walk the insns adding values to the new_reg_base_value array. */ | |
1161 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
9ae8ffe7 | 1162 | { |
6e73e666 | 1163 | if (GET_RTX_CLASS (GET_CODE (insn)) == 'i') |
ec907dd8 | 1164 | { |
6e73e666 | 1165 | rtx note, set; |
ec907dd8 JL |
1166 | /* If this insn has a noalias note, process it, Otherwise, |
1167 | scan for sets. A simple set will have no side effects | |
1168 | which could change the base value of any other register. */ | |
6e73e666 | 1169 | |
ec907dd8 | 1170 | if (GET_CODE (PATTERN (insn)) == SET |
6e73e666 | 1171 | && (find_reg_note (insn, REG_NOALIAS, NULL_RTX))) |
9f8f10de | 1172 | record_set (SET_DEST (PATTERN (insn)), NULL_RTX); |
ec907dd8 JL |
1173 | else |
1174 | note_stores (PATTERN (insn), record_set); | |
6e73e666 JC |
1175 | |
1176 | set = single_set (insn); | |
1177 | ||
1178 | if (set != 0 | |
1179 | && GET_CODE (SET_DEST (set)) == REG | |
1180 | && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER | |
1181 | && (((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 | |
1182 | && REG_N_SETS (REGNO (SET_DEST (set))) == 1) | |
1183 | || (note = find_reg_note (insn, REG_EQUIV, NULL_RTX)) != 0) | |
1184 | && GET_CODE (XEXP (note, 0)) != EXPR_LIST) | |
1185 | { | |
1186 | int regno = REGNO (SET_DEST (set)); | |
1187 | reg_known_value[regno] = XEXP (note, 0); | |
1188 | reg_known_equiv_p[regno] = REG_NOTE_KIND (note) == REG_EQUIV; | |
1189 | } | |
ec907dd8 JL |
1190 | } |
1191 | else if (GET_CODE (insn) == NOTE | |
1192 | && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG) | |
1193 | copying_arguments = 0; | |
6e73e666 | 1194 | } |
ec907dd8 | 1195 | |
6e73e666 JC |
1196 | /* Now propagate values from new_reg_base_value to reg_base_value. */ |
1197 | for (i = 0; i < reg_base_value_size; i++) | |
1198 | { | |
1199 | if (new_reg_base_value[i] | |
1200 | && new_reg_base_value[i] != reg_base_value[i] | |
1201 | && ! rtx_equal_p (new_reg_base_value[i], reg_base_value[i])) | |
ec907dd8 | 1202 | { |
6e73e666 JC |
1203 | reg_base_value[i] = new_reg_base_value[i]; |
1204 | changed = 1; | |
ec907dd8 | 1205 | } |
9ae8ffe7 | 1206 | } |
9ae8ffe7 | 1207 | } |
6e73e666 | 1208 | while (changed && ++pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 JL |
1209 | |
1210 | /* Fill in the remaining entries. */ | |
1211 | for (i = FIRST_PSEUDO_REGISTER; i < maxreg; i++) | |
1212 | if (reg_known_value[i] == 0) | |
1213 | reg_known_value[i] = regno_reg_rtx[i]; | |
1214 | ||
9ae8ffe7 JL |
1215 | /* Simplify the reg_base_value array so that no register refers to |
1216 | another register, except to special registers indirectly through | |
1217 | ADDRESS expressions. | |
1218 | ||
1219 | In theory this loop can take as long as O(registers^2), but unless | |
1220 | there are very long dependency chains it will run in close to linear | |
ea64ef27 JL |
1221 | time. |
1222 | ||
1223 | This loop may not be needed any longer now that the main loop does | |
1224 | a better job at propagating alias information. */ | |
1225 | pass = 0; | |
9ae8ffe7 JL |
1226 | do |
1227 | { | |
1228 | changed = 0; | |
ea64ef27 | 1229 | pass++; |
7557aa98 | 1230 | for (i = 0; i < reg_base_value_size; i++) |
9ae8ffe7 JL |
1231 | { |
1232 | rtx base = reg_base_value[i]; | |
1233 | if (base && GET_CODE (base) == REG) | |
1234 | { | |
1235 | int base_regno = REGNO (base); | |
1236 | if (base_regno == i) /* register set from itself */ | |
1237 | reg_base_value[i] = 0; | |
1238 | else | |
1239 | reg_base_value[i] = reg_base_value[base_regno]; | |
1240 | changed = 1; | |
1241 | } | |
1242 | } | |
1243 | } | |
ea64ef27 | 1244 | while (changed && pass < MAX_ALIAS_LOOP_PASSES); |
9ae8ffe7 | 1245 | |
ec907dd8 | 1246 | new_reg_base_value = 0; |
9ae8ffe7 JL |
1247 | reg_seen = 0; |
1248 | } | |
1249 | ||
1250 | void | |
1251 | end_alias_analysis () | |
1252 | { | |
1253 | reg_known_value = 0; | |
1254 | reg_base_value = 0; | |
1255 | reg_base_value_size = 0; | |
de12be17 JC |
1256 | if (alias_invariant) |
1257 | { | |
1258 | free ((char *)alias_invariant); | |
1259 | alias_invariant = 0; | |
1260 | } | |
9ae8ffe7 | 1261 | } |