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Commit | Line | Data |
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2ae699c0 | 1 | ==================== work095, patch #14. |
967e6284 | 2 | |
c5e2fff1 MM |
3 | Make __float128 and __ibm128 use different types from long double. |
4 | ||
5 | 2022-07-29 Michael Meissner <meissner@linux.ibm.com> | |
6 | ||
7 | gcc/ | |
8 | ||
9 | * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always | |
10 | create a new tree node for __ibm128, even if long double uses the IBM | |
11 | 128-bit format. Always create a new tree node for __float128, even if | |
12 | long double uses the IEEE 128-bit format. | |
13 | * config/rs6000/rs600.cc (rs6000_expand_builtin): Remove code that | |
14 | converted the KFmode and IFmode built-in functions to TFmode depending | |
15 | on what the long double format is, and use built-in overloading | |
16 | instead. | |
17 | (init_float128_ieee): Remove setting up KFmode complex multiply and | |
18 | divide here. | |
19 | (rs6000_init_libfuncs): Rewrite the setup for complex multiply and | |
20 | divide for long double if long double uses the IEEE 128-bit encoding. | |
21 | (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't | |
22 | support _Float128. | |
23 | (rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE | |
24 | 128-bit floating point is supported. Allow IFmode if either IEEE | |
25 | 128-bit floating point is supported or long double is IBM 128-bit. | |
26 | (rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not | |
27 | return TFmode, even if long double uses the IEEE 128-bit format. | |
28 | (rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if | |
29 | long double uses the IEEE 128-bit encoding. | |
30 | * config/rs6000/rs6000.md (IFKF): Delete. | |
31 | (IFKF_reg): Delete. | |
32 | (trunckfif2): New insn. | |
33 | (trunctfif2): Likewise. | |
34 | (extendkftf2_internal): Split extend<mode>tf2_internal and | |
35 | extendtf<mode>2_internal into separate insns that handle either | |
36 | conversions between IEEE 128-bit types or between IBM 128-bit types. | |
37 | Set the type and insn length correctly. | |
38 | (extendtfkf2_internal): Likewise. | |
39 | (extendiftf2_internal): Likewise. | |
40 | (extendtfif2_internal): Likewise. | |
41 | ||
42 | gcc/testsuite/ | |
43 | ||
44 | * gcc.target/powerpc/mulkc3-2.c: Update test. | |
45 | * gcc.target/powerpc/divkc3-2.c: Likewise. | |
46 | ||
47 | libgcc/ | |
48 | ||
49 | * config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc | |
50 | support. | |
51 | (__divtc3_ieee128): Likewise. | |
52 | * config/rs6000/quad-float128.h (__multc3_ieee128): Add | |
53 | declaration. | |
54 | (__divtc3_ieee128): Likewise. | |
55 | ||
56 | ==================== work095, patch #14. | |
57 | ||
f515799a | 58 | Allow __ibm128 even if IEEE 128-bit floating point is not supported. |
967e6284 | 59 | |
f515799a MM |
60 | This set of patches fixes places in the compiler where it was assumed to use |
61 | __ibm128 we needed to have IEEE 128-bit support enabled. A future patch will | |
62 | implement the change to create the __ibm128 type if either we have IEEE 128-bit | |
63 | floating point enabled, or the long double type is IBM 128-bit floating point. | |
2ae699c0 | 64 | |
967e6284 MM |
65 | 2022-07-28 Michael Meissner <meissner@linux.ibm.com> |
66 | ||
67 | gcc/ | |
68 | ||
2ae699c0 MM |
69 | * config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware |
70 | floating point for the IBM 128-bit comparisons. | |
71 | (rs6000_init_libfuncs): Create IBM 128-bit floating point support even | |
72 | if we don't support IEEE 128-bit floating point. | |
967e6284 MM |
73 | (rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't |
74 | support _Float128. | |
967e6284 MM |
75 | * config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for |
76 | -mhard-float. | |
77 | (TARGET_IBM128): New macro. | |
2ae699c0 MM |
78 | * config/rs6000/rs6000.md (@extenddf<mode>2_fprs): Allow IFmode to be |
79 | converted even if long double is not 128-bits. | |
80 | (extenddf<mode>2_vsx): Likewise. | |
81 | (extendtfif2): Allow conversion if we have __ibm128 but not IEEE 128-bit | |
82 | floating point. | |
83 | (trunckftf2): Likewise. | |
967e6284 | 84 | |
2ae699c0 | 85 | ==================== work095, patch #13 was reverted. |
967e6284 | 86 | |
2ae699c0 | 87 | ==================== work095, patch #12 was reverted. |
967e6284 | 88 | |
2ae699c0 | 89 | ==================== work095, patch #11 was reverted. |
967e6284 | 90 | |
14ec43b6 MM |
91 | ==================== work095, patch #10. |
92 | ||
93 | Allow IBM 128-bit to do offset addressing. | |
94 | ||
95 | I noticed that we didn't enable offset addressing for IBM 128-bit floating | |
96 | point. | |
97 | ||
98 | 2022-07-22 Michael Meissner <meissner@linux.ibm.com> | |
99 | ||
100 | gcc/ | |
101 | ||
102 | * config/rs6000/rs6000.cc (rs6000_setup_reg_addr_masks): Allow | |
103 | IFmode and possibly TFmode to use offset addressing. | |
104 | (reg_offset_addressing_ok_p): IBM 128-bit floating point modes can do | |
105 | offset addressing. | |
106 | ||
764ddb91 MM |
107 | ==================== work095, patch #9. |
108 | ||
109 | Do not enable -mblock-ops-vector-pair. | |
110 | ||
111 | Testing has shown that using the load vector pair and store vector pair | |
112 | instructions for block moves has some performance issues on power10. | |
113 | ||
114 | A patch on June 11th modified the code so that GCC would not set | |
115 | -mblock-ops-vector-pair by default if we are tuning for power10, but it | |
116 | would set the option if we were tuning for a different machine and have | |
117 | load and store vector pair instructions enabled. | |
118 | ||
119 | This patch just eliminates the code setting -mblock-ops-vector-pair at | |
120 | all. | |
121 | ||
122 | ||
123 | 2022-07-22 Michael Meissner <meissner@linux.ibm.com> | |
124 | ||
125 | gcc/ | |
126 | ||
127 | * config/rs6000/rs6000.cc (rs6000_option_override_internal): | |
128 | Do not enable -mblock-ops-vector-pair by default on power10. | |
129 | ||
40c10c63 MM |
130 | ==================== work095, patch #8. |
131 | ||
132 | Support IEEE 128-bit overload test data built-in functions. | |
133 | ||
134 | This patch adds support for overloading the IEEE 128-bit test data and | |
135 | test data negate built-in functions bewteeen KFmode and TFmode arguments. | |
136 | ||
137 | 2022-07-21 Michael Meissner <meissner@linux.ibm.com> | |
138 | ||
139 | gcc/ | |
140 | ||
141 | * config/rs6000/rs6000-builtins.def | |
142 | (__builtin_vsx_scalar_test_data_class_qp_kf): Rename KFmode IEEE | |
143 | 128-bit test data built-in functions to have a KF suffix to allow | |
144 | overloading. | |
145 | (__builtin_vsx_scalar_test_neg_qp_kf): Likewise. | |
146 | (__builtin_vsx_scalar_test_data_class_qp_tf): Add TFmode variants | |
147 | for IEEE 128-bit insert and extract support. | |
148 | (__builtin_vsx_scalar_test_neg_qp_tf): Likewise. | |
149 | * config/rs6000/rs6000-overload.def | |
150 | (__builtin_vec_scalar_test_data_class): Add TFmode overloads. | |
151 | (__builtin_vec_scalar_test_neg): Likewise. | |
152 | (__builtin_vec_scalar_test_neg_qp): Likewise. | |
153 | (__builtin_vec_scalar_test_data_class_qp): Likewise. | |
154 | ||
155 | gcc/testsuite/ | |
156 | ||
157 | * gcc.target/powerpc/bfp/scalar-test-data-class-11.c: Update the | |
158 | expected error message. | |
159 | * gcc.target/powerpc/bfp/scalar-test-neg-5.c: Likewise. | |
160 | ||
161 | ==================== work095, patch #7. | |
162 | ||
163 | Support IEEE 128-bit overload extract and insert built-in functions. | |
164 | ||
165 | This patch adds support for overloading the IEEE 128-bit extract and | |
166 | insert built-in functions bewteeen KFmode and TFmode arguments. | |
167 | ||
168 | 2022-07-21 Michael Meissner <meissner@linux.ibm.com> | |
169 | ||
170 | gcc/ | |
171 | ||
172 | * config/rs6000/rs6000-builtins.def | |
173 | (__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit | |
174 | insert and extract built-in functions to have a KF suffix to allow | |
175 | overloading. | |
176 | (__builtin_vsx_scalar_extract_sigq_kf): Likewise. | |
177 | (__builtin_vsx_scalar_insert_exp_qp_kf): Likewise. | |
178 | (__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for | |
179 | IEEE 128-bit insert and extract support. | |
180 | (__builtin_vsx_scalar_extract_sigq_tf): Likewise. | |
181 | (__builtin_vsx_scalar_insert_exp_qp_tf): Likewise. | |
182 | * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin): | |
183 | Add support for having KFmode and TFmode variants of VSIEQPF. | |
184 | * config/rs6000/rs6000-overload.def | |
185 | (__builtin_vec_scalar_extract_exp): Add TFmode overloads. | |
186 | (__builtin_vec_scalar_extract_sig): Likewise. | |
187 | (__builtin_vec_scalar_insert_exp): Likewise. | |
188 | ||
189 | gcc/testsuite/ | |
190 | ||
191 | * gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update the | |
192 | expected error message. | |
193 | * gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise. | |
194 | * gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise. | |
195 | ||
196 | ==================== work095, patch #6. | |
197 | ||
198 | Support IEEE 128-bit overload comparison built-in functions. | |
199 | ||
200 | This patch adds support for overloading the IEEE 128-bit comparison | |
201 | built-in functions bewteeen KFmode and TFmode arguments. | |
202 | ||
203 | 2022-07-21 Michael Meissner <meissner@linux.ibm.com> | |
204 | ||
205 | gcc/ | |
206 | ||
207 | * config/rs6000/rs6000-builtins.def | |
208 | (__builtin_vsx_scalar_cmp_exp_qp_eq_kf): Rename KFmode comparison | |
209 | built-in functions to have a KF suffix to allow overloading. | |
210 | (__builtin_vsx_scalar_cmp_exp_qp_gt_kf): Likewise. | |
211 | (__builtin_vsx_scalar_cmp_exp_qp_lt_kf): Likewise. | |
212 | (__builtin_vsx_scalar_cmp_exp_qp_unordered_kf): Likewise. | |
213 | (__builtin_vsx_scalar_cmp_exp_qp_eq_tf): Add TFmode comparison | |
214 | built-in functions. | |
215 | (__builtin_vsx_scalar_cmp_exp_qp_gt_tf): Likewise. | |
216 | (__builtin_vsx_scalar_cmp_exp_qp_lt_tf): Likewise. | |
217 | (__builtin_vsx_scalar_cmp_exp_qp_unordered_tf): Likewise. | |
218 | * config/rs6000/rs6000-overload.def | |
219 | (__builtin_vec_scalar_cmp_exp_eq): Add TFmode overloaded | |
220 | functions. | |
221 | (__builtin_vec_scalar_cmp_exp_gt): Likewise. | |
222 | (__builtin_vec_scalar_cmp_exp_lt): Likewise. | |
223 | (__builtin_vec_scalar_cmp_exp_unordered): Likewise. | |
224 | ||
225 | ==================== work095, patch #5. | |
226 | ||
227 | Support IEEE 128-bit overload round_to_odd built-in functions. | |
228 | ||
229 | This patch adds support for overloading the IEEE 128-bit round to odd | |
230 | built-in functions bewteeen KFmode and TFmode arguments. | |
231 | ||
232 | 2022-07-21 Michael Meissner <meissner@linux.ibm.com> | |
233 | ||
234 | gcc/ | |
235 | ||
236 | * config/rs6000/rs6000-builtins.def | |
237 | (__builtin_addf128_round_to_odd_kf): Rename KFmode round to odd | |
238 | built-in functions with a KF suffix to allow overloading. | |
239 | (__builtin_divf128_round_to_odd_kf): Likewise. | |
240 | (__builtin_fmaf128_round_to_odd_kf): Likewise. | |
241 | (__builtin_mulf128_round_to_odd_kf): Likewise. | |
242 | (__builtin_sqrtf128_round_to_odd_kf): Likewise. | |
243 | (__builtin_subf128_round_to_odd_kf): Likewise. | |
244 | (__builtin_truncf128_round_to_odd_kf): Likewise. | |
245 | (__builtin_addf128_round_to_odd_tf): Add TFmode round to odd | |
246 | built-in functions. | |
247 | (__builtin_fmaf128_round_to_odd_tf): Likewise. | |
248 | (__builtin_mulf128_round_to_odd_tf): Likewise. | |
249 | (__builtin_sqrtf128_round_to_odd_tf): Likewise. | |
250 | (__builtin_subf128_round_to_odd_tf): Likewise. | |
251 | (__builtin_truncf128_round_to_odd_tf): Likewise. | |
252 | * config/rs6000/rs6000-overload.def | |
253 | (__builtin_addf128_round_to_odd): Make IEEE 128-bit round to odd | |
254 | built-in functions overloaded. | |
255 | (__builtin_divf128_round_to_odd): Likewise. | |
256 | (__builtin_fmaf128_round_to_odd): Likewise. | |
257 | (__builtin_mulf128_round_to_odd): Likewise. | |
258 | (__builtin_sqrtf128_round_to_odd): Likewise. | |
259 | (__builtin_subf128_round_to_odd): Likewise. | |
260 | (__builtin_truncf128_round_to_odd): Likewise. | |
261 | ||
262 | ==================== work095, patch #4. | |
263 | ||
264 | IEEE 128-bit built-in support. | |
265 | ||
266 | This patch lays the ground work that future patches will use to add | |
267 | builtin support (both normal and overloaded) for the case where long | |
268 | double uses the IEEE 128-bit encoding. | |
269 | ||
270 | This adds a new stanza (ieee128-hw-ld) for when we have IEEE 128-bit | |
271 | hardware support and long double uses the IEEE 128-bit encoding. | |
272 | ||
273 | A new type attribute (ieeeld) is added for long double if long double uses | |
274 | the IEEE 128-bit encoding. | |
275 | ||
276 | 2022-07-21 Michael Meissner <meissner@linux.ibm.com> | |
277 | ||
278 | ||
279 | gcc/ | |
280 | ||
281 | * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add | |
282 | support for ibm128-hw-ld stanza. | |
283 | (rs6000_builtin_is_supported): Likewise. | |
284 | (rs6000_init_builtins): Likewise. | |
285 | (rs6000_expand_builtin): Add support for IEEE128_HW_LD. Add | |
286 | support for ieeeld. | |
287 | * config/rs6000/rs6000-builtins.def (toplevel): Add comment about | |
288 | the new ieeeld attribute. | |
289 | * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add | |
290 | BSTZ_IEEE128_HW_LD. | |
291 | (stanza_map): Likewise. | |
292 | (enable_string): Likewise. | |
293 | (attrinfo): Add isieeeld. | |
294 | (parse_bif_attrs): Parse ieeeld. Add printing ieeeld to the debug | |
295 | print. | |
296 | (write_decls): Add support for ibm128-hw-ld stanza and ieeeld | |
297 | attribute. | |
298 | (write_bif_static_init): Add support for ieeeld attribute. | |
299 | ||
764ddb91 | 300 | ==================== work095, patch #3 was reverted. |
7ebd59ea | 301 | |
764ddb91 | 302 | ==================== work095, patch #2 was reverted. |
8f3d146c | 303 | |
764ddb91 | 304 | ==================== work095, patch #1 was reverted. |
8f3d146c MM |
305 | |
306 | ==================== work095, branch setup. | |
307 | ||
5b4a2ac7 MM |
308 | 2022-07-18 Michael Meissner <meissner@linux.ibm.com> |
309 | ||
310 | Clone branch | |
311 |