aarch64: Use RTL builtins for [su]paddl[q] intrinsics

aarch64: Use RTL builtins for [su]paddl[q] intrinsics

Rewrite [su]paddl[q] Neon intrinsics to use RTL builtins rather than
inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-02-08  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]addlp
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>addlp<mode>):
	Define.
	* config/aarch64/arm_neon.h (vpaddl_s8): Use RTL builtin
	instead of inline asm.
	(vpaddl_s16): Likewise.
	(vpaddl_s32): Likewise.
	(vpaddl_u8): Likewise.
	(vpaddl_u16): Likewise.
	(vpaddl_u32): Likewise.
	(vpaddlq_s8): Likewise.
	(vpaddlq_s16): Likewise.
	(vpaddlq_s32): Likewise.
	(vpaddlq_u8): Likewise.
	(vpaddlq_u16): Likewise.
	(vpaddlq_u32): Liwewise.
	* config/aarch64/iterators.md: Define [SU]ADDLP unspecs with
	appropriate attributes.