[arm/AArch64] Assume unhandled NEON types are neon_arith_basic types when scheduling for Cortex-A57

Some scheduling descriptions, like the Cortex-A57 one, are reused for multiple -mcpu options.
Sometimes those other -mcpu cores support more architecture features than the Armv8-A Cortex-A57.
For example, the Cortex-A75 and Cortex-A76 support Armv8.2-A as well as the Dot Product instructions.
These Dot Product instructions have the neon_dot and neon_dot_q scheduling type, but that type is not
handled in cortex-a57.md, since the Cortex-A57 itself doesn't need to care about these instructions.

But if we just ignore the neon_dot(_q) type at scheduling we get really terrible codegen when compiling
for -mcpu=cortex-a76, for example, because the scheduler just pools all the UDOT instructions at the end
of the basic block, since it doesn't assume anything about their behaviour.

This patch ameliorates the situation somewhat by telling the Cortex-A57 scheduling model to treat any
insn that doesn't get assigned a cortex_a57_neon_type but is actually a is_neon_type instruction as
a simple neon_arith_basic instruction. This allows us to treat post-Armv8-A SIMD instructions more sanely
without having to model each of them explicitly in cortex-a57.md.

	* config/arm/cortex-a57.md (cortex_a57_neon_type): Use neon_arith_basic
	for is_neon_type instructions that have not already been categorized.

From-SVN: r272924

2 files changed, 12 insertions, 1 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6a1e932ad739..9d1b64866158 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2019-07-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+        * config/arm/cortex-a57.md (cortex_a57_neon_type): Use neon_arith_basic
+        for is_neon_type instructions that have not already been categorized.
+
+
 2019-07-02  Richard Biener  <rguenther@suse.de>
 
         PR tree-optimization/58483
diff --git a/gcc/config/arm/cortex-a57.md b/gcc/config/arm/cortex-a57.md
index 577dc8d7fe25..a5f0b10d1421 100644
--- a/gcc/config/arm/cortex-a57.md
+++ b/gcc/config/arm/cortex-a57.md
@@ -236,7 +236,12 @@
                            neon_store1_4reg, neon_store1_4reg_q,\
                            neon_store1_one_lane, neon_store1_one_lane_q,\
                            neon_store2_one_lane, neon_store2_one_lane_q")
-            (const_string "neon_store_complex")]
+            (const_string "neon_store_complex")
+;; If it doesn't match any of the above that we want to treat specially but is
+;; still a NEON type, treat it as a basic NEON type.  This is better than
+;; dropping it on the floor and making no assumptions about it whatsoever.
+          (eq_attr "is_neon_type" "yes")
+            (const_string "neon_arith_basic")]
           (const_string "unknown")))
 
 ;; The Cortex-A57 core is modelled as a triple issue pipeline that has