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RISC-V: Reorganize the code of CONST_VECTOR handling in riscv.cc
authorJuzhe-Zhong <juzhe.zhong@rivai.ai>
Mon, 22 May 2023 07:42:18 +0000 (15:42 +0800)
committerPan Li <pan2.li@intel.com>
Mon, 22 May 2023 07:42:18 +0000 (15:42 +0800)
commit7b0986acf20ebe261221b800b6196acbf87f5ca2
tree93118f4251a211f2c423f1795a40500d02796cf2tree
parent285e0bb95dd3edf3e3312f0e0ee940594f46f77dcommit | diff
RISC-V: Reorganize the code of CONST_VECTOR handling in riscv.cc

Since satisfies_constraint_vi (x) belongs to RVV region.
We make this condition inside riscv_v_ext_vector_mode_p to make codes
more reasonable.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_const_insns): Reorganize the
codes.
gcc/config/riscv/riscv.cc diff | blob | blame | history
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