RISC-V: Support VLS unary floating-point patterns

RISC-V: Support VLS unary floating-point patterns

Extend current VLA patterns with VLS modes.

Regression all passed.

gcc/ChangeLog:

	* config/riscv/autovec.md: Extend VLS modes.
	* config/riscv/vector.md: Ditto.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/vls/def.h: Add unary test.
	* gcc.target/riscv/rvv/autovec/vls/neg-2.c: New test.

(cherry picked from commit 5b945243c77e3ecd8dfab4b8b44f21daa3de8fe1)