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RISC-V: Fix typos on comments (SVE -> RVV)
authorTsukasa OI <research_trasio@irq.a4lg.com>
Tue, 19 Sep 2023 02:10:31 +0000 (02:10 +0000)
committerJeff Law <jlaw@ventanamicro.com>
Tue, 26 Sep 2023 14:52:23 +0000 (08:52 -0600)
commit3a6871f432eb393080cfa430db2eb7de48c19b48
tree316eb686b47e0c2c6a5438caf094c105be8dbd6ftree
parent948c265b1f35af8155fb32307925585edd6c8c83commit | diff
RISC-V: Fix typos on comments (SVE -> RVV)

We have the 'V' extension (RVV), not SVE from AArch64.

gcc/ChangeLog:

* config/riscv/riscv-vector-builtins.cc
(builtin_decl, expand_builtin): Replace SVE with RVV.

(cherry picked from commit 7f4fc87086b5ad57edaaf628ba6cb92649d14453)
gcc/config/riscv/riscv-vector-builtins.cc diff | blob | blame | history
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