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aarch64: Fix up casesi patterns for purecap
authorAlex Coplan <alex.coplan@arm.com>
Mon, 19 Jul 2021 12:57:53 +0000 (13:57 +0100)
committerMatthew Malcomson <matthew.malcomson@arm.com>
Mon, 20 Sep 2021 15:35:30 +0000 (16:35 +0100)
commit372364e75abc1eb302636212297f6d58ecea08d6
tree32b3bf3082c3a704b7651fe2ae24f6546158944ctree
parent04ebf210833cc76439731612862aa4cc22cdda7fcommit | diff
aarch64: Fix up casesi patterns for purecap

We were using DImode for these scratch registers which led to assembly
failures for jump tables on Purecap Morello.

gcc/ChangeLog:

* config/aarch64/aarch64.md (@casesi_dispatch<mode>): Use ADDR
for scratch registers used to hold pointers.
(*casesi_dispatch): Likewise.
gcc/config/aarch64/aarch64.md diff | blob | blame | history
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