An example of this issue can be observed when trying to compile: #include <arm_mve.h> uint16x8_t foo (uint16x8_t a, int16_t b) { return vaddq (a, (b<<3)); } This will lead to an __ARM_undef being selected. I believe this is because __ARM_mve_coerce only accepts one type for scalar parameters and should have accepted the same range of types for scalar as is done in __ARM_mve_typeid. A workaround for this is to cast (b<<3) to uint16_t.
The master branch has been updated by SRINATH PARVATHANENI <sripar01@gcc.gnu.org>: https://gcc.gnu.org/g:6bd4ce64eb48a72eca300cb52773e6101d646004 commit r11-3560-g6bd4ce64eb48a72eca300cb52773e6101d646004 Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com> Date: Wed Sep 30 15:19:17 2020 +0100 [GCC][PATCH] arm: Fix MVE intrinsics polymorphic variants wrongly generating __ARM_undef type (pr96795). Hello, This patch fixes (PR96795) MVE intrinsic polymorphic variants vaddq, vaddq_m, vaddq_x, vcmpeqq_m, vcmpeqq, vcmpgeq_m, vcmpgeq, vcmpgtq_m, vcmpgtq, vcmpleq_m, vcmpleq, vcmpltq_m, vcmpltq, vcmpneq_m, vcmpneq, vfmaq_m, vfmaq, vfmasq_m, vfmasq, vmaxnmavq, vmaxnmavq_p, vmaxnmvq, vmaxnmvq_p, vminnmavq, vminnmavq_p, vminnmvq, vminnmvq_p, vmulq_m, vmulq, vmulq_x, vsetq_lane, vsubq_m, vsubq and vsubq_x which are incorrectly generating __ARM_undef and mismatching the passed floating point scalar arguments. Bootstrapped on arm-none-linux-gnueabihf and regression tested on arm-none-eabi and found no regressions. Ok for master? Ok for GCC-10 branch? Regards, Srinath. gcc/ChangeLog: 2020-09-30 Srinath Parvathaneni <srinath.parvathaneni@arm.com> PR target/96795 * config/arm/arm_mve.h (__ARM_mve_coerce2): Define. (__arm_vaddq): Correct the scalar argument. (__arm_vaddq_m): Likewise. (__arm_vaddq_x): Likewise. (__arm_vcmpeqq_m): Likewise. (__arm_vcmpeqq): Likewise. (__arm_vcmpgeq_m): Likewise. (__arm_vcmpgeq): Likewise. (__arm_vcmpgtq_m): Likewise. (__arm_vcmpgtq): Likewise. (__arm_vcmpleq_m): Likewise. (__arm_vcmpleq): Likewise. (__arm_vcmpltq_m): Likewise. (__arm_vcmpltq): Likewise. (__arm_vcmpneq_m): Likewise. (__arm_vcmpneq): Likewise. (__arm_vfmaq_m): Likewise. (__arm_vfmaq): Likewise. (__arm_vfmasq_m): Likewise. (__arm_vfmasq): Likewise. (__arm_vmaxnmavq): Likewise. (__arm_vmaxnmavq_p): Likewise. (__arm_vmaxnmvq): Likewise. (__arm_vmaxnmvq_p): Likewise. (__arm_vminnmavq): Likewise. (__arm_vminnmavq_p): Likewise. (__arm_vminnmvq): Likewise. (__arm_vminnmvq_p): Likewise. (__arm_vmulq_m): Likewise. (__arm_vmulq): Likewise. (__arm_vmulq_x): Likewise. (__arm_vsetq_lane): Likewise. (__arm_vsubq_m): Likewise. (__arm_vsubq): Likewise. (__arm_vsubq_x): Likewise. gcc/testsuite/ChangeLog: PR target/96795 * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: New Test. * gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Likewise.
The releases/gcc-10 branch has been updated by SRINATH PARVATHANENI <sripar01@gcc.gnu.org>: https://gcc.gnu.org/g:db66d2accee1a2f3fcd93b8cb5bcc3aa5b8ac10e commit r10-8835-gdb66d2accee1a2f3fcd93b8cb5bcc3aa5b8ac10e Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com> Date: Wed Sep 30 15:19:17 2020 +0100 arm: Fix MVE intrinsics polymorphic variants wrongly generating __ARM_undef type (pr96795). This patch fixes (PR96795) MVE intrinsic polymorphic variants vaddq, vaddq_m, vaddq_x, vcmpeqq_m, vcmpeqq, vcmpgeq_m, vcmpgeq, vcmpgtq_m, vcmpgtq, vcmpleq_m, vcmpleq, vcmpltq_m, vcmpltq, vcmpneq_m, vcmpneq, vfmaq_m, vfmaq, vfmasq_m, vfmasq, vmaxnmavq, vmaxnmavq_p, vmaxnmvq, vmaxnmvq_p, vminnmavq, vminnmavq_p, vminnmvq, vminnmvq_p, vmulq_m, vmulq, vmulq_x, vsetq_lane, vsubq_m, vsubq and vsubq_x which are incorrectly generating __ARM_undef and mismatching the passed floating point scalar arguments. Bootstrapped on arm-none-linux-gnueabihf and regression tested on arm-none-eabi and found no regressions. gcc/ChangeLog: 2020-09-30 Srinath Parvathaneni <srinath.parvathaneni@arm.com> PR target/96795 * config/arm/arm_mve.h (__ARM_mve_coerce2): Define. (__arm_vaddq): Correct the scalar argument. (__arm_vaddq_m): Likewise. (__arm_vaddq_x): Likewise. (__arm_vcmpeqq_m): Likewise. (__arm_vcmpeqq): Likewise. (__arm_vcmpgeq_m): Likewise. (__arm_vcmpgeq): Likewise. (__arm_vcmpgtq_m): Likewise. (__arm_vcmpgtq): Likewise. (__arm_vcmpleq_m): Likewise. (__arm_vcmpleq): Likewise. (__arm_vcmpltq_m): Likewise. (__arm_vcmpltq): Likewise. (__arm_vcmpneq_m): Likewise. (__arm_vcmpneq): Likewise. (__arm_vfmaq_m): Likewise. (__arm_vfmaq): Likewise. (__arm_vfmasq_m): Likewise. (__arm_vfmasq): Likewise. (__arm_vmaxnmavq): Likewise. (__arm_vmaxnmavq_p): Likewise. (__arm_vmaxnmvq): Likewise. (__arm_vmaxnmvq_p): Likewise. (__arm_vminnmavq): Likewise. (__arm_vminnmavq_p): Likewise. (__arm_vminnmvq): Likewise. (__arm_vminnmvq_p): Likewise. (__arm_vmulq_m): Likewise. (__arm_vmulq): Likewise. (__arm_vmulq_x): Likewise. (__arm_vsetq_lane): Likewise. (__arm_vsubq_m): Likewise. (__arm_vsubq): Likewise. (__arm_vsubq_x): Likewise. gcc/testsuite/ChangeLog: PR target/96795 * gcc.target/arm/mve/intrinsics/mve_fp_vaddq_n.c: New Test. * gcc.target/arm/mve/intrinsics/mve_vaddq_n.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vaddq_x_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpeqq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgeq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpgtq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpleq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpltq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vcmpneq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmaq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vfmasq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmavq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmaxnmvq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmavq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vminnmvq_p_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vmulq_x_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsetq_lane_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_m_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_n_f32-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f16-1.c: Likewise. * gcc.target/arm/mve/intrinsics/vsubq_x_n_f32-1.c: Likewise. (cherry picked from commit 6bd4ce64eb48a72eca300cb52773e6101d646004)
Fixed in trunk and gcc-10.
The trunk branch has been updated by Andrea Corallo <akrl@gcc.gnu.org>: https://gcc.gnu.org/g:e0dd75fe90ef4cda94f431747d239d6cfcf5656f commit r13-4330-ge0dd75fe90ef4cda94f431747d239d6cfcf5656f Author: Stam Markianos-Wright <stam.markianos-wright@arm.com> Date: Thu Nov 10 15:02:47 2022 +0000 arm: further fix overloading of MVE vaddq[_m]_n intrinsic It was observed that in tests `vaddq_m_n_[s/u][8/16/32].c`, the _Generic resolution would fall back to the `__ARM_undef` failure state. This is a regression since `dc39db873670bea8d8e655444387ceaa53a01a79` and `6bd4ce64eb48a72eca300cb52773e6101d646004`, but it previously wasn't identified, because the tests were not checking for this kind of failure. The above commits changed the definitions of the intrinsics from using `[u]int[8/16/32]_t` types for the scalar argument to using `int`. This allowed `int` to be supported in user code through the overloaded `#defines`, but seems to have broken the `[u]int[8/16/32]_t` types The solution implemented by this patch is to explicitly use a new _Generic mapping from all the `[u]int[8/16/32]_t` types for int. With this change, both `int` and `[u]int[8/16/32]_t` parameters are supported from user code and are handled by the overloading mechanism correctly. Note that in these scalar cases it is safe to pass the raw p<n>, rather than the typeof-ed __p<n>, because we are not at risk of the _Generics being exponentially expanded on the `n` scalar argument to an `_n` intrinsic. Using p<n> instead will give a more accurate error message to the user, should something be wrong with that argument. gcc/ChangeLog: PR target/96795 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Change types. (__arm_vaddq_m_n_s32): Likewise. (__arm_vaddq_m_n_s16): Likewise. (__arm_vaddq_m_n_u8): Likewise. (__arm_vaddq_m_n_u32): Likewise. (__arm_vaddq_m_n_u16): Likewise. (__arm_vaddq_m): Fix Overloading. (__ARM_mve_coerce3): New.
The trunk branch has been updated by Andrea Corallo <akrl@gcc.gnu.org>: https://gcc.gnu.org/g:31df339a50c30712c1e071d2b18f304b148a3165 commit r13-4331-g31df339a50c30712c1e071d2b18f304b148a3165 Author: Stam Markianos-Wright <stam.markianos-wright@arm.com> Date: Thu Nov 10 15:02:52 2022 +0000 arm: propagate fixed overloading of MVE intrinsic scalar parameters This is a mechanical patch that propagates the change proposed in my previous patch for vaddq[_m]_n across all other polymorphic MVE intrinsic overloads of scalar types. The find and Replace patterns used were: s/__ARM_mve_coerce\(__p(\d+), [u]?int(8|16|32|64)_t\) /__ARM_mve_coerce3(p$1, int)/g s/__ARM_mve_coerce2\(__p(\d+), double\) /__ARM_mve_coerce2(p$1, double)/g gcc/ChangeLog: PR target/96795 * config/arm/arm_mve.h (__arm_vaddq): Fix Overloading. (__arm_vmulq): Likewise. (__arm_vcmpeqq): Likewise. (__arm_vcmpneq): Likewise. (__arm_vmaxnmavq): Likewise. (__arm_vmaxnmvq): Likewise. (__arm_vminnmavq): Likewise. (__arm_vsubq): Likewise. (__arm_vminnmvq): Likewise. (__arm_vrshlq): Likewise. (__arm_vqsubq): Likewise. (__arm_vqdmulltq): Likewise. (__arm_vqdmullbq): Likewise. (__arm_vqdmulhq): Likewise. (__arm_vqaddq): Likewise. (__arm_vhaddq): Likewise. (__arm_vhsubq): Likewise. (__arm_vqdmlashq): Likewise. (__arm_vqrdmlahq): Likewise. (__arm_vmlasq): Likewise. (__arm_vqdmlahq): Likewise. (__arm_vmaxnmavq_p): Likewise. (__arm_vmaxnmvq_p): Likewise. (__arm_vminnmavq_p): Likewise. (__arm_vminnmvq_p): Likewise. (__arm_vfmasq_m): Likewise. (__arm_vsetq_lane): Likewise. (__arm_vcmpneq_m): Likewise. (__arm_vhaddq_x): Likewise. (__arm_vhsubq_x): Likewise. (__arm_vqrdmlashq_m): Likewise. (__arm_vqdmlashq_m): Likewise. (__arm_vmlaldavaxq_p): Likewise. (__arm_vmlasq_m): Likewise. (__arm_vqdmulhq_m): Likewise. (__arm_vqdmulltq_m): Likewise. (__arm_viwdupq_m): Likewise. (__arm_viwdupq_u16): Likewise. (__arm_viwdupq_u32): Likewise. (__arm_viwdupq_u8): Likewise. (__arm_vdwdupq_m): Likewise. (__arm_vdwdupq_u16): Likewise. (__arm_vdwdupq_u32): Likewise. (__arm_vdwdupq_u8): Likewise. (__arm_vaddlvaq): Likewise. (__arm_vaddlvaq_p): Likewise. (__arm_vaddvaq): Likewise. (__arm_vaddvaq_p): Likewise. (__arm_vcmphiq_m): Likewise. (__arm_vmladavaq_p): Likewise. (__arm_vmladavaxq): Likewise. (__arm_vmlaldavaxq): Likewise. (__arm_vrmlaldavhaq_p): Likewise.
The master branch has been updated by Stam Markianos-Wright <stammark@gcc.gnu.org>: https://gcc.gnu.org/g:8a1360e72d6c6056606aa5edd8c906c50f26de59 commit r13-5200-g8a1360e72d6c6056606aa5edd8c906c50f26de59 Author: Stam Markianos-Wright <stam.markianos-wright@arm.com> Date: Mon Jan 16 11:40:40 2023 +0000 arm: Split up MVE _Generic associations to prevent type clashes [PR107515] With these previous patches: https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606586.html https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606587.html we enabled the MVE overloaded _Generic associations to handle more scalar types, however at PR 107515 we found a new regression that wasn't detected in our testing: With glibc's posix/types.h: ``` typedef signed int __int32_t; ... typedef __int32_t int32_t; ``` We would get a `error: '_Generic' specifies two compatible types` from `__ARM_mve_coerce3` because of `type: param`, when `type` is `int` and `int32_t: param` both being the same under the hood. The same did not happen with Newlib's header sys/_stdint.h: ``` typedef long int __int32_t; ... typedef __int32_t int32_t ; ``` which worked fine, because it uses `long int`. The same could feasibly happen in `__ARM_mve_coerce2` between `__fp16` and `float16_t`. The solution here is to break the _Generic down so that the similar types don't appear at the same level, as is done in `__ARM_mve_typeid` gcc/ChangeLog: PR target/96795 PR target/107515 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types. (__ARM_mve_coerce3): Likewise. gcc/testsuite/ChangeLog: PR target/96795 PR target/107515 * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: New test. * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: New test.
The releases/gcc-12 branch has been updated by Stam Markianos-Wright <stammark@gcc.gnu.org>: https://gcc.gnu.org/g:7d3043505c770e96d5471edee2b97c8169f26316 commit r12-9557-g7d3043505c770e96d5471edee2b97c8169f26316 Author: Stam Markianos-Wright <stam.markianos-wright@arm.com> Date: Thu Nov 10 15:02:47 2022 +0000 arm: further fix overloading of MVE vaddq[_m]_n intrinsic It was observed that in tests `vaddq_m_n_[s/u][8/16/32].c`, the _Generic resolution would fall back to the `__ARM_undef` failure state. This is a regression since `dc39db873670bea8d8e655444387ceaa53a01a79` and `6bd4ce64eb48a72eca300cb52773e6101d646004`, but it previously wasn't identified, because the tests were not checking for this kind of failure. The above commits changed the definitions of the intrinsics from using `[u]int[8/16/32]_t` types for the scalar argument to using `int`. This allowed `int` to be supported in user code through the overloaded `#defines`, but seems to have broken the `[u]int[8/16/32]_t` types The solution implemented by this patch is to explicitly use a new _Generic mapping from all the `[u]int[8/16/32]_t` types for int. With this change, both `int` and `[u]int[8/16/32]_t` parameters are supported from user code and are handled by the overloading mechanism correctly. Note that in these scalar cases it is safe to pass the raw p<n>, rather than the typeof-ed __p<n>, because we are not at risk of the _Generics being exponentially expanded on the `n` scalar argument to an `_n` intrinsic. Using p<n> instead will give a more accurate error message to the user, should something be wrong with that argument. gcc/ChangeLog: PR target/96795 * config/arm/arm_mve.h (__arm_vaddq_m_n_s8): Change types. (__arm_vaddq_m_n_s32): Likewise. (__arm_vaddq_m_n_s16): Likewise. (__arm_vaddq_m_n_u8): Likewise. (__arm_vaddq_m_n_u32): Likewise. (__arm_vaddq_m_n_u16): Likewise. (__arm_vaddq_m): Fix Overloading. (__ARM_mve_coerce3): New. (cherry picked from commit e0dd75fe90ef4cda94f431747d239d6cfcf5656f)
The releases/gcc-12 branch has been updated by Stam Markianos-Wright <stammark@gcc.gnu.org>: https://gcc.gnu.org/g:bbdf67595a57b1b029cfe17a581efe42c242b6e4 commit r12-9558-gbbdf67595a57b1b029cfe17a581efe42c242b6e4 Author: Stam Markianos-Wright <stam.markianos-wright@arm.com> Date: Thu Nov 10 15:02:52 2022 +0000 arm: propagate fixed overloading of MVE intrinsic scalar parameters This is a mechanical patch that propagates the change proposed in my previous patch for vaddq[_m]_n across all other polymorphic MVE intrinsic overloads of scalar types. The find and Replace patterns used were: s/__ARM_mve_coerce\(__p(\d+), [u]?int(8|16|32|64)_t\) /__ARM_mve_coerce3(p$1, int)/g s/__ARM_mve_coerce2\(__p(\d+), double\) /__ARM_mve_coerce2(p$1, double)/g gcc/ChangeLog: PR target/96795 * config/arm/arm_mve.h (__arm_vaddq): Fix Overloading. (__arm_vmulq): Likewise. (__arm_vcmpeqq): Likewise. (__arm_vcmpneq): Likewise. (__arm_vmaxnmavq): Likewise. (__arm_vmaxnmvq): Likewise. (__arm_vminnmavq): Likewise. (__arm_vsubq): Likewise. (__arm_vminnmvq): Likewise. (__arm_vrshlq): Likewise. (__arm_vqsubq): Likewise. (__arm_vqdmulltq): Likewise. (__arm_vqdmullbq): Likewise. (__arm_vqdmulhq): Likewise. (__arm_vqaddq): Likewise. (__arm_vhaddq): Likewise. (__arm_vhsubq): Likewise. (__arm_vqdmlashq): Likewise. (__arm_vqrdmlahq): Likewise. (__arm_vmlasq): Likewise. (__arm_vqdmlahq): Likewise. (__arm_vmaxnmavq_p): Likewise. (__arm_vmaxnmvq_p): Likewise. (__arm_vminnmavq_p): Likewise. (__arm_vminnmvq_p): Likewise. (__arm_vfmasq_m): Likewise. (__arm_vsetq_lane): Likewise. (__arm_vcmpneq_m): Likewise. (__arm_vhaddq_x): Likewise. (__arm_vhsubq_x): Likewise. (__arm_vqrdmlashq_m): Likewise. (__arm_vqdmlashq_m): Likewise. (__arm_vmlaldavaxq_p): Likewise. (__arm_vmlasq_m): Likewise. (__arm_vqdmulhq_m): Likewise. (__arm_vqdmulltq_m): Likewise. (__arm_viwdupq_m): Likewise. (__arm_viwdupq_u16): Likewise. (__arm_viwdupq_u32): Likewise. (__arm_viwdupq_u8): Likewise. (__arm_vdwdupq_m): Likewise. (__arm_vdwdupq_u16): Likewise. (__arm_vdwdupq_u32): Likewise. (__arm_vdwdupq_u8): Likewise. (__arm_vaddlvaq): Likewise. (__arm_vaddlvaq_p): Likewise. (__arm_vaddvaq): Likewise. (__arm_vaddvaq_p): Likewise. (__arm_vcmphiq_m): Likewise. (__arm_vmladavaq_p): Likewise. (__arm_vmladavaxq): Likewise. (__arm_vmlaldavaxq): Likewise. (__arm_vrmlaldavhaq_p): Likewise. (cherry picked from commit 31df339a50c30712c1e071d2b18f304b148a3165)
The releases/gcc-12 branch has been updated by Stam Markianos-Wright <stammark@gcc.gnu.org>: https://gcc.gnu.org/g:c7c4dfb5989e80ffc8e8439a8d9a9ed654612b90 commit r12-9608-gc7c4dfb5989e80ffc8e8439a8d9a9ed654612b90 Author: Stam Markianos-Wright <stam.markianos-wright@arm.com> Date: Mon Jan 16 11:40:40 2023 +0000 arm: Split up MVE _Generic associations to prevent type clashes [PR107515] With these previous patches: https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606586.html https://gcc.gnu.org/pipermail/gcc-patches/2022-November/606587.html we enabled the MVE overloaded _Generic associations to handle more scalar types, however at PR 107515 we found a new regression that wasn't detected in our testing: With glibc's posix/types.h: ``` typedef signed int __int32_t; ... typedef __int32_t int32_t; ``` We would get a `error: '_Generic' specifies two compatible types` from `__ARM_mve_coerce3` because of `type: param`, when `type` is `int` and `int32_t: param` both being the same under the hood. The same did not happen with Newlib's header sys/_stdint.h: ``` typedef long int __int32_t; ... typedef __int32_t int32_t ; ``` which worked fine, because it uses `long int`. The same could feasibly happen in `__ARM_mve_coerce2` between `__fp16` and `float16_t`. The solution here is to break the _Generic down so that the similar types don't appear at the same level, as is done in `__ARM_mve_typeid` gcc/ChangeLog: PR target/96795 PR target/107515 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types. (__ARM_mve_coerce3): Likewise. gcc/testsuite/ChangeLog: PR target/96795 PR target/107515 * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-fp.c: New test. * gcc.target/arm/mve/intrinsics/mve_intrinsic_type_overloads-int.c: New test. (cherry picked from commit 8a1360e72d6c6056606aa5edd8c906c50f26de59)