Bug 85946 - [9 regression] gcc.target/i386/avx512vl-vcvtudq2ps-2.c FAILs
Summary: [9 regression] gcc.target/i386/avx512vl-vcvtudq2ps-2.c FAILs
Status: RESOLVED INVALID
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 9.0
: P3 normal
Target Milestone: 9.0
Assignee: Not yet assigned to anyone
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2018-05-28 09:57 UTC by Rainer Orth
Modified: 2018-05-28 10:35 UTC (History)
1 user (show)

See Also:
Host:
Target: i386-pc-solaris2.11, amd64-pc-solaris2.11
Build:
Known to work:
Known to fail:
Last reconfirmed:

Attachments
Add an attachment (proposed patch, testcase, etc.)

Note You need to log in before you can comment on or make changes to this bug.
Description Rainer Orth 2018-05-28 09:57:46 UTC 
Between 20180522 (r260539) and 20180523 (r260615), gcc.target/i386/avx512vl-vcvtudq2ps-2.c
started to FAIL on Solaris 11/x86 with /bin/as (64-bit only):

+FAIL: gcc.target/i386/avx512vl-vcvtudq2ps-2.c (test for excess errors)
+UNRESOLVED: gcc.target/i386/avx512vl-vcvtudq2ps-2.c compilation failed to produce executable

Excess errors:
Assembler: avx512vl-vcvtudq2ps-2.c
        "/var/tmp//ccpfakpd.s", line 139 : Invalid instruction argument
        Near line: "    vcvtusi2ss      -176(%rbp,%rax), %xmm0, %xmm0"

  Rainer
Comment 1 Uroš Bizjak 2018-05-28 10:18:19 UTC 
There is nothing wrong with the insn mnemonic, it converts SImode value from memory to SFmode float register. This insn is different from vcvtusi2ssq.
Comment 2 Richard Biener 2018-05-28 10:35:33 UTC 
ICC accepts it as well.  objdump disassembles it to (also showing the insn itself):

   0:   62 f1 7e 08 7b 44 05    vcvtusi2ss -0xb0(%rbp,%rax,1),%xmm0,%xmm0
   7:   d4