Bug 80799 - [7/8 Regression] x86-32 bits generates MMX without EMMS
Summary: [7/8 Regression] x86-32 bits generates MMX without EMMS
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 7.1.0
: P2 normal
Target Milestone: 5.5
Assignee: Uroš Bizjak
URL:
Keywords: wrong-code
Depends on:
Blocks: 70118
  Show dependency treegraph
 
Reported: 2017-05-17 07:41 UTC by gregory hainaut
Modified: 2017-05-19 18:09 UTC (History)
1 user (show)

See Also:
Host:
Target: i?86-*-*
Build:
Known to work: 5.4.0, 6.3.1
Known to fail:
Last reconfirmed: 2017-05-17 00:00:00


Attachments
MMX without EMMS instead of SSE2 (461 bytes, text/x-csrc)
2017-05-17 07:41 UTC, gregory hainaut
Details
Patch in testing (950 bytes, patch)
2017-05-18 09:22 UTC, Uroš Bizjak
Details | Diff

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Description gregory hainaut 2017-05-17 07:41:21 UTC
Created attachment 41373 [details]
MMX without EMMS instead of SSE2

Dear GCC developers,

GCC7 breaks the build of the project PCSX2. We found that MMX opcodes are generated without any EMMS opcode on the 32 bits build (compiled from x86-64). Note: it would likely be better to use the SSE2 equivalent opcode.

Please find a small example attached. Compiled with : g++  -msse -msse2 -O2 -m32 -g -c gcc7_mmx.cpp

Here the generated code

GIFRegHandlerTRXPOS(GIFRegTRXPOS const&):
        push    ebx
        sub     esp, 8
        mov     ebx, DWORD PTR [esp+16]
        movq    xmm0, QWORD PTR TRXPOS

        movq    mm0, QWORD PTR [ebx]
        movq2dq xmm1, mm0

        pcmpeqd xmm0, xmm1
        pmovmskb        eax, xmm0
        cmp     eax, 65535
        je      .L2
        call    dummy_call()

        movq    mm0, QWORD PTR [ebx]
.L2:
        movq    QWORD PTR TRXPOS, mm0

        add     esp, 8
        pop     ebx
        ret

Best Regards,
Gregory
Comment 1 Richard Biener 2017-05-17 08:10:02 UTC
Confirmed.  Note I think you are using xmm yourself via the intrinsics.  The IL
contains vector(2) int vectors.
Comment 2 Uroš Bizjak 2017-05-17 15:25:16 UTC
There is something going on in the middle end, the problematic alternatives of the relevant patterns:

        movq    (%ebx), %mm0    # 6     *movv2si_internal/8     [length = 3]
        movq2dq %mm0, %xmm1     # 13    vec_concatv2di/7        [length = 4]
        pcmpeqd %xmm1, %xmm0    # 17    *sse2_eqv4si3/1 [length = 4]
        pmovmskb        %xmm0, %eax     # 18    sse2_pmovmskb   [length = 4]
        cmpl    $65535, %eax    # 20    *cmpsi_1/1      [length = 5]
        je      .L2     # 21    *jcc_1  [length = 2]
        call    _Z10dummy_callv # 23    *call   [length = 5]
        movq    (%ebx), %mm0    # 24    *movv2si_internal/8     [length = 3]
.L2:
        movq    %mm0, TRXPOS    # 29    *movv2si_internal/9     [length = 8]

are all decorated with "!".

(define_insn "*mov<mode>_internal"
  [(set (match_operand:MMXMODE 0 "nonimmediate_operand"
    "=r ,o ,r,r ,m ,?!y,!y,?!y,m  ,r   ,?!Ym,v,v,v,m,*x,*x,*x,m ,r ,Yi,!Ym,*Yi")
	(match_operand:MMXMODE 1 "vector_move_operand"
    "rCo,rC,C,rm,rC,C  ,!y,m  ,?!y,?!Yn,r   ,C,v,m,v,C ,*x,m ,*x,Yj,r ,*Yj,!Yn"))]

(define_insn "vec_concatv2di"
  [(set (match_operand:V2DI 0 "register_operand"
	  "=Yr,*x,x ,v ,Yi,v ,!x,x,v ,x,x,v")
	(vec_concat:V2DI
	  (match_operand:DI 1 "nonimmediate_operand"
	  "  0, 0,x ,Yv,r ,vm,*y,0,Yv,0,0,v")
	  (match_operand:DI 2 "vector_move_operand"
	  "*rm,rm,rm,rm,C ,C ,C ,x,Yv,x,m,m")))]

I'm afraid this is all target can do to avoid (but still allow) certain alternative.  The testcase works for gcc-6, and those patterns were not touched for a long time.

Can someone please do a reghunt here?
Comment 3 H.J. Lu 2017-05-17 21:16:05 UTC
This is caused by r243527.
Comment 4 Uroš Bizjak 2017-05-18 09:21:57 UTC
(In reply to H.J. Lu from comment #3)
> This is caused by r243527.

Thanks.  FYI, the above revision just triggers the issue.

I have a patch.
Comment 5 Uroš Bizjak 2017-05-18 09:22:47 UTC
Created attachment 41381 [details]
Patch in testing
Comment 6 uros 2017-05-18 18:04:02 UTC
Author: uros
Date: Thu May 18 18:03:30 2017
New Revision: 248246

URL: https://gcc.gnu.org/viewcvs?rev=248246&root=gcc&view=rev
Log:
	PR target/80799
	* config/i386/mmx.md (*mov<mode>_internal): Enable
	alternatives 11, 12, 13 and 14 also for 32bit targets.
	Remove alternatives 15, 16, 17 and 18.
	* config/i386/sse.md (vec_concatv2di): Change
	alternative (!x, *y) to (x, ?!*Yn).

testsuite/ChangeLog:

	PR target/80799
	* g++.dg/other/i386-11.C: New test.


Added:
    trunk/gcc/testsuite/g++.dg/other/i386-11.C
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/mmx.md
    trunk/gcc/config/i386/sse.md
    trunk/gcc/testsuite/ChangeLog
Comment 7 uros 2017-05-19 14:10:17 UTC
Author: uros
Date: Fri May 19 14:09:45 2017
New Revision: 248284

URL: https://gcc.gnu.org/viewcvs?rev=248284&root=gcc&view=rev
Log:
	Backport from mainline
	2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

	PR target/80799
	* config/i386/mmx.md (*mov<mode>_internal): Enable
	alternatives 11, 12, 13 and 14 also for 32bit targets.
	Remove alternatives 15, 16, 17 and 18.
	* config/i386/sse.md (vec_concatv2di): Change
	alternative (!x, *y) to (x, ?!*Yn).

testsuite/ChangeLog:

	Backport from mainline
	2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

	PR target/80799
	* g++.dg/other/i386-11.C: New test.


Added:
    branches/gcc-7-branch/gcc/testsuite/g++.dg/other/i386-11.C
Modified:
    branches/gcc-7-branch/gcc/ChangeLog
    branches/gcc-7-branch/gcc/config/i386/mmx.md
    branches/gcc-7-branch/gcc/config/i386/sse.md
    branches/gcc-7-branch/gcc/testsuite/ChangeLog
Comment 8 uros 2017-05-19 15:51:42 UTC
Author: uros
Date: Fri May 19 15:51:10 2017
New Revision: 248294

URL: https://gcc.gnu.org/viewcvs?rev=248294&root=gcc&view=rev
Log:
	Backport from mainline
	2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

	PR target/80799
	* config/i386/mmx.md (*mov<mode>_internal): Enable
	alternatives 11, 12, 13 and 14 also for 32bit targets.
	Remove alternatives 15, 16, 17 and 18.
	* config/i386/sse.md (vec_concatv2di): Change
	alternative (!x, *y) to (x, ?!*Yn).

testsuite/ChangeLog:

	Backport from mainline
	2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

	PR target/80799
	* g++.dg/other/i386-11.C: New test.


Added:
    branches/gcc-6-branch/gcc/testsuite/g++.dg/other/i386-11.C
Modified:
    branches/gcc-6-branch/gcc/ChangeLog
    branches/gcc-6-branch/gcc/config/i386/mmx.md
    branches/gcc-6-branch/gcc/config/i386/sse.md
    branches/gcc-6-branch/gcc/testsuite/ChangeLog
Comment 9 uros 2017-05-19 18:08:51 UTC
Author: uros
Date: Fri May 19 18:08:19 2017
New Revision: 248297

URL: https://gcc.gnu.org/viewcvs?rev=248297&root=gcc&view=rev
Log:
	Backport from mainline
	2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

	PR target/80799
	* config/i386/mmx.md (*mov<mode>_internal): Enable
	alternatives 11, 12, 13 and 14 also for 32bit targets.
	Remove alternatives 15, 16, 17 and 18.
	* config/i386/sse.md (vec_concatv2di): Change
	alternative (!x, *y) to (x, ?!*Yn).

testsuite/ChangeLog:

	Backport from mainline
	2017-05-18  Uros Bizjak  <ubizjak@gmail.com>

	PR target/80799
	* g++.dg/other/i386-11.C: New test.


Added:
    branches/gcc-5-branch/gcc/testsuite/g++.dg/other/i386-11.C
Modified:
    branches/gcc-5-branch/gcc/ChangeLog
    branches/gcc-5-branch/gcc/config/i386/mmx.md
    branches/gcc-5-branch/gcc/config/i386/sse.md
    branches/gcc-5-branch/gcc/testsuite/ChangeLog
Comment 10 Uroš Bizjak 2017-05-19 18:09:24 UTC
Fixed everywhere.