Bug 78012 - -mfpxx produces assembly code using odd FP registers on MIPS
Summary: -mfpxx produces assembly code using odd FP registers on MIPS
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 7.0
: P3 normal
Target Milestone: ---
Assignee: mpf
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2016-10-17 15:05 UTC by Aurelien Jarno
Modified: 2017-03-15 17:17 UTC (History)
5 users (show)

See Also:
Host: mipsel-linux-gnu
Target: mipsel-linux-gnu
Build: mipsel-linux-gnu
Known to work: 5.4.1, 7.0
Known to fail: 6.2.0
Last reconfirmed: 2016-11-24 00:00:00


Attachments
Original testcase (13.11 KB, text/plain)
2016-10-17 15:05 UTC, Aurelien Jarno
Details
Reduced testcase (1.56 KB, text/plain)
2016-10-17 15:05 UTC, Aurelien Jarno
Details

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Description Aurelien Jarno 2016-10-17 15:05:08 UTC
Created attachment 39823 [details]
Original testcase

The attached testcase (taken from the ergo software [1]) produces assembly code with odd FP registers when using the FPxx abi.

$ gcc -mfpxx -O2 -c fun-p86c.i
/tmp/ccpv3phk.s: Assembler messages:
/tmp/ccpv3phk.s:1883: Error: float register should be even, was 15
/tmp/ccpv3phk.s:2586: Error: float register should be even, was 15

I have also attached a reduced version of the testcase, that said it also outputs a lot of warnings about uninitialized variables.

[1] http://ergoscf.org/
Comment 1 Aurelien Jarno 2016-10-17 15:05:39 UTC
Created attachment 39824 [details]
Reduced testcase
Comment 2 Maciej W. Rozycki 2016-11-22 13:09:19 UTC
I can't reproduce your problem with either test case and:

mips-mti-linux-gnu-gcc (GCC) 7.0.0 20161117 (experimental)

-- code produced assembles correctly and visual inspection of the
assembly reveals no odd-numbered FGR operands throughout.

Would you therefore please reconfirm this issue still triggers with
current HEAD, and if so, then report the details of your compilation as
shown with the `-v' flag added to your invocation line?
Comment 3 Aurelien Jarno 2016-11-23 08:28:37 UTC
(In reply to Maciej W. Rozycki from comment #2)
> I can't reproduce your problem with either test case and:
> 
> mips-mti-linux-gnu-gcc (GCC) 7.0.0 20161117 (experimental)
> 
> -- code produced assembles correctly and visual inspection of the
> assembly reveals no odd-numbered FGR operands throughout.
> 
> Would you therefore please reconfirm this issue still triggers with
> current HEAD, and if so, then report the details of your compilation as
> shown with the `-v' flag added to your invocation line?

Sorry about that. I think the trick there is that Debian defaults to mips32r2. Indeed, I am not able to reproduce the problem with -march=mips32. I have tried again, I am still able to reproduce the issue for both testcases when using GCC 6.2.1, but only with the non-reduced testcase when using GCC trunk (through I used the one in Debian, so a slightly older version than you from 20161106). Here is the output with the -v flag added:

$ gcc -mfpxx -O2 -c fun-p86c.i -v
Using built-in specs.
COLLECT_GCC=gcc
Target: mips-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Debian 20161106-1' --with-bugurl=file:///usr/share/doc/gcc-snapshot/README.Bugs --enable-languages=c,c++,go,fortran,objc,obj-c++ --prefix=/usr/lib/gcc-snapshot --program-prefix= --enable-
shared --enable-linker-build-id --disable-nls --with-sysroot=/ --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-libitm --disable-libsanitizer --disa
ble-libquadmath --enable-plugin --enable-default-pie --with-system-zlib --enable-multiarch --enable-multilib --with-arch-32=mips32r2 --with-fp-32=xx --enable-targets=all --with-arch-64=mips64r2 --disable-werror --enable-checking=yes --build=mi
ps-linux-gnu --host=mips-linux-gnu --target=mips-linux-gnu
Thread model: posix
gcc version 7.0.0 20161106 (experimental) [trunk revision 241885] (Debian 20161106-1)
COLLECT_GCC_OPTIONS='-mfpxx' '-O2' '-c' '-v' '-march=mips32r2' '-mllsc' '-mips32r2' '-EB' '-mabi=32'
 /usr/lib/gcc-snapshot/libexec/gcc/mips-linux-gnu/7.0.0/cc1 -fpreprocessed fun-p86c.i -meb -quiet -dumpbase fun-p86c.i -mfpxx -march=mips32r2 -mllsc -mips32r2 -mabi=32 -auxbase fun-p86c -O2 -version -o /tmp/ccbT7qjh.s
GNU C11 (Debian 20161106-1) version 7.0.0 20161106 (experimental) [trunk revision 241885] (mips-linux-gnu)
        compiled by GNU C version 7.0.0 20161106 (experimental) [trunk revision 241885], GMP version 6.1.1, MPFR version 3.1.5, MPC version 1.0.3, isl version 0.15
GGC heuristics: --param ggc-min-expand=30 --param ggc-min-heapsize=4096
GNU C11 (Debian 20161106-1) version 7.0.0 20161106 (experimental) [trunk revision 241885] (mips-linux-gnu)
        compiled by GNU C version 7.0.0 20161106 (experimental) [trunk revision 241885], GMP version 6.1.1, MPFR version 3.1.5, MPC version 1.0.3, isl version 0.15
GGC heuristics: --param ggc-min-expand=30 --param ggc-min-heapsize=4096
Compiler executable checksum: b5d3035afeb69ed786f0bd6e5bf73e96
COLLECT_GCC_OPTIONS='-mfpxx' '-O2' '-c' '-v' '-march=mips32r2' '-mllsc' '-mips32r2' '-EB' '-mabi=32'
 as -v -EB -mips32r2 -O2 -no-mdebug -mabi=32 -march=mips32r2 -mfpxx -KPIC -o fun-p86c.o /tmp/ccbT7qjh.s
GNU assembler version 2.27.51 (mips-linux-gnu) using BFD version (GNU Binutils for Debian) 2.27.51.20161118
/tmp/ccbT7qjh.s: Assembler messages:
/tmp/ccbT7qjh.s:1859: Error: float register should be even, was 15
/tmp/ccbT7qjh.s:2567: Error: float register should be even, was 15
Comment 4 James Cowgill 2016-11-23 11:20:09 UTC
I can reproduce this with both the original and reduced testcase with upstream GCC trunk.

$ ../build/gcc/xgcc -B../build/gcc -mfpxx -O2 -c fpxx-test-reduced.c
fpxx-test-reduced.c: In function ‘p86c_third’:
fpxx-test-reduced.c:52:12: warning: implicit declaration of function ‘pow’ [-Wimplicit-function-declaration]
   t1 = 1 / pow (2.0, 0.33333333333333);
            ^~~
fpxx-test-reduced.c:52:12: warning: incompatible implicit declaration of built-in function ‘pow’
fpxx-test-reduced.c:52:12: note: include ‘<math.h>’ or provide a declaration of ‘pow’
/tmp/ccZFUsRZ.s: Assembler messages:
/tmp/ccZFUsRZ.s:131: Error: float register should be even, was 15
/tmp/ccZFUsRZ.s:229: Error: float register should be even, was 15

$ ../build/gcc/xgcc -v
Using built-in specs.
COLLECT_GCC=../build/gcc/xgcc
Target: mipsel-linux-gnu
Configured with: ../gcc/configure --enable-languages=c,c++ --prefix=/usr --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --enable-gnu-unique-object --disable-libitm --disable-libsanitizer --disable-libquadmath --enable-plugin --with-system-zlib --enable-multiarch --with-arch-32=mips32r2 --target=mipsel-linux-gnu
Thread model: posix
gcc version 7.0.0 20161122 (experimental) (GCC)

$ mipsel-linux-gnu-as --version
GNU assembler (GNU Binutils for Debian) 2.27.51.20161118
Copyright (C) 2016 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or later.
This program has absolutely no warranty.
This assembler was configured for a target of `mipsel-linux-gnu'.
Comment 5 Maciej W. Rozycki 2016-11-23 19:57:49 UTC
I have been able to reproduce the bug now -- to trigger it you need to
request classic SVR4 code either by means of compiler defaults or with
the use of the `-mplt' option, in which case a pair of single-word FPU
accesses is produced for $f15: first SWC1 to save it, and then LWC1 to
restore it from the stack frame, as follows:

	swc1	$f15,224($sp)	 # 1178	*movsi_internal/15	[length = 4]
	lwc1	$f15,224($sp)	 # 1179	*movsi_internal/13	[length = 4]

Notice the integer mode used.  I haven't investigated it further.

You need all of `-mips32r2 -mfpxx -mno-plt' to trigger it.  It does
*not* trigger if `-fPIC' or `-fPIE' is used in place of `-mno-plt'.
Comment 6 mpf 2017-02-20 12:07:54 UTC
Author: mpf
Date: Mon Feb 20 12:07:23 2017
New Revision: 245601

URL: https://gcc.gnu.org/viewcvs?rev=245601&root=gcc&view=rev
Log:
Ensure the mode used to create split registers is suppported

gcc/
	PR target/78012
	* lra-constraints.c (split_reg): Check requested split mode
	is supported by the register.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/lra-constraints.c
Comment 7 mpf 2017-03-07 10:57:18 UTC
This is fixed for GCC 7. It may need a backport to GCC 6 though.