Bug 71978 - -mrealignstack and the unwinder
Summary: -mrealignstack and the unwinder
Status: RESOLVED INVALID
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 6.1.0
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords: wrong-debug
Depends on:
Blocks:
 
Reported: 2016-07-23 00:32 UTC by Rian Quinn
Modified: 2016-08-03 16:51 UTC (History)
0 users

See Also:
Host:
Target: x86_64-*-*
Build:
Known to work:
Known to fail:
Last reconfirmed:


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Description Rian Quinn 2016-07-23 00:32:45 UTC
I think there is an issue with GCC 6.1, -mrealignstack and expressions. We use -mrealignstack because without it, "-O3" crashes when we set the arch to sandybridge (as SSE instructions are inserted, and the stack ends up being misaligned). 

We have our own custome unwinder, and it worked great until we started testing 6.1 (i.e. this issue does not occur with 5.X). With 6.1, DWARF expressions are used. It appears that the CFA offset "sign" is backwards. Here is offending FDE:

00000d98 0000000000000044 00000d04 FDE cie=00000098 pc=0000000000019282..0000000000019d80
  Augmentation data:     96 63 00 00

  DW_CFA_advance_loc: 5 to 0000000000019287
  DW_CFA_def_cfa: r10 (r10) ofs 0
  DW_CFA_advance_loc: 9 to 0000000000019290
  DW_CFA_expression: r6 (rbp) (DW_OP_breg6 (rbp): 0)
  DW_CFA_advance_loc: 7 to 0000000000019297
  DW_CFA_def_cfa_expression (DW_OP_breg6 (rbp): -16; DW_OP_deref)
  DW_CFA_expression: r12 (r12) (DW_OP_breg6 (rbp): -8)
  DW_CFA_advance_loc: 8 to 000000000001929f
  DW_CFA_expression: r3 (rbx) (DW_OP_breg6 (rbp): -24)
  DW_CFA_advance_loc2: 2775 to 0000000000019d76
  DW_CFA_restore: r3 (rbx)
  DW_CFA_advance_loc: 2 to 0000000000019d78
  DW_CFA_restore: r10 (r10)
  DW_CFA_def_cfa: r10 (r10) ofs 0
  DW_CFA_advance_loc: 2 to 0000000000019d7a
  DW_CFA_restore: r12 (r12)
  DW_CFA_advance_loc: 1 to 0000000000019d7b
  DW_CFA_restore: r6 (rbp)
  DW_CFA_advance_loc: 4 to 0000000000019d7f
  DW_CFA_def_cfa: r7 (rsp) ofs 8
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop

As you can see, the CFA is defined as -16 from rbp which is wrong. It should be +16 from rbp. Besides the fact that it doesn't make sense for the CFA to be inside the existing CFA... if the other registers are 0, -8 and -24... how could the start of the CFA be -16, in the middle of register state. 

The result is RIP which is -8 from the CFA, ends up being a heap address and the unwinder gets mad. To prove to myself that the offset should have been +16, I swapped the sign just for CFA offset, and the unwinder worked great again. To pull this hack off, I had to store a flag for DW_OP_breg6. When it's calculating the location of the CFA, it swaps the sign, otherwise it keeps the sign as is. Doing this, the unwinder successfully throws exceptions again. 

Just for more complete reference, here is an FDE from the same library that doesn't use expressions. In this case, you can see the offset being +16... so it's only an issue with 6.1 with -mrealignstack in FDEs that use expressions. 

000000b8 0000000000000024 00000024 FDE cie=00000098 pc=0000000000020b20..0000000000020b5d
  Augmentation data:     3f 6f 00 00

  DW_CFA_advance_loc: 1 to 0000000000020b21
  DW_CFA_def_cfa_offset: 16
  DW_CFA_offset: r6 (rbp) at cfa-16
  DW_CFA_advance_loc: 3 to 0000000000020b24
  DW_CFA_def_cfa_register: r6 (rbp)
  DW_CFA_advance_loc: 56 to 0000000000020b5c
  DW_CFA_restore: r6 (rbp)
  DW_CFA_def_cfa: r7 (rsp) ofs 8
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop
  DW_CFA_nop

Also... the GCC 6.1 compiler is x86_64-elf-g++ (i.e. generic 64bit cross compiler).
Comment 1 Andrew Pinski 2016-07-23 04:45:01 UTC
Can you attach the preprocessed source that goes with dwarf expressions you listed?  Also can you attach the assembly code that is produced?
Comment 2 Rian Quinn 2016-07-23 05:12:57 UTC
We throw here:
https://github.com/rianquinn/hypervisor/blob/expression_support/bfvmm/src/vmcs/src/vmcs_intel_x64.cpp#L514

The following is were the issue is (meaning the unwinder unwinds until it hits this function, and fails to move onto the next frame as this is the first function that it hits that has expressions)
https://github.com/rianquinn/hypervisor/blob/expression_support/bfvmm/src/vmcs/src/vmcs_intel_x64.cpp#L41

Here is were I put in the hack in the unwinder to make it work:
https://github.com/rianquinn/hypervisor/blob/expression_support/bfunwind/src/dwarf4.cpp#L1015

Usually, I would pass in "0" as the initial value for the DWARF expression parsing, but I changed this to "1" which I look for which tells me this is a DW_CFA_def_cfa_expression and not a DW_CFA_expression (as I set "1" on private_decode_cfa). With this hack in place, the unwinder works fine. 

Here is the assembly for the function that it cannot get passed:
0000000000019282 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_>:
   19282:	4c 8d 54 24 08       	lea    0x8(%rsp),%r10
   19287:	48 83 e4 f0          	and    $0xfffffffffffffff0,%rsp
   1928b:	41 ff 72 f8          	pushq  -0x8(%r10)
   1928f:	55                   	push   %rbp
   19290:	48 89 e5             	mov    %rsp,%rbp
   19293:	41 54                	push   %r12
   19295:	41 52                	push   %r10
   19297:	53                   	push   %rbx
   19298:	48 81 ec 18 02 00 00 	sub    $0x218,%rsp
   1929f:	48 89 bd e8 fd ff ff 	mov    %rdi,-0x218(%rbp)
   192a6:	48 89 b5 e0 fd ff ff 	mov    %rsi,-0x220(%rbp)
   192ad:	48 89 95 d8 fd ff ff 	mov    %rdx,-0x228(%rbp)
   192b4:	48 8b 05 cd c6 07 00 	mov    0x7c6cd(%rip),%rax        # 95988 <_GLOBAL_OFFSET_TABLE_+0x128>
   192bb:	48 8b 18             	mov    (%rax),%rbx
   192be:	48 89 5d d8          	mov    %rbx,-0x28(%rbp)
   192c2:	31 db                	xor    %ebx,%ebx
   192c4:	48 8b 8d e8 fd ff ff 	mov    -0x218(%rbp),%rcx
   192cb:	48 8d 85 60 ff ff ff 	lea    -0xa0(%rbp),%rax
   192d2:	ba 00 00 00 00       	mov    $0x0,%edx
   192d7:	48 89 ce             	mov    %rcx,%rsi
   192da:	48 89 c7             	mov    %rax,%rdi
   192dd:	e8 aa 41 00 00       	callq  1d48c <_ZNSt3__18functionIFvvEEC1IZN14vmcs_intel_x646launchERKNS_10shared_ptrI20vmcs_intel_x64_stateEES9_EUlvE_EET_PNS_9enable_ifIXaasrNS2_10__callableISB_XaantsrNS_7is_sameISB_S2_EE5valuesrNS_11__invokableIRSB_JEEE5valueEEE5valuentsrSF_5valueEvE4typeE>
   192e2:	48 8d 95 60 ff ff ff 	lea    -0xa0(%rbp),%rdx
   192e9:	48 8d 45 90          	lea    -0x70(%rbp),%rax
   192ed:	48 89 d6             	mov    %rdx,%rsi
   192f0:	48 89 c7             	mov    %rax,%rdi
   192f3:	e8 c8 f7 ff ff       	callq  18ac0 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x270>
   192f8:	48 8d 85 60 ff ff ff 	lea    -0xa0(%rbp),%rax
   192ff:	48 89 c7             	mov    %rax,%rdi
   19302:	e8 99 f4 ff ff       	callq  187a0 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x590>
   19307:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   1930e:	48 8b 00             	mov    (%rax),%rax
   19311:	48 83 c0 20          	add    $0x20,%rax
   19315:	48 8b 00             	mov    (%rax),%rax
   19318:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   1931f:	48 89 d7             	mov    %rdx,%rdi
   19322:	ff d0                	callq  *%rax
   19324:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   1932b:	48 8b 00             	mov    (%rax),%rax
   1932e:	48 83 c0 30          	add    $0x30,%rax
   19332:	48 8b 00             	mov    (%rax),%rax
   19335:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   1933c:	48 89 d7             	mov    %rdx,%rdi
   1933f:	ff d0                	callq  *%rax
   19341:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19348:	48 83 c0 08          	add    $0x8,%rax
   1934c:	48 89 85 f8 fd ff ff 	mov    %rax,-0x208(%rbp)
   19353:	48 8b 85 f8 fd ff ff 	mov    -0x208(%rbp),%rax
   1935a:	48 8b 00             	mov    (%rax),%rax
   1935d:	48 8b 10             	mov    (%rax),%rdx
   19360:	48 81 c2 a8 01 00 00 	add    $0x1a8,%rdx
   19367:	48 8b 12             	mov    (%rdx),%rdx
   1936a:	48 8b 8d e8 fd ff ff 	mov    -0x218(%rbp),%rcx
   19371:	48 83 c1 18          	add    $0x18,%rcx
   19375:	48 89 ce             	mov    %rcx,%rsi
   19378:	48 89 c7             	mov    %rax,%rdi
   1937b:	ff d2                	callq  *%rdx
   1937d:	83 f0 01             	xor    $0x1,%eax
   19380:	84 c0                	test   %al,%al
   19382:	0f 84 a1 01 00 00    	je     19529 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0x2a7>
   19388:	bf 40 00 00 00       	mov    $0x40,%edi
   1938d:	e8 8e f8 ff ff       	callq  18c20 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x110>
   19392:	48 89 c3             	mov    %rax,%rbx
   19395:	48 8d 05 0b 71 06 00 	lea    0x6710b(%rip),%rax        # 804a7 <_ZZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_E8__func__>
   1939c:	48 89 85 00 fe ff ff 	mov    %rax,-0x200(%rbp)
   193a3:	48 8d 85 e0 fe ff ff 	lea    -0x120(%rbp),%rax
   193aa:	48 89 c7             	mov    %rax,%rdi
   193ad:	e8 06 f6 ff ff       	callq  189b8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x378>
   193b2:	48 8d 85 e0 fe ff ff 	lea    -0x120(%rbp),%rax
   193b9:	48 89 85 08 fe ff ff 	mov    %rax,-0x1f8(%rbp)
   193c0:	48 8b 85 08 fe ff ff 	mov    -0x1f8(%rbp),%rax
   193c7:	48 89 85 10 fe ff ff 	mov    %rax,-0x1f0(%rbp)
   193ce:	48 8b 85 10 fe ff ff 	mov    -0x1f0(%rbp),%rax
   193d5:	48 89 85 18 fe ff ff 	mov    %rax,-0x1e8(%rbp)
   193dc:	48 8b 85 10 fe ff ff 	mov    -0x1f0(%rbp),%rax
   193e3:	48 c7 00 00 00 00 00 	movq   $0x0,(%rax)
   193ea:	48 8b 85 10 fe ff ff 	mov    -0x1f0(%rbp),%rax
   193f1:	48 c7 40 08 00 00 00 	movq   $0x0,0x8(%rax)
   193f8:	00
   193f9:	48 8b 85 10 fe ff ff 	mov    -0x1f0(%rbp),%rax
   19400:	48 c7 40 10 00 00 00 	movq   $0x0,0x10(%rax)
   19407:	00
   19408:	48 8b 85 00 fe ff ff 	mov    -0x200(%rbp),%rax
   1940f:	48 89 c7             	mov    %rax,%rdi
   19412:	e8 81 f5 ff ff       	callq  18998 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x398>
   19417:	48 89 c2             	mov    %rax,%rdx
   1941a:	48 8b 8d 00 fe ff ff 	mov    -0x200(%rbp),%rcx
   19421:	48 8d 85 e0 fe ff ff 	lea    -0x120(%rbp),%rax
   19428:	48 89 ce             	mov    %rcx,%rsi
   1942b:	48 89 c7             	mov    %rax,%rdi
   1942e:	e8 75 f6 ff ff       	callq  18aa8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x288>
   19433:	48 8d 05 58 6c 06 00 	lea    0x66c58(%rip),%rax        # 80092 <_ZNSt3__112_GLOBAL__N_1L6ignoreE+0xa0>
   1943a:	48 89 85 20 fe ff ff 	mov    %rax,-0x1e0(%rbp)
   19441:	48 8d 85 c0 fe ff ff 	lea    -0x140(%rbp),%rax
   19448:	48 89 c7             	mov    %rax,%rdi
   1944b:	e8 68 f5 ff ff       	callq  189b8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x378>
   19450:	48 8d 85 c0 fe ff ff 	lea    -0x140(%rbp),%rax
   19457:	48 89 85 28 fe ff ff 	mov    %rax,-0x1d8(%rbp)
   1945e:	48 8b 85 28 fe ff ff 	mov    -0x1d8(%rbp),%rax
   19465:	48 89 85 30 fe ff ff 	mov    %rax,-0x1d0(%rbp)
   1946c:	48 8b 85 30 fe ff ff 	mov    -0x1d0(%rbp),%rax
   19473:	48 89 85 38 fe ff ff 	mov    %rax,-0x1c8(%rbp)
   1947a:	48 8b 85 30 fe ff ff 	mov    -0x1d0(%rbp),%rax
   19481:	48 c7 00 00 00 00 00 	movq   $0x0,(%rax)
   19488:	48 8b 85 30 fe ff ff 	mov    -0x1d0(%rbp),%rax
   1948f:	48 c7 40 08 00 00 00 	movq   $0x0,0x8(%rax)
   19496:	00
   19497:	48 8b 85 30 fe ff ff 	mov    -0x1d0(%rbp),%rax
   1949e:	48 c7 40 10 00 00 00 	movq   $0x0,0x10(%rax)
   194a5:	00
   194a6:	48 8b 85 20 fe ff ff 	mov    -0x1e0(%rbp),%rax
   194ad:	48 89 c7             	mov    %rax,%rdi
   194b0:	e8 e3 f4 ff ff       	callq  18998 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x398>
   194b5:	48 89 c2             	mov    %rax,%rdx
   194b8:	48 8b 8d 20 fe ff ff 	mov    -0x1e0(%rbp),%rcx
   194bf:	48 8d 85 c0 fe ff ff 	lea    -0x140(%rbp),%rax
   194c6:	48 89 ce             	mov    %rcx,%rsi
   194c9:	48 89 c7             	mov    %rax,%rdi
   194cc:	e8 d7 f5 ff ff       	callq  18aa8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x288>
   194d1:	48 8d 95 e0 fe ff ff 	lea    -0x120(%rbp),%rdx
   194d8:	48 8d 85 c0 fe ff ff 	lea    -0x140(%rbp),%rax
   194df:	b9 36 00 00 00       	mov    $0x36,%ecx
   194e4:	48 89 c6             	mov    %rax,%rsi
   194e7:	48 89 df             	mov    %rbx,%rdi
   194ea:	e8 d1 f6 ff ff       	callq  18bc0 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x170>
   194ef:	48 8d 85 c0 fe ff ff 	lea    -0x140(%rbp),%rax
   194f6:	48 89 c7             	mov    %rax,%rdi
   194f9:	e8 ca f4 ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   194fe:	48 8d 85 e0 fe ff ff 	lea    -0x120(%rbp),%rax
   19505:	48 89 c7             	mov    %rax,%rdi
   19508:	e8 bb f4 ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   1950d:	48 8b 05 84 c9 07 00 	mov    0x7c984(%rip),%rax        # 95e98 <_GLOBAL_OFFSET_TABLE_+0x638>
   19514:	48 89 c2             	mov    %rax,%rdx
   19517:	48 8b 05 72 c7 07 00 	mov    0x7c772(%rip),%rax        # 95c90 <_GLOBAL_OFFSET_TABLE_+0x430>
   1951e:	48 89 c6             	mov    %rax,%rsi
   19521:	48 89 df             	mov    %rbx,%rdi
   19524:	e8 9f f5 ff ff       	callq  18ac8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x268>
   19529:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19530:	48 83 c0 08          	add    $0x8,%rax
   19534:	48 89 85 40 fe ff ff 	mov    %rax,-0x1c0(%rbp)
   1953b:	48 8b 85 40 fe ff ff 	mov    -0x1c0(%rbp),%rax
   19542:	48 8b 00             	mov    (%rax),%rax
   19545:	48 8b 10             	mov    (%rax),%rdx
   19548:	48 81 c2 b0 01 00 00 	add    $0x1b0,%rdx
   1954f:	48 8b 12             	mov    (%rdx),%rdx
   19552:	48 8b 8d e8 fd ff ff 	mov    -0x218(%rbp),%rcx
   19559:	48 83 c1 18          	add    $0x18,%rcx
   1955d:	48 89 ce             	mov    %rcx,%rsi
   19560:	48 89 c7             	mov    %rax,%rdi
   19563:	ff d2                	callq  *%rdx
   19565:	83 f0 01             	xor    $0x1,%eax
   19568:	84 c0                	test   %al,%al
   1956a:	0f 84 a1 01 00 00    	je     19711 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0x48f>
   19570:	bf 40 00 00 00       	mov    $0x40,%edi
   19575:	e8 a6 f6 ff ff       	callq  18c20 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x110>
   1957a:	48 89 c3             	mov    %rax,%rbx
   1957d:	48 8d 05 23 6f 06 00 	lea    0x66f23(%rip),%rax        # 804a7 <_ZZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_E8__func__>
   19584:	48 89 85 48 fe ff ff 	mov    %rax,-0x1b8(%rbp)
   1958b:	48 8d 85 20 ff ff ff 	lea    -0xe0(%rbp),%rax
   19592:	48 89 c7             	mov    %rax,%rdi
   19595:	e8 1e f4 ff ff       	callq  189b8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x378>
   1959a:	48 8d 85 20 ff ff ff 	lea    -0xe0(%rbp),%rax
   195a1:	48 89 85 50 fe ff ff 	mov    %rax,-0x1b0(%rbp)
   195a8:	48 8b 85 50 fe ff ff 	mov    -0x1b0(%rbp),%rax
   195af:	48 89 85 58 fe ff ff 	mov    %rax,-0x1a8(%rbp)
   195b6:	48 8b 85 58 fe ff ff 	mov    -0x1a8(%rbp),%rax
   195bd:	48 89 85 60 fe ff ff 	mov    %rax,-0x1a0(%rbp)
   195c4:	48 8b 85 58 fe ff ff 	mov    -0x1a8(%rbp),%rax
   195cb:	48 c7 00 00 00 00 00 	movq   $0x0,(%rax)
   195d2:	48 8b 85 58 fe ff ff 	mov    -0x1a8(%rbp),%rax
   195d9:	48 c7 40 08 00 00 00 	movq   $0x0,0x8(%rax)
   195e0:	00
   195e1:	48 8b 85 58 fe ff ff 	mov    -0x1a8(%rbp),%rax
   195e8:	48 c7 40 10 00 00 00 	movq   $0x0,0x10(%rax)
   195ef:	00
   195f0:	48 8b 85 48 fe ff ff 	mov    -0x1b8(%rbp),%rax
   195f7:	48 89 c7             	mov    %rax,%rdi
   195fa:	e8 99 f3 ff ff       	callq  18998 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x398>
   195ff:	48 89 c2             	mov    %rax,%rdx
   19602:	48 8b 8d 48 fe ff ff 	mov    -0x1b8(%rbp),%rcx
   19609:	48 8d 85 20 ff ff ff 	lea    -0xe0(%rbp),%rax
   19610:	48 89 ce             	mov    %rcx,%rsi
   19613:	48 89 c7             	mov    %rax,%rdi
   19616:	e8 8d f4 ff ff       	callq  18aa8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x288>
   1961b:	48 8d 05 85 6a 06 00 	lea    0x66a85(%rip),%rax        # 800a7 <_ZNSt3__112_GLOBAL__N_1L6ignoreE+0xb5>
   19622:	48 89 85 68 fe ff ff 	mov    %rax,-0x198(%rbp)
   19629:	48 8d 85 00 ff ff ff 	lea    -0x100(%rbp),%rax
   19630:	48 89 c7             	mov    %rax,%rdi
   19633:	e8 80 f3 ff ff       	callq  189b8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x378>
   19638:	48 8d 85 00 ff ff ff 	lea    -0x100(%rbp),%rax
   1963f:	48 89 85 70 fe ff ff 	mov    %rax,-0x190(%rbp)
   19646:	48 8b 85 70 fe ff ff 	mov    -0x190(%rbp),%rax
   1964d:	48 89 85 78 fe ff ff 	mov    %rax,-0x188(%rbp)
   19654:	48 8b 85 78 fe ff ff 	mov    -0x188(%rbp),%rax
   1965b:	48 89 85 80 fe ff ff 	mov    %rax,-0x180(%rbp)
   19662:	48 8b 85 78 fe ff ff 	mov    -0x188(%rbp),%rax
   19669:	48 c7 00 00 00 00 00 	movq   $0x0,(%rax)
   19670:	48 8b 85 78 fe ff ff 	mov    -0x188(%rbp),%rax
   19677:	48 c7 40 08 00 00 00 	movq   $0x0,0x8(%rax)
   1967e:	00
   1967f:	48 8b 85 78 fe ff ff 	mov    -0x188(%rbp),%rax
   19686:	48 c7 40 10 00 00 00 	movq   $0x0,0x10(%rax)
   1968d:	00
   1968e:	48 8b 85 68 fe ff ff 	mov    -0x198(%rbp),%rax
   19695:	48 89 c7             	mov    %rax,%rdi
   19698:	e8 fb f2 ff ff       	callq  18998 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x398>
   1969d:	48 89 c2             	mov    %rax,%rdx
   196a0:	48 8b 8d 68 fe ff ff 	mov    -0x198(%rbp),%rcx
   196a7:	48 8d 85 00 ff ff ff 	lea    -0x100(%rbp),%rax
   196ae:	48 89 ce             	mov    %rcx,%rsi
   196b1:	48 89 c7             	mov    %rax,%rdi
   196b4:	e8 ef f3 ff ff       	callq  18aa8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x288>
   196b9:	48 8d 95 20 ff ff ff 	lea    -0xe0(%rbp),%rdx
   196c0:	48 8d 85 00 ff ff ff 	lea    -0x100(%rbp),%rax
   196c7:	b9 39 00 00 00       	mov    $0x39,%ecx
   196cc:	48 89 c6             	mov    %rax,%rsi
   196cf:	48 89 df             	mov    %rbx,%rdi
   196d2:	e8 e9 f4 ff ff       	callq  18bc0 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x170>
   196d7:	48 8d 85 00 ff ff ff 	lea    -0x100(%rbp),%rax
   196de:	48 89 c7             	mov    %rax,%rdi
   196e1:	e8 e2 f2 ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   196e6:	48 8d 85 20 ff ff ff 	lea    -0xe0(%rbp),%rax
   196ed:	48 89 c7             	mov    %rax,%rdi
   196f0:	e8 d3 f2 ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   196f5:	48 8b 05 9c c7 07 00 	mov    0x7c79c(%rip),%rax        # 95e98 <_GLOBAL_OFFSET_TABLE_+0x638>
   196fc:	48 89 c2             	mov    %rax,%rdx
   196ff:	48 8b 05 8a c5 07 00 	mov    0x7c58a(%rip),%rax        # 95c90 <_GLOBAL_OFFSET_TABLE_+0x430>
   19706:	48 89 c6             	mov    %rax,%rsi
   19709:	48 89 df             	mov    %rbx,%rdi
   1970c:	e8 b7 f3 ff ff       	callq  18ac8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x268>
   19711:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19718:	48 8b 00             	mov    (%rax),%rax
   1971b:	48 83 c0 60          	add    $0x60,%rax
   1971f:	48 8b 00             	mov    (%rax),%rax
   19722:	48 8b 8d d8 fd ff ff 	mov    -0x228(%rbp),%rcx
   19729:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19730:	48 89 ce             	mov    %rcx,%rsi
   19733:	48 89 d7             	mov    %rdx,%rdi
   19736:	ff d0                	callq  *%rax
   19738:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   1973f:	48 8b 00             	mov    (%rax),%rax
   19742:	48 83 c0 68          	add    $0x68,%rax
   19746:	48 8b 00             	mov    (%rax),%rax
   19749:	48 8b 8d d8 fd ff ff 	mov    -0x228(%rbp),%rcx
   19750:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19757:	48 89 ce             	mov    %rcx,%rsi
   1975a:	48 89 d7             	mov    %rdx,%rdi
   1975d:	ff d0                	callq  *%rax
   1975f:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19766:	48 8b 00             	mov    (%rax),%rax
   19769:	48 83 c0 70          	add    $0x70,%rax
   1976d:	48 8b 00             	mov    (%rax),%rax
   19770:	48 8b 8d d8 fd ff ff 	mov    -0x228(%rbp),%rcx
   19777:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   1977e:	48 89 ce             	mov    %rcx,%rsi
   19781:	48 89 d7             	mov    %rdx,%rdi
   19784:	ff d0                	callq  *%rax
   19786:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   1978d:	48 8b 00             	mov    (%rax),%rax
   19790:	48 83 c0 78          	add    $0x78,%rax
   19794:	48 8b 00             	mov    (%rax),%rax
   19797:	48 8b 8d d8 fd ff ff 	mov    -0x228(%rbp),%rcx
   1979e:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   197a5:	48 89 ce             	mov    %rcx,%rsi
   197a8:	48 89 d7             	mov    %rdx,%rdi
   197ab:	ff d0                	callq  *%rax
   197ad:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   197b4:	48 8b 00             	mov    (%rax),%rax
   197b7:	48 83 c0 40          	add    $0x40,%rax
   197bb:	48 8b 00             	mov    (%rax),%rax
   197be:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   197c5:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   197cc:	48 89 ce             	mov    %rcx,%rsi
   197cf:	48 89 d7             	mov    %rdx,%rdi
   197d2:	ff d0                	callq  *%rax
   197d4:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   197db:	48 8b 00             	mov    (%rax),%rax
   197de:	48 83 c0 48          	add    $0x48,%rax
   197e2:	48 8b 00             	mov    (%rax),%rax
   197e5:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   197ec:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   197f3:	48 89 ce             	mov    %rcx,%rsi
   197f6:	48 89 d7             	mov    %rdx,%rdi
   197f9:	ff d0                	callq  *%rax
   197fb:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19802:	48 8b 00             	mov    (%rax),%rax
   19805:	48 83 c0 50          	add    $0x50,%rax
   19809:	48 8b 00             	mov    (%rax),%rax
   1980c:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   19813:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   1981a:	48 89 ce             	mov    %rcx,%rsi
   1981d:	48 89 d7             	mov    %rdx,%rdi
   19820:	ff d0                	callq  *%rax
   19822:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19829:	48 8b 00             	mov    (%rax),%rax
   1982c:	48 83 c0 58          	add    $0x58,%rax
   19830:	48 8b 00             	mov    (%rax),%rax
   19833:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   1983a:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19841:	48 89 ce             	mov    %rcx,%rsi
   19844:	48 89 d7             	mov    %rdx,%rdi
   19847:	ff d0                	callq  *%rax
   19849:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19850:	48 8b 00             	mov    (%rax),%rax
   19853:	48 83 e8 80          	sub    $0xffffffffffffff80,%rax
   19857:	48 8b 00             	mov    (%rax),%rax
   1985a:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   19861:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19868:	48 89 ce             	mov    %rcx,%rsi
   1986b:	48 89 d7             	mov    %rdx,%rdi
   1986e:	ff d0                	callq  *%rax
   19870:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19877:	48 8b 00             	mov    (%rax),%rax
   1987a:	48 05 88 00 00 00    	add    $0x88,%rax
   19880:	48 8b 00             	mov    (%rax),%rax
   19883:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   1988a:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19891:	48 89 ce             	mov    %rcx,%rsi
   19894:	48 89 d7             	mov    %rdx,%rdi
   19897:	ff d0                	callq  *%rax
   19899:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   198a0:	48 8b 00             	mov    (%rax),%rax
   198a3:	48 05 90 00 00 00    	add    $0x90,%rax
   198a9:	48 8b 00             	mov    (%rax),%rax
   198ac:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   198b3:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   198ba:	48 89 ce             	mov    %rcx,%rsi
   198bd:	48 89 d7             	mov    %rdx,%rdi
   198c0:	ff d0                	callq  *%rax
   198c2:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   198c9:	48 8b 00             	mov    (%rax),%rax
   198cc:	48 05 98 00 00 00    	add    $0x98,%rax
   198d2:	48 8b 00             	mov    (%rax),%rax
   198d5:	48 8b 8d e0 fd ff ff 	mov    -0x220(%rbp),%rcx
   198dc:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   198e3:	48 89 ce             	mov    %rcx,%rsi
   198e6:	48 89 d7             	mov    %rdx,%rdi
   198e9:	ff d0                	callq  *%rax
   198eb:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   198f2:	48 8b 00             	mov    (%rax),%rax
   198f5:	48 05 a0 00 00 00    	add    $0xa0,%rax
   198fb:	48 8b 00             	mov    (%rax),%rax
   198fe:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19905:	48 89 d7             	mov    %rdx,%rdi
   19908:	ff d0                	callq  *%rax
   1990a:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19911:	48 8b 00             	mov    (%rax),%rax
   19914:	48 05 a8 00 00 00    	add    $0xa8,%rax
   1991a:	48 8b 00             	mov    (%rax),%rax
   1991d:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19924:	48 89 d7             	mov    %rdx,%rdi
   19927:	ff d0                	callq  *%rax
   19929:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19930:	48 8b 00             	mov    (%rax),%rax
   19933:	48 05 b0 00 00 00    	add    $0xb0,%rax
   19939:	48 8b 00             	mov    (%rax),%rax
   1993c:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19943:	48 89 d7             	mov    %rdx,%rdi
   19946:	ff d0                	callq  *%rax
   19948:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   1994f:	48 8b 00             	mov    (%rax),%rax
   19952:	48 05 b8 00 00 00    	add    $0xb8,%rax
   19958:	48 8b 00             	mov    (%rax),%rax
   1995b:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19962:	48 89 d7             	mov    %rdx,%rdi
   19965:	ff d0                	callq  *%rax
   19967:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   1996e:	48 8b 00             	mov    (%rax),%rax
   19971:	48 05 c0 00 00 00    	add    $0xc0,%rax
   19977:	48 8b 00             	mov    (%rax),%rax
   1997a:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19981:	48 89 d7             	mov    %rdx,%rdi
   19984:	ff d0                	callq  *%rax
   19986:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   1998d:	48 83 c0 08          	add    $0x8,%rax
   19991:	48 89 85 88 fe ff ff 	mov    %rax,-0x178(%rbp)
   19998:	48 8b 85 88 fe ff ff 	mov    -0x178(%rbp),%rax
   1999f:	48 8b 00             	mov    (%rax),%rax
   199a2:	48 8b 10             	mov    (%rax),%rdx
   199a5:	48 81 c2 d0 01 00 00 	add    $0x1d0,%rdx
   199ac:	48 8b 12             	mov    (%rdx),%rdx
   199af:	48 89 c7             	mov    %rax,%rdi
   199b2:	ff d2                	callq  *%rdx
   199b4:	83 f0 01             	xor    $0x1,%eax
   199b7:	84 c0                	test   %al,%al
   199b9:	0f 84 b6 02 00 00    	je     19c75 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0x9f3>
   199bf:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   199c6:	48 8b 00             	mov    (%rax),%rax
   199c9:	48 05 e0 00 00 00    	add    $0xe0,%rax
   199cf:	48 8b 00             	mov    (%rax),%rax
   199d2:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   199d9:	48 89 d7             	mov    %rdx,%rdi
   199dc:	ff d0                	callq  *%rax
   199de:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   199e5:	48 8b 00             	mov    (%rax),%rax
   199e8:	48 05 e8 00 00 00    	add    $0xe8,%rax
   199ee:	48 8b 00             	mov    (%rax),%rax
   199f1:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   199f8:	48 89 d7             	mov    %rdx,%rdi
   199fb:	ff d0                	callq  *%rax
   199fd:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19a04:	48 8b 00             	mov    (%rax),%rax
   19a07:	48 05 f0 00 00 00    	add    $0xf0,%rax
   19a0d:	48 8b 00             	mov    (%rax),%rax
   19a10:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19a17:	48 89 d7             	mov    %rdx,%rdi
   19a1a:	ff d0                	callq  *%rax
   19a1c:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19a23:	48 8b 00             	mov    (%rax),%rax
   19a26:	48 05 f8 00 00 00    	add    $0xf8,%rax
   19a2c:	48 8b 00             	mov    (%rax),%rax
   19a2f:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19a36:	48 89 d7             	mov    %rdx,%rdi
   19a39:	ff d0                	callq  *%rax
   19a3b:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19a42:	48 8b 00             	mov    (%rax),%rax
   19a45:	48 05 00 01 00 00    	add    $0x100,%rax
   19a4b:	48 8b 00             	mov    (%rax),%rax
   19a4e:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19a55:	48 89 d7             	mov    %rdx,%rdi
   19a58:	ff d0                	callq  *%rax
   19a5a:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19a61:	48 8b 00             	mov    (%rax),%rax
   19a64:	48 05 08 01 00 00    	add    $0x108,%rax
   19a6a:	48 8b 00             	mov    (%rax),%rax
   19a6d:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19a74:	48 89 d7             	mov    %rdx,%rdi
   19a77:	ff d0                	callq  *%rax
   19a79:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19a80:	48 8b 00             	mov    (%rax),%rax
   19a83:	48 05 10 01 00 00    	add    $0x110,%rax
   19a89:	48 8b 00             	mov    (%rax),%rax
   19a8c:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19a93:	48 89 d7             	mov    %rdx,%rdi
   19a96:	ff d0                	callq  *%rax
   19a98:	48 8b 85 e0 fd ff ff 	mov    -0x220(%rbp),%rax
   19a9f:	48 89 85 90 fe ff ff 	mov    %rax,-0x170(%rbp)
   19aa6:	48 8b 85 90 fe ff ff 	mov    -0x170(%rbp),%rax
   19aad:	48 8b 00             	mov    (%rax),%rax
   19ab0:	48 8b 10             	mov    (%rax),%rdx
   19ab3:	48 81 c2 80 01 00 00 	add    $0x180,%rdx
   19aba:	48 8b 12             	mov    (%rdx),%rdx
   19abd:	48 89 c7             	mov    %rax,%rdi
   19ac0:	ff d2                	callq  *%rdx
   19ac2:	48 8b 85 d8 fd ff ff 	mov    -0x228(%rbp),%rax
   19ac9:	48 89 85 98 fe ff ff 	mov    %rax,-0x168(%rbp)
   19ad0:	48 8b 85 98 fe ff ff 	mov    -0x168(%rbp),%rax
   19ad7:	48 8b 00             	mov    (%rax),%rax
   19ada:	48 8b 10             	mov    (%rax),%rdx
   19add:	48 81 c2 80 01 00 00 	add    $0x180,%rdx
   19ae4:	48 8b 12             	mov    (%rdx),%rdx
   19ae7:	48 89 c7             	mov    %rax,%rdi
   19aea:	ff d2                	callq  *%rdx
   19aec:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19af3:	48 8b 00             	mov    (%rax),%rax
   19af6:	48 05 80 05 00 00    	add    $0x580,%rax
   19afc:	48 8b 00             	mov    (%rax),%rax
   19aff:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19b06:	48 89 d7             	mov    %rdx,%rdi
   19b09:	ff d0                	callq  *%rax
   19b0b:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19b12:	48 8b 00             	mov    (%rax),%rax
   19b15:	48 05 78 05 00 00    	add    $0x578,%rax
   19b1b:	48 8b 00             	mov    (%rax),%rax
   19b1e:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19b25:	48 89 d7             	mov    %rdx,%rdi
   19b28:	ff d0                	callq  *%rax
   19b2a:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19b31:	48 8b 00             	mov    (%rax),%rax
   19b34:	48 05 70 05 00 00    	add    $0x570,%rax
   19b3a:	48 8b 00             	mov    (%rax),%rax
   19b3d:	48 8b 95 e8 fd ff ff 	mov    -0x218(%rbp),%rdx
   19b44:	48 89 d7             	mov    %rdx,%rdi
   19b47:	ff d0                	callq  *%rax
   19b49:	bf 40 00 00 00       	mov    $0x40,%edi
   19b4e:	e8 cd f0 ff ff       	callq  18c20 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x110>
   19b53:	48 89 c3             	mov    %rax,%rbx
   19b56:	48 8d 05 4a 69 06 00 	lea    0x6694a(%rip),%rax        # 804a7 <_ZZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_E8__func__>
   19b5d:	48 89 85 a0 fe ff ff 	mov    %rax,-0x160(%rbp)
   19b64:	48 8d 85 60 ff ff ff 	lea    -0xa0(%rbp),%rax
   19b6b:	48 89 c7             	mov    %rax,%rdi
   19b6e:	e8 45 ee ff ff       	callq  189b8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x378>
   19b73:	48 8d 85 60 ff ff ff 	lea    -0xa0(%rbp),%rax
   19b7a:	48 89 85 a8 fe ff ff 	mov    %rax,-0x158(%rbp)
   19b81:	48 8b 85 a8 fe ff ff 	mov    -0x158(%rbp),%rax
   19b88:	48 89 85 b0 fe ff ff 	mov    %rax,-0x150(%rbp)
   19b8f:	48 8b 85 b0 fe ff ff 	mov    -0x150(%rbp),%rax
   19b96:	48 89 85 b8 fe ff ff 	mov    %rax,-0x148(%rbp)
   19b9d:	48 8b 85 b0 fe ff ff 	mov    -0x150(%rbp),%rax
   19ba4:	48 c7 00 00 00 00 00 	movq   $0x0,(%rax)
   19bab:	48 8b 85 b0 fe ff ff 	mov    -0x150(%rbp),%rax
   19bb2:	48 c7 40 08 00 00 00 	movq   $0x0,0x8(%rax)
   19bb9:	00
   19bba:	48 8b 85 b0 fe ff ff 	mov    -0x150(%rbp),%rax
   19bc1:	48 c7 40 10 00 00 00 	movq   $0x0,0x10(%rax)
   19bc8:	00
   19bc9:	48 8b 85 a0 fe ff ff 	mov    -0x160(%rbp),%rax
   19bd0:	48 89 c7             	mov    %rax,%rdi
   19bd3:	e8 c0 ed ff ff       	callq  18998 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x398>
   19bd8:	48 89 c2             	mov    %rax,%rdx
   19bdb:	48 8b 8d a0 fe ff ff 	mov    -0x160(%rbp),%rcx
   19be2:	48 8d 85 60 ff ff ff 	lea    -0xa0(%rbp),%rax
   19be9:	48 89 ce             	mov    %rcx,%rsi
   19bec:	48 89 c7             	mov    %rax,%rdi
   19bef:	e8 b4 ee ff ff       	callq  18aa8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x288>
   19bf4:	48 8b 85 e8 fd ff ff 	mov    -0x218(%rbp),%rax
   19bfb:	48 8b 00             	mov    (%rax),%rax
   19bfe:	48 05 18 01 00 00    	add    $0x118,%rax
   19c04:	48 8b 00             	mov    (%rax),%rax
   19c07:	48 8d 95 40 ff ff ff 	lea    -0xc0(%rbp),%rdx
   19c0e:	48 8b 8d e8 fd ff ff 	mov    -0x218(%rbp),%rcx
   19c15:	48 89 ce             	mov    %rcx,%rsi
   19c18:	48 89 d7             	mov    %rdx,%rdi
   19c1b:	ff d0                	callq  *%rax
   19c1d:	48 8d 95 60 ff ff ff 	lea    -0xa0(%rbp),%rdx
   19c24:	48 8d 85 40 ff ff ff 	lea    -0xc0(%rbp),%rax
   19c2b:	b9 62 00 00 00       	mov    $0x62,%ecx
   19c30:	48 89 c6             	mov    %rax,%rsi
   19c33:	48 89 df             	mov    %rbx,%rdi
   19c36:	e8 75 ed ff ff       	callq  189b0 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x380>
   19c3b:	48 8d 85 40 ff ff ff 	lea    -0xc0(%rbp),%rax
   19c42:	48 89 c7             	mov    %rax,%rdi
   19c45:	e8 7e ed ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19c4a:	48 8d 85 60 ff ff ff 	lea    -0xa0(%rbp),%rax
   19c51:	48 89 c7             	mov    %rax,%rdi
   19c54:	e8 6f ed ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19c59:	48 8b 05 f0 bd 07 00 	mov    0x7bdf0(%rip),%rax        # 95a50 <_GLOBAL_OFFSET_TABLE_+0x1f0>
   19c60:	48 89 c2             	mov    %rax,%rdx
   19c63:	48 8b 05 ee be 07 00 	mov    0x7beee(%rip),%rax        # 95b58 <_GLOBAL_OFFSET_TABLE_+0x2f8>
   19c6a:	48 89 c6             	mov    %rax,%rsi
   19c6d:	48 89 df             	mov    %rbx,%rdi
   19c70:	e8 53 ee ff ff       	callq  18ac8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x268>
   19c75:	48 8d 45 90          	lea    -0x70(%rbp),%rax
   19c79:	48 89 c7             	mov    %rax,%rdi
   19c7c:	e8 ff ee ff ff       	callq  18b80 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x1b0>
   19c81:	48 8d 45 90          	lea    -0x70(%rbp),%rax
   19c85:	48 89 c7             	mov    %rax,%rdi
   19c88:	e8 3b f0 ff ff       	callq  18cc8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x68>
   19c8d:	90                   	nop
   19c8e:	48 8b 05 f3 bc 07 00 	mov    0x7bcf3(%rip),%rax        # 95988 <_GLOBAL_OFFSET_TABLE_+0x128>
   19c95:	48 8b 5d d8          	mov    -0x28(%rbp),%rbx
   19c99:	48 33 18             	xor    (%rax),%rbx
   19c9c:	0f 84 cc 00 00 00    	je     19d6e <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xaec>
   19ca2:	e9 c2 00 00 00       	jmpq   19d69 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xae7>
   19ca7:	49 89 c4             	mov    %rax,%r12
   19caa:	48 8d 85 c0 fe ff ff 	lea    -0x140(%rbp),%rax
   19cb1:	48 89 c7             	mov    %rax,%rdi
   19cb4:	e8 0f ed ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19cb9:	eb 03                	jmp    19cbe <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xa3c>
   19cbb:	49 89 c4             	mov    %rax,%r12
   19cbe:	48 8d 85 e0 fe ff ff 	lea    -0x120(%rbp),%rax
   19cc5:	48 89 c7             	mov    %rax,%rdi
   19cc8:	e8 fb ec ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19ccd:	eb 03                	jmp    19cd2 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xa50>
   19ccf:	49 89 c4             	mov    %rax,%r12
   19cd2:	48 89 df             	mov    %rbx,%rdi
   19cd5:	e8 76 ea ff ff       	callq  18750 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x5e0>
   19cda:	4c 89 e3             	mov    %r12,%rbx
   19cdd:	eb 73                	jmp    19d52 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xad0>
   19cdf:	49 89 c4             	mov    %rax,%r12
   19ce2:	48 8d 85 00 ff ff ff 	lea    -0x100(%rbp),%rax
   19ce9:	48 89 c7             	mov    %rax,%rdi
   19cec:	e8 d7 ec ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19cf1:	eb 03                	jmp    19cf6 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xa74>
   19cf3:	49 89 c4             	mov    %rax,%r12
   19cf6:	48 8d 85 20 ff ff ff 	lea    -0xe0(%rbp),%rax
   19cfd:	48 89 c7             	mov    %rax,%rdi
   19d00:	e8 c3 ec ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19d05:	eb 03                	jmp    19d0a <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xa88>
   19d07:	49 89 c4             	mov    %rax,%r12
   19d0a:	48 89 df             	mov    %rbx,%rdi
   19d0d:	e8 3e ea ff ff       	callq  18750 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x5e0>
   19d12:	4c 89 e3             	mov    %r12,%rbx
   19d15:	eb 3b                	jmp    19d52 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xad0>
   19d17:	49 89 c4             	mov    %rax,%r12
   19d1a:	48 8d 85 40 ff ff ff 	lea    -0xc0(%rbp),%rax
   19d21:	48 89 c7             	mov    %rax,%rdi
   19d24:	e8 9f ec ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19d29:	eb 03                	jmp    19d2e <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xaac>
   19d2b:	49 89 c4             	mov    %rax,%r12
   19d2e:	48 8d 85 60 ff ff ff 	lea    -0xa0(%rbp),%rax
   19d35:	48 89 c7             	mov    %rax,%rdi
   19d38:	e8 8b ec ff ff       	callq  189c8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x368>
   19d3d:	eb 03                	jmp    19d42 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xac0>
   19d3f:	49 89 c4             	mov    %rax,%r12
   19d42:	48 89 df             	mov    %rbx,%rdi
   19d45:	e8 06 ea ff ff       	callq  18750 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x5e0>
   19d4a:	4c 89 e3             	mov    %r12,%rbx
   19d4d:	eb 03                	jmp    19d52 <_ZN14vmcs_intel_x646launchERKNSt3__110shared_ptrI20vmcs_intel_x64_stateEES5_+0xad0>
   19d4f:	48 89 c3             	mov    %rax,%rbx
   19d52:	48 8d 45 90          	lea    -0x70(%rbp),%rax
   19d56:	48 89 c7             	mov    %rax,%rdi
   19d59:	e8 6a ef ff ff       	callq  18cc8 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x68>
   19d5e:	48 89 d8             	mov    %rbx,%rax
   19d61:	48 89 c7             	mov    %rax,%rdi
   19d64:	e8 27 ec ff ff       	callq  18990 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x3a0>
   19d69:	e8 b2 eb ff ff       	callq  18920 <_ZN14vmcs_intel_x64C1ERKNSt3__110shared_ptrI20intrinsics_intel_x64EE-0x410>
   19d6e:	48 81 c4 18 02 00 00 	add    $0x218,%rsp
   19d75:	5b                   	pop    %rbx
   19d76:	41 5a                	pop    %r10
   19d78:	41 5c                	pop    %r12
   19d7a:	5d                   	pop    %rbp
   19d7b:	49 8d 62 f8          	lea    -0x8(%r10),%rsp
   19d7f:	c3                   	retq
Comment 3 Andrew Pinski 2016-07-23 05:20:43 UTC
(In reply to Andrew Pinski from comment #1)
> Can you attach the preprocessed source that goes with dwarf expressions you
> listed?  Also can you attach the assembly code that is produced?

What I meant is provide the two files produced by -save-temps :).
Comment 4 Rian Quinn 2016-07-23 05:31:05 UTC
Is this it? Never done that before:
https://github.com/rianquinn/hypervisor/tree/expression_support/tmp
Comment 5 Rian Quinn 2016-08-03 16:51:20 UTC
Turns out this was an issue with our unwinder. For whatever reason, I missed the "DW_OP_deref" opcode in the output which was needed to make all of this make sense. Our unwinder was missing the last instruction as we were using "<" instead of "<=". 

I closed this as the bug is invalid.