Bug 67211 - [5 Regression] ICE (insn does not satisfy its constraints) on powerpc64le-linux-gnu
Summary: [5 Regression] ICE (insn does not satisfy its constraints) on powerpc64le-lin...
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 5.2.1
: P3 normal
Target Milestone: 5.3
Assignee: Michael Meissner
URL:
Keywords: ice-on-valid-code
Depends on:
Blocks:
 
Reported: 2015-08-14 07:12 UTC by Matthias Klose
Modified: 2015-08-24 20:39 UTC (History)
6 users (show)

See Also:
Host:
Target: powerpc64le-linux-gnu
Build:
Known to work: 4.9.3, 6.0
Known to fail: 5.2.1
Last reconfirmed: 2015-08-14 00:00:00


Attachments
Proposed patch to fix the problem (1.04 KB, patch)
2015-08-19 18:13 UTC, Michael Meissner
Details | Diff
Proposed patch to fix the problem (#2) (1.05 KB, patch)
2015-08-19 18:51 UTC, Michael Meissner
Details | Diff
Patch to fix problem for gcc 5.x that was submitted to gcc-patches (1.97 KB, patch)
2015-08-20 21:27 UTC, Michael Meissner
Details | Diff
Patch to fix problem for gcc 6.x that was submitted to gcc-patches (1.94 KB, patch)
2015-08-20 21:28 UTC, Michael Meissner
Details | Diff

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Description Matthias Klose 2015-08-14 07:12:21 UTC
seen with r226731 from the gcc-5-branch, fails with -O3, succeeds with -O2. on powerpc64le-linux-gnu. not seen with r226068 on the trunk.

$ g++ -c -g -O3 structure.ii
structure.ii:38:3: warning: anonymous type with no linkage used to declare variable '<anonymous struct> a' with linkage
 } a;
   ^
structure.ii: In function 'void Linked()':
structure.ii:42:1: error: insn does not satisfy its constraints:
 }
 ^
(insn 305 170 306 8 (set (reg:DI 9 9)
        (reg/f:DI 63 31 [orig:184 p3$_M_node ] [184])) structure.ii:20 554 {*movdi_internal64}
     (nil))
structure.ii:42:1: internal compiler error: in extract_constrain_insn, at recog.c:2246
0x107528d3 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
        ../../src/gcc/rtl-error.c:110
0x1075292b _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
        ../../src/gcc/rtl-error.c:121
0x1071b7e7 extract_constrain_insn(rtx_insn*)
        ../../src/gcc/recog.c:2246
0x106f8527 reload_cse_simplify_operands
        ../../src/gcc/postreload.c:430
0x106f9983 reload_cse_simplify
        ../../src/gcc/postreload.c:207
0x106f9983 reload_cse_regs_1
        ../../src/gcc/postreload.c:246
0x106fb697 reload_cse_regs
        ../../src/gcc/postreload.c:94
0x106fb697 execute
        ../../src/gcc/postreload.c:2387
Please submit a full bug report,
with preprocessed source if appropriate.

$ cat structure.ii
template <typename _InputIterator, typename _ForwardIterator>
void find_first_of(_InputIterator, _InputIterator, _ForwardIterator p3,
                   _ForwardIterator p4) {
  for (; p3 != p4; ++p3)
    ;
}

template <typename, typename, typename> struct A {
  int _S_buffer_size;
  int *_M_cur;
  int *_M_first;
  int *_M_last;
  int **_M_node;
  void operator++() {
    if (_M_cur == _M_last)
      m_fn1(_M_node + 1);
  }
  void m_fn1(int **p1) {
    _M_node = p1;
    _M_first = *p1;
    _M_last = _M_first + _S_buffer_size;
  }
};

template <typename _Tp, typename _Ref, typename _Ptr>
bool operator==(A<_Tp, _Ref, _Ptr>, A<_Tp, _Ref, _Ptr>);
template <typename _Tp, typename _Ref, typename _Ptr>
bool operator!=(A<_Tp, _Ref, _Ptr> p1, A<_Tp, _Ref, _Ptr> p2) {
  return p1 == p2;
}

class B {
public:
  A<int, int, int> m_fn2();
};
struct {
  B j;
} a;
void Linked() {
  A<int, int, int> b, c, d;
  find_first_of(d, c, b, a.j.m_fn2());
}
Comment 1 Markus Trippelsdorf 2015-08-14 07:39:00 UTC
I cannot reproduce this with:
gcc version 5.2.1 20150814 (GCC)

Please post the full output of -v invocation.
Comment 2 Matthias Klose 2015-08-14 08:02:46 UTC
Using built-in specs.
COLLECT_GCC=g++
Target: powerpc64le-linux-gnu
Configured with: ../src/configure -v --with-pkgversion='Ubuntu 5.2.1-15ubuntu1' --with-bugurl=file:///usr/share/doc/gcc-5/README.Bugs --enable-languages=c,ada,c++,java,go,d,fortran,objc,obj-c++ --prefix=/usr --program-suffix=-5 --enable-shared --enable-linker-build-id --libexecdir=/usr/lib --without-included-gettext --enable-threads=posix --libdir=/usr/lib --enable-nls --with-sysroot=/ --enable-clocale=gnu --enable-libstdcxx-debug --enable-libstdcxx-time=yes --with-default-libstdcxx-abi=new --enable-gnu-unique-object --disable-libquadmath --enable-plugin --with-system-zlib --disable-browser-plugin --enable-java-awt=gtk --enable-gtk-cairo --with-java-home=/usr/lib/jvm/java-1.5.0-gcj-5-ppc64el/jre --enable-java-home --with-jvm-root-dir=/usr/lib/jvm/java-1.5.0-gcj-5-ppc64el --with-jvm-jar-dir=/usr/lib/jvm-exports/java-1.5.0-gcj-5-ppc64el --with-arch-directory=ppc64 --with-ecj-jar=/usr/share/java/eclipse-ecj.jar --enable-objc-gc --enable-secureplt --with-cpu=power7 --with-tune=power8 --disable-multilib --enable-multiarch --disable-werror --with-long-double-128 --enable-checking=release --build=powerpc64le-linux-gnu --host=powerpc64le-linux-gnu --target=powerpc64le-linux-gnu
Thread model: posix
gcc version 5.2.1 20150808 (Ubuntu 5.2.1-15ubuntu1) 
COLLECT_GCC_OPTIONS='-v' '-c' '-g' '-O3' '-shared-libgcc' '-mtune=power8' '-mcpu=power7'
 /usr/lib/gcc/powerpc64le-linux-gnu/5/cc1plus -fpreprocessed structure.ii -msecure-plt -quiet -dumpbase structure.ii -mtune=power8 -mcpu=power7 -auxbase structure -g -O3 -version -fstack-protector-strong -Wformat -Wformat-security -o /tmp/ccbsT2XQ.s
GNU C++ (Ubuntu 5.2.1-15ubuntu1) version 5.2.1 20150808 (powerpc64le-linux-gnu)
	compiled by GNU C version 5.2.1 20150808, GMP version 6.0.0, MPFR version 3.1.3, MPC version 1.0.3
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
GNU C++ (Ubuntu 5.2.1-15ubuntu1) version 5.2.1 20150808 (powerpc64le-linux-gnu)
	compiled by GNU C version 5.2.1 20150808, GMP version 6.0.0, MPFR version 3.1.3, MPC version 1.0.3
GGC heuristics: --param ggc-min-expand=100 --param ggc-min-heapsize=131072
Compiler executable checksum: 01b1e70cc2d1c174675506164f1d0933
structure.ii:38:3: warning: anonymous type with no linkage used to declare variable '<anonymous struct> a' with linkage
 } a;
   ^
structure.ii: In function 'void Linked()':
structure.ii:42:1: error: insn does not satisfy its constraints:
 }
 ^
(insn 305 170 306 8 (set (reg:DI 9 9)
        (reg/f:DI 63 31 [orig:184 p3$_M_node ] [184])) structure.ii:20 554 {*movdi_internal64}
     (nil))
structure.ii:42:1: internal compiler error: in extract_constrain_insn, at recog.c:2246
0x107528d3 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*)
	../../src/gcc/rtl-error.c:110
0x1075292b _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
	../../src/gcc/rtl-error.c:121
0x1071b7e7 extract_constrain_insn(rtx_insn*)
	../../src/gcc/recog.c:2246
0x106f8527 reload_cse_simplify_operands
	../../src/gcc/postreload.c:430
0x106f9983 reload_cse_simplify
	../../src/gcc/postreload.c:207
0x106f9983 reload_cse_regs_1
	../../src/gcc/postreload.c:246
0x106fb697 reload_cse_regs
	../../src/gcc/postreload.c:94
0x106fb697 execute
	../../src/gcc/postreload.c:2387
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <file:///usr/share/doc/gcc-5/README.Bugs> for instructions.
Comment 3 Markus Trippelsdorf 2015-08-14 10:19:30 UTC
Confirmed.

ICEs with:
g++ -c -mtune=power8 -mcpu=power7 -O3 con.ii
Comment 4 Markus Trippelsdorf 2015-08-14 10:23:41 UTC
The question is if -mtune=power8 -mcpu=power7 if valid for powerpc64le.

I think the minimal CPU supported for little-endian is POWER8.
Comment 5 Markus Trippelsdorf 2015-08-14 12:54:28 UTC
Closing.
You should configure gcc --with-cpu=power8 for powerpc64le on Ubuntu.
Comment 6 Bill Schmidt 2015-08-14 13:39:29 UTC
Re-opening.  Canonical has reasons to use these particular flags for their builds at this time.
Comment 7 Segher Boessenkool 2015-08-18 16:07:31 UTC
Also the compiler should not crash anyway; if some -mcpu= cannot work,
the compiler should detect that and fail with an informative message.
ICEing is a bit harsh.
Comment 8 Michael Meissner 2015-08-19 18:06:19 UTC
A preliminary analysis is -mefficient-unaligned-vector is set in rs6000_option_override_internal if -mtune=power8 is used. Note, this code uses a variable 'rs6000_cpu' to indicate the tuning cpu, not the target cpu. Now, long term we probably should audit the uses of rs6000_cpu to see if they are related to tuning or arch, and possibly add rs6000_tune for those conditions.

Setting efficient unaligned vector is wrong for a tuning option. I believe the best approach is to make -mefficient-unaligned-vector a normal masked option in rs6000_isa. This will allow future processors to specify this option, rather than going through the code to find (rs6000_cpu == PROCESSOR_POWER8) and adjust it.

The reason unaligned fast vector support enables the bug is it enables the option to convert adjacent DImode structure mode members into V2DImode. The code builds V2DImode vectors in the VSX registers to copy the structure. At the end of the function, there is a reference to one of the elements, and reload is trying to combine this with the previous load. But it doesn't have a move direct operation on a power7 cpu.

The code for power8 looks like:
        lfd 31,320(1)
        ...
        mtvsrd 12,9
        ...
        xxpermdi 63,12,31,0
        stxvd2x 63,1,26
        ...
        mfvsrd 9,31
        addi 9,9,8
        ld 10,0(9)
.LVL14:
        mtvsrd 31,9
.LVL15:
        .loc 1 24 0
        add 9,10,21

In this case, it probably doesn't win to aggregate the structure members as V2DImode, since it involves a lot of moves and xxpermdi's.

I haven't tracked down why it doesn't fail on trunk compared to the GCC 5 branch.
Comment 9 Michael Meissner 2015-08-19 18:13:24 UTC
Created attachment 36217 [details]
Proposed patch to fix the problem

This patch makes -mefficient-unaligned-vsx set on -mcpu=power8 instead of -mtune=power8.
Comment 10 Michael Meissner 2015-08-19 18:51:08 UTC
Created attachment 36218 [details]
Proposed patch to fix the problem (#2)

Bill convinced me that we need setting ALLOW_MOVMISALIGN to 1 if power8. This patch fixes that.
Comment 11 Michael Meissner 2015-08-20 21:27:34 UTC
Created attachment 36230 [details]
Patch to fix problem for gcc 5.x that was submitted to gcc-patches
Comment 12 Michael Meissner 2015-08-20 21:28:20 UTC
Created attachment 36231 [details]
Patch to fix problem for gcc 6.x that was submitted to gcc-patches

[gcc]
2015-08-20  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Set
	-mefficient-unaligned-vsx on ISA 2.7.

	* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Convert
	option to a masked option.

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rework
	logic for -mefficient-unaligned-vsx so that it is set via an arch
	ISA option, instead of being set if -mtune=power8 is set. Move
	-mefficient-unaligned-vsx and -mallow-movmisalign handling to be
	near other default option handling.

[gcc/testsuite]
2015-08-20  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* g++.dg/pr67211.C: New test.
Comment 13 Michael Meissner 2015-08-24 18:43:34 UTC
Author: meissner
Date: Mon Aug 24 18:43:02 2015
New Revision: 227144

URL: https://gcc.gnu.org/viewcvs?rev=227144&root=gcc&view=rev
Log:
[gcc]
2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Set
	-mefficient-unaligned-vsx on ISA 2.7.

	* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Convert
	option to a masked option.

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rework
	logic for -mefficient-unaligned-vsx so that it is set via an arch
	ISA option, instead of being set if -mtune=power8 is set. Move
	-mefficient-unaligned-vsx and -mallow-movmisalign handling to be
	near other default option handling.

[gcc/testsuite]
2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* g++.dg/pr67211.C: New test.


Added:
    trunk/gcc/testsuite/g++.dg/pr67211.C
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000-cpus.def
    trunk/gcc/config/rs6000/rs6000.c
    trunk/gcc/config/rs6000/rs6000.opt
    trunk/gcc/testsuite/ChangeLog
Comment 14 Michael Meissner 2015-08-24 19:11:33 UTC
Author: meissner
Date: Mon Aug 24 19:11:02 2015
New Revision: 227146

URL: https://gcc.gnu.org/viewcvs?rev=227146&root=gcc&view=rev
Log:
[gcc]
2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Set
	-mefficient-unaligned-vsx on ISA 2.7.

	* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Convert
	option to a masked option.

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rework
	logic for -mefficient-unaligned-vsx so that it is set via an arch
	ISA option, instead of being set if -mtune=power8 is set. Move
	-mefficient-unaligned-vsx and -mallow-movmisalign handling to be
	near other default option handling.

[gcc/testsuite]
2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* g++.dg/pr67211.C: New test.


Added:
    branches/gcc-5-branch/gcc/testsuite/g++.dg/pr67211.C
      - copied unchanged from r227144, trunk/gcc/testsuite/g++.dg/pr67211.C
Modified:
    branches/gcc-5-branch/gcc/ChangeLog
    branches/gcc-5-branch/gcc/config/rs6000/rs6000-cpus.def
    branches/gcc-5-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-5-branch/gcc/config/rs6000/rs6000.opt
    branches/gcc-5-branch/gcc/testsuite/ChangeLog
Comment 15 Michael Meissner 2015-08-24 20:37:07 UTC
Author: meissner
Date: Mon Aug 24 20:36:35 2015
New Revision: 227149

URL: https://gcc.gnu.org/viewcvs?rev=227149&root=gcc&view=rev
Log:
[gcc]
2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Set
	-mefficient-unaligned-vsx on ISA 2.7.

	* config/rs6000/rs6000.opt (-mefficient-unaligned-vsx): Convert
	option to a masked option.

	* config/rs6000/rs6000.c (rs6000_option_override_internal): Rework
	logic for -mefficient-unaligned-vsx so that it is set via an arch
	ISA option, instead of being set if -mtune=power8 is set. Move
	-mefficient-unaligned-vsx and -mallow-movmisalign handling to be
	near other default option handling.

[gcc/testsuite]
2015-08-24  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/67211
	* g++.dg/pr67211.C: New test.


Added:
    branches/gcc-4_9-branch/gcc/testsuite/g++.dg/pr67211.C
      - copied unchanged from r227144, trunk/gcc/testsuite/g++.dg/pr67211.C
Modified:
    branches/gcc-4_9-branch/gcc/ChangeLog
    branches/gcc-4_9-branch/gcc/config/rs6000/rs6000-cpus.def
    branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.c
    branches/gcc-4_9-branch/gcc/config/rs6000/rs6000.opt
    branches/gcc-4_9-branch/gcc/testsuite/ChangeLog
Comment 16 Michael Meissner 2015-08-24 20:39:29 UTC
Trunk fixed in subversion id 227144. Gcc 5 branch fixed in 227146. Gcc 4.9 branch fixes in 227149.