Bug 65139 - Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns
Summary: Improve register allocation for aarch64_*_sisd_or_int<mode>3 patterns
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: unknown
: P3 enhancement
Target Milestone: 6.0
Assignee: kugan
URL:
Keywords: missed-optimization
Depends on:
Blocks:
 
Reported: 2015-02-20 14:02 UTC by Maxim Kuvyrkov
Modified: 2023-05-16 17:57 UTC (History)
0 users

See Also:
Host:
Target: aarch64-*-*
Build:
Known to work:
Known to fail:
Last reconfirmed: 2015-02-20 00:00:00


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Description Maxim Kuvyrkov 2015-02-20 14:02:51 UTC
Following discussion in http://thread.gmane.org/gmane.comp.gcc.patches/336162 , review usage of early clobber in aarch64_lshr_sisd_or_int_≤mode>3, aarch64_ashr_sisd_or_int_≤mode>3, and, maybe, other patterns.  Convert them to use (match_scratch) and compare quality of generated code between the two approaches.

In theory, (match_scratch) should give more freedom to RA, but this requires double-checking.
Comment 1 ktkachov 2015-02-20 14:06:42 UTC
Thanks for opening this, I was about to open this myself.
I guess this should be done for GCC 6
Comment 2 Jakub Jelinek 2016-04-27 10:56:06 UTC
GCC 6.1 has been released.
Comment 3 Jakub Jelinek 2016-12-21 10:55:30 UTC
GCC 6.3 is being released, adjusting target milestone.
Comment 4 Maxim Kuvyrkov 2017-06-06 07:30:01 UTC
Kugan posted a patch for this, but it was rejected.

Kugan, would you please put a link to your patch in the comments and unassign yourself (unless you plan to work on this further).

Thanks.
Comment 5 Richard Biener 2017-07-04 08:43:59 UTC
GCC 6.4 is being released, adjusting target milestone.
Comment 6 Andrew Pinski 2023-05-16 17:57:01 UTC
Fixed in GCC 6:
r6-2459-gad7b853a10903e