The four additional QI_REGISTERS that were added for X86-64 have been mistakenly made available for use in ia32 mode. The assembler however will then correctly refuse to assemble them. Release: i686-pc-cygwin 3.2 20020402 Environment: $ gcc -v Reading specs from /usr/local/lib/gcc-lib/i686-pc-cygwin/3.2/specs Configured with: /CVSTree/gcc/configure --with-included-gettext Thread model: single gcc version 3.2 20020402 (experimental) How-To-Repeat: gcc -march=athlon -O3 i8085.i -o i8085.o will result in: i8085.s: Assembler messages: i8085.s:4928: Error: Extended register `%sil' available only in 64bit mode. i8085.s:5058: Error: Extended register `%dil' available only in 64bit mode. i8085.s:5174: Error: Extended register `%sil' available only in 64bit mode. i8085.s:5310: Error: Extended register `%dil' available only in 64bit mode. i8085.s:5547: Error: Extended register `%sil' available only in 64bit mode.
State-Changed-From-To: open->analyzed State-Changed-Why: Reduced into: /* { dg-options "-O2 -frename-registers" } */ typedef union { struct { unsigned char l, h; } b; unsigned int d; } A; typedef struct { A b0, b1, b2, b3, b4, b5; } B; static B b; extern unsigned char *x; unsigned int y; unsigned char foo (unsigned int); static inline unsigned short bar (void) { unsigned short w; w = x [b.b0.d & y]; b.b0.b.l++; w += x [b.b0.d & y] << 8; b.b0.b.l++; return w; } static inline unsigned char baz (unsigned int a) { return foo (a); } void __attribute__ ((noinline)) die (int x) { switch (x) { default: b.b5.d = bar (); break; case 0: __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l) : "r" (b.b2.b.h), "0" (b.b1.b.h)); break; case 2: __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l) : "r" (b.b3.b.h), "0" (b.b1.b.h)); break; case 5: __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l) : "r" (b.b4.b.l), "0" (b.b1.b.h)); break; case 6: __asm__ ("movb %2, %1" : "=g" (b.b1.b.h), "=a" (b.b1.b.l) : "r" (baz (b.b4.d)), "0" (b.b1.b.h)); break; } } int main (void) { die (6); return 0; } The problem is in -frename-registers which decides to put what was formely in %al into %sil.
State-Changed-From-To: analyzed->closed State-Changed-Why: See http://gcc.gnu.org/ml/gcc-patches/2002-04/msg00126.html You need to use "q" constraints, not "r".
From: kelley.r.cook@gm.com To: gcc-bugs@gcc.gnu.org, gcc-gnats@gcc.gnu.org Cc: jh@suse.cz Subject: Re: target/6142: sil, dil, spl, bpl are being used in ia32 compiles Date: Mon, 20 May 2002 12:24:36 -0400 This patch, http://gcc.gnu.org/ml/gcc-patches/2002-05/msg01512.html by Jan Hubicka also fixes this (prematurely closed, IMO) PR. Kelley Cook