GCC Bugzilla – Bug 57150
GCC when targeting power7 spills long double using VSX instructions.
Last modified: 2013-05-07 16:26:02 UTC
Created attachment 30008 [details]
Cut down example to show the problem, using -mcpu=power7 -m64
In the glibc file e_scalbl.c, the compiler is using VSX stxvd2x and lxvd2x instructions to spill long double, even though only 1/2 of the register is used. The compiler should use scalar load/store instructions.
Created attachment 30009 [details]
This goes back to the original VSX submission for GCC 4.5.
While the code is slow, it does appear to be correct.
It shows up due to -fcaller-saves, which creates a V2DF save area.
Created attachment 30028 [details]
Patch to use scalar modes for TF/TD caller saves.
Fixed in subversion id 198593.