GCC Bugzilla has been upgraded from version 4.4.9 to 5.0rc3. If you see any problem, please report it to bug 64968.
Bug 48143 - [4.6 Regression] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7114 with custom flags
Summary: [4.6 Regression] ICE: in reset_sched_cycles_in_current_ebb, at sel-sched.c:71...
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: rtl-optimization (show other bugs)
Version: 4.7.0
: P3 normal
Target Milestone: 4.6.1
Assignee: Andrey Belevantsev
URL:
Keywords: ice-on-valid-code
Depends on:
Blocks:
 
Reported: 2011-03-16 02:15 UTC by Zdenek Sojka
Modified: 2011-04-01 11:09 UTC (History)
4 users (show)

See Also:
Host: x86_64-pc-linux-gnu
Target: x86_64-pc-linux-gnu
Build:
Known to work: 4.7.0
Known to fail: 4.6.0
Last reconfirmed: 2011-03-16 07:33:21


Attachments
reduced testcase (160 bytes, text/plain)
2011-03-16 02:15 UTC, Zdenek Sojka
Details

Note You need to log in before you can comment on or make changes to this bug.
Description Zdenek Sojka 2011-03-16 02:15:30 UTC
Created attachment 23675 [details]
reduced testcase

Compiler output:
$ gcc -ftree-vectorize -O2 -fno-dce -fno-ivopts -fsel-sched-pipelining -fselective-scheduling2 -funroll-loops --param=max-cse-insns=50 --param=max-pending-list-length=50 testcase.c
testcase.c: In function ‘foo’:
testcase.c:13:1: internal compiler error: in reset_sched_cycles_in_current_ebb, at sel-sched.c:7114
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.

Tested revisions:
r171001 - crash
4.6 r170955 - crash
4.5 r170955 - OK
Comment 1 Andrey Belevantsev 2011-03-16 07:33:21 UTC
Confirmed, I will take a look.
Comment 2 Andrey Belevantsev 2011-03-18 14:35:30 UTC
We ICE because we again issue more than issue_rate insns.  And this happens because we hit an insn which does not modify the DFA state at all, thus we do not account for it when checking that we obey issue_rate limits.  The insn is coming from sse2_cvtps2pd pattern of sse.md and it doesn't have a reservation (has "nothing").

I don't have any idea how the pattern attributes should be fixed, but the following seems to work on the test case.  Uros, does this make sense?


diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index ba2bf24..71c4bb7 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -2878,6 +2878,7 @@
    (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "V2DF")
    (set_attr "prefix_data16" "0")
+   (set_attr "athlon_decode" "double")
    (set_attr "amdfam10_decode" "direct")
    (set_attr "bdver1_decode" "double")])
Comment 3 Uroš Bizjak 2011-03-18 16:39:36 UTC
(In reply to comment #2)
> We ICE because we again issue more than issue_rate insns.  And this happens
> because we hit an insn which does not modify the DFA state at all, thus we do
> not account for it when checking that we obey issue_rate limits.  The insn is
> coming from sse2_cvtps2pd pattern of sse.md and it doesn't have a reservation
> (has "nothing").
> 
> I don't have any idea how the pattern attributes should be fixed, but the
> following seems to work on the test case.  Uros, does this make sense?

Sure, but there are some other patterns missing athlon_decode attribute:

*sse2_cvtpd2dq
*sse2_cvttpd2dq
sse2_cvtss2sd
*sse2_cvtpd2ps
sse2_cvtps2pd

Can you please add missing athlon_decode attribute also for these?

Patch is pre-approved for 4.7 and needs RM approval for 4.6.
Comment 4 Steven Bosscher 2011-03-19 16:51:02 UTC
Is it possible to check for this kind of problem in genautomata?
Comment 5 Andrey Belevantsev 2011-03-22 12:34:02 UTC
Author: abel
Date: Tue Mar 22 12:33:53 2011
New Revision: 171286

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171286
Log:
        PR rtl-optimization/48143
        * config/i386/sse.md (*sse2_cvtpd2dq): Add athlon_decode attribute.
        (*sse2_cvttpd2dq, sse2_cvtss2sd, *sse2_cvtpd2ps,
        sse2_cvtps2pd): Likewise.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/sse.md
Comment 6 Jakub Jelinek 2011-03-25 19:52:49 UTC
GCC 4.6.0 is being released, adjusting target milestone.
Comment 7 Jakub Jelinek 2011-03-31 11:37:03 UTC
Do you plan to backport this to 4.6 branch?
Comment 8 Andrey Belevantsev 2011-03-31 11:44:46 UTC
(In reply to comment #7)
> Do you plan to backport this to 4.6 branch?
Sure, I was just waiting for 4.6.0 to take off.
Comment 9 Andrey Belevantsev 2011-04-01 11:07:47 UTC
Author: abel
Date: Fri Apr  1 11:07:44 2011
New Revision: 171825

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171825
Log:
        Backport from mainline
        2011-03-22  Andrey Belevantsev  <abel@ispras.ru>

        PR rtl-optimization/48143
        * config/i386/sse.md (*sse2_cvtpd2dq): Add athlon_decode attribute.
        (*sse2_cvttpd2dq, sse2_cvtss2sd, *sse2_cvtpd2ps,
        sse2_cvtps2pd): Likewise.


Modified:
    branches/gcc-4_6-branch/gcc/ChangeLog
    branches/gcc-4_6-branch/gcc/config/i386/sse.md
Comment 10 Andrey Belevantsev 2011-04-01 11:09:10 UTC
Fixed on trunk and 4.6.