Bug 46934 - gcc ICE: error: unrecognizable insn: in extract_insn, at recog.c:2109
Summary: gcc ICE: error: unrecognizable insn: in extract_insn, at recog.c:2109
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 4.6.0
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords: ice-on-valid-code
Depends on:
Blocks:
 
Reported: 2010-12-14 06:06 UTC by Khem Raj
Modified: 2011-09-19 06:17 UTC (History)
2 users (show)

See Also:
Host: x86_64-linux
Target: arm-none-linux-gnueabi
Build: x86_64-linux
Known to work: 4.3.3
Known to fail: 4.6.0
Last reconfirmed: 2010-12-14 09:31:56


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Description Khem Raj 2010-12-14 06:06:28 UTC
attached testcase reduced from samba when building for armvte/thumb with -Os caused a gcc ICE with 4.6.0. Note that it works ok for arm mode and for other opt levels than -Os

arm-none-linux-gnueabi-gcc-4.6.0 -mthumb -Os cli_reg.i -S

cli_reg.i: In function ‘caller’:
cli_reg.i:20:1: error: unrecognizable insn:
(insn 6 5 7 3 (set (reg:SI 137)
        (plus:SI (reg/v:SI 136 [ reg_type ])
            (const_int 2147483648 [0x80000000]))) cli_reg.i:4 -1
     (nil))
cli_reg.i:20:1: internal compiler error: in extract_insn, at recog.c:2109
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.


testcase

$ cat cli_reg.i
int caller(unsigned int reg_type)
{

 switch (reg_type)
 {
 case 0x80000000:
  return (int)foo();

 case 0x80000003:
  return (int) bar();

 case 0x80000001:
  return (int) baz();

 case 0x80000004:
  return (int) fooz();

 }

}
Comment 1 Ramana Radhakrishnan 2010-12-14 09:31:56 UTC
Confirmed.
Comment 2 Chung-Lin Tang 2010-12-23 10:09:29 UTC
I think this can be solved by changing the predicate of operand[2] in *thumb1_addsi3 to "reg_or_int_operand". This allows later passes like reload to do its job.

However, after the above change, I see another ICE during reload:
h.c:16:1: error: unrecognizable insn:
(insn 88 3 6 2 (set (reg:SI 3 r3)
        (const_int 2147483648 [0x80000000])) h.c:5 -1
     (nil))
h.c:16:1: internal compiler error: in extract_insn, at recog.c:2127

This turns out to be because, the generic 'general_operand' predicate used in thumb1_movsi_insn does a "trunc_int_for_mode (INTVAL(op), mode) == INTVAL(op)" test, and 0x80000000 (2147483648) gets negated due to the sign-extension in trunc_int_for_mode(), failing the equality test:

trunc_int_for_mode(2147483648, SImode) == -2147483648 (0xFFFFFFFF80000000)

We can probably fix this by using another ARM predicate in this case, though this boundary case of trunc_int_for_mode() is troubling, as the above truncate-and-test-for-equality idiom seems quite common in the compiler.
Comment 3 Chung-Lin Tang 2011-03-23 14:48:38 UTC
Please disregard the above comments, I think this is an ARM backend problem after all.
Comment 4 Chung-Lin Tang 2011-03-24 02:47:58 UTC
Author: cltang
Date: Thu Mar 24 02:47:55 2011
New Revision: 171379

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171379
Log:
2011-03-23  Chung-Lin Tang  <cltang@codesourcery.com>

	PR target/46934
	* config/arm/arm.md (casesi): Use the gen_int_mode() function
	to subtract lower bound instead of GEN_INT().

	testsuite/
	* gcc.target/arm/pr46934.c: New.

Added:
    trunk/gcc/testsuite/gcc.target/arm/pr46934.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/arm/arm.md
    trunk/gcc/testsuite/ChangeLog
Comment 5 Jakub Jelinek 2011-03-25 19:51:58 UTC
GCC 4.6.0 is being released, adjusting target milestone.
Comment 6 Chung-Lin Tang 2011-05-16 08:09:48 UTC
This is fixed now.
Comment 7 jye2 2011-09-19 06:17:58 UTC
Author: jye2
Date: Mon Sep 19 06:17:45 2011
New Revision: 178953

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=178953
Log:
2011-09-19  chengbin  <bin.cheng@arm.com>

	Backport r174035 from mainline
	2011-05-22  Tom de Vries  <tom@codesourcery.com>

	PR middle-end/48689
	* fold-const.c (fold_checksum_tree): Guard TREE_CHAIN use with
	CODE_CONTAINS_STRUCT (TS_COMMON).

	Backport r172297 from mainline
	2011-04-11  Chung-Lin Tang  <cltang@codesourcery.com>
		Richard Earnshaw  <rearnsha@arm.com>

	PR target/48250
	* config/arm/arm.c (arm_legitimize_reload_address): Update cases
	to use sign-magnitude offsets. Reject unsupported unaligned
	cases. Add detailed description in comments.
	* config/arm/arm.md (reload_outdf): Disable for ARM mode; change
	condition from TARGET_32BIT to TARGET_ARM.

	Backport r171978 from mainline
	2011-04-05  Tom de Vries  <tom@codesourcery.com>

	PR target/43920
	* config/arm/arm.h (BRANCH_COST): Set to 1 for Thumb-2 when optimizing
	for size.

	Backport r171632 from mainline
	2011-03-28  Richard Sandiford  <richard.sandiford@linaro.org>

	* builtins.c (expand_builtin_memset_args): Use gen_int_mode
	instead of GEN_INT.

	Backport r171379 from mainline
	2011-03-23  Chung-Lin Tang  <cltang@codesourcery.com>

	PR target/46934
	* config/arm/arm.md (casesi): Use the gen_int_mode() function
	to subtract lower bound instead of GEN_INT().

	Backport r171251 from mainline 
	2011-03-21  Daniel Jacobowitz  <dan@codesourcery.com>

	* config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test
	for barrier handlers.

	Backport r171096 from mainline
	2011-03-17  Chung-Lin Tang  <cltang@codesourcery.com>

	PR target/43872
	* config/arm/arm.c (arm_get_frame_offsets): Adjust early
	return condition with !cfun->calls_alloca.


Modified:
    branches/ARM/embedded-4_6-branch/gcc/ChangeLog.arm
    branches/ARM/embedded-4_6-branch/gcc/builtins.c
    branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.c
    branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.h
    branches/ARM/embedded-4_6-branch/gcc/config/arm/arm.md
    branches/ARM/embedded-4_6-branch/gcc/config/arm/unwind-arm.c
    branches/ARM/embedded-4_6-branch/gcc/fold-const.c
    branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr40887.c
    branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr42575.c
    branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr43698.c
    branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/pr44788.c
    branches/ARM/embedded-4_6-branch/gcc/testsuite/gcc.target/arm/sync-1.c