Bug 43462 - Suboptimal switch table jump generation
Summary: Suboptimal switch table jump generation
Status: NEW
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 4.5.0
: P3 enhancement
Target Milestone: ---
Assignee: Not yet assigned to anyone
Keywords: missed-optimization
Depends on:
Reported: 2010-03-21 03:26 UTC by Micha³ Miros³aw
Modified: 2010-03-21 09:30 UTC (History)
1 user (show)

See Also:
Host: i686-pc-linux-gnu
Target: arm-none-eabi
Build: i686-pc-linux-gnu
Known to work:
Known to fail:
Last reconfirmed: 2010-03-21 09:30:36


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Description Micha³ Miros³aw 2010-03-21 03:26:52 UTC

extern int a;
void b();
        switch (a & 7) {
        case 0: b(); break;
        case 1: b(); break;
        case 2: b(); break;
        case 3: b(); break;
        case 4: b(); break;
        case 5: b(); break;
        case 6: b(); break;
        case 7: b(); break;

        and     r3, r3, #7
        subs    r3, r3, #1
        cmp     r3, #6
        bhi     .L9
        tbb     [pc, r3]
        .byte   (.L9-.L10)/2
        .byte   (.L9-.L10)/2
        .byte   (.L9-.L10)/2
        .byte   (.L9-.L10)/2
        .byte   (.L9-.L10)/2
        .byte   (.L9-.L10)/2
        .byte   (.L9-.L10)/2
        .align  1

This could be better implemented as:

        and     r3, r3, #7
        tbb     [pc, r3]
        (jump table with 8 entries)

Please ignore that all branches are the same in this example.
Comment 1 Micha³ Miros³aw 2010-03-21 03:28:59 UTC
This is output from:
gcc -mcpu=cortex-m3 -mthumb -O3 -S a.c