Bug 37887 - %sil and %dil are used in 32-bit mode as inline asm registers
Summary: %sil and %dil are used in 32-bit mode as inline asm registers
Status: RESOLVED DUPLICATE of bug 23242
Alias: None
Product: gcc
Classification: Unclassified
Component: inline-asm (show other bugs)
Version: 4.4.0
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2008-10-21 21:30 UTC by Henry Harrington
Modified: 2008-10-21 21:42 UTC (History)
5 users (show)

See Also:
Host: x86_64-linux-gnu
Target: x86_64-linux-gnu
Build: x86_64-linux-gnu
Known to work:
Known to fail:
Last reconfirmed:


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Description Henry Harrington 2008-10-21 21:30:08 UTC
When compiling in 32-bit mode using the "r", "S" or "D" asm constraint with a char variable gcc will incorrectly emit %sil or %dil

/* uses %sil for e */
void func(int a, int b, int c, int d, char e)
{
	__asm__ volatile("%0 %1 %2 %3 %4" :: "r"(a), "r"(b), "r"(c), "r"(d), "r"(e));
}

void func(char c)
{
	__asm__ volatile("%0" :: "S"(c));
}

This occurs with gcc version 4.4.0 20081021 (experimental) svn revision 141272
and gcc version 4.3.2 (Debian 4.3.2-1)

Command line options used: -O2 -m32 -S
Comment 1 Andreas Schwab 2008-10-21 21:42:23 UTC

*** This bug has been marked as a duplicate of 23242 ***