Bug 34064 - ARM: missed optimization (conditional store)
Summary: ARM: missed optimization (conditional store)
Status: NEW
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 4.3.0
: P3 enhancement
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords: missed-optimization
Depends on:
Blocks: 16996
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Reported: 2007-11-11 11:08 UTC by Samuel Tardieu
Modified: 2021-11-28 04:53 UTC (History)
2 users (show)

See Also:
Host: arm-elf
Target: arm
Build: arm-elf
Known to work:
Known to fail:
Last reconfirmed: 2010-04-05 13:52:04

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Description Samuel Tardieu 2007-11-11 11:08:36 UTC 
The following code

void f(unsigned *_bss_start, unsigned *_bss_end)
{
  unsigned *p;

  for (p = _bss_start; p < _bss_end; p++)
    *p = 0;
}

when compiled with

  arm-elf-gcc -S -o - -fomit-frame-pointer -mcpu=arm7tdmi-s -Os t.c

produces (GCC 4.3.0 20071107)

f:
        mov     r3, #0
        b       .L2
.L3:
        str     r3, [r0], #4
.L2:
        cmp     r0, r1
        bcc     .L3
        bx      lr

It could be further optimized for both space and speed by emitting

f:
        mov     r3, #0
.L1:
        cmp     r0, r1
        strcc   r3, [r0], #4
        bcc     .L1
        bx      lr
Comment 1 Andrew Pinski 2007-12-08 23:26:53 UTC 
-Os disables copy loop header which would have done some parts of this opt.
Comment 2 Andrew Pinski 2007-12-08 23:27:15 UTC 
-Os disables copy loop header which would have done some parts of this opt.
Comment 3 Andrew Pinski 2021-11-28 04:53:00 UTC 
The trunk we get:
        movs    r3, #0
.L2:
        cmp     r0, r1
        bcc     .L3
        @ sp needed
        bx      lr
.L3:
        stmia   r0!, {r3}
        b       .L2