Bug 17245 - [3.3 regression] ICE compiling gsl-1.5 statistics/lag1.c
Summary: [3.3 regression] ICE compiling gsl-1.5 statistics/lag1.c
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 3.4.1
: P2 normal
Target Milestone: 3.4.3
Assignee: Eric Botcazou
URL:
Keywords: ice-on-valid-code
: 22169 (view as bug list)
Depends on:
Blocks:
 
Reported: 2004-08-31 02:45 UTC by aaronw
Modified: 2005-06-28 07:16 UTC (History)
2 users (show)

See Also:
Host: sparc sun solaris2.8
Target: sparc sun solaris2.8
Build: sparc sun solaris2.8
Known to work: 2.95.3 4.0.0
Known to fail: 3.3.2 3.3.5 3.4.1 3.4.2
Last reconfirmed: 2004-09-03 15:03:16


Attachments
preprocessor output of file that fails (3.45 KB, text/plain)
2004-08-31 02:47 UTC, aaronw
Details
This file also fails the same way. File is histogram/stat.c (4.78 KB, text/plain)
2004-08-31 02:59 UTC, aaronw
Details
Reduced testcase derived from second attachment (138 bytes, text/plain)
2004-09-03 16:18 UTC, Christian Ehrhardt
Details

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Description aaronw 2004-08-31 02:45:59 UTC
gcc -DHAVE_CONFIG_H -I. -I. -I.. -I.. -I.. -mcpu=v9 -O1 -c lag1.e.c -o lag1.o 
In file included from lag1.c:6: 
lag1_source.c: In function `gsl_stats_long_double_lag1_autocorrelation_m': 
lag1_source.c:51: error: insn does not satisfy its constraints: 
(insn 322 14 16 0 (set (reg:TF 10 %o2) 
        (mem/u/f:TF (lo_sum:SI (reg/f:SI 1 %g1 [116]) 
                (symbol_ref/u:SI ("*.LLC0") [flags 0x2])) [0 S16 A64])) 97 
{*movtf_insn_sp32} (nil) 
    (nil)) 
lag1_source.c:51: internal compiler error: in reload_cse_simplify_operands, at 
postreload.c:378 
Please submit a full bug report, 
with preprocessed source if appropriate. 
See <URL:http://gcc.gnu.org/bugs.html> for instructions.
Comment 1 aaronw 2004-08-31 02:47:20 UTC
Created attachment 7008 [details]
preprocessor output of file that fails

This is the preprocessor output of the file that causes the compiler to fail.
Comment 2 aaronw 2004-08-31 02:48:50 UTC
This fails if -O1, -O2, or -O3 are specified along with -mcpu=v9. 
 
Comment 3 aaronw 2004-08-31 02:59:08 UTC
Created attachment 7009 [details]
This file also fails the same way.  File is histogram/stat.c
Comment 4 Eric Botcazou 2004-09-03 15:03:16 UTC
Confirmed.
Comment 5 Christian Ehrhardt 2004-09-03 16:18:38 UTC
Created attachment 7041 [details]
Reduced testcase derived from second attachment

This seems to have been fixed recently on the mainline because
gcc version 3.5.0 20040707 (experimental) also ICEs on this
testcase.

    regards  Christian
Comment 6 Eric Botcazou 2004-09-03 18:06:59 UTC
> Reduced testcase derived from second attachment

Nice work.  This allowed me to test with GCC 2.95.3.

> This seems to have been fixed recently on the mainline because
> gcc version 3.5.0 20040707 (experimental) also ICEs on this
> testcase.

gcc version 3.5.0 20040901 (experimental) doesn't ICE.
Comment 7 Eric Botcazou 2004-10-03 18:16:17 UTC
Investigating.
Comment 8 CVS Commits 2004-10-08 13:35:07 UTC
Subject: Bug 17245

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	ebotcazou@gcc.gnu.org	2004-10-08 13:34:57

Modified files:
	gcc            : ChangeLog 
	gcc/config/sparc: sparc.c 
	gcc/testsuite  : ChangeLog 
Added files:
	gcc/testsuite/gcc.dg: ultrasp11.c 

Log message:
	PR target/17245
	* config/sparc/sparc.c (input_operand): Remove redundant code
	for handling LO_SUM.
	(legitimate_address_p) <REG+REG>: Do not recheck TARGET_V9.
	<LO_SUM>: If LO_SUM is offsettable, accept it for TFmode on V9.
	Otherwise only accept it for TFmode if quad move insns are available.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.5801&r2=2.5802
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/sparc/sparc.c.diff?cvsroot=gcc&r1=1.337&r2=1.338
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/ChangeLog.diff?cvsroot=gcc&r1=1.4410&r2=1.4411
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/gcc.dg/ultrasp11.c.diff?cvsroot=gcc&r1=NONE&r2=1.1

Comment 9 CVS Commits 2004-10-08 13:41:38 UTC
Subject: Bug 17245

CVSROOT:	/cvs/gcc
Module name:	gcc
Branch: 	gcc-3_4-branch
Changes by:	ebotcazou@gcc.gnu.org	2004-10-08 13:41:30

Modified files:
	gcc            : ChangeLog 
	gcc/config/sparc: sparc.c 
	gcc/testsuite  : ChangeLog 
Added files:
	gcc/testsuite/gcc.dg: ultrasp11.c 

Log message:
	PR target/17245
	* config/sparc/sparc.c (input_operand): Remove redundant code
	for handling LO_SUM.
	(legitimate_address_p) <REG+REG>: Do not recheck TARGET_V9.
	<LO_SUM>: If LO_SUM is offsettable, accept it for TFmode on V9.
	Otherwise only accept it for TFmode if quad move insns are available.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=2.2326.2.649&r2=2.2326.2.650
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/sparc/sparc.c.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.271.4.20&r2=1.271.4.21
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.3389.2.278&r2=1.3389.2.279
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/testsuite/gcc.dg/ultrasp11.c.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=NONE&r2=1.1.2.1

Comment 10 Eric Botcazou 2004-10-08 13:48:09 UTC
See http://gcc.gnu.org/ml/gcc-patches/2004-10/msg00743.html

I don't plan to have it fixed on the 3.3 branch as it is not a critical problem
and there is a simple workaround (compiling with -mcpu=v8).  Not worth the risk
at this point IMHO.
Comment 11 CVS Commits 2005-04-06 11:54:12 UTC
Subject: Bug 17245

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	ebotcazou@gcc.gnu.org	2005-04-06 11:53:54

Modified files:
	gcc            : ChangeLog 
	gcc/config/sparc: sparc.c 

Log message:
	PR target/17245
	* config/sparc/sparc.c (legitimate_address_p): Remove 'imm2'.
	Revert 2004-10-08 patch.  Reject TFmode LO_SUM in 32-bit mode.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.8167&r2=2.8168
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/sparc/sparc.c.diff?cvsroot=gcc&r1=1.360&r2=1.361

Comment 12 CVS Commits 2005-04-06 11:56:48 UTC
Subject: Bug 17245

CVSROOT:	/cvs/gcc
Module name:	gcc
Branch: 	gcc-4_0-branch
Changes by:	ebotcazou@gcc.gnu.org	2005-04-06 11:56:34

Modified files:
	gcc            : ChangeLog 
	gcc/config/sparc: sparc.c 

Log message:
	PR target/17245
	* config/sparc/sparc.c (legitimate_address_p): Remove 'imm2'.
	Revert 2004-10-08 patch.  Reject TFmode LO_SUM in 32-bit mode.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-4_0-branch&r1=2.7592.2.138&r2=2.7592.2.139
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/sparc/sparc.c.diff?cvsroot=gcc&only_with_tag=gcc-4_0-branch&r1=1.354.8.2&r2=1.354.8.3

Comment 13 CVS Commits 2005-04-06 11:59:28 UTC
Subject: Bug 17245

CVSROOT:	/cvs/gcc
Module name:	gcc
Branch: 	gcc-3_4-branch
Changes by:	ebotcazou@gcc.gnu.org	2005-04-06 11:59:10

Modified files:
	gcc            : ChangeLog 
	gcc/config/sparc: sparc.c 

Log message:
	PR target/17245
	* config/sparc/sparc.c (legitimate_address_p): Remove 'imm2'.
	Revert 2004-10-08 patch.  Reject TFmode LO_SUM in 32-bit mode.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=2.2326.2.833&r2=2.2326.2.834
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/sparc/sparc.c.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.271.4.23&r2=1.271.4.24

Comment 14 Eric Botcazou 2005-06-28 07:16:47 UTC
*** Bug 22169 has been marked as a duplicate of this bug. ***