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Bug 11183 - [3.3/3.4 regression] [arm] ICE in change_address_1 (3.3) / subreg_hard_regno (3.4)
Summary: [3.3/3.4 regression] [arm] ICE in change_address_1 (3.3) / subreg_hard_regno ...
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 3.3
: P2 critical
Target Milestone: 3.3.1
Assignee: Not yet assigned to anyone
URL:
Keywords:
: 10206 (view as bug list)
Depends on:
Blocks:
 
Reported: 2003-06-13 07:39 UTC by Debian GCC Maintainers
Modified: 2004-01-17 04:22 UTC (History)
2 users (show)

See Also:
Host: arm-linux
Target: arm-linux
Build: arm-linux
Known to work:
Known to fail:
Last reconfirmed: 2003-06-14 13:58:31


Attachments
preprocessed source (8.49 KB, application/x-bz2)
2003-06-13 07:39 UTC, Debian GCC Maintainers
Details

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Description Debian GCC Maintainers 2003-06-13 07:39:03 UTC
[forwarded from http://bugs.debian.org/197099]

3.3 release:
$ gcc  -pedantic -g -O2 -c stage-4.i 
stage-4.c: In function `scheduler_4':
stage-4.c:1310: internal compiler error: in change_address_1, at emit-rtl.c:2017
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.

3.4 CVS 20030531:
$ gcc  -pedantic -g -O2 -c stage-4.i 
stage-4.c: In function `scheduler_4':
stage-4.c:1310: internal compiler error: in subreg_hard_regno, at emit-rtl.c:1088
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://gcc.gnu.org/bugs.html> for instructions.
Comment 1 Debian GCC Maintainers 2003-06-13 07:39:44 UTC
Created attachment 4217 [details]
preprocessed source
Comment 2 Andrew Pinski 2003-06-14 13:58:31 UTC
I can confirm the mainline ICE on 20030614, it only ICE on arm-linux not arm-elf.
stage-4.c: In function `scheduler_4':
stage-4.c:1310: internal compiler error: in subreg_hard_regno, at emit-rtl.c:1088
Please submit a full bug report.

I think the 3.3 ICE would be the same as the mainline if checking is turned on.
Comment 3 CVS Commits 2003-06-14 14:16:43 UTC
Subject: Bug 11183

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	rearnsha@gcc.gnu.org	2003-06-14 14:16:40

Modified files:
	gcc            : ChangeLog 
	gcc/config/arm : arm.c 

Log message:
	PR target/11183
	* arm.c (output_move_double): Pass SImode to adjust_address.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=1.18210&r2=1.18211
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?cvsroot=gcc&r1=1.280&r2=1.281

Comment 4 CVS Commits 2003-06-14 14:20:59 UTC
Subject: Bug 11183

CVSROOT:	/cvs/gcc
Module name:	gcc
Branch: 	gcc-3_3-branch
Changes by:	rearnsha@gcc.gnu.org	2003-06-14 14:20:54

Modified files:
	gcc            : ChangeLog 
	gcc/config/arm : arm.c 

Log message:
	PR target/11183
	* arm.c (output_move_double): Pass SImode to adjust_address.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_3-branch&r1=1.16114.2.581&r2=1.16114.2.582
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.c.diff?cvsroot=gcc&only_with_tag=gcc-3_3-branch&r1=1.243.2.4&r2=1.243.2.5

Comment 5 CVS Commits 2003-06-14 15:54:06 UTC
Subject: Bug 11183

CVSROOT:	/cvs/gcc
Module name:	gcc
Changes by:	rearnsha@gcc.gnu.org	2003-06-14 15:54:02

Modified files:
	gcc            : ChangeLog 
	gcc/config/arm : arm.h 

Log message:
	PR target/11183
	* arm.h (CANNOT_CHANGE_MODE_CLASS): Define.

Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=1.18213&r2=1.18214
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/arm/arm.h.diff?cvsroot=gcc&r1=1.194&r2=1.195

Comment 6 Richard Earnshaw 2003-06-14 16:03:29 UTC
Ohh! Two bugs in one report...

The change_address bug was due to the fact that 1020 is a legal offset to an LDF
instruction, but 1024 is not. Thus when we break the address into parts so that
we can use LDR instructions we get an invalid offset.  Fortunately, 1024 is a
leagal offset for an LDR instruction.  Telling change_address to validate
against SImode fixes this.

The second bug is a checking failure.  When trying to find a register that
contained zero, reload had identified the fact that a floating point register
had zero in a subword of a floating point value.  However, it isn't possible to
subreg an FPA register, and the compiler was generating a consistency abort in
the checking code.  This can be rectified by defining CANNOT_CHANGE_MODE_CLASS.
 Although this failure also appears on the branch if checking is enabled, fixing
the abort does not cause different code to be output.  It seams sensible
therefore not to apply the second patch to the branch.
Comment 7 Richard Earnshaw 2003-06-18 12:55:42 UTC
*** Bug 10206 has been marked as a duplicate of this bug. ***