Bug 106004 - [13 Regression] ICE: RTL check: expected elt 0 type 'i' or 'n', have 'w' (rtx const_int) in arm_print_operand, at config/arm/arm.cc:24202
Summary: [13 Regression] ICE: RTL check: expected elt 0 type 'i' or 'n', have 'w' (rtx...
Status: RESOLVED FIXED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 13.0
: P3 normal
Target Milestone: ---
Assignee: Richard Earnshaw
URL:
Keywords: build, ice-checking, ice-on-valid-code
Depends on:
Blocks:
 
Reported: 2022-06-16 16:43 UTC by Zdenek Sojka
Modified: 2022-06-17 13:29 UTC (History)
0 users

See Also:
Host: x86_64-pc-linux-gnu
Target: armv7a-hardfloat-linux-gnueabi
Build:
Known to work:
Known to fail:
Last reconfirmed: 2022-06-17 00:00:00


Attachments
reduced testcase (from sanitizer_deadlock_detector1.cpp) (181 bytes, text/plain)
2022-06-16 16:43 UTC, Zdenek Sojka
Details

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Description Zdenek Sojka 2022-06-16 16:43:45 UTC
Created attachment 53153 [details]
reduced testcase (from sanitizer_deadlock_detector1.cpp)

This currently breaks build with RTL checking enabled.

Compiler output:
$ /repo/build-gcc-trunk-armv7a-hardfloat/./gcc/cc1plus -O -march=armv7-a+vfpv4 testcase.C 
 bool DeadlockDetector::nodeBelongsToCurrentEpoch() void MutexEnsureID()
Analyzing compilation unit
Performing interprocedural optimizations
 <*free_lang_data> {heap 1176k} <visibility> {heap 1176k} <build_ssa_passes> {heap 1176k} <opt_local_passes> {heap 1460k} <remove_symbols> {heap 2124k} <targetclone> {heap 2124k} <free-fnsummary> {heap 2124k}Streaming LTO
 <whole-program> {heap 2124k} <profile_estimate> {heap 2124k} <fnsummary> {heap 2124k} <inline> {heap 2124k} <pure-const> {heap 2124k} <modref> {heap 2124k} <free-fnsummary> {heap 2124k} <static-var> {heap 2124k} <single-use> {heap 2124k} <comdats> {heap 2124k}Assembling functions:
 void MutexEnsureID()during RTL pass: final

testcase.C: In function 'void MutexEnsureID()':
testcase.C:19:1: internal compiler error: RTL check: expected elt 0 type 'i' or 'n', have 'w' (rtx const_int) in arm_print_operand, at config/arm/arm.cc:24202
   19 | }
      | ^
0x804c80 rtl_check_failed_type2(rtx_def const*, int, int, int, char const*, int, char const*)
        /repo/gcc-trunk/gcc/rtl.cc:907
0x8ccae3 arm_print_operand
        /repo/gcc-trunk/gcc/config/arm/arm.cc:24202
0xfbbc31 output_operand(rtx_def*, int)
        /repo/gcc-trunk/gcc/final.cc:3677
0xfbca83 output_asm_insn(char const*, rtx_def**)
        /repo/gcc-trunk/gcc/final.cc:3570
0xfc28fc output_asm_insn(char const*, rtx_def**)
        /repo/gcc-trunk/gcc/final.cc:3466
0xfc28fc final_scan_insn_1
        /repo/gcc-trunk/gcc/final.cc:2894
0xfc2d0b final_scan_insn(rtx_insn*, _IO_FILE*, int, int, int*)
        /repo/gcc-trunk/gcc/final.cc:2940
0xfc2e04 final_1
        /repo/gcc-trunk/gcc/final.cc:1997
0xfc3b56 rest_of_handle_final
        /repo/gcc-trunk/gcc/final.cc:4285
0xfc3b56 execute
        /repo/gcc-trunk/gcc/final.cc:4363
Please submit a full bug report, with preprocessed source (by using -freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

$ /repo/build-gcc-trunk-armv7a-hardfloat/./gcc/xgcc -v
Using built-in specs.
COLLECT_GCC=/repo/build-gcc-trunk-armv7a-hardfloat/./gcc/xgcc
Target: armv7a-hardfloat-linux-gnueabi
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++ --enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra --with-cloog --with-ppl --with-isl --with-float=hard --with-fpu=vfpv4 --with-arch=armv7-a --with-sysroot=/usr/armv7a-hardfloat-linux-gnueabi --build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu --target=armv7a-hardfloat-linux-gnueabi --with-ld=/usr/bin/armv7a-hardfloat-linux-gnueabi-ld --with-as=/usr/bin/armv7a-hardfloat-linux-gnueabi-as --disable-libstdcxx-pch --prefix=/repo/gcc-trunk//binary-trunk-r13-1134-20220616143736-g9642d07c35f-checking-yes-rtl-df-extra-armv7a-hardfloat
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 13.0.0 20220616 (experimental) (GCC)
Comment 1 Richard Earnshaw 2022-06-17 10:47:59 UTC
Mine.  Same underlying problem as PR105974.
Comment 2 GCC Commits 2022-06-17 13:27:29 UTC
The master branch has been updated by Richard Earnshaw <rearnsha@gcc.gnu.org>:

https://gcc.gnu.org/g:040f8224617ad3924f606c8982da369f898693d1

commit r13-1152-g040f8224617ad3924f606c8982da369f898693d1
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Fri Jun 17 14:25:51 2022 +0100

    arm: fix checking ICE in arm_print_operand [PR106004]
    
    Sigh, another instance where I incorrectly used XUINT instead of
    UINTVAL.
    
    I've also made the code here a little more robust (although I think
    this case can't in fact be reached) if the 32-bit clear mask includes
    bit 31.  This case, if reached, would print out an out-of-range value
    based on the size of the compiler's HOST_WIDE_INT type due to
    sign-extension.  We avoid this by masking the value after inversion.
    
    gcc/ChangeLog:
            PR target/106004
            * config/arm/arm.cc (arm_print_operand, case 'V'): Use UINTVAL.
            Clear bits in the mask above bit 31.
Comment 3 Richard Earnshaw 2022-06-17 13:29:46 UTC
Fixed