Bug 100762 - [mips+msa] ICE when comparing 64 bit vectors
Summary: [mips+msa] ICE when comparing 64 bit vectors
Status: UNCONFIRMED
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 10.2.1
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords: ice-on-valid-code
Depends on:
Blocks:
 
Reported: 2021-05-26 04:42 UTC by Evan Nemerson
Modified: 2021-07-09 06:29 UTC (History)
1 user (show)

See Also:
Host:
Target: mips
Build:
Known to work:
Known to fail:
Last reconfirmed:


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Description Evan Nemerson 2021-05-26 04:42:11 UTC
In MIPS with MSA enabled on GCC 10.2.1, any comparison operation on 64-bit vectors results in an ICE.

Test case:


typedef int i32x2 __attribute__((__vector_size__(8)));

i32x2 cmp(i32x2 a, i32x2 b) {
  return a >= b;
}


$ mips64el-linux-gnuabi64-gcc-10 -march=loongson3a -mmsa -c -o test.o test.c
mips64el-linux-gnuabi64-gcc-10 -march=loongson3a -mmsa -c -o test.o test2.c
during RTL pass: expand
test.c: In function 'cmp':
test.c:4:12: internal compiler error: in mips_expand_vector_init, at config/mips/mips.c:22076
    4 |   return a >= b;
      |          ~~^~~~
0x7f420202dd09 __libc_start_main
	../csu/libc-start.c:308
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <file:///usr/share/doc/gcc-10/README.Bugs> for instructions.


This is with GCC 10.2.1-6 from Debian:


$ mips64el-linux-gnuabi64-gcc-10 --version
mips64el-linux-gnuabi64-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110
Copyright (C) 2020 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
Comment 1 Evan Nemerson 2021-05-26 12:58:53 UTC
It's not just comparisons.  <<, >>, /, * also don't work.  AFAICT only bitwise operations and +/- work, as well as everything with a 64-bit element type (i.e., a vector of one element)… 8/16/32-bit elements all fail.
Comment 2 Xi Ruoyao 2021-06-17 04:11:52 UTC
11.1.0 also ICE with this case.
Comment 3 Xi Ruoyao 2021-06-18 10:19:24 UTC
There is some strange interaction between -mmsa and -mloongson-mmi causing this.  It can be reproduced by building pixman (which enables -mloongson-mmi by default) with -mmsa.
Comment 4 Xi Ruoyao 2021-06-19 07:35:45 UTC
Patch proposed: https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573213.html
Comment 5 CVS Commits 2021-07-09 06:29:54 UTC
The master branch has been updated by Xi Ruoyao <xry111@gcc.gnu.org>:

https://gcc.gnu.org/g:82625a42e652d52fc6bbe6070f8d0589d5e0c8ad

commit r12-2183-g82625a42e652d52fc6bbe6070f8d0589d5e0c8ad
Author: Xi Ruoyao <xry111@mengyan1223.wang>
Date:   Fri Jun 18 20:11:42 2021 +0800

    mips: check MSA support for vector modes [PR100760,PR100761,PR100762]
    
    Check if the vector mode is really supported by MSA in certain cases,
    instead of testing ISA_HAS_MSA.  Simply testing ISA_HAS_MSA can cause
    ICE when MSA is enabled besides other MIPS SIMD extensions (notably,
    Loongson MMI).
    
    gcc/
    
            PR target/100760
            PR target/100761
            PR target/100762
            * config/mips/mips.c (mips_const_insns): Use MSA_SUPPORTED_MODE_P
            instead of ISA_HAS_MSA.
            (mips_expand_vec_unpack): Likewise.
            (mips_expand_vector_init): Likewise.
    
    gcc/testsuite/
    
            PR target/100760
            PR target/100761
            PR target/100762
            * gcc.target/mips/pr100760.c: New test.
            * gcc.target/mips/pr100761.c: New test.
            * gcc.target/mips/pr100762.c: New test.