Summary: | [8/9 Regression] ICE: verify_gimple failed: position plus size exceeds size of referenced object in 'bit_field_ref' with -mavx512vbmi -mavx512vl | ||
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Product: | gcc | Reporter: | Zdenek Sojka <zsojka> |
Component: | target | Assignee: | Jakub Jelinek <jakub> |
Status: | RESOLVED FIXED | ||
Severity: | normal | CC: | jakub, marxin |
Priority: | P2 | Keywords: | ice-on-valid-code |
Version: | 10.0 | ||
Target Milestone: | 8.5 | ||
Host: | x86_64-pc-linux-gnu | Target: | x86_64-*-* i?86-*-* |
Build: | Known to work: | 5.5.0 | |
Known to fail: | 10.0, 6.5.0, 7.5.0, 8.4.1, 9.3.1 | Last reconfirmed: | 2020-04-01 00:00:00 |
Attachments: |
reduced testcase
gcc10-pr94438.patch |
Description
Zdenek Sojka
2020-04-01 10:47:28 UTC
Adjusted testcase so that it doesn't use uninitialized var: typedef __attribute__ ((__vector_size__ (sizeof (__int128)))) __int128 V; void foo (V w) { V v = 0 <= (0 >= w); } And: typedef __attribute__ ((__vector_size__ (4 * sizeof (__int128)))) __int128 V; void foo (V w) { V v = 0 <= (0 >= w); } ICEs in another spot (only -mavx512vbmi is needed for this one): during RTL pass: expand pr94438-2.c: In function ‘foo’: pr94438-2.c:6:11: internal compiler error: in expand_vec_cond_expr, at optabs.c:5884 6 | V v = 0 <= (0 >= w); | ~~^~~~~~~~~~~ 0x10edd07 expand_vec_cond_expr(tree_node*, tree_node*, tree_node*, tree_node*, rtx_def*) ../../gcc/optabs.c:5882 0xd20e4b do_store_flag ../../gcc/expr.c:12148 Both testcases ICE since r7-1075-g0561bcfb825ec512375f06c5b2199d44263832cb. Created attachment 48172 [details] gcc10-pr94438.patch Untested fix. It seems completely wrong to try to use int masks for V*TImode, the hook correctly only supports V*[SD]Imode if not -mavx512bw, but with -mavx512bw it just doesn't check elem_size at all. The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>: https://gcc.gnu.org/g:8bf5faa9c463f0d53ffe835ba03d4502edfb959d commit r10-7632-g8bf5faa9c463f0d53ffe835ba03d4502edfb959d Author: Jakub Jelinek <jakub@redhat.com> Date: Wed Apr 8 18:24:12 2020 +0200 i386: Don't use AVX512F integral masks for V*TImode [PR94438] The ix86_get_mask_mode hook uses int mask for 512-bit vectors or 128/256-bit vectors with AVX512VL (that is correct), and only for V*[SD][IF]mode if not AVX512BW (also correct), but with AVX512BW it would stop checking the elem_size altogether and pretend the hw has masking support for V*TImode etc., which it doesn't. That can lead to various ICEs later on. 2020-04-08 Jakub Jelinek <jakub@redhat.com> PR target/94438 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size 1, 2, 4 and 8. * gcc.target/i386/avx512bw-pr94438.c: New test. * gcc.target/i386/avx512vlbw-pr94438.c: New test. Fixed on the trunk so far. The releases/gcc-9 branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>: https://gcc.gnu.org/g:cb09410d3c61d325c64b17eabe9dfd1609cec1a6 commit r9-8876-gcb09410d3c61d325c64b17eabe9dfd1609cec1a6 Author: Jakub Jelinek <jakub@redhat.com> Date: Wed Apr 8 18:24:12 2020 +0200 i386: Don't use AVX512F integral masks for V*TImode [PR94438] The ix86_get_mask_mode hook uses int mask for 512-bit vectors or 128/256-bit vectors with AVX512VL (that is correct), and only for V*[SD][IF]mode if not AVX512BW (also correct), but with AVX512BW it would stop checking the elem_size altogether and pretend the hw has masking support for V*TImode etc., which it doesn't. That can lead to various ICEs later on. 2020-04-08 Jakub Jelinek <jakub@redhat.com> PR target/94438 * config/i386/i386.c (ix86_get_mask_mode): Only use int mask for elem_size 1, 2, 4 and 8. * gcc.target/i386/avx512bw-pr94438.c: New test. * gcc.target/i386/avx512vlbw-pr94438.c: New test. (cherry picked from commit 8bf5faa9c463f0d53ffe835ba03d4502edfb959d) Fixed for 8.5 in r8-10485-g212ae35e5a9b554748c1340015968fda1d1fa0d8 and by the above commit for 9.4+ too. |