Summary: | [4.1 regression] ICE with -ftree-vectorize | ||
---|---|---|---|
Product: | gcc | Reporter: | James A. Morrison <phython> |
Component: | target | Assignee: | Alan Modra <amodra> |
Status: | RESOLVED FIXED | ||
Severity: | normal | CC: | amodra, dje, gcc-bugs, pinskia |
Priority: | P3 | Keywords: | ice-on-valid-code |
Version: | 4.1.0 | ||
Target Milestone: | 4.1.0 | ||
URL: | http://gcc.gnu.org/ml/gcc-patches/2005-11/msg01916.html | ||
Host: | powerpc-linux | Target: | powerpc-linux |
Build: | powerpc-linux | Known to work: | 4.0.3 4.1.0 4.2.0 |
Known to fail: | Last reconfirmed: | 2005-11-24 10:21:53 | |
Bug Depends on: | 25212 | ||
Bug Blocks: | |||
Attachments: | preprocessed source |
Description
James A. Morrison
2005-11-23 07:11:39 UTC
Please attach preprocessed source. Hmm, r9, wtf. Any ways, we need the .i file :). Created attachment 10327 [details]
preprocessed source
Here is the preprocessed source. Sorry, I haven't had a change to run delta on it yet, nor can I reproduce this ICE without using -O3 -ftree-vectorize.
Reducing. I will finish reducing this after class (I stopped and started reducing a different testcase anyways). Actually this bug is too funny to reduce, reload is too funny for the life of me. Compiling with -da with a semi reduced testcases makes it pass. I'm not surprised that reducing this testcase isn't easy. Register pressure is needed to trigger the bug. The problem is that in (insn:HI 2761 3601 2769 279 wmadec.c:1117 (set (reg:V4SF 280 [ vect_var_.655 ]) (mem:V4SF (and:SI (plus:SI (reg/f:SI 1824) (reg:SI 284 [ base_off.641 ])) (const_int -16 [0xfffffffffffffff0])) [4 S16 A128])) 628 {altivec_lvx_v4sf} (insn_list:REG_DEP_TRUE 2757 (nil)) (expr_list:REG_DEAD (reg:SI 284 [ base_off.641 ]) (nil))) reg 1824 doesn't get a hard register, so is replaced with a stack slot (insn:HI 2761 3601 2769 279 wmadec.c:1117 (set (reg:V4SF 89 12 [orig:280 vect_var_.655 ] [280]) (mem:V4SF (and:SI (plus:SI (plus:SI (reg/f:SI 1 1) (reg:SI 11 11 [orig:284 base_off.641 ] [284])) (const_int 16512 [0x4080])) (const_int -16 [0xfffffffffffffff0])) [4 S16 A128])) 628 {altivec_lvx_v4sf} (insn_list:REG_DEP_TRUE 2757 (nil)) (expr_list:REG_DEAD (reg:SI 11 11 [orig:284 base_off.641 ] [284]) (nil))) reload just tries to put the mem address, including the AND, into a reg. It needs to be taught that the AND should stay with the insn. The real address is the part inside the AND. Oops, no, that's not a stack slot. That's a stack slot gone wrong. Where's the MEM for the slot? Indeed it's not a stack slot. Instead, reg 1824 is an invariant, equal to sfp+16512. Code in reload1.c:eliminate_regs_1 substitutes r1 for sfp, then reorganises the order of the additions, so we get (r1+r11)+const not (r1+const)+r11. This of course isn't a valid address on powerpc, where indexed addresses can't take an offset. In case it isn't obvious, I'm a little lost. Hopefully my analysis will let someone more familiar with reload sort this out. I think I've sorted this out after all.. Testing a fix. Subject: Bug 24997 Author: amodra Date: Mon Nov 28 03:52:01 2005 New Revision: 107591 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=107591 Log: PR target/24997 * config/rs6000/rs6000.c (legitimate_indexed_address_p): Allow pattern generated by reload. * config/rs6000/predicates.md (indexed_or_indirect_operand): Use indexed_or_indirect_address. (indexed_or_indirect_address): Don't test for base reg. Call address_operand last. Make it a special predicate. Modified: trunk/gcc/ChangeLog trunk/gcc/config/rs6000/predicates.md trunk/gcc/config/rs6000/rs6000.c pr25212 has a more complete fix that I propose applying to the 4.1 branch. Fixed 4.1 by pr25212 commit. |