Bug 11628

Summary: movd support for _mm_cvtsi32_si64 and _mm_cvtsi64_si32
Product: gcc Reporter: dean
Component: targetAssignee: Not yet assigned to anyone <unassigned>
Status: RESOLVED FIXED    
Severity: enhancement CC: gcc-bugs
Priority: P2 Keywords: missed-optimization, ssemmx
Version: 3.4.0   
Target Milestone: 4.0.0   
Host: i686-pc-linux-gnu Target: i686-pc-linux-gnu
Build: i686-pc-linux-gnu Known to work:
Known to fail: Last reconfirmed: 2004-08-20 06:58:11

Description dean 2003-07-22 04:17:08 UTC
the x86 MOVD opcode is a way more efficient method of handling 32-bit movements 
to/from mmx registers than the 64-bit casts which are currently used... the 
patch below enables the use of MOVD through the _mm_cvtsi32_si64 and 
_mm_cvtsi64_si32 intrinsics.

a more ideal solution would be to handle the 64-bit casting using movd, but 
that's way beyond what i would know how to do to gcc :)

this is essentially a clone of the similar MOVD support for xmm registers.

-dean

here's an example comparing the old method (using casts) to the new method 
using the intrinsics i've added:

$ cat t32.c
#include <stdint.h>
#ifdef __INTEL_COMPILER
#include <emmintrin.h>
#else
#include <xmmintrin.h>
#endif

uint32_t old_64_to_32(__m64 m)
{
        return (unsigned long long)m;
}

uint32_t new_64_to_32(__m64 m)
{
        return _mm_cvtsi64_si32(m);
}

__m64 old_32_to_64(uint32_t a)
{
        long long tmp = (unsigned int)a;
        return (__m64)tmp;
}

__m64 new_32_to_64(uint32_t a)
{
        return _mm_cvtsi32_si64(a);
}

$ ~/gcc/bin/gcc -O -march=pentium4 -fomit-frame-pointer -c t32.c
$ objdump -dr t32.o

t32.o:     file format elf32-i386

Disassembly of section .text:

00000000 <old_64_to_32>:
   0:   83 ec 0c                sub    $0xc,%esp
   3:   0f 6f 44 24 10          movq   0x10(%esp,1),%mm0
   8:   0f 7f 04 24             movq   %mm0,(%esp,1)
   c:   8b 04 24                mov    (%esp,1),%eax
   f:   83 c4 0c                add    $0xc,%esp
  12:   c3                      ret

00000013 <new_64_to_32>:
  13:   0f 6f 44 24 04          movq   0x4(%esp,1),%mm0
  18:   0f 7e c0                movd   %mm0,%eax
  1b:   c3                      ret

0000001c <old_32_to_64>:
  1c:   83 ec 0c                sub    $0xc,%esp
  1f:   8b 44 24 10             mov    0x10(%esp,1),%eax
  23:   8b 54 24 14             mov    0x14(%esp,1),%edx
  27:   b9 00 00 00 00          mov    $0x0,%ecx
  2c:   89 14 24                mov    %edx,(%esp,1)
  2f:   89 4c 24 04             mov    %ecx,0x4(%esp,1)
  33:   0f 6f 04 24             movq   (%esp,1),%mm0
  37:   0f 7f 00                movq   %mm0,(%eax)
  3a:   83 c4 0c                add    $0xc,%esp
  3d:   c2 04 00                ret    $0x4

00000040 <new_32_to_64>:
  40:   8b 44 24 04             mov    0x4(%esp,1),%eax
  44:   0f 6e 44 24 08          movd   0x8(%esp,1),%mm0
  49:   0f 7f 00                movq   %mm0,(%eax)
  4c:   c2 04 00                ret    $0x4

begin 644 movd.patch
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H;7`L("A?7W8R<VDI7U]I*3L*("`@<F5T=7)N(%]?=&UP.PH@?0H@"@``
`
end
Comment 1 Andrew Pinski 2003-07-22 13:04:49 UTC
Could you send you patch to gcc-patches@gcc.gnu.org after reading 
<http://gcc.gnu.org/contribute.html>.

I can confirm his way is much faster.
Comment 2 dean 2003-07-22 16:45:42 UTC
Subject: Re:  movd support for _mm_cvtsi32_si64 and
 _mm_cvtsi64_si32

On Tue, 22 Jul 2003, pinskia at physics dot uc dot edu wrote:

> Could you send you patch to gcc-patches@gcc.gnu.org after reading
> <http://gcc.gnu.org/contribute.html>.

i sent the patch there months ago and got no response.

-dean
Comment 3 Andrew Pinski 2003-07-23 20:19:08 UTC
Might be related to bug 8871.
Comment 4 otaylor 2003-07-23 20:34:03 UTC
Indeed 8871 is about fixing the 64-bit casting to use movd. I think this bug 
should be marked as a duplicate.

(Ading extra builtins to work around the broken patterns for
casting, which it sounds like what this patch does, is, IMO,
not a good idea.)
Comment 5 Andrew Pinski 2003-07-23 20:38:42 UTC
A dup of bug 8871.

*** This bug has been marked as a duplicate of 8871 ***
Comment 6 dean 2003-07-23 21:46:02 UTC
Subject: Re:  movd support for _mm_cvtsi32_si64 and
 _mm_cvtsi64_si32

On Wed, 23 Jul 2003, otaylor at redhat dot com wrote:

> (Ading extra builtins to work around the broken patterns for
> casting, which it sounds like what this patch does, is, IMO,
> not a good idea.)

i agree!  thanks :)  i just took the wussy approach 'cause i don't know
enough gcc to do the right appraoch.

-dean
Comment 7 Andrew Pinski 2003-08-23 23:15:27 UTC
The patch which fixed PR 8871 did not fix old_64_to_32. So reopening bug.
Comment 8 Uroš Bizjak 2004-11-30 14:58:33 UTC
'gcc -O -march=pentium4 -fomit-frame-pointer -S t32.c' now produces:

        .file   "t32.c"
        .text
.globl old_64_to_32
        .type   old_64_to_32, @function
old_64_to_32:
        subl $12, %esp
        movq %mm0, (%esp)
        movl (%esp), %eax
        addl $12, %esp
        ret
        .size   old_64_to_32, .-old_64_to_32
.globl new_64_to_32
        .type   new_64_to_32, @function
new_64_to_32:
        subl $12, %esp
        movq %mm0, (%esp)
        movl (%esp), %eax
        addl $12, %esp
        ret
        .size   new_64_to_32, .-new_64_to_32
.globl old_32_to_64
        .type   old_32_to_64, @function
old_32_to_64:
        movl 4(%esp), %eax
        movd 8(%esp), %mm0
        movq %mm0, (%eax)
        ret $4
        .size   old_32_to_64, .-old_32_to_64
.globl new_32_to_64
        .type   new_32_to_64, @function
new_32_to_64:
        movl 4(%esp), %eax
        movd 8(%esp), %mm0
        movq %mm0, (%eax)
        ret $4
        .size   new_32_to_64, .-new_32_to_64
        .ident  "GCC: (GNU) 4.0.0 20041130 (experimental)"
        .section .note.GNU-stack,"",@progbits

new_* and old_* functions produce the same code.
Comment 9 Uroš Bizjak 2005-01-13 09:26:16 UTC
Fixed on mainline.