| Summary: | [3.3 Regression] SH ICE 3.3 branch | ||
|---|---|---|---|
| Product: | gcc | Reporter: | Dhananjay Deshpande <dhananjayd> |
| Component: | target | Assignee: | Not yet assigned to anyone <unassigned> |
| Status: | RESOLVED FIXED | ||
| Severity: | normal | CC: | gcc-bugs |
| Priority: | P3 | Keywords: | ice-on-valid-code |
| Version: | 3.3 | ||
| Target Milestone: | 3.3.1 | ||
| Host: | Target: | sh-unknown-elf | |
| Build: | Known to work: | ||
| Known to fail: | Last reconfirmed: | 2003-05-25 13:39:28 | |
| Attachments: | bug.c | ||
Fix: Remove -mhitachi option. From: Dara Hazeghi <dhazeghi@yahoo.com> To: gcc-gnats@gcc.gnu.org, dhananjayd@kpitcummins.com Cc: Subject: Re: target/10413: SH ICE 3.3 branch Date: Sat, 10 May 2003 02:32:41 -0700 http://gcc.gnu.org/cgi-bin/gnatsweb.pl?cmd=view%20audit- trail&database=gcc&pr=10413 Hello, I can confirm that the testcase in this report fails to compile with gcc 3.2.3 or 3.3 branch. With mainline (20030509) however, it compiles fine with all the options specified. Dara Is this a regression from a previous version? Hello, with gcc 3.1, this also fails. With gcc 3.0.3, the code compiles, so I believe this is a regression against 3.0.x. Thanks, Dara Subject: RE: [3.3 Regression] SH ICE 3.3 branch Hi, As there is no instruction to move register macl to mach, it should use temporary register. For this, register_move_cost needs to be defined higher than 2. The patch below fixes the problem on 3.3 branch. Although the problem doesn't appear on mainline (Better register allocation?), I believe it should be safe to apply the patch to mainline too. Regards, Dhananjay Changelog - 2003-06-25 Dhananjay Deshpande <dhananjayd@kpitcummins.com> * config/sh/sh.c (sh_register_move_cost): Add case for moving between MAC_REGS =========================================================================== --- /home/kpit/fsfsrc/gcc-20030324/gcc/config/sh/sh.c Wed Mar 26 16:37:02 2003 +++ gcc0302/gcc/config/sh/sh.c Mon Jun 16 10:55:28 2003 @@ -7845,6 +7845,9 @@ sh_register_move_cost (mode, srcclass, d if (dstclass == T_REGS || dstclass == PR_REGS) return 10; + if (dstclass == MAC_REGS && srcclass == MAC_REGS) + return 4; + if (mode == SImode && ! TARGET_SHMEDIA && TARGET_FMOVD && REGCLASS_HAS_FP_REG (srcclass) && REGCLASS_HAS_FP_REG (dstclass)) =========================================================================== Subject: RE: [3.3 Regression] SH ICE 3.3 branch Can be closed. Patch applied to branch and mainline. -----Original Message----- From: dhazeghi at yahoo dot com [mailto:gcc-bugzilla@gcc.gnu.org] Sent: Thursday, July 10, 2003 5:44 AM To: Dhananjay R. Deshpande Subject: [Bug target/10413] [3.3 Regression] SH ICE 3.3 branch PLEASE REPLY TO gcc-bugzilla@gcc.gnu.org ONLY, *NOT* gcc-bugs@gcc.gnu.org. http://gcc.gnu.org/bugzilla/show_bug.cgi?id=10413 dhazeghi at yahoo dot com changed: What |Removed |Added ---------------------------------------------------------------------------- CC|dhazeghi at yahoo dot com | Keywords| |ice-on-valid-code ------- You are receiving this mail because: ------- You reported the bug, or are watching the reporter. Patch was applied, according to submitter. I've also noticed a similar problem with MAC<->T copies. Is there a more general way to check for reg-reg copies that need temps? |
The source code below if compiled with sh-elf-gcc -S -m2 -O2 -mhitachi gives Internal Compiler error. [dhananjayd@Linuxsrv5 gnu]$ ~/sh2e-elf/bin/sh-elf-gcc -S -m2 -O2 -mhitachi bug.c bug.c: In function `func1': bug.c:39: error: insn does not satisfy its constraints: (insn:HI 29 28 160 0 0x4015b980 (set (reg/v:SI 148 mach [166]) (reg:SI 149 macl)) 122 {movsi_i} (insn_list 28 (nil)) (expr_list:REG_EQUAL (mult:SI (reg:SI 0 r0 [172]) (reg/v:SI 11 r11 [163])) (nil))) bug.c:39: internal compiler error: in reload_cse_simplify_operands, at reload1.c :8335 Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://www.gnu.org/software/gcc/bugs.html> for instructions. ----------------------------------------------------------- int func0 (unsigned long address, unsigned long stride, char* p_buffer, unsigned long count, unsigned short chk); int func1 (unsigned short type, unsigned long count, unsigned long address, unsigned long stride, void* buffer) { unsigned long remainder = count; unsigned long block_size; unsigned short chk; char* p_buffer = buffer; int err = 0; block_size = 0x3ff0/8/stride * stride; while (remainder) { if (type == 0) { while (1) { count = (remainder < block_size) ? remainder : block_size; err = func0 (address, stride, p_buffer, count, chk = 0); if (err) break; } count = (count < 2) ? count : count - 1; p_buffer += count; } remainder -= count; address += count * stride; } return err; } ----------------------------------------------------------- It is trying to load macl into mach but no such instruction exists. The problem disappears in mainline but could appear with different test case with more register pressure. Release: 3.2, 3.3 branch Environment: Linux X SH How-To-Repeat: Try compiling above test case with sh-elf-gcc -S -m2 -O2 -mhitachi bug.c