Summary: | [mips+msa] ICE when comparing 64 bit vectors | ||
---|---|---|---|
Product: | gcc | Reporter: | Evan Nemerson <evan> |
Component: | target | Assignee: | Not yet assigned to anyone <unassigned> |
Status: | UNCONFIRMED --- | ||
Severity: | normal | CC: | xry111 |
Priority: | P3 | Keywords: | ice-on-valid-code |
Version: | 10.2.1 | ||
Target Milestone: | --- | ||
Host: | Target: | mips | |
Build: | Known to work: | ||
Known to fail: | Last reconfirmed: |
Description
Evan Nemerson
2021-05-26 04:42:11 UTC
It's not just comparisons. <<, >>, /, * also don't work. AFAICT only bitwise operations and +/- work, as well as everything with a 64-bit element type (i.e., a vector of one element)… 8/16/32-bit elements all fail. 11.1.0 also ICE with this case. There is some strange interaction between -mmsa and -mloongson-mmi causing this. It can be reproduced by building pixman (which enables -mloongson-mmi by default) with -mmsa. Patch proposed: https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573213.html The master branch has been updated by Xi Ruoyao <xry111@gcc.gnu.org>: https://gcc.gnu.org/g:82625a42e652d52fc6bbe6070f8d0589d5e0c8ad commit r12-2183-g82625a42e652d52fc6bbe6070f8d0589d5e0c8ad Author: Xi Ruoyao <xry111@mengyan1223.wang> Date: Fri Jun 18 20:11:42 2021 +0800 mips: check MSA support for vector modes [PR100760,PR100761,PR100762] Check if the vector mode is really supported by MSA in certain cases, instead of testing ISA_HAS_MSA. Simply testing ISA_HAS_MSA can cause ICE when MSA is enabled besides other MIPS SIMD extensions (notably, Loongson MMI). gcc/ PR target/100760 PR target/100761 PR target/100762 * config/mips/mips.c (mips_const_insns): Use MSA_SUPPORTED_MODE_P instead of ISA_HAS_MSA. (mips_expand_vec_unpack): Likewise. (mips_expand_vector_init): Likewise. gcc/testsuite/ PR target/100760 PR target/100761 PR target/100762 * gcc.target/mips/pr100760.c: New test. * gcc.target/mips/pr100761.c: New test. * gcc.target/mips/pr100762.c: New test. |