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(-)a/gcc/config/riscv/riscv.c (-8 / +11 lines)
Lines 891-907 riscv_compressed_lw_address_p (rtx x) Link Here
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  bool result = riscv_classify_address (&addr, x, GET_MODE (x),
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  bool result = riscv_classify_address (&addr, x, GET_MODE (x),
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					reload_completed);
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					reload_completed);
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  /* Before reload, assuming all load/stores of valid addresses get compressed
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     gives better code size than checking if the address is reg + small_offset
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     early on.  */
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  if (result && !reload_completed)
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    return true;
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  /* Return false if address is not compressed_reg + small_offset.  */
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  /* Return false if address is not compressed_reg + small_offset.  */
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  if (!result
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  if (!result
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      || addr.type != ADDRESS_REG
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      || addr.type != ADDRESS_REG
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      || (!riscv_compressed_reg_p (REGNO (addr.reg))
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      /* Before reload, assume all registers are OK.  */
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	    && addr.reg != stack_pointer_rtx)
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      || (reload_completed
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	  && !riscv_compressed_reg_p (REGNO (addr.reg))
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	  && addr.reg != stack_pointer_rtx)
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      || !riscv_compressed_lw_offset_p (addr.offset))
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      || !riscv_compressed_lw_offset_p (addr.offset))
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    return false;
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    return false;
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Lines 1708-1713 riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN Link Here
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	 instructions it needs.  */
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	 instructions it needs.  */
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      if ((cost = riscv_address_insns (XEXP (x, 0), mode, true)) > 0)
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      if ((cost = riscv_address_insns (XEXP (x, 0), mode, true)) > 0)
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	{
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	{
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	  /* When optimizing for size, make uncompressible 32-bit addresses
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	     more expensive so that compressible 32-bit addresses are
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	     preferred.  */
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	  if (TARGET_RVC && !speed && riscv_mshorten_memrefs && mode == SImode
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	      && !riscv_compressed_lw_address_p (XEXP (x, 0)))
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	    cost++;
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	  *total = COSTS_N_INSNS (cost + tune_param->memory_cost);
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	  *total = COSTS_N_INSNS (cost + tune_param->memory_cost);
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	  return true;
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	  return true;
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	}
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	}

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