diff --git a/gcc/config/ia64/ia64.h b/gcc/config/ia64/ia64.h
index eceab5f..219139c 100644
--- a/gcc/config/ia64/ia64.h
+++ b/gcc/config/ia64/ia64.h
@@ -1541,7 +1541,7 @@ do {									\
 /* Define this macro if operations between registers with integral mode smaller
    than a word are always performed on the entire register.  */
 
-#define WORD_REGISTER_OPERATIONS 1
+#define WORD_REGISTER_OPERATIONS -1
 
 /* Define this macro to be a C expression indicating when insns that read
    memory in MODE, an integral mode narrower than a word, set the bits outside
diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c
index 6d50781..726765d 100644
--- a/gcc/rtlanal.c
+++ b/gcc/rtlanal.c
@@ -4743,7 +4743,9 @@ nonzero_bits1 (const_rtx x, scalar_int_mode mode, const_rtx known_x,
 	       || ((extend_op = load_extend_op (inner_mode)) == SIGN_EXTEND
 		   ? val_signbit_known_set_p (inner_mode, nonzero)
 		   : extend_op != ZERO_EXTEND)
-	       || (!MEM_P (SUBREG_REG (x)) && !REG_P (SUBREG_REG (x))))
+	       || (!MEM_P (SUBREG_REG (x))
+		   && (!REG_P (SUBREG_REG (x))
+		       || WORD_REGISTER_OPERATIONS < 0)))
 	      && xmode_width > GET_MODE_PRECISION (inner_mode))
 	    nonzero |= (GET_MODE_MASK (xmode) & ~GET_MODE_MASK (inner_mode));
 	}
@@ -5071,7 +5073,8 @@ num_sign_bit_copies1 (const_rtx x, scalar_int_mode mode, const_rtx known_x,
 	  if (WORD_REGISTER_OPERATIONS
 	      && load_extend_op (inner_mode) == SIGN_EXTEND
 	      && paradoxical_subreg_p (x)
-	      && (MEM_P (SUBREG_REG (x)) || REG_P (SUBREG_REG (x))))
+	      && (MEM_P (SUBREG_REG (x))
+		  || (REG_P (SUBREG_REG (x)) && WORD_REGISTER_OPERATIONS > 0)))
 	    return cached_num_sign_bit_copies (SUBREG_REG (x), mode,
 					       known_x, known_mode, known_ret);
 	}