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(-)a/gcc/config/ia64/ia64.md (-2 / +8 lines)
Lines 3329-3335 Link Here
3329
	(ior:DI (zero_extend:DI (match_dup 1))
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	(ior:DI (zero_extend:DI (match_dup 1))
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		(ashift:DI (zero_extend:DI (match_dup 1)) (const_int 32))))
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		(ashift:DI (zero_extend:DI (match_dup 1)) (const_int 32))))
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   (set (match_dup 3)
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   (set (match_dup 3)
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	(lshiftrt:DI (match_dup 3) (match_dup 2)))]
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	(lshiftrt:DI (match_dup 3) (match_dup 2)))
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   (set (match_dup 3)
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	(zero_extract:DI (match_dup 3)
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		(const_int 32) (const_int 0)))]
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  "operands[3] = gen_rtx_REG (DImode, REGNO (operands[0]));")
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  "operands[3] = gen_rtx_REG (DImode, REGNO (operands[0]));")
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3337
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(define_expand "rotlsi3"
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(define_expand "rotlsi3"
Lines 3358-3364 Link Here
3358
	(ior:DI (zero_extend:DI (match_dup 1))
3361
	(ior:DI (zero_extend:DI (match_dup 1))
3359
		(ashift:DI (zero_extend:DI (match_dup 1)) (const_int 32))))
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		(ashift:DI (zero_extend:DI (match_dup 1)) (const_int 32))))
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   (set (match_dup 3)
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   (set (match_dup 3)
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	(lshiftrt:DI (match_dup 3) (match_dup 2)))]
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	(lshiftrt:DI (match_dup 3) (match_dup 2)))
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   (set (match_dup 3)
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	(zero_extract:DI (match_dup 3)
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		(const_int 32) (const_int 0)))]
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{
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{
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  operands[3] = gen_rtx_REG (DImode, REGNO (operands[0]));
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  operands[3] = gen_rtx_REG (DImode, REGNO (operands[0]));
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  operands[2] = GEN_INT (32 - INTVAL (operands[2]));
3370
  operands[2] = GEN_INT (32 - INTVAL (operands[2]));

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